3144 lines
96 KiB
Plaintext
3144 lines
96 KiB
Plaintext
# 0 "/home/jeremy/utat-dev/zephyrproject/zephyr/misc/empty_file.c"
|
|
# 0 "<built-in>"
|
|
# 0 "<command-line>"
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/dts-v1/;
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431Xb.dtsi" 1 3 4
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431.dtsi" 1 3 4
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 1 3 4
|
|
# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/armv7-m.dtsi" 1 3 4
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/skeleton.dtsi" 1 3 4
|
|
# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/skeleton.dtsi" 3 4
|
|
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
chosen {};
|
|
|
|
aliases {};
|
|
};
|
|
# 4 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/armv7-m.dtsi" 2 3 4
|
|
|
|
/ {
|
|
soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "simple-bus";
|
|
interrupt-parent = <&nvic>;
|
|
ranges;
|
|
|
|
nvic: interrupt-controller@e000e100 {
|
|
#address-cells = <1>;
|
|
compatible = "arm,v7m-nvic";
|
|
reg = <0xe000e100 0xc00>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
systick: timer@e000e010 {
|
|
compatible = "arm,armv7m-systick";
|
|
reg = <0xe000e010 0x10>;
|
|
};
|
|
};
|
|
};
|
|
# 12 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h" 1 3 4
|
|
# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32_common_clocks.h" 1 3 4
|
|
# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h" 2 3 4
|
|
# 13 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/i2c/i2c.h" 1 3 4
|
|
# 14 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/gpio.h" 1 3 4
|
|
# 15 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm/pwm.h" 1 3 4
|
|
# 16 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 1 3 4
|
|
# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 1 3 4
|
|
# 19 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 1 3 4
|
|
# 34 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 1 3 4
|
|
# 18 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 1 3 4
|
|
# 1465 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_listify.h" 1 3 4
|
|
# 1466 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 2 3 4
|
|
# 19 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
|
|
# 203 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_is_eq.h" 1 3 4
|
|
# 204 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
|
|
# 234 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_inc.h" 1 3 4
|
|
# 235 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_dec.h" 1 3 4
|
|
# 238 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_x2.h" 1 3 4
|
|
# 241 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
|
|
# 35 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 2 3 4
|
|
# 20 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 2 3 4
|
|
# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 2 3 4
|
|
# 17 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm/stm32_pwm.h" 1 3 4
|
|
# 18 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dma/stm32_dma.h" 1 3 4
|
|
# 19 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h" 1 3 4
|
|
# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32-common.h" 1 3 4
|
|
# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h" 2 3 4
|
|
# 20 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/sensor/qdec_stm32.h" 1 3 4
|
|
# 21 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/freq.h" 1 3 4
|
|
# 22 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/mem.h" 1 3 4
|
|
# 23 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4
|
|
|
|
/ {
|
|
chosen {
|
|
zephyr,crc = &crc;
|
|
zephyr,entropy = &rng;
|
|
zephyr,flash-controller = &flash;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu0: cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-m4f";
|
|
reg = <0>;
|
|
cpu-power-states = <&stop0 &stop1>;
|
|
};
|
|
|
|
power-states {
|
|
stop0: state0 {
|
|
compatible = "zephyr,power-state";
|
|
power-state-name = "suspend-to-idle";
|
|
substate-id = <1>;
|
|
min-residency-us = <20>;
|
|
};
|
|
|
|
stop1: state1 {
|
|
compatible = "zephyr,power-state";
|
|
power-state-name = "suspend-to-idle";
|
|
substate-id = <2>;
|
|
min-residency-us = <100>;
|
|
};
|
|
};
|
|
};
|
|
|
|
sram0: memory@20000000 {
|
|
compatible = "zephyr,memory-region", "mmio-sram";
|
|
zephyr,memory-region = "SRAM0";
|
|
};
|
|
|
|
clocks {
|
|
clk_hse: clk-hse {
|
|
#clock-cells = <0>;
|
|
compatible = "st,stm32-hse-clock";
|
|
status = "disabled";
|
|
};
|
|
|
|
clk_hsi: clk-hsi {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <(((16) * 1000) * 1000)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
clk_hsi48: clk-hsi48 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <(((48) * 1000) * 1000)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
clk_lse: clk-lse {
|
|
#clock-cells = <0>;
|
|
compatible = "st,stm32-lse-clock";
|
|
clock-frequency = <32768>;
|
|
driving-capability = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
clk_lsi: clk-lsi {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <((32) * 1000)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pll: pll {
|
|
#clock-cells = <0>;
|
|
compatible = "st,stm32g4-pll-clock";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
soc {
|
|
|
|
|
|
|
|
adc1: adc@50000000 {
|
|
compatible = "st,stm32-adc";
|
|
reg = <0x50000000 0x100>;
|
|
clocks = <&rcc (0x04c) (1 << 13)>;
|
|
clock-names = "adcx";
|
|
interrupts = <18 0>;
|
|
#io-channel-cells = <1>;
|
|
st,adc-resolutions = <12 10 8 6>;
|
|
sampling-times = <3 7 13 25 48 93 248 641>;
|
|
st,adc-sequencer = "programmable";
|
|
st,adc-oversampler = "minimal";
|
|
st,adc-internal-regulator = "startup-sw-delay";
|
|
st,adc-has-deep-powerdown;
|
|
st,adc-has-differential-support;
|
|
st,adc-has-injected-support;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc2: adc@50000100 {
|
|
compatible = "st,stm32-adc";
|
|
reg = <0x50000100 0x100>;
|
|
clocks = <&rcc (0x04c) (1 << 13)>;
|
|
clock-names = "adcx";
|
|
interrupts = <18 0>;
|
|
#io-channel-cells = <1>;
|
|
st,adc-resolutions = <12 10 8 6>;
|
|
sampling-times = <3 7 13 25 48 93 248 641>;
|
|
st,adc-sequencer = "programmable";
|
|
st,adc-oversampler = "minimal";
|
|
st,adc-internal-regulator = "startup-sw-delay";
|
|
st,adc-has-deep-powerdown;
|
|
st,adc-has-differential-support;
|
|
st,adc-has-injected-support;
|
|
status = "disabled";
|
|
};
|
|
|
|
dac1: dac@50000800 {
|
|
compatible = "st,stm32-dac";
|
|
reg = <0x50000800 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 16)>;
|
|
status = "disabled";
|
|
#io-channel-cells = <1>;
|
|
};
|
|
|
|
dac3: dac@50001000 {
|
|
compatible = "st,stm32-dac";
|
|
reg = <0x50001000 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 18)>;
|
|
status = "disabled";
|
|
#io-channel-cells = <1>;
|
|
};
|
|
|
|
flash: flash-controller@40022000 {
|
|
compatible = "st,stm32-flash-controller", "st,stm32g4-flash-controller";
|
|
reg = <0x40022000 0x400>;
|
|
interrupts = <3 0>;
|
|
clocks = <&rcc (0x048) (1 << 8)>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
flash0: flash@8000000 {
|
|
compatible = "st,stm32-nv-flash", "soc-nv-flash";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
write-block-size = <8>;
|
|
erase-block-size = <2048>;
|
|
|
|
max-erase-time = <25>;
|
|
};
|
|
|
|
st_nvm_user_otp: flash@1fff7000 {
|
|
compatible = "st,stm32-nvm-otp";
|
|
reg = <0x1fff7000 ((1) * 1024)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
|
|
flash@1fff7500 {
|
|
compatible = "st,stm32-nvm-otp";
|
|
reg = <0x1fff7500 768>;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
ts_cal1_otp: ts-cal1@a8 {
|
|
reg = <0xa8 0x2>;
|
|
#nvmem-cell-cells = <0>;
|
|
read-only;
|
|
};
|
|
|
|
vrefint_otp: vrefint@aa {
|
|
reg = <0xaa 0x2>;
|
|
#nvmem-cell-cells = <0>;
|
|
read-only;
|
|
};
|
|
|
|
ts_cal2_otp: ts-cal2@ca {
|
|
reg = <0xca 0x2>;
|
|
#nvmem-cell-cells = <0>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
rcc: rcc@40021000 {
|
|
compatible = "st,stm32-rcc";
|
|
#clock-cells = <2>;
|
|
reg = <0x40021000 0x400>;
|
|
undershoot-prevention;
|
|
|
|
rctl: reset-controller {
|
|
compatible = "st,stm32-rcc-rctl";
|
|
#reset-cells = <1>;
|
|
};
|
|
};
|
|
|
|
exti: interrupt-controller@40010400 {
|
|
compatible = "st,stm32-exti";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
#address-cells = <0>;
|
|
reg = <0x40010400 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 0)>;
|
|
num-lines = <64>;
|
|
interrupts = <6 0>, <7 0>, <8 0>, <9 0>,
|
|
<10 0>, <23 0>, <40 0>;
|
|
interrupt-names = "line0", "line1", "line2-TSC", "line3",
|
|
"line4", "line5-9", "line10-15";
|
|
line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
|
|
<4 1>, <5 5>, <10 6>;
|
|
};
|
|
|
|
pinctrl: pin-controller@48000000 {
|
|
compatible = "st,stm32-pinctrl";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x48000000 0x2000>;
|
|
|
|
gpioa: gpio@48000000 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48000000 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 0)>;
|
|
};
|
|
|
|
gpiob: gpio@48000400 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48000400 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 1)>;
|
|
};
|
|
|
|
gpioc: gpio@48000800 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48000800 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 2)>;
|
|
};
|
|
|
|
gpiod: gpio@48000c00 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48000c00 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 3)>;
|
|
};
|
|
|
|
gpioe: gpio@48001000 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48001000 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 4)>;
|
|
};
|
|
|
|
gpiof: gpio@48001400 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48001400 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 5)>;
|
|
};
|
|
|
|
gpiog: gpio@48001800 {
|
|
compatible = "st,stm32-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x48001800 0x400>;
|
|
clocks = <&rcc (0x04c) (1 << 6)>;
|
|
};
|
|
};
|
|
|
|
usart1: serial@40013800 {
|
|
compatible = "st,stm32-usart", "st,stm32-uart";
|
|
reg = <0x40013800 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 14)>;
|
|
resets = <&rctl (((0x40) << 5U) | (14))>;
|
|
interrupts = <37 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usart2: serial@40004400 {
|
|
compatible = "st,stm32-usart", "st,stm32-uart";
|
|
reg = <0x40004400 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 17)>;
|
|
resets = <&rctl (((0x38) << 5U) | (17))>;
|
|
interrupts = <38 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usart3: serial@40004800 {
|
|
compatible = "st,stm32-usart", "st,stm32-uart";
|
|
reg = <0x40004800 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 18)>;
|
|
resets = <&rctl (((0x38) << 5U) | (18))>;
|
|
interrupts = <39 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart4: serial@40004c00 {
|
|
compatible = "st,stm32-uart";
|
|
reg = <0x40004c00 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 19)>;
|
|
resets = <&rctl (((0x38) << 5U) | (19))>;
|
|
interrupts = <52 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
lpuart1: serial@40008000 {
|
|
compatible = "st,stm32-lpuart", "st,stm32-uart";
|
|
reg = <0x40008000 0x400>;
|
|
clocks = <&rcc (0x05c) (1 << 0)>;
|
|
resets = <&rctl (((0x3C) << 5U) | (0))>;
|
|
interrupts = <91 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
iwdg: watchdog@40003000 {
|
|
compatible = "st,stm32-watchdog";
|
|
reg = <0x40003000 0x400>;
|
|
status = "disabled";
|
|
};
|
|
|
|
wwdg: watchdog@40002c00 {
|
|
compatible = "st,stm32-window-watchdog";
|
|
reg = <0x40002c00 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 11)>;
|
|
interrupts = <0 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@40005400 {
|
|
compatible = "st,stm32-i2c-v2";
|
|
clock-frequency = <100000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40005400 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 21)>;
|
|
interrupts = <31 0>, <32 0>;
|
|
interrupt-names = "event", "error";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c2: i2c@40005800 {
|
|
compatible = "st,stm32-i2c-v2";
|
|
clock-frequency = <100000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40005800 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 22)>;
|
|
interrupts = <33 0>, <34 0>;
|
|
interrupt-names = "event", "error";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c3: i2c@40007800 {
|
|
compatible = "st,stm32-i2c-v2";
|
|
clock-frequency = <100000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40007800 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 30)>;
|
|
interrupts = <92 0>, <93 0>;
|
|
interrupt-names = "event", "error";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi1: spi@40013000 {
|
|
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40013000 0x400>;
|
|
interrupts = <35 0>;
|
|
clocks = <&rcc (0x060) (1 << 12)>;
|
|
st,spi-data-width = "full-4-to-16-bit";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi2: spi@40003800 {
|
|
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40003800 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 14)>;
|
|
interrupts = <36 0>;
|
|
st,spi-data-width = "full-4-to-16-bit";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi3: spi@40003c00 {
|
|
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40003c00 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 15)>;
|
|
interrupts = <51 0>;
|
|
st,spi-data-width = "full-4-to-16-bit";
|
|
status = "disabled";
|
|
};
|
|
|
|
fdcan1: can@40006400 {
|
|
compatible = "st,stm32-fdcan";
|
|
reg = <0x40006400 0x400>, <0x4000a400 0x350>;
|
|
reg-names = "m_can", "message_ram";
|
|
interrupts = <21 0>, <22 0>;
|
|
interrupt-names = "int0", "int1";
|
|
clocks = <&rcc (0x058) (1 << 25)>;
|
|
bosch,mram-cfg = <0x0 28 8 3 3 0 3 3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
lptim1: timers@40007c00 {
|
|
compatible = "st,stm32-lptim";
|
|
clocks = <&rcc (0x058) (1 << 31)>;
|
|
resets = <&rctl (((0x38) << 5U) | (31))>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40007c00 0x400>;
|
|
interrupts = <49 0>;
|
|
interrupt-names = "wakeup";
|
|
status = "disabled";
|
|
};
|
|
|
|
timers1: timers@40012c00 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40012c00 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 11)>,
|
|
<&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x40) << 5U) | (11))>;
|
|
interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
|
|
interrupt-names = "brk", "up", "trgcom", "cc";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
|
|
qdec {
|
|
compatible = "st,stm32-qdec";
|
|
st,input-filter-level = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers2: timers@40000000 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40000000 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 0)>,
|
|
<&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x38) << 5U) | (0))>;
|
|
interrupts = <28 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
qdec {
|
|
compatible = "st,stm32-qdec";
|
|
st,input-filter-level = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers3: timers@40000400 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40000400 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 1)>,
|
|
<&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x38) << 5U) | (1))>;
|
|
interrupts = <29 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
qdec {
|
|
compatible = "st,stm32-qdec";
|
|
st,input-filter-level = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers4: timers@40000800 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40000800 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 2)>,
|
|
<&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x38) << 5U) | (2))>;
|
|
interrupts = <30 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
qdec {
|
|
compatible = "st,stm32-qdec";
|
|
st,input-filter-level = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers6: timers@40001000 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40001000 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 4)>,
|
|
<&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x38) << 5U) | (4))>;
|
|
interrupts = <54 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers7: timers@40001400 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40001400 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 5)>,
|
|
<&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x38) << 5U) | (5))>;
|
|
interrupts = <55 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers8: timers@40013400 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40013400 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 13)>,
|
|
<&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x40) << 5U) | (13))>;
|
|
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
|
|
interrupt-names = "brk", "up", "trgcom", "cc";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
|
|
qdec {
|
|
compatible = "st,stm32-qdec";
|
|
st,input-filter-level = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers15: timers@40014000 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40014000 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 16)>,
|
|
<&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x40) << 5U) | (16))>;
|
|
interrupts = <24 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers16: timers@40014400 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40014400 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 17)>,
|
|
<&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x40) << 5U) | (17))>;
|
|
interrupts = <25 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timers17: timers@40014800 {
|
|
compatible = "st,stm32-timers";
|
|
reg = <0x40014800 0x400>;
|
|
clocks = <&rcc (0x060) (1 << 18)>,
|
|
<&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>;
|
|
resets = <&rctl (((0x40) << 5U) | (18))>;
|
|
interrupts = <26 0>;
|
|
interrupt-names = "global";
|
|
st,prescaler = <0>;
|
|
status = "disabled";
|
|
|
|
pwm {
|
|
compatible = "st,stm32-pwm";
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
counter {
|
|
compatible = "st,stm32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
rtc: rtc@40002800 {
|
|
compatible = "st,stm32-rtc";
|
|
reg = <0x40002800 0x400>;
|
|
interrupts = <41 0>;
|
|
clocks = <&rcc (0x058) (1 << 10)>;
|
|
prescaler = <32768>;
|
|
alarms-count = <2>;
|
|
alrm-exti-line = <17>;
|
|
status = "disabled";
|
|
};
|
|
|
|
rng: rng@50060800 {
|
|
compatible = "st,stm32-rng";
|
|
reg = <0x50060800 0x400>;
|
|
interrupts = <90 0>;
|
|
clocks = <&rcc (0x04c) (1 << 26)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb: usb@40005c00 {
|
|
compatible = "st,stm32-usb";
|
|
reg = <0x40005c00 0x400>;
|
|
interrupts = <20 0>, <19 0>;
|
|
interrupt-names = "usb", "usbhp";
|
|
num-bidir-endpoints = <8>;
|
|
ram-size = <1024>;
|
|
maximum-speed = "full-speed";
|
|
phys = <&usb_fs_phy>;
|
|
clocks = <&rcc (0x058) (1 << 23)>,
|
|
<&rcc ((0x003 + 1) + 1) ((((0x88) & 0xFFFFU) << 0U) | (((26) & 0x1FU) << 16U) | ((((27) - (26)) & 0x3U) << 21U) | ((((0)) & 0xFFU) << 24U))>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dma1: dma@40020000 {
|
|
compatible = "st,stm32-dma-v2";
|
|
#dma-cells = <3>;
|
|
reg = <0x40020000 0x400>;
|
|
clocks = <&rcc (0x048) (1 << 0)>;
|
|
dma-offset = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dma2: dma@40020400 {
|
|
compatible = "st,stm32-dma-v2";
|
|
#dma-cells = <3>;
|
|
reg = <0x40020400 0x400>;
|
|
clocks = <&rcc (0x048) (1 << 1)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dmamux1: dmamux@40020800 {
|
|
compatible = "st,stm32-dmamux";
|
|
#dma-cells = <3>;
|
|
reg = <0x40020800 0x400>;
|
|
interrupts = <94 0>;
|
|
clocks = <&rcc (0x048) (1 << 2)>;
|
|
dma-generators = <4>;
|
|
dma-requests = <111>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ucpd1: ucpd@4000a000 {
|
|
compatible = "st,stm32-ucpd";
|
|
reg = <0x4000a000 0x400>;
|
|
clocks = <&rcc (0x058) (1 << 4)>;
|
|
interrupts = <63 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sai1_a: sai1@40015404 {
|
|
compatible = "st,stm32-sai";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40015404 0x20>;
|
|
clocks = <&rcc (0x060) (1 << 21)>;
|
|
dmas = <&dma1 1 108 (((0 & 0x1) << 5) | ((2 & 0x3) << 16) |
|
|
(((1 & 0x3) << 11) | ((1 & 0x3) << 13)))>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sai1_b: sai1@40015424 {
|
|
compatible = "st,stm32-sai";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40015424 0x20>;
|
|
clocks = <&rcc (0x060) (1 << 21)>;
|
|
dmas = <&dma1 2 109 (((0 & 0x1) << 5) | ((2 & 0x3) << 16) |
|
|
(((1 & 0x3) << 11) | ((1 & 0x3) << 13)))>;
|
|
status = "disabled";
|
|
};
|
|
|
|
opamp1: opamp1@40010300 {
|
|
compatible = "st,stm32g4-opamp", "st,stm32-opamp";
|
|
reg = <0x40010300 0x18>;
|
|
clocks = <&rcc (0x060) (1 << 0)>;
|
|
clock-names = "opampx";
|
|
programmable-gain = "OPAMP_GAIN_1", "OPAMP_GAIN_2",
|
|
"OPAMP_GAIN_3", "OPAMP_GAIN_4",
|
|
"OPAMP_GAIN_7", "OPAMP_GAIN_8",
|
|
"OPAMP_GAIN_15", "OPAMP_GAIN_16",
|
|
"OPAMP_GAIN_31", "OPAMP_GAIN_32",
|
|
"OPAMP_GAIN_63", "OPAMP_GAIN_64";
|
|
status = "disabled";
|
|
};
|
|
|
|
opamp2: opamp2@40010304 {
|
|
compatible = "st,stm32g4-opamp", "st,stm32-opamp";
|
|
reg = <0x40010304 0x18>;
|
|
clocks = <&rcc (0x060) (1 << 0)>;
|
|
clock-names = "opampx";
|
|
programmable-gain = "OPAMP_GAIN_1", "OPAMP_GAIN_2",
|
|
"OPAMP_GAIN_3", "OPAMP_GAIN_4",
|
|
"OPAMP_GAIN_7", "OPAMP_GAIN_8",
|
|
"OPAMP_GAIN_15", "OPAMP_GAIN_16",
|
|
"OPAMP_GAIN_31", "OPAMP_GAIN_32",
|
|
"OPAMP_GAIN_63", "OPAMP_GAIN_64";
|
|
status = "disabled";
|
|
};
|
|
|
|
opamp3: opamp3@40010308 {
|
|
compatible = "st,stm32g4-opamp", "st,stm32-opamp";
|
|
reg = <0x40010308 0x18>;
|
|
clocks = <&rcc (0x060) (1 << 0)>;
|
|
clock-names = "opampx";
|
|
programmable-gain = "OPAMP_GAIN_1", "OPAMP_GAIN_2",
|
|
"OPAMP_GAIN_3", "OPAMP_GAIN_4",
|
|
"OPAMP_GAIN_7", "OPAMP_GAIN_8",
|
|
"OPAMP_GAIN_15", "OPAMP_GAIN_16",
|
|
"OPAMP_GAIN_31", "OPAMP_GAIN_32",
|
|
"OPAMP_GAIN_63", "OPAMP_GAIN_64";
|
|
status = "disabled";
|
|
};
|
|
|
|
comp1: comparator@40010200 {
|
|
compatible = "st,stm32g4-comp", "st,stm32-comp";
|
|
reg = <0x40010200 0x4>;
|
|
interrupts = <64 0>;
|
|
st,exti-line = <21>;
|
|
clocks = <&rcc (0x060) (1 << 0)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
comp2: comparator@40010204 {
|
|
compatible = "st,stm32g4-comp", "st,stm32-comp";
|
|
reg = <0x40010204 0x4>;
|
|
interrupts = <64 0>;
|
|
st,exti-line = <22>;
|
|
clocks = <&rcc (0x060) (1 << 0)>;
|
|
status = "disabled";
|
|
};
|
|
|
|
crc: crc@40023000 {
|
|
compatible = "st,stm32-crc";
|
|
reg = <0x40023000 0x400>;
|
|
clocks = <&rcc (0x048) (1 << 12)>;
|
|
resets = <&rctl (((0x28) << 5U) | (12))>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
die_temp: dietemp {
|
|
compatible = "st,stm32-temp-cal";
|
|
nvmem-cells = <&ts_cal1_otp>, <&ts_cal2_otp>;
|
|
nvmem-cell-names = "TS_CAL1", "TS_CAL2";
|
|
ts-cal1-temp = <30>;
|
|
ts-cal2-temp = <130>;
|
|
ts-cal-vrefanalog = <3000>;
|
|
io-channels = <&adc1 16>;
|
|
status = "disabled";
|
|
};
|
|
|
|
vref: vref {
|
|
compatible = "st,stm32-vref";
|
|
nvmem-cells = <&vrefint_otp>;
|
|
vrefint-cal-mv = <3000>;
|
|
io-channels = <&adc1 18>;
|
|
status = "disabled";
|
|
};
|
|
|
|
vbat: vbat {
|
|
compatible = "st,stm32-vbat";
|
|
ratio = <3>;
|
|
io-channels = <&adc1 17>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb_fs_phy: usbphy {
|
|
compatible = "usb-nop-xceiv";
|
|
#phy-cells = <0>;
|
|
};
|
|
|
|
smbus1: smbus1 {
|
|
compatible = "st,stm32-smbus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
i2c = <&i2c1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
smbus2: smbus2 {
|
|
compatible = "st,stm32-smbus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
i2c = <&i2c2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
smbus3: smbus3 {
|
|
compatible = "st,stm32-smbus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
i2c = <&i2c3>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&nvic {
|
|
arm,num-irq-priority-bits = <4>;
|
|
};
|
|
# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431.dtsi" 2 3 4
|
|
|
|
/ {
|
|
soc {
|
|
compatible = "st,stm32g431", "st,stm32g4", "simple-bus";
|
|
|
|
dma1: dma@40020000 {
|
|
interrupts = <11 0 12 0 13 0 14 0 15 0 16 0>;
|
|
dma-requests = <6>;
|
|
};
|
|
|
|
dma2: dma@40020400 {
|
|
interrupts = <56 0 57 0 58 0 59 0 60 0 97 0>;
|
|
dma-requests = <6>;
|
|
dma-offset = <6>;
|
|
};
|
|
|
|
dmamux1: dmamux@40020800 {
|
|
dma-channels = <12>;
|
|
};
|
|
};
|
|
};
|
|
# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431Xb.dtsi" 2 3 4
|
|
|
|
&sram0 {
|
|
reg = <0x20000000 ((32) * 1024)>;
|
|
};
|
|
|
|
&flash0 {
|
|
reg = <0x08000000 ((128) * 1024)>;
|
|
ranges = <0 0x8000000 ((128) * 1024)>;
|
|
};
|
|
# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi" 1 3 4
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h" 1 3 4
|
|
# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h" 3 4
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h" 1 3 4
|
|
# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h" 2 3 4
|
|
# 8 "/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi" 2 3 4
|
|
|
|
&pinctrl {
|
|
|
|
|
|
|
|
/omit-if-no-ref/ adc1_in1_pa0: adc1_in1_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in2_pa1: adc1_in2_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in3_pa2: adc1_in3_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in4_pa3: adc1_in4_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in15_pb0: adc1_in15_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in12_pb1: adc1_in12_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in14_pb11: adc1_in14_pb11 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in11_pb12: adc1_in11_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in5_pb14: adc1_in5_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in6_pc0: adc1_in6_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in7_pc1: adc1_in7_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in8_pc2: adc1_in8_pc2 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in9_pc3: adc1_in9_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc1_in10_pf0: adc1_in10_pf0 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in1_pa0: adc2_in1_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in2_pa1: adc2_in2_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in17_pa4: adc2_in17_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in13_pa5: adc2_in13_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in3_pa6: adc2_in3_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in4_pa7: adc2_in4_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in12_pb2: adc2_in12_pb2 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in14_pb11: adc2_in14_pb11 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in15_pb15: adc2_in15_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in6_pc0: adc2_in6_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in7_pc1: adc2_in7_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in8_pc2: adc2_in8_pc2 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in9_pc3: adc2_in9_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in5_pc4: adc2_in5_pc4 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in11_pc5: adc2_in11_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ adc2_in10_pf1: adc2_in10_pf1 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ analog_pa0: analog_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa1: analog_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa2: analog_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa3: analog_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa4: analog_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa5: analog_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa6: analog_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa7: analog_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa8: analog_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa9: analog_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa10: analog_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa11: analog_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa12: analog_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa13: analog_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa14: analog_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pa15: analog_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb0: analog_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb1: analog_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb2: analog_pb2 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb3: analog_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb4: analog_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb5: analog_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb6: analog_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb7: analog_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb8: analog_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb9: analog_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb10: analog_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb11: analog_pb11 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb12: analog_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb13: analog_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb14: analog_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pb15: analog_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc0: analog_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc1: analog_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc2: analog_pc2 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc3: analog_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc4: analog_pc4 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc5: analog_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc6: analog_pc6 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc7: analog_pc7 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc8: analog_pc8 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc9: analog_pc9 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc10: analog_pc10 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc11: analog_pc11 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc12: analog_pc12 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc13: analog_pc13 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc14: analog_pc14 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pc15: analog_pc15 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pd2: analog_pd2 {
|
|
pinmux = <((((('D') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pf0: analog_pf0 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pf1: analog_pf1 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ analog_pg10: analog_pg10 {
|
|
pinmux = <((((('G') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ comp1_inm_pa0: comp1_inm_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp1_inp_pa1: comp1_inp_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp1_inm_pa4: comp1_inm_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp1_inp_pb1: comp1_inp_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_inm_pa2: comp2_inm_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_inp_pa3: comp2_inp_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_inm_pa5: comp2_inm_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_inp_pa7: comp2_inp_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_inp_pa0: comp3_inp_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_inm_pc0: comp3_inm_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_inp_pc1: comp3_inp_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_inm_pf1: comp3_inm_pf1 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp4_inp_pb0: comp4_inp_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp4_inm_pb2: comp4_inm_pb2 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ comp1_out_pa0: comp1_out_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp1_out_pa6: comp1_out_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp1_out_pa11: comp1_out_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp1_out_pb8: comp1_out_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_out_pa2: comp2_out_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_out_pa7: comp2_out_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_out_pa12: comp2_out_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp2_out_pb9: comp2_out_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_out_pb7: comp3_out_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_out_pb15: comp3_out_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp3_out_pc2: comp3_out_pc2 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp4_out_pb1: comp4_out_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp4_out_pb6: comp4_out_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ comp4_out_pb14: comp4_out_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ dac1_out1_pa4: dac1_out1_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ dac1_out2_pa5: dac1_out2_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ fdcan1_rx_pa11: fdcan1_rx_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ fdcan1_rx_pb8: fdcan1_rx_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ fdcan1_tx_pa12: fdcan1_tx_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ fdcan1_tx_pb9: fdcan1_tx_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2c1_scl_pa13: i2c1_scl_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c1_scl_pb8: i2c1_scl_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c2_scl_pa9: i2c2_scl_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c2_scl_pc4: i2c2_scl_pc4 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_scl_pa8: i2c3_scl_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_scl_pc8: i2c3_scl_pc8 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2c1_sda_pa14: i2c1_sda_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c1_sda_pb7: i2c1_sda_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c1_sda_pb9: i2c1_sda_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c2_sda_pa8: i2c2_sda_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c2_sda_pf0: i2c2_sda_pf0 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_sda_pb5: i2c3_sda_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_sda_pc9: i2c3_sda_pc9 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_sda_pc11: i2c3_sda_pc11 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2c1_smba_pb5: i2c1_smba_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c2_smba_pa10: i2c2_smba_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c2_smba_pb12: i2c2_smba_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_smba_pa9: i2c3_smba_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2c3_smba_pb2: i2c3_smba_pb2 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2s2_ck_pb13: i2s2_ck_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s2_ck_pf1: i2s2_ck_pf1 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_ck_pb3: i2s3_ck_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_ck_pc10: i2s3_ck_pc10 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2s2_mck_pa8: i2s2_mck_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s2_mck_pc6: i2s2_mck_pc6 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_mck_pa9: i2s3_mck_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_mck_pc7: i2s3_mck_pc7 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2s2_sd_pa11: i2s2_sd_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s2_sd_pb15: i2s2_sd_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_sd_pb5: i2s3_sd_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_sd_pc12: i2s3_sd_pc12 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ i2s2_ws_pb12: i2s2_ws_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s2_ws_pf0: i2s2_ws_pf0 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_ws_pa4: i2s3_ws_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ i2s3_ws_pa15: i2s3_ws_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ sys_jtms_swdio_pa13: sys_jtms_swdio_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sys_jtck_swclk_pa14: sys_jtck_swclk_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sys_jtdi_pa15: sys_jtdi_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sys_jtdo_swo_pb3: sys_jtdo_swo_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sys_jtrst_pb4: sys_jtrst_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ lptim1_out_pa14: lptim1_out_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_out_pb2: lptim1_out_pb2 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_in1_pb5: lptim1_in1_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_etr_pb6: lptim1_etr_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_in2_pb7: lptim1_in2_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_in1_pc0: lptim1_in1_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_out_pc1: lptim1_out_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_in2_pc2: lptim1_in2_pc2 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lptim1_etr_pc3: lptim1_etr_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ opamp1_vinp_pa1: opamp1_vinp_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp1_vout_pa2: opamp1_vout_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp1_vinm_pa3: opamp1_vinm_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp1_vinp_pa3: opamp1_vinp_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp1_vinp_pa7: opamp1_vinp_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp1_vinm_pc5: opamp1_vinm_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp2_vinm_pa5: opamp2_vinm_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp2_vout_pa6: opamp2_vout_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp2_vinp_pa7: opamp2_vinp_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp2_vinp_pb0: opamp2_vinp_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp2_vinp_pb14: opamp2_vinp_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp2_vinm_pc5: opamp2_vinm_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp3_vinp_pa1: opamp3_vinp_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp3_vinp_pb0: opamp3_vinp_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp3_vout_pb1: opamp3_vout_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp3_vinm_pb2: opamp3_vinm_pb2 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp3_vinm_pb10: opamp3_vinm_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ opamp3_vinp_pb13: opamp3_vinp_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ rcc_mco_pa8: rcc_mco_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ rcc_mco_pg10: rcc_mco_pg10 {
|
|
pinmux = <((((('G') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ sai1_ck1_pa3: sai1_ck1_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_mclk_a_pa3: sai1_mclk_a_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_fs_b_pa4: sai1_fs_b_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_ck2_pa8: sai1_ck2_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sck_a_pa8: sai1_sck_a_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_fs_a_pa9: sai1_fs_a_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_d1_pa10: sai1_d1_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sd_a_pa10: sai1_sd_a_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sd_b_pa13: sai1_sd_b_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_fs_b_pa14: sai1_fs_b_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sck_b_pb3: sai1_sck_b_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_mclk_b_pb4: sai1_mclk_b_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sd_b_pb5: sai1_sd_b_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_fs_b_pb6: sai1_fs_b_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_ck1_pb8: sai1_ck1_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_mclk_a_pb8: sai1_mclk_a_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_d2_pb9: sai1_d2_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_fs_a_pb9: sai1_fs_a_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sck_a_pb10: sai1_sck_a_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sd_a_pc1: sai1_sd_a_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_d1_pc3: sai1_d1_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_sd_a_pc3: sai1_sd_a_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ sai1_d3_pc5: sai1_d3_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ spi1_miso_pa6: spi1_miso_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi1_miso_pb4: spi1_miso_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_miso_pa10: spi2_miso_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_miso_pb14: spi2_miso_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_miso_pb4: spi3_miso_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_miso_pc11: spi3_miso_pc11 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ spi1_mosi_pa7: spi1_mosi_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi1_mosi_pb5: spi1_mosi_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_mosi_pa11: spi2_mosi_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_mosi_pb15: spi2_mosi_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_mosi_pb5: spi3_mosi_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_mosi_pc12: spi3_mosi_pc12 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ spi1_nss_pa4: spi1_nss_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi1_nss_pa15: spi1_nss_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_nss_pb12: spi2_nss_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_nss_pf0: spi2_nss_pf0 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_nss_pa4: spi3_nss_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_nss_pa15: spi3_nss_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ spi1_sck_pa5: spi1_sck_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi1_sck_pb3: spi1_sck_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_sck_pb13: spi2_sck_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi2_sck_pf1: spi2_sck_pf1 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_sck_pb3: spi3_sck_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
/omit-if-no-ref/ spi3_sck_pc10: spi3_sck_pc10 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
bias-pull-down;
|
|
slew-rate = "very-high-speed";
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pa6: tim1_bkin_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin2_pa11: tim1_bkin2_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pa14: tim1_bkin_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pa15: tim1_bkin_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pb8: tim1_bkin_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pb10: tim1_bkin_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pb12: tim1_bkin_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin2_pc3: tim1_bkin2_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_bkin_pc13: tim1_bkin_pc13 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_bkin_pa9: tim15_bkin_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_bkin_pc5: tim15_bkin_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_bkin_pb5: tim16_bkin_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim17_bkin_pa10: tim17_bkin_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim17_bkin_pb4: tim17_bkin_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin_pa0: tim8_bkin_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin_pa6: tim8_bkin_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin_pa10: tim8_bkin_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin2_pb6: tim8_bkin2_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin_pb7: tim8_bkin_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin2_pc9: tim8_bkin2_pc9 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_bkin_pd2: tim8_bkin_pd2 {
|
|
pinmux = <((((('D') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ tim1_ch1n_pa7: tim1_ch1n_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch1_pa8: tim1_ch1_pa8 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch2_pa9: tim1_ch2_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch3_pa10: tim1_ch3_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch1n_pa11: tim1_ch1n_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch4_pa11: tim1_ch4_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch2n_pa12: tim1_ch2n_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch2n_pb0: tim1_ch2n_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch3n_pb1: tim1_ch3n_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch1n_pb13: tim1_ch1n_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch2n_pb14: tim1_ch2n_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch3n_pb15: tim1_ch3n_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch1_pc0: tim1_ch1_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch2_pc1: tim1_ch2_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch3_pc2: tim1_ch3_pc2 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch4_pc3: tim1_ch4_pc3 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch4n_pc5: tim1_ch4n_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch1n_pc13: tim1_ch1n_pc13 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim1_ch3n_pf0: tim1_ch3n_pf0 {
|
|
pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch1_pa0: tim2_ch1_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch2_pa1: tim2_ch2_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch3_pa2: tim2_ch3_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch4_pa3: tim2_ch4_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch3_pa9: tim2_ch3_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch4_pa10: tim2_ch4_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch1_pa15: tim2_ch1_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch2_pb3: tim2_ch2_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch3_pb10: tim2_ch3_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim2_ch4_pb11: tim2_ch4_pb11 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch2_pa4: tim3_ch2_pa4 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch1_pa6: tim3_ch1_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch2_pa7: tim3_ch2_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch3_pb0: tim3_ch3_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch4_pb1: tim3_ch4_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch1_pb4: tim3_ch1_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch2_pb5: tim3_ch2_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch4_pb7: tim3_ch4_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch1_pc6: tim3_ch1_pc6 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch2_pc7: tim3_ch2_pc7 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch3_pc8: tim3_ch3_pc8 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim3_ch4_pc9: tim3_ch4_pc9 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch1_pa11: tim4_ch1_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch2_pa12: tim4_ch2_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch3_pa13: tim4_ch3_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch1_pb6: tim4_ch1_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch2_pb7: tim4_ch2_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch3_pb8: tim4_ch3_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim4_ch4_pb9: tim4_ch4_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_ch1n_pa1: tim15_ch1n_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_ch1_pa2: tim15_ch1_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_ch2_pa3: tim15_ch2_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_ch1_pb14: tim15_ch1_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_ch1n_pb15: tim15_ch1n_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim15_ch2_pb15: tim15_ch2_pb15 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_ch1_pa6: tim16_ch1_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_ch1_pa12: tim16_ch1_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_ch1n_pa13: tim16_ch1n_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_ch1_pb4: tim16_ch1_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_ch1n_pb6: tim16_ch1n_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim16_ch1_pb8: tim16_ch1_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim17_ch1_pa7: tim17_ch1_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim17_ch1_pb5: tim17_ch1_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim17_ch1n_pb7: tim17_ch1n_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim17_ch1_pb9: tim17_ch1_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch1n_pa7: tim8_ch1n_pa7 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch2_pa14: tim8_ch2_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch1_pa15: tim8_ch1_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch2n_pb0: tim8_ch2n_pb0 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch3n_pb1: tim8_ch3n_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch1n_pb3: tim8_ch1n_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch2n_pb4: tim8_ch2n_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch3n_pb5: tim8_ch3n_pb5 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch1_pb6: tim8_ch1_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch2_pb8: tim8_ch2_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch3_pb9: tim8_ch3_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch1_pc6: tim8_ch1_pc6 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch2_pc7: tim8_ch2_pc7 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch3_pc8: tim8_ch3_pc8 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch4_pc9: tim8_ch4_pc9 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch1n_pc10: tim8_ch1n_pc10 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch2n_pc11: tim8_ch2n_pc11 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch3n_pc12: tim8_ch3n_pc12 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ tim8_ch4n_pc13: tim8_ch4n_pc13 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ lpuart1_cts_pa6: lpuart1_cts_pa6 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_cts_pa11: usart1_cts_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_cts_pb13: lpuart1_cts_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_cts_pa0: usart2_cts_pa0 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_cts_pa13: usart3_cts_pa13 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_cts_pb13: usart3_cts_pb13 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ uart4_cts_pb7: uart4_cts_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ usart1_de_pa12: usart1_de_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_de_pb1: lpuart1_de_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_de_pb12: lpuart1_de_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_de_pa1: usart2_de_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_de_pb14: usart3_de_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ uart4_de_pa15: uart4_de_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ usart1_rts_pa12: usart1_rts_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_rts_pb1: lpuart1_rts_pb1 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_rts_pb12: lpuart1_rts_pb12 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_rts_pa1: usart2_rts_pa1 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_rts_pb14: usart3_rts_pb14 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
/omit-if-no-ref/ uart4_rts_pa15: uart4_rts_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
drive-push-pull;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ lpuart1_rx_pa3: lpuart1_rx_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_rx_pa10: usart1_rx_pa10 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_rx_pb7: usart1_rx_pb7 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_rx_pb10: lpuart1_rx_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_rx_pc0: lpuart1_rx_pc0 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_rx_pc5: usart1_rx_pc5 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_rx_pa3: usart2_rx_pa3 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_rx_pa15: usart2_rx_pa15 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_rx_pb8: usart3_rx_pb8 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_rx_pb11: usart3_rx_pb11 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_rx_pc11: usart3_rx_pc11 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ uart4_rx_pc11: uart4_rx_pc11 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_tx_pa9: usart1_tx_pa9 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_tx_pb6: usart1_tx_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ lpuart1_tx_pc1: lpuart1_tx_pc1 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart1_tx_pc4: usart1_tx_pc4 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_tx_pa2: usart2_tx_pa2 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart2_tx_pb3: usart2_tx_pb3 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_tx_pb9: usart3_tx_pb9 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_tx_pb10: usart3_tx_pb10 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ usart3_tx_pc10: usart3_tx_pc10 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
/omit-if-no-ref/ uart4_tx_pc10: uart4_tx_pc10 {
|
|
pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ ucpd1_cc2_pb4: ucpd1_cc2_pb4 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ ucpd1_cc1_pb6: ucpd1_cc1_pb6 {
|
|
pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
|
|
|
|
/omit-if-no-ref/ usb_dm_pa11: usb_dm_pa11 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
/omit-if-no-ref/ usb_dp_pa12: usb_dp_pa12 {
|
|
pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>;
|
|
};
|
|
|
|
};
|
|
# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi" 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/arduino-header-r3.h" 1 3 4
|
|
# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi" 2
|
|
|
|
/ {
|
|
arduino_header: connector {
|
|
compatible = "arduino-header-r3";
|
|
#gpio-cells = <2>;
|
|
gpio-map-mask = <0xffffffff 0xffffffc0>;
|
|
gpio-map-pass-thru = <0 0x3f>;
|
|
gpio-map = <0 0 &gpioa 0 0>,
|
|
<1 0 &gpioa 1 0>,
|
|
<2 0 &gpioa 4 0>,
|
|
<3 0 &gpiob 0 0>,
|
|
<4 0 &gpioc 1 0>,
|
|
<5 0 &gpioc 0 0>,
|
|
<6 0 &gpioc 5 0>,
|
|
<7 0 &gpioc 4 0>,
|
|
<8 0 &gpioa 10 0>,
|
|
<9 0 &gpiob 3 0>,
|
|
<10 0 &gpiob 5 0>,
|
|
<11 0 &gpiob 4 0>,
|
|
<12 0 &gpiob 10 0>,
|
|
<13 0 &gpioa 8 0>,
|
|
<14 0 &gpioa 9 0>,
|
|
<15 0 &gpioc 7 0>,
|
|
<16 0 &gpiob 6 0>,
|
|
<17 0 &gpioa 7 0>,
|
|
<18 0 &gpioa 6 0>,
|
|
<19 0 &gpioa 5 0>,
|
|
<20 0 &gpiob 9 0>,
|
|
<21 0 &gpiob 8 0>;
|
|
};
|
|
};
|
|
|
|
arduino_i2c: &i2c1 {};
|
|
|
|
arduino_spi: &spi1 {};
|
|
|
|
arduino_serial: &usart1 {};
|
|
# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi" 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/st-morpho-header.h" 1 3 4
|
|
# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi" 2
|
|
|
|
/ {
|
|
st_morpho_header: st-morpho-header {
|
|
compatible = "st-morpho-header";
|
|
#gpio-cells = <2>;
|
|
gpio-map-mask = <0xFF 0x0>;
|
|
gpio-map-pass-thru = <0x0 0x7F>;
|
|
gpio-map = <0 0 &gpioc 10 0>,
|
|
<1 0 &gpioc 11 0>,
|
|
<2 0 &gpioc 12 0>,
|
|
<3 0 &gpiod 2 0>,
|
|
<12 0 &gpioa 13 0>,
|
|
<14 0 &gpioa 14 0>,
|
|
<16 0 &gpioa 15 0>,
|
|
<20 0 &gpiob 7 0>,
|
|
<22 0 &gpioc 13 0>,
|
|
<24 0 &gpioc 14 0>,
|
|
<26 0 &gpioc 15 0>,
|
|
<27 0 &gpioa 0 0>,
|
|
<28 0 &gpiof 0 0>,
|
|
<29 0 &gpioa 1 0>,
|
|
<30 0 &gpiof 1 0>,
|
|
<31 0 &gpioa 4 0>,
|
|
<33 0 &gpiob 0 0>,
|
|
<34 0 &gpioc 2 0>,
|
|
<35 0 &gpioc 1 0>,
|
|
<36 0 &gpioc 3 0>,
|
|
<37 0 &gpioc 0 0>,
|
|
<72 0 &gpioc 9 0>,
|
|
<73 0 &gpioc 8 0>,
|
|
<74 0 &gpiob 8 0>,
|
|
<75 0 &gpioc 6 0>,
|
|
<76 0 &gpiob 9 0>,
|
|
<77 0 &gpioc 5 0>,
|
|
<82 0 &gpiob 13 0>,
|
|
<83 0 &gpioa 12 0>,
|
|
<84 0 &gpiob 14 0>,
|
|
<85 0 &gpioa 11 0>,
|
|
<86 0 &gpiob 15 0>,
|
|
<87 0 &gpiob 12 0>,
|
|
<88 0 &gpiob 6 0>,
|
|
<89 0 &gpiob 11 0>,
|
|
<90 0 &gpioc 7 0>,
|
|
<92 0 &gpioa 9 0>,
|
|
<93 0 &gpiob 2 0>,
|
|
<94 0 &gpioa 8 0>,
|
|
<95 0 &gpiob 1 0>,
|
|
<96 0 &gpiob 10 0>,
|
|
<97 0 &gpioa 7 0>,
|
|
<98 0 &gpiob 4 0>,
|
|
<99 0 &gpioa 6 0>,
|
|
<100 0 &gpiob 5 0>,
|
|
<101 0 &gpioa 5 0>,
|
|
<102 0 &gpiob 3 0>,
|
|
<104 0 &gpioa 10 0>,
|
|
<105 0 &gpioc 4 0>,
|
|
<106 0 &gpioa 2 0>,
|
|
<108 0 &gpioa 3 0>;
|
|
};
|
|
};
|
|
# 12 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/input/input-event-codes.h" 1 3 4
|
|
# 13 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2
|
|
|
|
/ {
|
|
model = "STMicroelectronics STM32G431RB-NUCLEO board";
|
|
compatible = "st,stm32g431rb-nucleo";
|
|
|
|
chosen {
|
|
zephyr,console = &lpuart1;
|
|
zephyr,shell-uart = &lpuart1;
|
|
zephyr,sram = &sram0;
|
|
zephyr,flash = &flash0;
|
|
zephyr,code-partition = &slot0_partition;
|
|
};
|
|
|
|
leds: leds {
|
|
compatible = "gpio-leds";
|
|
|
|
green_led: led_0 {
|
|
gpios = <&gpioa 5 (0 << 0)>;
|
|
label = "User LD2";
|
|
};
|
|
};
|
|
|
|
pwmleds {
|
|
compatible = "pwm-leds";
|
|
|
|
green_pwm_led: green_pwm_led {
|
|
pwms = <&pwm2 1 (((20) * 1000UL) * 1000UL) (0 << 0)>;
|
|
};
|
|
};
|
|
|
|
gpio_keys {
|
|
compatible = "gpio-keys";
|
|
|
|
user_button: button {
|
|
label = "User";
|
|
gpios = <&gpioc 13 (0 << 0)>;
|
|
zephyr,code = <11>;
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
led0 = &green_led;
|
|
mcuboot-led0 = &green_led;
|
|
pwm-led0 = &green_pwm_led;
|
|
sw0 = &user_button;
|
|
watchdog0 = &iwdg;
|
|
};
|
|
};
|
|
|
|
&clk_lsi {
|
|
status = "okay";
|
|
};
|
|
|
|
&clk_lse {
|
|
status = "okay";
|
|
};
|
|
|
|
&clk_hsi48 {
|
|
status = "okay";
|
|
};
|
|
|
|
&clk_hse {
|
|
clock-frequency = <(((24) * 1000) * 1000)>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pll {
|
|
div-m = <6>;
|
|
mul-n = <85>;
|
|
div-p = <7>;
|
|
div-q = <2>;
|
|
div-r = <2>;
|
|
clocks = <&clk_hse>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rcc {
|
|
clocks = <&pll>;
|
|
clock-frequency = <(((170) * 1000) * 1000)>;
|
|
ahb-prescaler = <1>;
|
|
apb1-prescaler = <1>;
|
|
apb2-prescaler = <1>;
|
|
};
|
|
|
|
&rng {
|
|
clocks = <&rcc (0x04c) (1 << 26)>,
|
|
<&rcc ((0x003 + 1) + 1) ((((0x88) & 0xFFFFU) << 0U) | (((26) & 0x1FU) << 16U) | ((((27) - (26)) & 0x3U) << 21U) | ((((0)) & 0xFFU) << 24U))>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usart1 {
|
|
pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
|
|
pinctrl-names = "default";
|
|
current-speed = <115200>;
|
|
status = "okay";
|
|
};
|
|
|
|
&lpuart1 {
|
|
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
|
|
pinctrl-names = "default";
|
|
current-speed = <115200>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&spi1 {
|
|
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
|
|
pinctrl-names = "default";
|
|
cs-gpios = <&gpiob 6 ((1 << 0) | (1 << 4))>;
|
|
status = "okay";
|
|
};
|
|
|
|
&spi2 {
|
|
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
|
|
&spi2_miso_pb14 &spi2_mosi_pb15>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&spi3 {
|
|
|
|
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
|
|
&spi3_miso_pc11 &spi3_mosi_pc12>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&timers2 {
|
|
status = "okay";
|
|
|
|
pwm2: pwm {
|
|
status = "okay";
|
|
pinctrl-0 = <&tim2_ch1_pa5>;
|
|
pinctrl-names = "default";
|
|
};
|
|
};
|
|
|
|
stm32_lp_tick_source: &lptim1 {
|
|
clocks = <&rcc (0x058) (1 << 31)>,
|
|
<&rcc 0x002 ((((0x88) & 0xFFFFU) << 0U) | (((18) & 0x1FU) << 16U) | ((((19) - (18)) & 0x3U) << 21U) | ((((3)) & 0xFFU) << 24U))>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rtc {
|
|
clocks = <&rcc (0x058) (1 << 10)>,
|
|
<&rcc 0x003 ((((0x90) & 0xFFFFU) << 0U) | (((8) & 0x1FU) << 16U) | ((((9) - (8)) & 0x3U) << 21U) | ((((2)) & 0xFFU) << 24U))>;
|
|
status = "okay";
|
|
};
|
|
|
|
&flash0 {
|
|
partitions {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
boot_partition: partition@0 {
|
|
compatible = "zephyr,mapped-partition";
|
|
label = "mcuboot";
|
|
reg = <0x00000000 0x00008000>;
|
|
};
|
|
|
|
slot0_partition: partition@8800 {
|
|
compatible = "zephyr,mapped-partition";
|
|
label = "image-0";
|
|
reg = <0x00008000 0x00010000>;
|
|
};
|
|
|
|
slot1_partition: partition@14800 {
|
|
compatible = "zephyr,mapped-partition";
|
|
label = "image-1";
|
|
reg = <0x00010000 0x0018000>;
|
|
};
|
|
|
|
|
|
storage_partition: partition@1f000 {
|
|
compatible = "zephyr,mapped-partition";
|
|
label = "storage";
|
|
reg = <0x00018000 0x00020000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&iwdg {
|
|
status = "okay";
|
|
};
|
|
|
|
&dac1 {
|
|
status = "okay";
|
|
pinctrl-0 = <&dac1_out1_pa4>;
|
|
pinctrl-names = "default";
|
|
};
|
|
# 0 "<command-line>" 2
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/app.overlay" 1
|
|
/ {
|
|
chosen {
|
|
zephyr,code-partition = &boot_partition;
|
|
};
|
|
};
|
|
# 0 "<command-line>" 2
|
|
# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/misc/empty_file.c"
|