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create mode 160000 zephyrproject/zephyr diff --git a/.gitignore b/.gitignore index 3616362..9b58128 100644 --- a/.gitignore +++ b/.gitignore @@ -1,2 +1,129 @@ **/.* -!.git* \ No newline at end of file +!.git* + +*.o +*.a +*.d +*.cmd +*.log +*.pyc +*.swp +*.swo +*~ + +# Emacs +\#*\# + +build*/ +!doc/build/ +!scripts/build +!share/sysbuild/build +!tests/drivers/build_all +!scripts/pylib/build_helpers +cscope.* +.dir + +/*.patch + +# The .cache directory will be used to cache toolchain capabilities if +# no suitable out-of-tree directory is found. +.cache + +outdir +outdir-* +scripts/basic/fixdep +scripts/gen_idt/gen_idt +coverage-report +doc-coverage.info +doc/_build +doc/doxygen +doc/xml +doc/html +doc/boards +doc/samples +doc/latex +doc/themes/zephyr-docs-theme +sanity-out* +twister-out* +bsim_out +bsim_bt_out +myresults.xml +tests/RunResults.xml +scripts/grub +doc/reference/kconfig/*.rst +doc/doc.warnings +.*project +.settings +.envrc +.vscode +hide-defaults-note +venv +.venv +.envrc +.DS_Store +.clangd +new.info + +# Cargo drops lock files in projects to capture resolved dependencies. +# We don't want to record these. +Cargo.lock + +# Cargo encourages a .cargo/config.toml file to symlink to a generated file. Don't save these. +.cargo/ + +# Normal west builds will place the Rust target directory under the build directory. However, +# sometimes IDEs and such will litter these target directories as well. +target/ + +# CI output +compliance.xml +dts_linter.patch +_error.types + +# Tag files +GPATH +GRTAGS +GTAGS +TAGS +tags + +.idea + +# from check_compliance.py +# zephyr-keep-sorted-start ignorecase +BinaryFiles.txt +BoardYml.txt +Checkpatch.txt +ClangFormat.txt +CMakeStyle.txt +DeviceAPI.txt +DeviceMmioCheck.txt +DevicetreeBindings.txt +DevicetreeLinting.txt +GitDiffCheck.txt +Gitlint.txt +Identity.txt +ImageSize.txt +Kconfig.txt +KconfigBasic.txt +KconfigBasicNoModules.txt +KconfigHWMv2.txt +KeepSorted.txt +LicenseAndCopyrightCheck.txt +MaintainersFormat.txt +ModulesMaintainers.txt +Nits.txt +Pylint.txt +PythonCompat.txt +Ruff.txt +SphinxLint.txt +SysbuildKconfig.txt +SysbuildKconfigBasic.txt +SysbuildKconfigBasicNoModules.txt +TextEncoding.txt +YAMLLint.txt +ZephyrModuleFile.txt +# zephyr-keep-sorted-stop + +# Node dependecies +node_modules \ No newline at end of file diff --git a/README.md b/README.md index 73272b5..29b9aeb 100644 --- a/README.md +++ b/README.md @@ -1,3 +1,33 @@ # UTAT Firmware Development Environment -My firmware development environment for the University of Toronto Aerospace Team \ No newline at end of file +My firmware development environment for the University of Toronto Aerospace Team + +https://docs.zephyrproject.org/latest/develop/getting_started/index.html + +```sh +west init zephyrproject +cd zepyhrproject +west update + +west zephyr-export + +cd zepyhr +west sdk install + +west build -p always -b nucleo_g431rb samples/basic/blinky +west flash --runner pyocd # had to su root first to run this (after running nix develop) + +# MCUBoot +cd ~/utat-dev/zephyrproject +west build -p always -b nucleo_g431rb bootloader/mcuboot/boot/zephyr -d build/mcuboot -- -DEXTRA_CONF_FILE=mcuboot-nucleo-g431rb.conf +west flash -d build/mcuboot --runner pyocd # (as root, with nix develop) + +cd zephyr +# Package 1 +west build -p always -b nucleo_g431rb samples/basic/blinky -d build/app -- -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_GENERATE_UNSIGNED_IMAGE=y +west flash -d build/app --runner pyocd # (as root, with nix develop) + +# Package 2 +west build -p always -b nucleo_g431rb samples/basic/blinkyslow -d build/blinkyslow -- -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_GENERATE_UNSIGNED_IMAGE=y +pyocd flash --target stm32g431rbtx --base-address 0x08014800 build/blinkyslow/zephyr/zephyr.signed.hex +``` \ No newline at end of file diff --git a/flake.nix b/flake.nix index b278074..e147a27 100644 --- a/flake.nix +++ b/flake.nix @@ -24,11 +24,16 @@ "arm-zephyr-eabi" ]; }) + # zephyr.west zephyr.pythonEnv # Use zephyr.hosttools-nix to use nixpkgs built tooling instead of official Zephyr binaries zephyr.hosttools pkgs.cmake pkgs.ninja + pkgs.python3Packages.jsonschema + pkgs.python3Packages.click + pkgs.pyocd + pkgs.mcuboot-imgtool ]; }; diff --git a/zephyrproject/bootloader/mcuboot b/zephyrproject/bootloader/mcuboot new file mode 160000 index 0000000..e36d3c8 --- /dev/null +++ b/zephyrproject/bootloader/mcuboot @@ -0,0 +1 @@ +Subproject commit e36d3c8d6ca5e0ed1f510f2a7d110f405a7c396b diff --git a/zephyrproject/build/mcuboot/CMakeCache.txt b/zephyrproject/build/mcuboot/CMakeCache.txt new file mode 100644 index 0000000..507b439 --- /dev/null +++ b/zephyrproject/build/mcuboot/CMakeCache.txt @@ -0,0 +1,625 @@ +# This is the CMakeCache file. +# For build in directory: /home/jeremy/utat-dev/zephyrproject/build/mcuboot +# It was generated by CMake: /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake +# You can edit this file to change values found and used by cmake. +# If you do not want to change any of the values, simply exit the editor. +# If you do want to change a value, simply edit, save, and exit the editor. +# The syntax for the file is as follows: +# KEY:TYPE=VALUE +# KEY is the name of a variable in the cache. +# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. +# VALUE is the current value for the KEY. + +######################## +# EXTERNAL cache entries +######################## + +//Application Binary Directory +APPLICATION_BINARY_DIR:PATH=/home/jeremy/utat-dev/zephyrproject/build/mcuboot + +//The application configuration folder +APPLICATION_CONFIG_DIR:PATH=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr + +//Application Source Directory +APPLICATION_SOURCE_DIR:PATH=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr + +//Selected board +BOARD:STRING=nucleo_g431rb + +//Main board directory for board (nucleo_g431rb) +BOARD_DIR:PATH=/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb + +//Path to a program. +BOSSAC:FILEPATH=/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/bossac + +//Kernel binary file +BYPRODUCT_KERNEL_BIN_NAME:FILEPATH=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.bin + +//Kernel elf file +BYPRODUCT_KERNEL_ELF_NAME:FILEPATH=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.elf + +//Kernel hex file +BYPRODUCT_KERNEL_HEX_NAME:FILEPATH=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.hex + +//Selected board +CACHED_BOARD:STRING=nucleo_g431rb + +//Selected shield +CACHED_SHIELD:STRING= + +//Selected snippet +CACHED_SNIPPET:STRING= + +//Path to a program. +CCACHE_FOUND:FILEPATH=CCACHE_FOUND-NOTFOUND + +//Path to a program. +CCACHE_PROGRAM:FILEPATH=CCACHE_PROGRAM-NOTFOUND + +//Path to a program. +CMAKE_ADDR2LINE:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-addr2line + +//Path to a program. +CMAKE_AR:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar + +//Path to a program. +CMAKE_AS:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-as + +//ASM compiler +CMAKE_ASM_COMPILER:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_ASM_COMPILER_AR:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc-ar + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_ASM_COMPILER_RANLIB:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc-ranlib + +//Flags used by the ASM compiler during all build types. +CMAKE_ASM_FLAGS:STRING= + +//Flags used by the ASM compiler during DEBUG builds. +CMAKE_ASM_FLAGS_DEBUG:STRING=-g + +//Flags used by the ASM compiler during MINSIZEREL builds. +CMAKE_ASM_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the ASM compiler during RELEASE builds. +CMAKE_ASM_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the ASM compiler during RELWITHDEBINFO builds. +CMAKE_ASM_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//Choose the type of build, options are: None Debug Release RelWithDebInfo +// MinSizeRel ... +CMAKE_BUILD_TYPE:STRING= + +//CXX compiler +CMAKE_CXX_COMPILER:STRING=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-g++ + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_AR:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc-ar + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc-ranlib + +//Flags used by the CXX compiler during all build types. +CMAKE_CXX_FLAGS:STRING= + +//Flags used by the CXX compiler during DEBUG builds. +CMAKE_CXX_FLAGS_DEBUG:STRING=-g + +//Flags used by the CXX compiler during MINSIZEREL builds. +CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the CXX compiler during RELEASE builds. +CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the CXX compiler during RELWITHDEBINFO builds. +CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//C compiler +CMAKE_C_COMPILER:STRING=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_AR:FILEPATH=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc-ar + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler 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defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +#endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_C) +# define COMPILER_ID "SunPro" +# if __SUNPRO_C >= 0x5100 + /* __SUNPRO_C = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# endif + +#elif defined(__HP_cc) +# define COMPILER_ID "HP" + /* __HP_cc = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) + +#elif defined(__DECC) +# define COMPILER_ID "Compaq" + /* __DECC_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) + +#elif defined(__IBMC__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__open_xl__) && defined(__clang__) +# define COMPILER_ID "IBMClang" +# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__) +# define COMPILER_VERSION_MINOR DEC(__open_xl_release__) +# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 +# define COMPILER_ID "XL" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__NVCOMPILER) +# define COMPILER_ID "NVHPC" +# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__) +# if defined(__NVCOMPILER_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__) +# endif + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(__clang__) && defined(__cray__) +# define COMPILER_ID "CrayClang" +# define COMPILER_VERSION_MAJOR DEC(__cray_major__) +# define COMPILER_VERSION_MINOR DEC(__cray_minor__) +# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__CLANG_FUJITSU) +# define COMPILER_ID "FujitsuClang" +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(__FUJITSU) +# define COMPILER_ID "Fujitsu" +# if defined(__FCC_version__) +# define COMPILER_VERSION __FCC_version__ +# elif defined(__FCC_major__) +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# endif +# if defined(__fcc_version) +# define COMPILER_VERSION_INTERNAL DEC(__fcc_version) +# elif defined(__FCC_VERSION) +# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION) +# endif + + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TASKING__) +# define COMPILER_ID "Tasking" + # define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000) + # define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100) +# define COMPILER_VERSION_INTERNAL DEC(__VERSION__) + +#elif defined(__ORANGEC__) +# define COMPILER_ID "OrangeC" +# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__) + +#elif defined(__RENESAS__) +# define COMPILER_ID "Renesas" +/* __RENESAS_VERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__RENESAS_VERSION__ >> 24 & 0xFF) +# define COMPILER_VERSION_MINOR HEX(__RENESAS_VERSION__ >> 16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__RENESAS_VERSION__ >> 8 & 0xFF) + +#elif defined(__TINYC__) +# define COMPILER_ID "TinyCC" + +#elif defined(__BCC__) +# define COMPILER_ID "Bruce" + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) && defined(__ti__) +# define COMPILER_ID "TIClang" + # define COMPILER_VERSION_MAJOR DEC(__ti_major__) + # define COMPILER_VERSION_MINOR DEC(__ti_minor__) + # define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__) +# define COMPILER_VERSION_INTERNAL DEC(__ti_version__) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__)) +# define COMPILER_ID "LCC" +# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100) +# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100) +# if defined(__LCC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__) +# endif +# if defined(__GNUC__) && defined(__GNUC_MINOR__) +# define SIMULATE_ID "GNU" +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif +# endif + +#elif defined(__GNUC__) +# define COMPILER_ID "GNU" +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(_ADI_COMPILER) +# define COMPILER_ID "ADSP" +#if defined(__VERSIONNUM__) + /* __VERSIONNUM__ = 0xVVRRPPTT */ +# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF) +# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF) +# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF) +# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + +#elif defined(__DCC__) && defined(_DIAB_TOOL) +# define COMPILER_ID "Diab" + # define COMPILER_VERSION_MAJOR DEC(__VERSION_MAJOR_NUMBER__) + # define COMPILER_VERSION_MINOR DEC(__VERSION_MINOR_NUMBER__) + # define COMPILER_VERSION_PATCH DEC(__VERSION_ARCH_FEATURE_NUMBER__) + # define COMPILER_VERSION_TWEAK DEC(__VERSION_BUG_FIX_NUMBER__) + + +#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) +# define COMPILER_ID "SDCC" +# if defined(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) +# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) +# else + /* SDCC = VRP */ +# define COMPILER_VERSION_MAJOR DEC(SDCC/100) +# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) +# define COMPILER_VERSION_PATCH DEC(SDCC % 10) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__MSYS__) +# define PLATFORM_ID "MSYS" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# elif defined(__VXWORKS__) +# define PLATFORM_ID "VxWorks" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +# elif defined(_ADI_COMPILER) +# define PLATFORM_ID "ADSP" + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_ARM64EC) +# define ARCHITECTURE_ID "ARM64EC" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__ICCSTM8__) +# define ARCHITECTURE_ID "STM8" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__clang__) && defined(__ti__) +# if defined(__ARM_ARCH) +# define ARCHITECTURE_ID "ARM" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__TI_COMPILER_VERSION__) +# if defined(__TI_ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__MSP430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__TMS320C28XX__) +# define ARCHITECTURE_ID "TMS320C28x" + +# elif defined(__TMS320C6X__) || defined(_TMS320C6X) +# define ARCHITECTURE_ID "TMS320C6x" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +# elif defined(__ADSPSHARC__) +# define ARCHITECTURE_ID "SHARC" + +# elif defined(__ADSPBLACKFIN__) +# define ARCHITECTURE_ID "Blackfin" + +#elif defined(__TASKING__) + +# if defined(__CTC__) || defined(__CPTC__) +# define ARCHITECTURE_ID "TriCore" + +# elif defined(__CMCS__) +# define ARCHITECTURE_ID "MCS" + +# elif defined(__CARM__) || defined(__CPARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__CARC__) +# define ARCHITECTURE_ID "ARC" + +# elif defined(__C51__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__CPCP__) +# define ARCHITECTURE_ID "PCP" + +# else +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__RENESAS__) +# if defined(__CCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__CCRL__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__CCRH__) +# define ARCHITECTURE_ID "RH850" + +# else +# define ARCHITECTURE_ID "" +# endif + +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number. */ +#ifdef COMPILER_VERSION +char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]"; + +/* Construct a string literal encoding the version number components. */ +#elif defined(COMPILER_VERSION_MAJOR) +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#elif defined(COMPILER_VERSION_INTERNAL_STR) +char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + +#define C_STD_99 199901L +#define C_STD_11 201112L +#define C_STD_17 201710L +#define C_STD_23 202311L + +#ifdef __STDC_VERSION__ +# define C_STD __STDC_VERSION__ +#endif + +#if !defined(__STDC__) && !defined(__clang__) && !defined(__RENESAS__) +# if defined(_MSC_VER) || defined(__ibmxl__) || defined(__IBMC__) +# define C_VERSION "90" +# else +# define C_VERSION +# endif +#elif C_STD > C_STD_17 +# define C_VERSION "23" +#elif C_STD > C_STD_11 +# define C_VERSION "17" +#elif C_STD > C_STD_99 +# define C_VERSION "11" +#elif C_STD >= C_STD_99 +# define C_VERSION "99" +#else +# define C_VERSION "90" +#endif +const char* info_language_standard_default = + "INFO" ":" "standard_default[" C_VERSION "]"; + +const char* info_language_extensions_default = "INFO" ":" "extensions_default[" +#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) || \ + defined(__TI_COMPILER_VERSION__) || defined(__RENESAS__)) && \ + !defined(__STRICT_ANSI__) + "ON" +#else + "OFF" +#endif +"]"; + +/*--------------------------------------------------------------------------*/ + +#ifdef ID_VOID_MAIN +void main() {} +#else +# if defined(__CLASSIC_C__) +int main(argc, argv) int argc; char *argv[]; +# else +int main(int argc, char* argv[]) +# endif +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#if defined(COMPILER_VERSION_INTERNAL) || defined(COMPILER_VERSION_INTERNAL_STR) + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) + require += info_cray[argc]; +#endif + require += info_language_standard_default[argc]; + require += info_language_extensions_default[argc]; + (void)argv; + return require; +} +#endif diff --git a/zephyrproject/build/mcuboot/CMakeFiles/4.1.2/CompilerIdC/a.out b/zephyrproject/build/mcuboot/CMakeFiles/4.1.2/CompilerIdC/a.out new file mode 100755 index 0000000000000000000000000000000000000000..1b94f1513b9df20d642be081f2a25eaa7a2bafce GIT binary patch literal 11384 zcmeHNYiu0V6+ZLW_1fO7$4LyqgfIk)gh!T1Z~;-;?#4+7kcXRuN=1gQ<86;)N${mwkr z6F1QOXRmYT-tU}q&pr3MkC~m!3)^??5CnnzB+^D=^gNN$jdJH*xQG<$CY3_a#b|}2 zC&g*OS0&O+#5u$wNE~k}15zPZ)}X>U%o0!U$yAgoizATx`X&~9Ns=M|fBG+J+7LGw zXfV)Vpus?cfd&H&1{w@B7-%riV4%T3gMqIt1Gf-eR*`Q-UWd$>^IGJak(I=zPk=w| zR?gYoDl(n3p9LnRQo9HE9^fAf^yx;FpQD^dW}QHl>IT^TXL0ee{|*2os}WrIH$P`t zJ7-I?m8uP!nHNZ9+jWcgRyWQ*Ze7WpUEumVRH@OG+p4=f+xI=Js6Cd5wjX*}_3)gB zH4lI6;e^&>abNFxn0-?jG0beTY37u*dUm&^P^-OKX|+kK)FN7|ZK6+7U$GVKW?Rz6 zP14@ACACtG0E^m$$u`Dy*i^2=rVK8>s-OPr@UiVWY&doab3?N~vgDbw^9~O@7s!|! z^>BogC`!DJQLpUX^hq1-t3|=hA)?o$3Rz9s53CUFuYCY480D%&YioZd>LlZg9fq8Y zvMn2PA=xlOA*Vdk5kfue)XN=V)P?+*CH0;#n-Y&%Qn_r3iQ}eVPFd3F4of&vsm8!@ zNU2l>W1BSs-)(fb_9^;nPi(W==s@j#)LZfivqjrsM)D`Dh&EwK=80;Pxz3t}eb?4X zRW?r9VdXJXIDOm-A4!;!dcu?{FPgOGl?B0^wrI`E3z3-#i=w|+5Y%xqM&GY0@I%q@ zh0hlkUzUxtc6)isQhFz?D8|^PMlE^eq$yid=1oK`@|K@olDAA8L!)9Oxh8HZ4TEW%9+WCGCe7&q9r9R)CkM_n)x!I) z&gkqZ>&o8WIBTCw%oA)__s_+}mJmHr`xX4gv@!6$sy5BMYiF=tr|tEd!58@F*d&xP zT;8RrQE)o2S%Ee0`0}JX$wg4=s=j{(! zZ=AHS)-8gZAPdGPBer*7BWrVZNS#A}7g1ic!^W5u)~2n`u%DaN?WUa1T5{qi^CzCJ zRA2ff_D>mj2J?)$7BSDPi}qHks~_Nb+hu+8p^0jQ4p&Kg(Uvh+n2)=fl`%8ayWJ8J zXs0nRh_Uy*c~RYE3BBj%XAlQ-Me2J_oNsaLh>Lj_5!ai*60i&`0l(qL4a{*@fJ4xS zfkVKr1BZc|fWyE)2W|pJT(u_PSAiqI&A<`h)4S6Rrd{lK4jhs(hjnDw0!jg;h*Cr;p_EW!zhRsQYuI!4 z2Kd3gvqfO+JNtHE>^;os!5a3S-DJ#lG#N(6E%57e>F{V^{eVYN-D-im%WdX`8n1ue zOA&J#XCJS#am+EVt8rde$m4btrJ{~ovL+(-eN{yn*a1`?wDp#ua!$w5EFR?8twLI=MJy^d4nP`?xoJp72R#48*^Lhtv!Tzd(qbl}8 zXFlQX69F-cYT1mcTTKaTpbL9s(GaZYg_EXpe!YFtd>AqXd-YcARprQpbvJO6xyrf| zdnk-Py7r-;#H7V%LyQho6+^P4$Pr{2na_qVa4tl#k3w5sG}}zkx`EFDbr1G7)}1kd zIiS}f9+rV4#sv0y3}@5DS`7CKXD=hxSNapK?a@bfP7i#C5k$=r4&&e>hP z=j;&1$6U(VtMhHpufn~MW&a9rx)b*S&QaW#qPVY!ltBCwHs3G&dwB3Z{pg+@dml>Y zhV$8>OySTYd!Bfb=qg$2nM|RW&5az=oV2++?pCz>{ECJqZkzm&UK+?1h7UdIV!e&$OOPLYwq*&MP-SZ@UI~h&3CpRSTPfE#fvLo4+ zj3w_#u1emS6q7e4Tav9wblgY{1{w@B7-%riVBl-S0N>+JBUg~$LVg>WhyO@V&qM0Q zgPHu`v4XmP+vDoyxE9}hr;7VFZrGIE1RFi0_hm`A9o10x0Sb!|p;=fduM$=Z9l{O5 zjnW$7CZSVUC$ht9C#Nro1V>wOz78Og@WBBmj*UwRe_m3#ln75RNdC72lKbUB06Sk2 zkc!{1Y$thN3@l-Of>}xu;p2rslJE%XM&t@*`fPCpswchp_zMTdNKSl=y^16B?JIS? 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Borland does not know .cxx for + example. */ +#ifndef __cplusplus +# error "A C compiler has been selected for C++." +#endif + +#if !defined(__has_include) +/* If the compiler does not have __has_include, pretend the answer is + always no. */ +# define __has_include(x) 0 +#endif + + +/* Version number components: V=Version, R=Revision, P=Patch + Version date components: YYYY=Year, MM=Month, DD=Day */ + +#if defined(__INTEL_COMPILER) || defined(__ICC) +# define COMPILER_ID "Intel" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# if defined(__GNUC__) +# define SIMULATE_ID "GNU" +# endif + /* __INTEL_COMPILER = VRP prior to 2021, and then VVVV for 2021 and later, + except that a few beta releases use the old format with V=2021. */ +# if __INTEL_COMPILER < 2021 || __INTEL_COMPILER == 202110 || __INTEL_COMPILER == 202111 +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) +# if defined(__INTEL_COMPILER_UPDATE) +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) +# else +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) +# endif +# else +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER_UPDATE) + /* The third version component from --version is an update index, + but no macro is provided for it. */ +# define COMPILER_VERSION_PATCH DEC(0) +# endif +# if defined(__INTEL_COMPILER_BUILD_DATE) + /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ +# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) +# endif +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif (defined(__clang__) && defined(__INTEL_CLANG_COMPILER)) || defined(__INTEL_LLVM_COMPILER) +# define COMPILER_ID "IntelLLVM" +#if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +#endif +#if defined(__GNUC__) +# define SIMULATE_ID "GNU" +#endif +/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and + * later. Look for 6 digit vs. 8 digit version number to decide encoding. + * VVVV is no smaller than the current year when a version is released. + */ +#if __INTEL_LLVM_COMPILER < 1000000L +# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 10) +#else +# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000) +# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 100) +#endif +#if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +#endif +#if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +#elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +#endif +#if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +#endif +#if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +#endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_CC) +# define COMPILER_ID "SunPro" +# if __SUNPRO_CC >= 0x5100 + /* __SUNPRO_CC = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# endif + +#elif defined(__HP_aCC) +# define COMPILER_ID "HP" + /* __HP_aCC = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) + +#elif defined(__DECCXX) +# define COMPILER_ID "Compaq" + /* __DECCXX_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) + +#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__open_xl__) && defined(__clang__) +# define COMPILER_ID "IBMClang" +# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__) +# define COMPILER_VERSION_MINOR DEC(__open_xl_release__) +# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 +# define COMPILER_ID "XL" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__NVCOMPILER) +# define COMPILER_ID "NVHPC" +# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__) +# if defined(__NVCOMPILER_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__) +# endif + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(__clang__) && defined(__cray__) +# define COMPILER_ID "CrayClang" +# define COMPILER_VERSION_MAJOR DEC(__cray_major__) +# define COMPILER_VERSION_MINOR DEC(__cray_minor__) +# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__CLANG_FUJITSU) +# define COMPILER_ID "FujitsuClang" +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(__FUJITSU) +# define COMPILER_ID "Fujitsu" +# if defined(__FCC_version__) +# define COMPILER_VERSION __FCC_version__ +# elif defined(__FCC_major__) +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# endif +# if defined(__fcc_version) +# define COMPILER_VERSION_INTERNAL DEC(__fcc_version) +# elif defined(__FCC_VERSION) +# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION) +# endif + + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TASKING__) +# define COMPILER_ID "Tasking" + # define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000) + # define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100) +# define COMPILER_VERSION_INTERNAL DEC(__VERSION__) + +#elif defined(__ORANGEC__) +# define COMPILER_ID "OrangeC" +# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__) + +#elif defined(__RENESAS__) +# define COMPILER_ID "Renesas" +/* __RENESAS_VERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__RENESAS_VERSION__ >> 24 & 0xFF) +# define COMPILER_VERSION_MINOR HEX(__RENESAS_VERSION__ >> 16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__RENESAS_VERSION__ >> 8 & 0xFF) + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) && defined(__ti__) +# define COMPILER_ID "TIClang" + # define COMPILER_VERSION_MAJOR DEC(__ti_major__) + # define COMPILER_VERSION_MINOR DEC(__ti_minor__) + # define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__) +# define COMPILER_VERSION_INTERNAL DEC(__ti_version__) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__)) +# define COMPILER_ID "LCC" +# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100) +# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100) +# if defined(__LCC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__) +# endif +# if defined(__GNUC__) && defined(__GNUC_MINOR__) +# define SIMULATE_ID "GNU" +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif +# endif + +#elif defined(__GNUC__) || defined(__GNUG__) +# define COMPILER_ID "GNU" +# if defined(__GNUC__) +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# else +# define COMPILER_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(_ADI_COMPILER) +# define COMPILER_ID "ADSP" +#if defined(__VERSIONNUM__) + /* __VERSIONNUM__ = 0xVVRRPPTT */ +# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF) +# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF) +# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF) +# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + +#elif defined(__DCC__) && defined(_DIAB_TOOL) +# define COMPILER_ID "Diab" + # define COMPILER_VERSION_MAJOR DEC(__VERSION_MAJOR_NUMBER__) + # define COMPILER_VERSION_MINOR DEC(__VERSION_MINOR_NUMBER__) + # define COMPILER_VERSION_PATCH DEC(__VERSION_ARCH_FEATURE_NUMBER__) + # define COMPILER_VERSION_TWEAK DEC(__VERSION_BUG_FIX_NUMBER__) + + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__MSYS__) +# define PLATFORM_ID "MSYS" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# elif defined(__VXWORKS__) +# define PLATFORM_ID "VxWorks" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +# elif defined(_ADI_COMPILER) +# define PLATFORM_ID "ADSP" + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_ARM64EC) +# define ARCHITECTURE_ID "ARM64EC" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__ICCSTM8__) +# define ARCHITECTURE_ID "STM8" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__clang__) && defined(__ti__) +# if defined(__ARM_ARCH) +# define ARCHITECTURE_ID "ARM" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__TI_COMPILER_VERSION__) +# if defined(__TI_ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__MSP430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__TMS320C28XX__) +# define ARCHITECTURE_ID "TMS320C28x" + +# elif defined(__TMS320C6X__) || defined(_TMS320C6X) +# define ARCHITECTURE_ID "TMS320C6x" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +# elif defined(__ADSPSHARC__) +# define ARCHITECTURE_ID "SHARC" + +# elif defined(__ADSPBLACKFIN__) +# define ARCHITECTURE_ID "Blackfin" + +#elif defined(__TASKING__) + +# if defined(__CTC__) || defined(__CPTC__) +# define ARCHITECTURE_ID "TriCore" + +# elif defined(__CMCS__) +# define ARCHITECTURE_ID "MCS" + +# elif defined(__CARM__) || defined(__CPARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__CARC__) +# define ARCHITECTURE_ID "ARC" + +# elif defined(__C51__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__CPCP__) +# define ARCHITECTURE_ID "PCP" + +# else +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__RENESAS__) +# if defined(__CCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__CCRL__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__CCRH__) +# define ARCHITECTURE_ID "RH850" + +# else +# define ARCHITECTURE_ID "" +# endif + +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number. */ +#ifdef COMPILER_VERSION +char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]"; + +/* Construct a string literal encoding the version number components. */ +#elif defined(COMPILER_VERSION_MAJOR) +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#elif defined(COMPILER_VERSION_INTERNAL_STR) +char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + +#define CXX_STD_98 199711L +#define CXX_STD_11 201103L +#define CXX_STD_14 201402L +#define CXX_STD_17 201703L +#define CXX_STD_20 202002L +#define CXX_STD_23 202302L + +#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) +# if _MSVC_LANG > CXX_STD_17 +# define CXX_STD _MSVC_LANG +# elif _MSVC_LANG == CXX_STD_17 && defined(__cpp_aggregate_paren_init) +# define CXX_STD CXX_STD_20 +# elif _MSVC_LANG > CXX_STD_14 && __cplusplus > CXX_STD_17 +# define CXX_STD CXX_STD_20 +# elif _MSVC_LANG > CXX_STD_14 +# define CXX_STD CXX_STD_17 +# elif defined(__INTEL_CXX11_MODE__) && defined(__cpp_aggregate_nsdmi) +# define CXX_STD CXX_STD_14 +# elif defined(__INTEL_CXX11_MODE__) +# define CXX_STD CXX_STD_11 +# else +# define CXX_STD CXX_STD_98 +# endif +#elif defined(_MSC_VER) && defined(_MSVC_LANG) +# if _MSVC_LANG > __cplusplus +# define CXX_STD _MSVC_LANG +# else +# define CXX_STD __cplusplus +# endif +#elif defined(__NVCOMPILER) +# if __cplusplus == CXX_STD_17 && defined(__cpp_aggregate_paren_init) +# define CXX_STD CXX_STD_20 +# else +# define CXX_STD __cplusplus +# endif +#elif defined(__INTEL_COMPILER) || defined(__PGI) +# if __cplusplus == CXX_STD_11 && defined(__cpp_namespace_attributes) +# define CXX_STD CXX_STD_17 +# elif __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi) +# define CXX_STD CXX_STD_14 +# else +# define CXX_STD __cplusplus +# endif +#elif (defined(__IBMCPP__) || defined(__ibmxl__)) && defined(__linux__) +# if __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi) +# define CXX_STD CXX_STD_14 +# else +# define CXX_STD __cplusplus +# endif +#elif __cplusplus == 1 && defined(__GXX_EXPERIMENTAL_CXX0X__) +# define CXX_STD CXX_STD_11 +#else +# define CXX_STD __cplusplus +#endif + +const char* info_language_standard_default = "INFO" ":" "standard_default[" +#if CXX_STD > CXX_STD_23 + "26" +#elif CXX_STD > CXX_STD_20 + "23" +#elif CXX_STD > CXX_STD_17 + "20" +#elif CXX_STD > CXX_STD_14 + "17" +#elif CXX_STD > CXX_STD_11 + "14" +#elif CXX_STD >= CXX_STD_11 + "11" +#else + "98" +#endif +"]"; + +const char* info_language_extensions_default = "INFO" ":" "extensions_default[" +#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) || \ + defined(__TI_COMPILER_VERSION__) || defined(__RENESAS__)) && \ + !defined(__STRICT_ANSI__) + "ON" +#else + "OFF" +#endif +"]"; + +/*--------------------------------------------------------------------------*/ + +int main(int argc, char* argv[]) +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#if defined(COMPILER_VERSION_INTERNAL) || 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"/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/ccache.cmake:10 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CCACHE_FOUND" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "ccache" + candidate_directories: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + searched_directories: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/ccache" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/ccache" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/ccache" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/ccache" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/ccache" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/ccache" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/ccache" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/ccache" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/ccache" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/ccache" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/ccache" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/ccache" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/ccache" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/ccache" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/ccache" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/ccache" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/ccache" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/ccache" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/ccache" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/ccache" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/ccache" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/ccache" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/ccache" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/ccache" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/ccache" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/ccache" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/ccache" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/ccache" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/ccache" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/ccache" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/ccache" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/ccache" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/ccache" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/ccache" + - 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"/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindHostTools.cmake:54 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:9 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "GPERF" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "gperf" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + searched_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/gperf" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/gperf" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/gperf" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/gperf" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/gperf" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/gperf" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/gperf" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/gperf" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/gperf" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/gperf" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/gperf" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/gperf" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/gperf" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/gperf" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/gperf" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/gperf" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/gperf" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/gperf" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/gperf" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/gperf" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/gperf" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/gperf" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/gperf" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/gperf" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/gperf" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/gperf" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/gperf" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/gperf" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/gperf" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/gperf" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/gperf" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/gperf" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/gperf" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/gperf" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/gperf" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/gperf" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/gperf" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/gperf" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/gperf" + - "/run/wrappers/bin/gperf" + - "/root/.nix-profile/bin/gperf" + - "/nix/profile/bin/gperf" + - "/root/.local/state/nix/profile/bin/gperf" + - "/etc/profiles/per-user/root/bin/gperf" + - "/nix/var/nix/profiles/default/bin/gperf" + - "/run/current-system/sw/bin/gperf" + found: false + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindHostTools.cmake:57 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:9 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "OPENOCD" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "openocd" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + searched_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/openocd" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/openocd" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/openocd" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/openocd" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/openocd" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/openocd" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/openocd" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/openocd" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/openocd" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/openocd" + - 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"/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/openocd" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/openocd" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/openocd" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/openocd" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/openocd" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/openocd" + found: "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/openocd" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - 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"/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - 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"/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindHostTools.cmake:60 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:9 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "BOSSAC" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "bossac" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - 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"/run/current-system/sw/bin/" + searched_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/bossac" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/bossac" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bossac" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/bossac" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/bossac" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/bossac" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/bossac" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/bossac" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/bossac" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/bossac" + - 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"/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/bossac" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/bossac" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/bossac" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/bossac" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/bossac" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/bossac" + found: "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/bossac" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - 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"/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindHostTools.cmake:65 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:9 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "IMGTOOL" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "imgtool.py" + - "imgtool" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/scripts/" + - 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"/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindHostTools.cmake:68 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:9 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "PTY_INTERFACE" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "winpty" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - 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"/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - 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"/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/compiler/gcc/generic.cmake:6 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindHostTools.cmake:125 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:9 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_GCOV" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcov" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcov" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - 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"/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - 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"/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindDtc.cmake:19 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/dts.cmake:10 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:129 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "DTC" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "dtc" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + searched_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/dtc" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/dtc" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/dtc" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/dtc" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/dtc" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/dtc" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/dtc" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/dtc" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/dtc" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/dtc" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/dtc" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/dtc" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/dtc" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/dtc" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/dtc" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/dtc" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/dtc" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/dtc" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/dtc" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/dtc" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/dtc" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/dtc" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/dtc" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/dtc" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/dtc" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/dtc" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/dtc" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/dtc" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/dtc" + found: "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/dtc" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/compiler/gcc/target.cmake:8 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:103 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_C_COMPILER" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/compiler/gcc/target.cmake:26 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:103 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_CXX_COMPILER" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-g++" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-g++" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:5 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_OBJCOPY" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objcopy" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objcopy" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - 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"/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:6 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_OBJDUMP" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - 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"/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:7 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_AS" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-as" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-as" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:12 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_AR" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:13 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_RANLIB" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:15 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_READELF" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-readelf" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-readelf" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:16 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_NM" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-nm" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-nm" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:17 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_STRIP" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-strip" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-strip" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - 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"/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/bintools/gnu/target.cmake:19 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/FindTargetTools.cmake:106 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:25 (find_package)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_GDB" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gdb-py" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gdb-py" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeDetermineSystem.cmake:12 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:129 (project)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_UNAME" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "uname" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + searched_directories: + - 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"/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/uname" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin" + - 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"/run/current-system/sw/bin" + - + kind: "message-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeDetermineSystem.cmake:207 (message)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:129 (project)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + message: | + The target system is: Generic - 4.4.99 - arm + The host system is: Linux - 6.12.87 - x86_64 + - + kind: "find-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeNinjaFindMake.cmake:5 (find_program)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:129 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candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - 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"/run/current-system/sw/bin/" + found: "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-addr2line" + search_context: + CMAKE_PREFIX_PATH: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr" + ENV{PATH}: + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin" + - 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"/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeFindBinUtils.cmake:238 (find_program)" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeDetermineCCompiler.cmake:200 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:129 (project)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_TAPI" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: false + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: false + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "arm-zephyr-eabi-tapi" + - "tapi" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - 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"/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + searched_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-tapi" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/arm-zephyr-eabi-tapi" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/arm-zephyr-eabi-tapi" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/arm-zephyr-eabi-tapi" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/arm-zephyr-eabi-tapi" + - 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"/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/Compiler/GNU-FindBinUtils.cmake:30 (find_program)" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeDetermineCCompiler.cmake:201 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:129 (project)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_C_COMPILER_RANLIB" + description: "A wrapper around 'ranlib' adding the appropriate '--plugin' option for the GCC compiler" + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: false + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: false + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "arm-zephyr-eabi-gcc-ranlib-14.3" + - "arm-zephyr-eabi-gcc-ranlib-14" + - "arm-zephyr-eabi-gcc-ranlib14" + - "arm-zephyr-eabi-gcc-ranlib" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - 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"/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + - + kind: "find-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/Compiler/GNU-FindBinUtils.cmake:30 (find_program)" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeDetermineCXXCompiler.cmake:207 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:129 (project)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_CXX_COMPILER_RANLIB" + description: "A wrapper around 'ranlib' adding the appropriate '--plugin' option for the GCC compiler" + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: false + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: false + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "arm-zephyr-eabi-gcc-ranlib-14.3" + - "arm-zephyr-eabi-gcc-ranlib-14" + - "arm-zephyr-eabi-gcc-ranlib14" + - "arm-zephyr-eabi-gcc-ranlib" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - 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"/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:135 (enable_language)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + message: | + Checking whether the ASM compiler is GNU using "--version" matched "(GNU assembler)|(GCC)|(Free Software Foundation)": + arm-zephyr-eabi-gcc (Zephyr SDK 1.0.1) 14.3.0 + Copyright (C) 2024 Free Software Foundation, Inc. + This is free software; see the source for copying conditions. There is NO + warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + - + kind: "find-v1" + backtrace: + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/Compiler/GNU-FindBinUtils.cmake:18 (find_program)" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/share/cmake-4.1/Modules/CMakeDetermineASMCompiler.cmake:268 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake:135 (enable_language)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/zephyr_default.cmake:144 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)" + - "/home/jeremy/utat-dev/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)" + - "CMakeLists.txt:18 (find_package)" + mode: "program" + variable: "CMAKE_ASM_COMPILER_AR" + description: "A wrapper around 'ar' adding the appropriate '--plugin' option for the GCC compiler" + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: false + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: false + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "arm-zephyr-eabi-gcc-ar-" + - "arm-zephyr-eabi-gcc-ar-" + - "arm-zephyr-eabi-gcc-ar" + - "arm-zephyr-eabi-gcc-ar" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - 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"/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin" + - "/run/wrappers/bin" + - "/root/.nix-profile/bin" + - "/nix/profile/bin" + - "/root/.local/state/nix/profile/bin" + - "/etc/profiles/per-user/root/bin" + - "/nix/var/nix/profiles/default/bin" + - "/run/current-system/sw/bin" + CMAKE_INSTALL_PREFIX: "/usr/local" + CMAKE_SYSTEM_PROGRAM_PATH: + - "/bin" + - + kind: "find-v1" + backtrace: + - "/home/jeremy/utat-dev/zephyrproject/zephyr/cmake/reports/CMakeLists.txt:142 (find_program)" + mode: "program" + variable: "PAHOLE" + description: "Path to a program." + settings: + SearchFramework: "NEVER" + SearchAppBundle: "NEVER" + CMAKE_FIND_USE_CMAKE_PATH: true + CMAKE_FIND_USE_CMAKE_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_SYSTEM_ENVIRONMENT_PATH: true + CMAKE_FIND_USE_CMAKE_SYSTEM_PATH: true + CMAKE_FIND_USE_INSTALL_PREFIX: true + names: + - "pahole" + candidate_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/" + - "/nix/store/cw3a3yz8vrfsz53ypjw8hspy5hzzx2py-diffutils-3.12/bin/" + - "/nix/store/4zi0y6cmpjnbhmgrx7vfgqkyv5z1z4z0-gnused-4.9/bin/" + - "/nix/store/k3wiv3qqa4y0im5v1iq2jy4h9cm32dfc-gnugrep-3.12/bin/" + - "/nix/store/88d79vz87a5g3wsclabrgqd93jqh5yv8-gawk-5.3.2/bin/" + - "/nix/store/xl6pd2spjajwcpq09fnmnjv5psqmlmma-gnutar-1.35/bin/" + - "/nix/store/rhp8ph1q699irvmacp27x3sw84slk32i-gzip-1.14/bin/" + - "/nix/store/g36v1ss2ywkqp751wlkhnd8n9zaqkg2w-bzip2-1.0.8-bin/bin/" + - "/nix/store/djjc508wnfdwmkv5xrxxqx5r2v09yxfp-gnumake-4.4.1/bin/" + - "/nix/store/3hgg7pr65imdrifqqh3flg3arvkc2r22-bash-5.3p3/bin/" + - "/nix/store/wgnxx41q3d2cx6j5wk2s5bkjyzrr3ggn-patch-2.8/bin/" + - "/nix/store/3x3p3mhwn18q7qplxn34i13rdmswi0qm-xz-5.8.3-bin/bin/" + - "/nix/store/018l43lbsqbrsasrfdcxxb5s4s161fkr-file-5.45/bin/" + - "/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/" + - "/nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/" + - "/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/" + - "/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/" + - "/nix/store/jn5rl6k31hr8a5nf7j6ypam3s6rzbgx3-python3.13-jsonschema-4.25.0/bin/" + - "/nix/store/x4jkv0c02kcp7mqf78b3xny5xbr2kjdr-python3.13-jsonpath-ng-1.7.0/bin/" + - "/nix/store/f3i7n3i427vc0x6nimj83mijn27if0lp-python3.13-pyocd-0.41.0/bin/" + - "/nix/store/pqvq049f0r8f2wwqjp3v3n5f27npcixw-python3.13-intelhex-2.3.0/bin/" + - "/nix/store/ma61b6jwpzmdnd0sm5y5hwl3a8501zs5-python3.13-natsort-8.4.0/bin/" + - "/nix/store/vi6vciifdxivnr2msbys863q9czaxbhv-python3.13-pyelftools-0.32/bin/" + - "/nix/store/06gl6k2ckiwzd7h0hwcnkj170yfzi24h-python3.13-pylink-square-1.6.0/bin/" + - "/run/wrappers/bin/" + - "/root/.nix-profile/bin/" + - "/nix/profile/bin/" + - "/root/.local/state/nix/profile/bin/" + - "/etc/profiles/per-user/root/bin/" + - "/nix/var/nix/profiles/default/bin/" + - "/run/current-system/sw/bin/" + - "/bin/" + searched_directories: + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/bin/pahole" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/sbin/pahole" + - "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/pahole" + - "/nix/store/sdfysgb89zdysrknjavcr0crs4qxpk8r-python3-3.13.12/bin/pahole" + - "/nix/store/1hhzbgg5hqhpw2c3gk98myzr6fjlfcja-python3.13-west-1.5.0/bin/pahole" + - "/nix/store/nc91fifcamj4bns2dpnnbps7kl9skn2l-python3.13-pykwalify-1.8.0/bin/pahole" + - "/nix/store/lfbzxs5wyqd2122mpbj5azkxhxspw9cd-bash-interactive-5.3p3/bin/pahole" + - "/nix/store/5mrhn7sj5hmx1sqqj1568sya450yarvx-patchelf-0.15.2/bin/pahole" + - "/nix/store/8v97ngkcpfzgghwnnr7fsz33p2x22gy9-gcc-wrapper-14.3.0/bin/pahole" + - "/nix/store/ipr6y28viyqkhkg58rdvy27m01q5j5nh-gcc-14.3.0/bin/pahole" + - "/nix/store/6s5jp0cchd4jjq474xkfymj18l6i5x95-glibc-2.40-224-bin/bin/pahole" + - "/nix/store/hqkszxk2c0cxvd04xa4gsaqs182dw8l2-coreutils-9.8/bin/pahole" + - "/nix/store/iz5lckcsg66r223si2gck7csk2hihj0m-binutils-wrapper-2.44/bin/pahole" + - "/nix/store/i7mdvmliqcb5lz0nqija8rq55vws6gi8-binutils-2.44/bin/pahole" + - "/nix/store/nnj8kyg855h71xb37qhjv9j46fhvd43i-screen-5.0.1/bin/pahole" + - "/nix/store/8xhaz2ysixijy8sgzmwmhlialqqind1p-findutils-4.10.0/bin/pahole" + - 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/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for running custom commands. + +rule CUSTOM_COMMAND + command = $COMMAND + description = $DESC + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__zephyr_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__zephyr_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__offsets_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__zephyr_pre0_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C executable. + +rule C_EXECUTABLE_LINKER__zephyr_pre0_ + command = $PRE_LINK && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $FLAGS $LINK_FLAGS $in -o $TARGET_FILE $LINK_PATH $LINK_LIBRARIES -L"/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/14.3.0/thumb/v7e-m/nofp/space" -lc -lgcc && $POST_BUILD + description = Linking C executable $TARGET_FILE; Logical command for additional byproducts on target: zephyr_pre0 + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__zephyr_final_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C executable. + +rule C_EXECUTABLE_LINKER__zephyr_final_ + command = $PRE_LINK && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $FLAGS $LINK_FLAGS $in -o $TARGET_FILE $LINK_PATH $LINK_LIBRARIES -L"/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/14.3.0/thumb/v7e-m/nofp/space" -lc -lgcc && $POST_BUILD + description = Linking C executable $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__arch__common_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__arch__common_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__isr_tables_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__isr_tables_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling ASM files. + +rule ASM_COMPILER__arch__arm__core_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building ASM object $out + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__arch__arm__core_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__arch__arm__core_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling ASM files. + +rule ASM_COMPILER__arch__arm__core__cortex_m_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building ASM object $out + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__arch__arm__core__cortex_m_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__arch__arm__core__cortex_m_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__arch__arm__core__mpu_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__arch__arm__core__mpu_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__lib__libc__picolibc_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__lib__libc__picolibc_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__lib__libc__common_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__lib__libc__common_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__heap_constants_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__subsys__portability__posix__c_lib_ext_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__subsys__portability__posix__c_lib_ext_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__drivers__interrupt_controller_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__drivers__interrupt_controller_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__drivers__clock_control_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__drivers__clock_control_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__drivers__flash_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__drivers__flash_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__drivers__timer_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__drivers__timer_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__.2e.2e__modules__hal__stm32__stm32cube_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__.2e.2e__modules__hal__stm32__stm32cube_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__mcuboot_util_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__mcuboot_util_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for compiling C files. + +rule C_COMPILER__kernel_unscanned_ + depfile = $DEP_FILE + deps = gcc + command = ${LAUNCHER}${CODE_CHECK}/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in + description = Building C object $out + + +############################################# +# Rule for linking C static library. + +rule C_STATIC_LIBRARY_LINKER__kernel_ + command = $PRE_LINK && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E rm -f $TARGET_FILE && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ar qc $TARGET_FILE $LINK_FLAGS $in && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-ranlib $TARGET_FILE && $POST_BUILD + description = Linking C static library $TARGET_FILE + restat = $RESTAT + + +############################################# +# Rule for re-running cmake. + +rule RERUN_CMAKE + command = /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + description = Re-running CMake... + generator = 1 + + +############################################# +# Rule for cleaning additional files. + +rule CLEAN_ADDITIONAL + command = /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -DCONFIG=$CONFIG -P CMakeFiles/clean_additional.cmake + description = Cleaning additional files... + + +############################################# +# Rule for cleaning all built files. + +rule CLEAN + command = /nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/ninja $FILE_ARG -t clean $TARGETS + description = Cleaning all built files... + + +############################################# +# Rule for printing all primary targets available. + +rule HELP + command = /nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/ninja -t targets + description = All primary targets available: + diff --git a/zephyrproject/build/mcuboot/Kconfig/Kconfig.dts b/zephyrproject/build/mcuboot/Kconfig/Kconfig.dts new file mode 100644 index 0000000..97253d1 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/Kconfig.dts @@ -0,0 +1,17228 @@ +# Generated devicetree Kconfig +# +# SPDX-License-Identifier: Apache-2.0 + +DT_COMPAT_ADAFRUIT_SEESAW_GAMEPAD := adafruit,seesaw-gamepad + +config DT_HAS_ADAFRUIT_SEESAW_GAMEPAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADAFRUIT_SEESAW_GAMEPAD)) + +DT_COMPAT_ADAFRUIT_FEATHER_HEADER := adafruit-feather-header + +config DT_HAS_ADAFRUIT_FEATHER_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADAFRUIT_FEATHER_HEADER)) + +DT_COMPAT_ADC_KEYS := adc-keys + +config DT_HAS_ADC_KEYS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADC_KEYS)) + +DT_COMPAT_ADH_TECH_GT5X := adh-tech,gt5x + +config DT_HAS_ADH_TECH_GT5X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADH_TECH_GT5X)) + +DT_COMPAT_ADI_AD2S1210 := adi,ad2s1210 + +config DT_HAS_ADI_AD2S1210_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD2S1210)) + +DT_COMPAT_ADI_AD4050_ADC := adi,ad4050-adc + +config DT_HAS_ADI_AD4050_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4050_ADC)) + +DT_COMPAT_ADI_AD4052_ADC := adi,ad4052-adc + +config DT_HAS_ADI_AD4052_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4052_ADC)) + +DT_COMPAT_ADI_AD4114_ADC := adi,ad4114-adc + +config DT_HAS_ADI_AD4114_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4114_ADC)) + +DT_COMPAT_ADI_AD4130_ADC := adi,ad4130-adc + +config DT_HAS_ADI_AD4130_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4130_ADC)) + +DT_COMPAT_ADI_AD4170_ADC := adi,ad4170-adc + +config DT_HAS_ADI_AD4170_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4170_ADC)) + +DT_COMPAT_ADI_AD4190_ADC := adi,ad4190-adc + +config DT_HAS_ADI_AD4190_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4190_ADC)) + +DT_COMPAT_ADI_AD4195_ADC := adi,ad4195-adc + +config DT_HAS_ADI_AD4195_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD4195_ADC)) + +DT_COMPAT_ADI_AD559X := adi,ad559x + +config DT_HAS_ADI_AD559X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD559X)) + +DT_COMPAT_ADI_AD559X_ADC := adi,ad559x-adc + +config DT_HAS_ADI_AD559X_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD559X_ADC)) + +DT_COMPAT_ADI_AD559X_DAC := adi,ad559x-dac + +config DT_HAS_ADI_AD559X_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD559X_DAC)) + +DT_COMPAT_ADI_AD559X_GPIO := adi,ad559x-gpio + +config DT_HAS_ADI_AD559X_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD559X_GPIO)) + +DT_COMPAT_ADI_AD5601 := adi,ad5601 + +config DT_HAS_ADI_AD5601_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5601)) + +DT_COMPAT_ADI_AD5611 := adi,ad5611 + +config DT_HAS_ADI_AD5611_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5611)) + +DT_COMPAT_ADI_AD5621 := adi,ad5621 + +config DT_HAS_ADI_AD5621_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5621)) + +DT_COMPAT_ADI_AD5628 := adi,ad5628 + +config DT_HAS_ADI_AD5628_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5628)) + +DT_COMPAT_ADI_AD5648 := adi,ad5648 + +config DT_HAS_ADI_AD5648_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5648)) + +DT_COMPAT_ADI_AD5668 := adi,ad5668 + +config DT_HAS_ADI_AD5668_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5668)) + +DT_COMPAT_ADI_AD5672 := adi,ad5672 + +config DT_HAS_ADI_AD5672_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5672)) + +DT_COMPAT_ADI_AD5674 := adi,ad5674 + +config DT_HAS_ADI_AD5674_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5674)) + +DT_COMPAT_ADI_AD5676 := adi,ad5676 + +config DT_HAS_ADI_AD5676_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5676)) + +DT_COMPAT_ADI_AD5679 := adi,ad5679 + +config DT_HAS_ADI_AD5679_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5679)) + +DT_COMPAT_ADI_AD5684 := adi,ad5684 + +config DT_HAS_ADI_AD5684_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5684)) + +DT_COMPAT_ADI_AD5686 := adi,ad5686 + +config DT_HAS_ADI_AD5686_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5686)) + +DT_COMPAT_ADI_AD5687 := adi,ad5687 + +config DT_HAS_ADI_AD5687_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5687)) + +DT_COMPAT_ADI_AD5689 := adi,ad5689 + +config DT_HAS_ADI_AD5689_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5689)) + +DT_COMPAT_ADI_AD5691 := adi,ad5691 + +config DT_HAS_ADI_AD5691_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5691)) + +DT_COMPAT_ADI_AD5692 := adi,ad5692 + +config DT_HAS_ADI_AD5692_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5692)) + +DT_COMPAT_ADI_AD5693 := adi,ad5693 + +config DT_HAS_ADI_AD5693_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD5693)) + +DT_COMPAT_ADI_AD7124_ADC := adi,ad7124-adc + +config DT_HAS_ADI_AD7124_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_AD7124_ADC)) + +DT_COMPAT_ADI_ADE7978 := adi,ade7978 + +config DT_HAS_ADI_ADE7978_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADE7978)) + +DT_COMPAT_ADI_ADIN1100_PHY := adi,adin1100-phy + +config DT_HAS_ADI_ADIN1100_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADIN1100_PHY)) + +DT_COMPAT_ADI_ADIN1110 := adi,adin1110 + +config DT_HAS_ADI_ADIN1110_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADIN1110)) + +DT_COMPAT_ADI_ADIN2111 := adi,adin2111 + +config DT_HAS_ADI_ADIN2111_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADIN2111)) + +DT_COMPAT_ADI_ADIN2111_MDIO := adi,adin2111-mdio + +config DT_HAS_ADI_ADIN2111_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADIN2111_MDIO)) + +DT_COMPAT_ADI_ADIN2111_PHY := adi,adin2111-phy + +config DT_HAS_ADI_ADIN2111_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADIN2111_PHY)) + +DT_COMPAT_ADI_ADLTC2990 := adi,adltc2990 + +config DT_HAS_ADI_ADLTC2990_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADLTC2990)) + +DT_COMPAT_ADI_ADP5360 := adi,adp5360 + +config DT_HAS_ADI_ADP5360_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADP5360)) + +DT_COMPAT_ADI_ADP5360_CHARGER := adi,adp5360-charger + +config DT_HAS_ADI_ADP5360_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADP5360_CHARGER)) + +DT_COMPAT_ADI_ADP5360_FUEL_GAUGE := adi,adp5360-fuel-gauge + +config DT_HAS_ADI_ADP5360_FUEL_GAUGE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADP5360_FUEL_GAUGE)) + +DT_COMPAT_ADI_ADP5360_REGULATOR := adi,adp5360-regulator + +config DT_HAS_ADI_ADP5360_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADP5360_REGULATOR)) + +DT_COMPAT_ADI_ADP5585 := adi,adp5585 + +config DT_HAS_ADI_ADP5585_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADP5585)) + +DT_COMPAT_ADI_ADP5585_GPIO := adi,adp5585-gpio + +config DT_HAS_ADI_ADP5585_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADP5585_GPIO)) + +DT_COMPAT_ADI_ADT7310 := adi,adt7310 + +config DT_HAS_ADI_ADT7310_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADT7310)) + +DT_COMPAT_ADI_ADT7410 := adi,adt7410 + +config DT_HAS_ADI_ADT7410_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADT7410)) + +DT_COMPAT_ADI_ADT7420 := adi,adt7420 + +config DT_HAS_ADI_ADT7420_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADT7420)) + +DT_COMPAT_ADI_ADT7422 := adi,adt7422 + +config DT_HAS_ADI_ADT7422_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADT7422)) + +DT_COMPAT_ADI_ADXL345 := adi,adxl345 + +config DT_HAS_ADI_ADXL345_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADXL345)) + +DT_COMPAT_ADI_ADXL355 := adi,adxl355 + +config DT_HAS_ADI_ADXL355_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADXL355)) + +DT_COMPAT_ADI_ADXL362 := adi,adxl362 + +config DT_HAS_ADI_ADXL362_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADXL362)) + +DT_COMPAT_ADI_ADXL366 := adi,adxl366 + +config DT_HAS_ADI_ADXL366_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADXL366)) + +DT_COMPAT_ADI_ADXL367 := adi,adxl367 + +config DT_HAS_ADI_ADXL367_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADXL367)) + +DT_COMPAT_ADI_ADXL372 := adi,adxl372 + +config DT_HAS_ADI_ADXL372_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_ADXL372)) + +DT_COMPAT_ADI_LTC2959 := adi,ltc2959 + +config DT_HAS_ADI_LTC2959_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_LTC2959)) + +DT_COMPAT_ADI_MAX14906_GPIO := adi,max14906-gpio + +config DT_HAS_ADI_MAX14906_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX14906_GPIO)) + +DT_COMPAT_ADI_MAX14915_GPIO := adi,max14915-gpio + +config DT_HAS_ADI_MAX14915_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX14915_GPIO)) + +DT_COMPAT_ADI_MAX14916_GPIO := adi,max14916-gpio + +config DT_HAS_ADI_MAX14916_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX14916_GPIO)) + +DT_COMPAT_ADI_MAX14917_GPIO := adi,max14917-gpio + +config DT_HAS_ADI_MAX14917_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX14917_GPIO)) + +DT_COMPAT_ADI_MAX22017 := adi,max22017 + +config DT_HAS_ADI_MAX22017_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX22017)) + +DT_COMPAT_ADI_MAX22017_DAC := adi,max22017-dac + +config DT_HAS_ADI_MAX22017_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX22017_DAC)) + +DT_COMPAT_ADI_MAX22017_GPIO := adi,max22017-gpio + +config DT_HAS_ADI_MAX22017_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX22017_GPIO)) + +DT_COMPAT_ADI_MAX22190_GPIO := adi,max22190-gpio + +config DT_HAS_ADI_MAX22190_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX22190_GPIO)) + +DT_COMPAT_ADI_MAX22199_GPIO := adi,max22199-gpio + +config DT_HAS_ADI_MAX22199_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX22199_GPIO)) + +DT_COMPAT_ADI_MAX2221X := adi,max2221x + +config DT_HAS_ADI_MAX2221X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX2221X)) + +DT_COMPAT_ADI_MAX2221X_MISC := adi,max2221x-misc + +config DT_HAS_ADI_MAX2221X_MISC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX2221X_MISC)) + +DT_COMPAT_ADI_MAX2221X_PWM := adi,max2221x-pwm + +config DT_HAS_ADI_MAX2221X_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX2221X_PWM)) + +DT_COMPAT_ADI_MAX30210 := adi,max30210 + +config DT_HAS_ADI_MAX30210_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX30210)) + +DT_COMPAT_ADI_MAX31331 := adi,max31331 + +config DT_HAS_ADI_MAX31331_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX31331)) + +DT_COMPAT_ADI_MAX32_ADC := adi,max32-adc + +config DT_HAS_ADI_MAX32_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_ADC)) + +DT_COMPAT_ADI_MAX32_ADC_10B := adi,max32-adc-10b + +config DT_HAS_ADI_MAX32_ADC_10B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_ADC_10B)) + +DT_COMPAT_ADI_MAX32_ADC_B_ME18 := adi,max32-adc-b-me18 + +config DT_HAS_ADI_MAX32_ADC_B_ME18_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_ADC_B_ME18)) + +DT_COMPAT_ADI_MAX32_ADC_SAR := adi,max32-adc-sar + +config DT_HAS_ADI_MAX32_ADC_SAR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_ADC_SAR)) + +DT_COMPAT_ADI_MAX32_BACKUP_SRAM := adi,max32-backup-sram + +config DT_HAS_ADI_MAX32_BACKUP_SRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_BACKUP_SRAM)) + +DT_COMPAT_ADI_MAX32_CAN := adi,max32-can + +config DT_HAS_ADI_MAX32_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_CAN)) + +DT_COMPAT_ADI_MAX32_COUNTER := adi,max32-counter + +config DT_HAS_ADI_MAX32_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_COUNTER)) + +DT_COMPAT_ADI_MAX32_DMA := adi,max32-dma + +config DT_HAS_ADI_MAX32_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_DMA)) + +DT_COMPAT_ADI_MAX32_FLASH_CONTROLLER := adi,max32-flash-controller + +config DT_HAS_ADI_MAX32_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_FLASH_CONTROLLER)) + +DT_COMPAT_ADI_MAX32_GCR := adi,max32-gcr + +config DT_HAS_ADI_MAX32_GCR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_GCR)) + +DT_COMPAT_ADI_MAX32_GPIO := adi,max32-gpio + +config DT_HAS_ADI_MAX32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_GPIO)) + +DT_COMPAT_ADI_MAX32_HPB := adi,max32-hpb + +config DT_HAS_ADI_MAX32_HPB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_HPB)) + +DT_COMPAT_ADI_MAX32_I2C := adi,max32-i2c + +config DT_HAS_ADI_MAX32_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_I2C)) + +DT_COMPAT_ADI_MAX32_I2S := adi,max32-i2s + +config DT_HAS_ADI_MAX32_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_I2S)) + +DT_COMPAT_ADI_MAX32_I3C := adi,max32-i3c + +config DT_HAS_ADI_MAX32_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_I3C)) + +DT_COMPAT_ADI_MAX32_M4F_CPU1 := adi,max32-m4f-cpu1 + +config DT_HAS_ADI_MAX32_M4F_CPU1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_M4F_CPU1)) + +DT_COMPAT_ADI_MAX32_PINCTRL := adi,max32-pinctrl + +config DT_HAS_ADI_MAX32_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_PINCTRL)) + +DT_COMPAT_ADI_MAX32_PWM := adi,max32-pwm + +config DT_HAS_ADI_MAX32_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_PWM)) + +DT_COMPAT_ADI_MAX32_RTC_COUNTER := adi,max32-rtc-counter + +config DT_HAS_ADI_MAX32_RTC_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_RTC_COUNTER)) + +DT_COMPAT_ADI_MAX32_RV32 := adi,max32-rv32 + +config DT_HAS_ADI_MAX32_RV32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_RV32)) + +DT_COMPAT_ADI_MAX32_RV32_INTC := adi,max32-rv32-intc + +config DT_HAS_ADI_MAX32_RV32_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_RV32_INTC)) + +DT_COMPAT_ADI_MAX32_RV32_SYS_TIMER := adi,max32-rv32-sys-timer + +config DT_HAS_ADI_MAX32_RV32_SYS_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_RV32_SYS_TIMER)) + +DT_COMPAT_ADI_MAX32_SDHC := adi,max32-sdhc + +config DT_HAS_ADI_MAX32_SDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_SDHC)) + +DT_COMPAT_ADI_MAX32_SPI := adi,max32-spi + +config DT_HAS_ADI_MAX32_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_SPI)) + +DT_COMPAT_ADI_MAX32_SPIXF := adi,max32-spixf + +config DT_HAS_ADI_MAX32_SPIXF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_SPIXF)) + +DT_COMPAT_ADI_MAX32_SPIXF_NOR := adi,max32-spixf-nor + +config DT_HAS_ADI_MAX32_SPIXF_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_SPIXF_NOR)) + +DT_COMPAT_ADI_MAX32_TIMER := adi,max32-timer + +config DT_HAS_ADI_MAX32_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_TIMER)) + +DT_COMPAT_ADI_MAX32_TRNG := adi,max32-trng + +config DT_HAS_ADI_MAX32_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_TRNG)) + +DT_COMPAT_ADI_MAX32_UART := adi,max32-uart + +config DT_HAS_ADI_MAX32_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_UART)) + +DT_COMPAT_ADI_MAX32_USBHS := adi,max32-usbhs + +config DT_HAS_ADI_MAX32_USBHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_USBHS)) + +DT_COMPAT_ADI_MAX32_W1 := adi,max32-w1 + +config DT_HAS_ADI_MAX32_W1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_W1)) + +DT_COMPAT_ADI_MAX32_WATCHDOG := adi,max32-watchdog + +config DT_HAS_ADI_MAX32_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_WATCHDOG)) + +DT_COMPAT_ADI_MAX32_WUT := adi,max32-wut + +config DT_HAS_ADI_MAX32_WUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_WUT)) + +DT_COMPAT_ADI_MAX32_WUT_TIMER := adi,max32-wut-timer + +config DT_HAS_ADI_MAX32_WUT_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX32_WUT_TIMER)) + +DT_COMPAT_ADI_MAX42500_WATCHDOG := adi,max42500-watchdog + +config DT_HAS_ADI_MAX42500_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAX42500_WATCHDOG)) + +DT_COMPAT_ADI_MAXQ10XX := adi,maxq10xx + +config DT_HAS_ADI_MAXQ10XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAXQ10XX)) + +DT_COMPAT_ADI_MAXQ10XX_TRNG := adi,maxq10xx-trng + +config DT_HAS_ADI_MAXQ10XX_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MAXQ10XX_TRNG)) + +DT_COMPAT_ADI_MBOX_MAX32_SEMA := adi,mbox-max32-sema + +config DT_HAS_ADI_MBOX_MAX32_SEMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_MBOX_MAX32_SEMA)) + +DT_COMPAT_ADI_SDP_120 := adi,sdp-120 + +config DT_HAS_ADI_SDP_120_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_SDP_120)) + +DT_COMPAT_ADI_TMC2209 := adi,tmc2209 + +config DT_HAS_ADI_TMC2209_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC2209)) + +DT_COMPAT_ADI_TMC50XX := adi,tmc50xx + +config DT_HAS_ADI_TMC50XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC50XX)) + +DT_COMPAT_ADI_TMC50XX_STEPPER_CTRL := adi,tmc50xx-stepper-ctrl + +config DT_HAS_ADI_TMC50XX_STEPPER_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC50XX_STEPPER_CTRL)) + +DT_COMPAT_ADI_TMC50XX_STEPPER_DRIVER := adi,tmc50xx-stepper-driver + +config DT_HAS_ADI_TMC50XX_STEPPER_DRIVER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC50XX_STEPPER_DRIVER)) + +DT_COMPAT_ADI_TMC51XX := adi,tmc51xx + +config DT_HAS_ADI_TMC51XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC51XX)) + +DT_COMPAT_ADI_TMC51XX_STEPPER_CTRL := adi,tmc51xx-stepper-ctrl + +config DT_HAS_ADI_TMC51XX_STEPPER_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC51XX_STEPPER_CTRL)) + +DT_COMPAT_ADI_TMC51XX_STEPPER_DRIVER := adi,tmc51xx-stepper-driver + +config DT_HAS_ADI_TMC51XX_STEPPER_DRIVER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMC51XX_STEPPER_DRIVER)) + +DT_COMPAT_ADI_TMCM3216 := adi,tmcm3216 + +config DT_HAS_ADI_TMCM3216_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMCM3216)) + +DT_COMPAT_ADI_TMCM3216_STEPPER_CTRL := adi,tmcm3216-stepper-ctrl + +config DT_HAS_ADI_TMCM3216_STEPPER_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMCM3216_STEPPER_CTRL)) + +DT_COMPAT_ADI_TMCM3216_STEPPER_DRIVER := adi,tmcm3216-stepper-driver + +config DT_HAS_ADI_TMCM3216_STEPPER_DRIVER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ADI_TMCM3216_STEPPER_DRIVER)) + +DT_COMPAT_AESC_GPIO := aesc,gpio + +config DT_HAS_AESC_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AESC_GPIO)) + +DT_COMPAT_AESC_UART := aesc,uart + +config DT_HAS_AESC_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AESC_UART)) + +DT_COMPAT_ALIF_CLOCKCTRL := alif,clockctrl + +config DT_HAS_ALIF_CLOCKCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALIF_CLOCKCTRL)) + +DT_COMPAT_ALIF_PINCTRL := alif,pinctrl + +config DT_HAS_ALIF_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALIF_PINCTRL)) + +DT_COMPAT_ALLEGRO_A4979 := allegro,a4979 + +config DT_HAS_ALLEGRO_A4979_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALLEGRO_A4979)) + +DT_COMPAT_ALLEGRO_ALS31300 := allegro,als31300 + +config DT_HAS_ALLEGRO_ALS31300_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALLEGRO_ALS31300)) + +DT_COMPAT_ALTR_JTAG_UART := altr,jtag-uart + +config DT_HAS_ALTR_JTAG_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_JTAG_UART)) + +DT_COMPAT_ALTR_MSGDMA := altr,msgdma + +config DT_HAS_ALTR_MSGDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_MSGDMA)) + +DT_COMPAT_ALTR_NIOS2_I2C := altr,nios2-i2c + +config DT_HAS_ALTR_NIOS2_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_NIOS2_I2C)) + +DT_COMPAT_ALTR_NIOS2_QSPI := altr,nios2-qspi + +config DT_HAS_ALTR_NIOS2_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_NIOS2_QSPI)) + +DT_COMPAT_ALTR_NIOS2_QSPI_NOR := altr,nios2-qspi-nor + +config DT_HAS_ALTR_NIOS2_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_NIOS2_QSPI_NOR)) + +DT_COMPAT_ALTR_PIO_1_0 := altr,pio-1.0 + +config DT_HAS_ALTR_PIO_1_0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_PIO_1_0)) + +DT_COMPAT_ALTR_UART := altr,uart + +config DT_HAS_ALTR_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ALTR_UART)) + +DT_COMPAT_AMBIQ_ADC := ambiq,adc + +config DT_HAS_AMBIQ_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_ADC)) + +DT_COMPAT_AMBIQ_AM1805 := ambiq,am1805 + +config DT_HAS_AMBIQ_AM1805_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_AM1805)) + +DT_COMPAT_AMBIQ_APOLLO2_PINCTRL := ambiq,apollo2-pinctrl + +config DT_HAS_AMBIQ_APOLLO2_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_APOLLO2_PINCTRL)) + +DT_COMPAT_AMBIQ_APOLLO3_PINCTRL := ambiq,apollo3-pinctrl + +config DT_HAS_AMBIQ_APOLLO3_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_APOLLO3_PINCTRL)) + +DT_COMPAT_AMBIQ_APOLLO4_PINCTRL := ambiq,apollo4-pinctrl + +config DT_HAS_AMBIQ_APOLLO4_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_APOLLO4_PINCTRL)) + +DT_COMPAT_AMBIQ_APOLLO5_PINCTRL := ambiq,apollo5-pinctrl + +config DT_HAS_AMBIQ_APOLLO5_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_APOLLO5_PINCTRL)) + +DT_COMPAT_AMBIQ_BT_HCI_SPI := ambiq,bt-hci-spi + +config DT_HAS_AMBIQ_BT_HCI_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_BT_HCI_SPI)) + +DT_COMPAT_AMBIQ_CLKCTRL := ambiq,clkctrl + +config DT_HAS_AMBIQ_CLKCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_CLKCTRL)) + +DT_COMPAT_AMBIQ_COUNTER := ambiq,counter + +config DT_HAS_AMBIQ_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_COUNTER)) + +DT_COMPAT_AMBIQ_CTIMER := ambiq,ctimer + +config DT_HAS_AMBIQ_CTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_CTIMER)) + +DT_COMPAT_AMBIQ_CTIMER_PWM := ambiq,ctimer-pwm + +config DT_HAS_AMBIQ_CTIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_CTIMER_PWM)) + +DT_COMPAT_AMBIQ_FLASH_CONTROLLER := ambiq,flash-controller + +config DT_HAS_AMBIQ_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_FLASH_CONTROLLER)) + +DT_COMPAT_AMBIQ_GPIO := ambiq,gpio + +config DT_HAS_AMBIQ_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_GPIO)) + +DT_COMPAT_AMBIQ_GPIO_BANK := ambiq,gpio-bank + +config DT_HAS_AMBIQ_GPIO_BANK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_GPIO_BANK)) + +DT_COMPAT_AMBIQ_I2C := ambiq,i2c + +config DT_HAS_AMBIQ_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_I2C)) + +DT_COMPAT_AMBIQ_I2S := ambiq,i2s + +config DT_HAS_AMBIQ_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_I2S)) + +DT_COMPAT_AMBIQ_IOM := ambiq,iom + +config DT_HAS_AMBIQ_IOM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_IOM)) + +DT_COMPAT_AMBIQ_IOS := ambiq,ios + +config DT_HAS_AMBIQ_IOS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_IOS)) + +DT_COMPAT_AMBIQ_IOS_I2C := ambiq,ios-i2c + +config DT_HAS_AMBIQ_IOS_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_IOS_I2C)) + +DT_COMPAT_AMBIQ_MSPI := ambiq,mspi + +config DT_HAS_AMBIQ_MSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_MSPI)) + +DT_COMPAT_AMBIQ_MSPI_CONTROLLER := ambiq,mspi-controller + +config DT_HAS_AMBIQ_MSPI_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_MSPI_CONTROLLER)) + +DT_COMPAT_AMBIQ_MSPI_DEVICE := ambiq,mspi-device + +config DT_HAS_AMBIQ_MSPI_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_MSPI_DEVICE)) + +DT_COMPAT_AMBIQ_PDM := ambiq,pdm + +config DT_HAS_AMBIQ_PDM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_PDM)) + +DT_COMPAT_AMBIQ_PL011_UART := ambiq,pl011-uart + +config DT_HAS_AMBIQ_PL011_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_PL011_UART)) + +DT_COMPAT_AMBIQ_PUF_TRNG := ambiq,puf-trng + +config DT_HAS_AMBIQ_PUF_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_PUF_TRNG)) + +DT_COMPAT_AMBIQ_RTC := ambiq,rtc + +config DT_HAS_AMBIQ_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_RTC)) + +DT_COMPAT_AMBIQ_SDIO := ambiq,sdio + +config DT_HAS_AMBIQ_SDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_SDIO)) + +DT_COMPAT_AMBIQ_SPI := ambiq,spi + +config DT_HAS_AMBIQ_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_SPI)) + +DT_COMPAT_AMBIQ_SPI_BLEIF := ambiq,spi-bleif + +config DT_HAS_AMBIQ_SPI_BLEIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_SPI_BLEIF)) + +DT_COMPAT_AMBIQ_SPID := ambiq,spid + +config DT_HAS_AMBIQ_SPID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_SPID)) + +DT_COMPAT_AMBIQ_STIMER := ambiq,stimer + +config DT_HAS_AMBIQ_STIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_STIMER)) + +DT_COMPAT_AMBIQ_TIMER := ambiq,timer + +config DT_HAS_AMBIQ_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_TIMER)) + +DT_COMPAT_AMBIQ_TIMER_PWM := ambiq,timer-pwm + +config DT_HAS_AMBIQ_TIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_TIMER_PWM)) + +DT_COMPAT_AMBIQ_UART := ambiq,uart + +config DT_HAS_AMBIQ_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_UART)) + +DT_COMPAT_AMBIQ_USB := ambiq,usb + +config DT_HAS_AMBIQ_USB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_USB)) + +DT_COMPAT_AMBIQ_WATCHDOG := ambiq,watchdog + +config DT_HAS_AMBIQ_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_WATCHDOG)) + +DT_COMPAT_AMBIQ_HEADER := ambiq-header + +config DT_HAS_AMBIQ_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMBIQ_HEADER)) + +DT_COMPAT_AMD_ACP_HOST_DMA := amd,acp-host-dma + +config DT_HAS_AMD_ACP_HOST_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMD_ACP_HOST_DMA)) + +DT_COMPAT_AMD_ACP_INTC := amd,acp-intc + +config DT_HAS_AMD_ACP_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMD_ACP_INTC)) + +DT_COMPAT_AMD_ACP_SDW_DAI := amd,acp-sdw-dai + +config DT_HAS_AMD_ACP_SDW_DAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMD_ACP_SDW_DAI)) + +DT_COMPAT_AMD_ACP_SDW_DMA := amd,acp-sdw-dma + +config DT_HAS_AMD_ACP_SDW_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMD_ACP_SDW_DMA)) + +DT_COMPAT_AMD_SB_TSI := amd,sb-tsi + +config DT_HAS_AMD_SB_TSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMD_SB_TSI)) + +DT_COMPAT_AMS_AS5048 := ams,as5048 + +config DT_HAS_AMS_AS5048_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_AS5048)) + +DT_COMPAT_AMS_AS5600 := ams,as5600 + +config DT_HAS_AMS_AS5600_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_AS5600)) + +DT_COMPAT_AMS_AS6212 := ams,as6212 + +config DT_HAS_AMS_AS6212_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_AS6212)) + +DT_COMPAT_AMS_AS6221 := ams,as6221 + +config DT_HAS_AMS_AS6221_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_AS6221)) + +DT_COMPAT_AMS_CCS811 := ams,ccs811 + +config DT_HAS_AMS_CCS811_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_CCS811)) + +DT_COMPAT_AMS_ENS210 := ams,ens210 + +config DT_HAS_AMS_ENS210_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_ENS210)) + +DT_COMPAT_AMS_IAQCORE := ams,iaqcore + +config DT_HAS_AMS_IAQCORE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_IAQCORE)) + +DT_COMPAT_AMS_TCS3400 := ams,tcs3400 + +config DT_HAS_AMS_TCS3400_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_TCS3400)) + +DT_COMPAT_AMS_TMD2620 := ams,tmd2620 + +config DT_HAS_AMS_TMD2620_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_TMD2620)) + +DT_COMPAT_AMS_TSL2540 := ams,tsl2540 + +config DT_HAS_AMS_TSL2540_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_TSL2540)) + +DT_COMPAT_AMS_TSL2561 := ams,tsl2561 + +config DT_HAS_AMS_TSL2561_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_TSL2561)) + +DT_COMPAT_AMS_TSL2591 := ams,tsl2591 + +config DT_HAS_AMS_TSL2591_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AMS_TSL2591)) + +DT_COMPAT_ANALOG_AXIS := analog-axis + +config DT_HAS_ANALOG_AXIS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANALOG_AXIS)) + +DT_COMPAT_ANDESTECH_ANDESCORE_V5 := andestech,andescore-v5 + +config DT_HAS_ANDESTECH_ANDESCORE_V5_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ANDESCORE_V5)) + +DT_COMPAT_ANDESTECH_ATCDMACX00 := andestech,atcdmacx00 + +config DT_HAS_ANDESTECH_ATCDMACX00_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ATCDMACX00)) + +DT_COMPAT_ANDESTECH_ATCGPIO100 := andestech,atcgpio100 + +config DT_HAS_ANDESTECH_ATCGPIO100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ATCGPIO100)) + +DT_COMPAT_ANDESTECH_ATCIIC100 := andestech,atciic100 + +config DT_HAS_ANDESTECH_ATCIIC100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ATCIIC100)) + +DT_COMPAT_ANDESTECH_ATCPIT100 := andestech,atcpit100 + +config DT_HAS_ANDESTECH_ATCPIT100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ATCPIT100)) + +DT_COMPAT_ANDESTECH_ATCSPI200 := andestech,atcspi200 + +config DT_HAS_ANDESTECH_ATCSPI200_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ATCSPI200)) + +DT_COMPAT_ANDESTECH_ATCWDT200 := andestech,atcwdt200 + +config DT_HAS_ANDESTECH_ATCWDT200_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_ATCWDT200)) + +DT_COMPAT_ANDESTECH_L2C := andestech,l2c + +config DT_HAS_ANDESTECH_L2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_L2C)) + +DT_COMPAT_ANDESTECH_MBOX_PLIC_SW := andestech,mbox-plic-sw + +config DT_HAS_ANDESTECH_MBOX_PLIC_SW_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_MBOX_PLIC_SW)) + +DT_COMPAT_ANDESTECH_NCEPLIC100 := andestech,nceplic100 + +config DT_HAS_ANDESTECH_NCEPLIC100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_NCEPLIC100)) + +DT_COMPAT_ANDESTECH_QSPI_NOR := andestech,qspi-nor + +config DT_HAS_ANDESTECH_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_QSPI_NOR)) + +DT_COMPAT_ANDESTECH_QSPI_NOR_XIP := andestech,qspi-nor-xip + +config DT_HAS_ANDESTECH_QSPI_NOR_XIP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ANDESTECH_QSPI_NOR_XIP)) + +DT_COMPAT_AOSONG_AGS10 := aosong,ags10 + +config DT_HAS_AOSONG_AGS10_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AOSONG_AGS10)) + +DT_COMPAT_AOSONG_AHT20 := aosong,aht20 + +config DT_HAS_AOSONG_AHT20_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AOSONG_AHT20)) + +DT_COMPAT_AOSONG_AM2301B := aosong,am2301b + +config DT_HAS_AOSONG_AM2301B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AOSONG_AM2301B)) + +DT_COMPAT_AOSONG_DHT := aosong,dht + +config DT_HAS_AOSONG_DHT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AOSONG_DHT)) + +DT_COMPAT_AOSONG_DHT20 := aosong,dht20 + +config DT_HAS_AOSONG_DHT20_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AOSONG_DHT20)) + +DT_COMPAT_AP_FCX_MLDX5 := ap,fcx-mldx5 + +config DT_HAS_AP_FCX_MLDX5_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AP_FCX_MLDX5)) + +DT_COMPAT_APA_APA102 := apa,apa102 + +config DT_HAS_APA_APA102_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_APA_APA102)) + +DT_COMPAT_APTINA_MT9M114 := aptina,mt9m114 + +config DT_HAS_APTINA_MT9M114_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_APTINA_MT9M114)) + +DT_COMPAT_ARC_DCCM := arc,dccm + +config DT_HAS_ARC_DCCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARC_DCCM)) + +DT_COMPAT_ARC_ICCM := arc,iccm + +config DT_HAS_ARC_ICCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARC_ICCM)) + +DT_COMPAT_ARC_XCCM := arc,xccm + +config DT_HAS_ARC_XCCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARC_XCCM)) + +DT_COMPAT_ARC_YCCM := arc,yccm + +config DT_HAS_ARC_YCCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARC_YCCM)) + +DT_COMPAT_ARDUCAM_DVP_20PIN_CONNECTOR := arducam,dvp-20pin-connector + +config DT_HAS_ARDUCAM_DVP_20PIN_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUCAM_DVP_20PIN_CONNECTOR)) + +DT_COMPAT_ARDUCAM_FFC_40PIN_CONNECTOR := arducam,ffc-40pin-connector + +config DT_HAS_ARDUCAM_FFC_40PIN_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUCAM_FFC_40PIN_CONNECTOR)) + +DT_COMPAT_ARDUCAM_MEGA := arducam,mega + +config DT_HAS_ARDUCAM_MEGA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUCAM_MEGA)) + +DT_COMPAT_ARDUINO_MODULINO_BUTTONS := arduino,modulino-buttons + +config DT_HAS_ARDUINO_MODULINO_BUTTONS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_MODULINO_BUTTONS)) + +DT_COMPAT_ARDUINO_MODULINO_BUTTONS_LEDS := arduino,modulino-buttons-leds + +config DT_HAS_ARDUINO_MODULINO_BUTTONS_LEDS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_MODULINO_BUTTONS_LEDS)) + +DT_COMPAT_ARDUINO_MODULINO_LATCH_RELAY := arduino,modulino-latch-relay + +config DT_HAS_ARDUINO_MODULINO_LATCH_RELAY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_MODULINO_LATCH_RELAY)) + +DT_COMPAT_ARDUINO_MODULINO_PIXELS := arduino,modulino-pixels + +config DT_HAS_ARDUINO_MODULINO_PIXELS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_MODULINO_PIXELS)) + +DT_COMPAT_ARDUINO_UNO_ADC := arduino,uno-adc + +config DT_HAS_ARDUINO_UNO_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_UNO_ADC)) + +DT_COMPAT_ARDUINO_HEADER_PWM := arduino-header-pwm + +config DT_HAS_ARDUINO_HEADER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_HEADER_PWM)) + +DT_COMPAT_ARDUINO_HEADER_R3 := arduino-header-r3 + +config DT_HAS_ARDUINO_HEADER_R3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_HEADER_R3)) + +DT_COMPAT_ARDUINO_MEGA_HEADER := arduino-mega-header + +config DT_HAS_ARDUINO_MEGA_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_MEGA_HEADER)) + +DT_COMPAT_ARDUINO_MKR_HEADER := arduino-mkr-header + +config DT_HAS_ARDUINO_MKR_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_MKR_HEADER)) + +DT_COMPAT_ARDUINO_NANO_HEADER := arduino-nano-header + +config DT_HAS_ARDUINO_NANO_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARDUINO_NANO_HEADER)) + +DT_COMPAT_ARM_ARMV6M_MPU := arm,armv6m-mpu + +config DT_HAS_ARM_ARMV6M_MPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV6M_MPU)) + +DT_COMPAT_ARM_ARMV6M_SYSTICK := arm,armv6m-systick + +config DT_HAS_ARM_ARMV6M_SYSTICK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV6M_SYSTICK)) + +DT_COMPAT_ARM_ARMV7_TIMER := arm,armv7-timer + +config DT_HAS_ARM_ARMV7_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV7_TIMER)) + +DT_COMPAT_ARM_ARMV7M_ITM := arm,armv7m-itm + +config DT_HAS_ARM_ARMV7M_ITM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV7M_ITM)) + +DT_COMPAT_ARM_ARMV7M_MPU := arm,armv7m-mpu + +config DT_HAS_ARM_ARMV7M_MPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV7M_MPU)) + +DT_COMPAT_ARM_ARMV7M_SYSTICK := arm,armv7m-systick + +config DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV7M_SYSTICK)) + +DT_COMPAT_ARM_ARMV8_TIMER := arm,armv8-timer + +config DT_HAS_ARM_ARMV8_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV8_TIMER)) + +DT_COMPAT_ARM_ARMV8_1M_MPU := arm,armv8.1m-mpu + +config DT_HAS_ARM_ARMV8_1M_MPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV8_1M_MPU)) + +DT_COMPAT_ARM_ARMV8_1M_SYSTICK := arm,armv8.1m-systick + +config DT_HAS_ARM_ARMV8_1M_SYSTICK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV8_1M_SYSTICK)) + +DT_COMPAT_ARM_ARMV8M_ITM := arm,armv8m-itm + +config DT_HAS_ARM_ARMV8M_ITM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV8M_ITM)) + +DT_COMPAT_ARM_ARMV8M_MPU := arm,armv8m-mpu + +config DT_HAS_ARM_ARMV8M_MPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV8M_MPU)) + +DT_COMPAT_ARM_ARMV8M_SYSTICK := arm,armv8m-systick + +config DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ARMV8M_SYSTICK)) + +DT_COMPAT_ARM_AXI_TIMING_ADAPTER := arm,axi-timing-adapter + +config DT_HAS_ARM_AXI_TIMING_ADAPTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_AXI_TIMING_ADAPTER)) + +DT_COMPAT_ARM_BEETLE_SYSCON := arm,beetle-syscon + +config DT_HAS_ARM_BEETLE_SYSCON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_BEETLE_SYSCON)) + +DT_COMPAT_ARM_CMSDK_DTIMER := arm,cmsdk-dtimer + +config DT_HAS_ARM_CMSDK_DTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CMSDK_DTIMER)) + +DT_COMPAT_ARM_CMSDK_GPIO := arm,cmsdk-gpio + +config DT_HAS_ARM_CMSDK_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CMSDK_GPIO)) + +DT_COMPAT_ARM_CMSDK_TIMER := arm,cmsdk-timer + +config DT_HAS_ARM_CMSDK_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CMSDK_TIMER)) + +DT_COMPAT_ARM_CMSDK_UART := arm,cmsdk-uart + +config DT_HAS_ARM_CMSDK_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CMSDK_UART)) + +DT_COMPAT_ARM_CMSDK_WATCHDOG := arm,cmsdk-watchdog + +config DT_HAS_ARM_CMSDK_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CMSDK_WATCHDOG)) + +DT_COMPAT_ARM_CORTEX_A320 := arm,cortex-a320 + +config DT_HAS_ARM_CORTEX_A320_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A320)) + +DT_COMPAT_ARM_CORTEX_A510 := arm,cortex-a510 + +config DT_HAS_ARM_CORTEX_A510_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A510)) + +DT_COMPAT_ARM_CORTEX_A53 := arm,cortex-a53 + +config DT_HAS_ARM_CORTEX_A53_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A53)) + +DT_COMPAT_ARM_CORTEX_A55 := arm,cortex-a55 + +config DT_HAS_ARM_CORTEX_A55_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A55)) + +DT_COMPAT_ARM_CORTEX_A7 := arm,cortex-a7 + +config DT_HAS_ARM_CORTEX_A7_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A7)) + +DT_COMPAT_ARM_CORTEX_A72 := arm,cortex-a72 + +config DT_HAS_ARM_CORTEX_A72_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A72)) + +DT_COMPAT_ARM_CORTEX_A76 := arm,cortex-a76 + +config DT_HAS_ARM_CORTEX_A76_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A76)) + +DT_COMPAT_ARM_CORTEX_A78 := arm,cortex-a78 + +config DT_HAS_ARM_CORTEX_A78_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A78)) + +DT_COMPAT_ARM_CORTEX_A9 := arm,cortex-a9 + +config DT_HAS_ARM_CORTEX_A9_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_A9)) + +DT_COMPAT_ARM_CORTEX_M0 := arm,cortex-m0 + +config DT_HAS_ARM_CORTEX_M0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M0)) + +DT_COMPAT_ARM_CORTEX_M0_ := arm,cortex-m0+ + +config DT_HAS_ARM_CORTEX_M0__ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M0_)) + +DT_COMPAT_ARM_CORTEX_M1 := arm,cortex-m1 + +config DT_HAS_ARM_CORTEX_M1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M1)) + +DT_COMPAT_ARM_CORTEX_M23 := arm,cortex-m23 + +config DT_HAS_ARM_CORTEX_M23_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M23)) + +DT_COMPAT_ARM_CORTEX_M3 := arm,cortex-m3 + +config DT_HAS_ARM_CORTEX_M3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M3)) + +DT_COMPAT_ARM_CORTEX_M33 := arm,cortex-m33 + +config DT_HAS_ARM_CORTEX_M33_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M33)) + +DT_COMPAT_ARM_CORTEX_M33F := arm,cortex-m33f + +config DT_HAS_ARM_CORTEX_M33F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M33F)) + +DT_COMPAT_ARM_CORTEX_M4 := arm,cortex-m4 + +config DT_HAS_ARM_CORTEX_M4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M4)) + +DT_COMPAT_ARM_CORTEX_M4F := arm,cortex-m4f + +config DT_HAS_ARM_CORTEX_M4F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M4F)) + +DT_COMPAT_ARM_CORTEX_M52 := arm,cortex-m52 + +config DT_HAS_ARM_CORTEX_M52_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M52)) + +DT_COMPAT_ARM_CORTEX_M52F := arm,cortex-m52f + +config DT_HAS_ARM_CORTEX_M52F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M52F)) + +DT_COMPAT_ARM_CORTEX_M55 := arm,cortex-m55 + +config DT_HAS_ARM_CORTEX_M55_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M55)) + +DT_COMPAT_ARM_CORTEX_M55F := arm,cortex-m55f + +config DT_HAS_ARM_CORTEX_M55F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M55F)) + +DT_COMPAT_ARM_CORTEX_M7 := arm,cortex-m7 + +config DT_HAS_ARM_CORTEX_M7_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M7)) + +DT_COMPAT_ARM_CORTEX_M85 := arm,cortex-m85 + +config DT_HAS_ARM_CORTEX_M85_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M85)) + +DT_COMPAT_ARM_CORTEX_M85F := arm,cortex-m85f + +config DT_HAS_ARM_CORTEX_M85F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_M85F)) + +DT_COMPAT_ARM_CORTEX_R4 := arm,cortex-r4 + +config DT_HAS_ARM_CORTEX_R4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R4)) + +DT_COMPAT_ARM_CORTEX_R4F := arm,cortex-r4f + +config DT_HAS_ARM_CORTEX_R4F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R4F)) + +DT_COMPAT_ARM_CORTEX_R5 := arm,cortex-r5 + +config DT_HAS_ARM_CORTEX_R5_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R5)) + +DT_COMPAT_ARM_CORTEX_R52 := arm,cortex-r52 + +config DT_HAS_ARM_CORTEX_R52_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R52)) + +DT_COMPAT_ARM_CORTEX_R5F := arm,cortex-r5f + +config DT_HAS_ARM_CORTEX_R5F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R5F)) + +DT_COMPAT_ARM_CORTEX_R7 := arm,cortex-r7 + +config DT_HAS_ARM_CORTEX_R7_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R7)) + +DT_COMPAT_ARM_CORTEX_R8 := arm,cortex-r8 + +config DT_HAS_ARM_CORTEX_R8_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R8)) + +DT_COMPAT_ARM_CORTEX_R82 := arm,cortex-r82 + +config DT_HAS_ARM_CORTEX_R82_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CORTEX_R82)) + +DT_COMPAT_ARM_CRYPTOCELL_310 := arm,cryptocell-310 + +config DT_HAS_ARM_CRYPTOCELL_310_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CRYPTOCELL_310)) + +DT_COMPAT_ARM_CRYPTOCELL_312 := arm,cryptocell-312 + +config DT_HAS_ARM_CRYPTOCELL_312_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CRYPTOCELL_312)) + +DT_COMPAT_ARM_DMA_PL330 := arm,dma-pl330 + +config DT_HAS_ARM_DMA_PL330_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_DMA_PL330)) + +DT_COMPAT_ARM_DTCM := arm,dtcm + +config DT_HAS_ARM_DTCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_DTCM)) + +DT_COMPAT_ARM_ETHOS_U := arm,ethos-u + +config DT_HAS_ARM_ETHOS_U_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ETHOS_U)) + +DT_COMPAT_ARM_FVP_PWRC := arm,fvp-pwrc + +config DT_HAS_ARM_FVP_PWRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_FVP_PWRC)) + +DT_COMPAT_ARM_GIC := arm,gic + +config DT_HAS_ARM_GIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_GIC)) + +DT_COMPAT_ARM_GIC_V1 := arm,gic-v1 + +config DT_HAS_ARM_GIC_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_GIC_V1)) + +DT_COMPAT_ARM_GIC_V2 := arm,gic-v2 + +config DT_HAS_ARM_GIC_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_GIC_V2)) + +DT_COMPAT_ARM_GIC_V3 := arm,gic-v3 + +config DT_HAS_ARM_GIC_V3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_GIC_V3)) + +DT_COMPAT_ARM_GIC_V3_ITS := arm,gic-v3-its + +config DT_HAS_ARM_GIC_V3_ITS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_GIC_V3_ITS)) + +DT_COMPAT_ARM_ITCM := arm,itcm + +config DT_HAS_ARM_ITCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_ITCM)) + +DT_COMPAT_ARM_MHU := arm,mhu + +config DT_HAS_ARM_MHU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_MHU)) + +DT_COMPAT_ARM_MHUV3 := arm,mhuv3 + +config DT_HAS_ARM_MHUV3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_MHUV3)) + +DT_COMPAT_ARM_MMIO32_GPIO := arm,mmio32-gpio + +config DT_HAS_ARM_MMIO32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_MMIO32_GPIO)) + +DT_COMPAT_ARM_MPS2_PINCTRL := arm,mps2-pinctrl + +config DT_HAS_ARM_MPS2_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_MPS2_PINCTRL)) + +DT_COMPAT_ARM_MPS3_PINCTRL := arm,mps3-pinctrl + +config DT_HAS_ARM_MPS3_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_MPS3_PINCTRL)) + +DT_COMPAT_ARM_MPS4_PINCTRL := arm,mps4-pinctrl + +config DT_HAS_ARM_MPS4_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_MPS4_PINCTRL)) + +DT_COMPAT_ARM_PL011 := arm,pl011 + +config DT_HAS_ARM_PL011_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_PL011)) + +DT_COMPAT_ARM_PL022 := arm,pl022 + +config DT_HAS_ARM_PL022_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_PL022)) + +DT_COMPAT_ARM_PSCI_0_2 := arm,psci-0.2 + +config DT_HAS_ARM_PSCI_0_2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_PSCI_0_2)) + +DT_COMPAT_ARM_PSCI_1_1 := arm,psci-1.1 + +config DT_HAS_ARM_PSCI_1_1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_PSCI_1_1)) + +DT_COMPAT_ARM_SBSA_UART := arm,sbsa-uart + +config DT_HAS_ARM_SBSA_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SBSA_UART)) + +DT_COMPAT_ARM_SCC := arm,scc + +config DT_HAS_ARM_SCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCC)) + +DT_COMPAT_ARM_SCMI := arm,scmi + +config DT_HAS_ARM_SCMI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI)) + +DT_COMPAT_ARM_SCMI_CLOCK := arm,scmi-clock + +config DT_HAS_ARM_SCMI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_CLOCK)) + +DT_COMPAT_ARM_SCMI_PINCTRL := arm,scmi-pinctrl + +config DT_HAS_ARM_SCMI_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_PINCTRL)) + +DT_COMPAT_ARM_SCMI_POWER := arm,scmi-power + +config DT_HAS_ARM_SCMI_POWER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_POWER)) + +DT_COMPAT_ARM_SCMI_POWER_DOMAIN := arm,scmi-power-domain + +config DT_HAS_ARM_SCMI_POWER_DOMAIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_POWER_DOMAIN)) + +DT_COMPAT_ARM_SCMI_SHMEM := arm,scmi-shmem + +config DT_HAS_ARM_SCMI_SHMEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_SHMEM)) + +DT_COMPAT_ARM_SCMI_SMC := arm,scmi-smc + +config DT_HAS_ARM_SCMI_SMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_SMC)) + +DT_COMPAT_ARM_SCMI_SYSTEM := arm,scmi-system + +config DT_HAS_ARM_SCMI_SYSTEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_SCMI_SYSTEM)) + +DT_COMPAT_ARM_STMESP := arm,stmesp + +config DT_HAS_ARM_STMESP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_STMESP)) + +DT_COMPAT_ARM_V2M_BEETLE_PINCTRL := arm,v2m_beetle-pinctrl + +config DT_HAS_ARM_V2M_BEETLE_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_V2M_BEETLE_PINCTRL)) + +DT_COMPAT_ARM_V6M_NVIC := arm,v6m-nvic + +config DT_HAS_ARM_V6M_NVIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_V6M_NVIC)) + +DT_COMPAT_ARM_V7M_NVIC := arm,v7m-nvic + +config DT_HAS_ARM_V7M_NVIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_V7M_NVIC)) + +DT_COMPAT_ARM_V8_1M_NVIC := arm,v8.1m-nvic + +config DT_HAS_ARM_V8_1M_NVIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_V8_1M_NVIC)) + +DT_COMPAT_ARM_V8M_NVIC := arm,v8m-nvic + +config DT_HAS_ARM_V8M_NVIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_V8M_NVIC)) + +DT_COMPAT_ARM_VERSATILE_I2C := arm,versatile-i2c + +config DT_HAS_ARM_VERSATILE_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_VERSATILE_I2C)) + +DT_COMPAT_ASAHI_KASEI_AK8975 := asahi-kasei,ak8975 + +config DT_HAS_ASAHI_KASEI_AK8975_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ASAHI_KASEI_AK8975)) + +DT_COMPAT_ASAHI_KASEI_AKM09918C := asahi-kasei,akm09918c + +config DT_HAS_ASAHI_KASEI_AKM09918C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ASAHI_KASEI_AKM09918C)) + +DT_COMPAT_ASMEDIA_ASM2364 := asmedia,asm2364 + +config DT_HAS_ASMEDIA_ASM2364_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ASMEDIA_ASM2364)) + +DT_COMPAT_ASPEED_AST10X0_CLOCK := aspeed,ast10x0-clock + +config DT_HAS_ASPEED_AST10X0_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ASPEED_AST10X0_CLOCK)) + +DT_COMPAT_ASPEED_AST10X0_RESET := aspeed,ast10x0-reset + +config DT_HAS_ASPEED_AST10X0_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ASPEED_AST10X0_RESET)) + +DT_COMPAT_ATMEL_AT24 := atmel,at24 + +config DT_HAS_ATMEL_AT24_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_AT24)) + +DT_COMPAT_ATMEL_AT24MAC402 := atmel,at24mac402 + +config DT_HAS_ATMEL_AT24MAC402_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_AT24MAC402)) + +DT_COMPAT_ATMEL_AT25 := atmel,at25 + +config DT_HAS_ATMEL_AT25_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_AT25)) + +DT_COMPAT_ATMEL_AT25XV021A := atmel,at25xv021a + +config DT_HAS_ATMEL_AT25XV021A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_AT25XV021A)) + +DT_COMPAT_ATMEL_AT45 := atmel,at45 + +config DT_HAS_ATMEL_AT45_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_AT45)) + +DT_COMPAT_ATMEL_ATAES132A := atmel,ataes132a + +config DT_HAS_ATMEL_ATAES132A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_ATAES132A)) + +DT_COMPAT_ATMEL_RF2XX := atmel,rf2xx + +config DT_HAS_ATMEL_RF2XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_RF2XX)) + +DT_COMPAT_ATMEL_SAM_ADC := atmel,sam-adc + +config DT_HAS_ATMEL_SAM_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_ADC)) + +DT_COMPAT_ATMEL_SAM_AFEC := atmel,sam-afec + +config DT_HAS_ATMEL_SAM_AFEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_AFEC)) + +DT_COMPAT_ATMEL_SAM_CAN := atmel,sam-can + +config DT_HAS_ATMEL_SAM_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_CAN)) + +DT_COMPAT_ATMEL_SAM_DAC := atmel,sam-dac + +config DT_HAS_ATMEL_SAM_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_DAC)) + +DT_COMPAT_ATMEL_SAM_FLASH := atmel,sam-flash + +config DT_HAS_ATMEL_SAM_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_FLASH)) + +DT_COMPAT_ATMEL_SAM_FLASH_CONTROLLER := atmel,sam-flash-controller + +config DT_HAS_ATMEL_SAM_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_FLASH_CONTROLLER)) + +DT_COMPAT_ATMEL_SAM_GMAC := atmel,sam-gmac + +config DT_HAS_ATMEL_SAM_GMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_GMAC)) + +DT_COMPAT_ATMEL_SAM_GPIO := atmel,sam-gpio + +config DT_HAS_ATMEL_SAM_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_GPIO)) + +DT_COMPAT_ATMEL_SAM_HSMCI := atmel,sam-hsmci + +config DT_HAS_ATMEL_SAM_HSMCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_HSMCI)) + +DT_COMPAT_ATMEL_SAM_I2C_TWI := atmel,sam-i2c-twi + +config DT_HAS_ATMEL_SAM_I2C_TWI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_I2C_TWI)) + +DT_COMPAT_ATMEL_SAM_I2C_TWIHS := atmel,sam-i2c-twihs + +config DT_HAS_ATMEL_SAM_I2C_TWIHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_I2C_TWIHS)) + +DT_COMPAT_ATMEL_SAM_I2C_TWIM := atmel,sam-i2c-twim + +config DT_HAS_ATMEL_SAM_I2C_TWIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_I2C_TWIM)) + +DT_COMPAT_ATMEL_SAM_MDIO := atmel,sam-mdio + +config DT_HAS_ATMEL_SAM_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_MDIO)) + +DT_COMPAT_ATMEL_SAM_PINCTRL := atmel,sam-pinctrl + +config DT_HAS_ATMEL_SAM_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_PINCTRL)) + +DT_COMPAT_ATMEL_SAM_PMC := atmel,sam-pmc + +config DT_HAS_ATMEL_SAM_PMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_PMC)) + +DT_COMPAT_ATMEL_SAM_PWM := atmel,sam-pwm + +config DT_HAS_ATMEL_SAM_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_PWM)) + +DT_COMPAT_ATMEL_SAM_RSTC := atmel,sam-rstc + +config DT_HAS_ATMEL_SAM_RSTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_RSTC)) + +DT_COMPAT_ATMEL_SAM_RTC := atmel,sam-rtc + +config DT_HAS_ATMEL_SAM_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_RTC)) + +DT_COMPAT_ATMEL_SAM_SMC := atmel,sam-smc + +config DT_HAS_ATMEL_SAM_SMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_SMC)) + +DT_COMPAT_ATMEL_SAM_SPI := atmel,sam-spi + +config DT_HAS_ATMEL_SAM_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_SPI)) + +DT_COMPAT_ATMEL_SAM_SSC := atmel,sam-ssc + +config DT_HAS_ATMEL_SAM_SSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_SSC)) + +DT_COMPAT_ATMEL_SAM_SUPC := atmel,sam-supc + +config DT_HAS_ATMEL_SAM_SUPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_SUPC)) + +DT_COMPAT_ATMEL_SAM_TC := atmel,sam-tc + +config DT_HAS_ATMEL_SAM_TC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_TC)) + +DT_COMPAT_ATMEL_SAM_TC_QDEC := atmel,sam-tc-qdec + +config DT_HAS_ATMEL_SAM_TC_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_TC_QDEC)) + +DT_COMPAT_ATMEL_SAM_TRNG := atmel,sam-trng + +config DT_HAS_ATMEL_SAM_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_TRNG)) + +DT_COMPAT_ATMEL_SAM_UART := atmel,sam-uart + +config DT_HAS_ATMEL_SAM_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_UART)) + +DT_COMPAT_ATMEL_SAM_UDP := atmel,sam-udp + +config DT_HAS_ATMEL_SAM_UDP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_UDP)) + +DT_COMPAT_ATMEL_SAM_USART := atmel,sam-usart + +config DT_HAS_ATMEL_SAM_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_USART)) + +DT_COMPAT_ATMEL_SAM_USBC := atmel,sam-usbc + +config DT_HAS_ATMEL_SAM_USBC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_USBC)) + +DT_COMPAT_ATMEL_SAM_USBHS := atmel,sam-usbhs + +config DT_HAS_ATMEL_SAM_USBHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_USBHS)) + +DT_COMPAT_ATMEL_SAM_WATCHDOG := atmel,sam-watchdog + +config DT_HAS_ATMEL_SAM_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_WATCHDOG)) + +DT_COMPAT_ATMEL_SAM_XDMAC := atmel,sam-xdmac + +config DT_HAS_ATMEL_SAM_XDMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM_XDMAC)) + +DT_COMPAT_ATMEL_SAM0_ADC := atmel,sam0-adc + +config DT_HAS_ATMEL_SAM0_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_ADC)) + +DT_COMPAT_ATMEL_SAM0_CAN := atmel,sam0-can + +config DT_HAS_ATMEL_SAM0_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_CAN)) + +DT_COMPAT_ATMEL_SAM0_DAC := atmel,sam0-dac + +config DT_HAS_ATMEL_SAM0_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_DAC)) + +DT_COMPAT_ATMEL_SAM0_DMAC := atmel,sam0-dmac + +config DT_HAS_ATMEL_SAM0_DMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_DMAC)) + +DT_COMPAT_ATMEL_SAM0_EIC := atmel,sam0-eic + +config DT_HAS_ATMEL_SAM0_EIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_EIC)) + +DT_COMPAT_ATMEL_SAM0_GCLK := atmel,sam0-gclk + +config DT_HAS_ATMEL_SAM0_GCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_GCLK)) + +DT_COMPAT_ATMEL_SAM0_GMAC := atmel,sam0-gmac + +config DT_HAS_ATMEL_SAM0_GMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_GMAC)) + +DT_COMPAT_ATMEL_SAM0_GPIO := atmel,sam0-gpio + +config DT_HAS_ATMEL_SAM0_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_GPIO)) + +DT_COMPAT_ATMEL_SAM0_I2C := atmel,sam0-i2c + +config DT_HAS_ATMEL_SAM0_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_I2C)) + +DT_COMPAT_ATMEL_SAM0_ID := atmel,sam0-id + +config DT_HAS_ATMEL_SAM0_ID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_ID)) + +DT_COMPAT_ATMEL_SAM0_MCLK := atmel,sam0-mclk + +config DT_HAS_ATMEL_SAM0_MCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_MCLK)) + +DT_COMPAT_ATMEL_SAM0_NVMCTRL := atmel,sam0-nvmctrl + +config DT_HAS_ATMEL_SAM0_NVMCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_NVMCTRL)) + +DT_COMPAT_ATMEL_SAM0_OSC32KCTRL := atmel,sam0-osc32kctrl + +config DT_HAS_ATMEL_SAM0_OSC32KCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_OSC32KCTRL)) + +DT_COMPAT_ATMEL_SAM0_PINCTRL := atmel,sam0-pinctrl + +config DT_HAS_ATMEL_SAM0_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_PINCTRL)) + +DT_COMPAT_ATMEL_SAM0_PINMUX := atmel,sam0-pinmux + +config DT_HAS_ATMEL_SAM0_PINMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_PINMUX)) + +DT_COMPAT_ATMEL_SAM0_RTC := atmel,sam0-rtc + +config DT_HAS_ATMEL_SAM0_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_RTC)) + +DT_COMPAT_ATMEL_SAM0_SERCOM := atmel,sam0-sercom + +config DT_HAS_ATMEL_SAM0_SERCOM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_SERCOM)) + +DT_COMPAT_ATMEL_SAM0_SPI := atmel,sam0-spi + +config DT_HAS_ATMEL_SAM0_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_SPI)) + +DT_COMPAT_ATMEL_SAM0_TC_PWM := atmel,sam0-tc-pwm + +config DT_HAS_ATMEL_SAM0_TC_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_TC_PWM)) + +DT_COMPAT_ATMEL_SAM0_TC32 := atmel,sam0-tc32 + +config DT_HAS_ATMEL_SAM0_TC32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_TC32)) + +DT_COMPAT_ATMEL_SAM0_TCC_PWM := atmel,sam0-tcc-pwm + +config DT_HAS_ATMEL_SAM0_TCC_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_TCC_PWM)) + +DT_COMPAT_ATMEL_SAM0_UART := atmel,sam0-uart + +config DT_HAS_ATMEL_SAM0_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_UART)) + +DT_COMPAT_ATMEL_SAM0_USB := atmel,sam0-usb + +config DT_HAS_ATMEL_SAM0_USB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_USB)) + +DT_COMPAT_ATMEL_SAM0_WATCHDOG := atmel,sam0-watchdog + +config DT_HAS_ATMEL_SAM0_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM0_WATCHDOG)) + +DT_COMPAT_ATMEL_SAM4L_FLASHCALW_CONTROLLER := atmel,sam4l-flashcalw-controller + +config DT_HAS_ATMEL_SAM4L_FLASHCALW_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM4L_FLASHCALW_CONTROLLER)) + +DT_COMPAT_ATMEL_SAM4L_GPIO := atmel,sam4l-gpio + +config DT_HAS_ATMEL_SAM4L_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM4L_GPIO)) + +DT_COMPAT_ATMEL_SAM4L_UID := atmel,sam4l-uid + +config DT_HAS_ATMEL_SAM4L_UID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM4L_UID)) + +DT_COMPAT_ATMEL_SAM4L_WATCHDOG := atmel,sam4l-watchdog + +config DT_HAS_ATMEL_SAM4L_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAM4L_WATCHDOG)) + +DT_COMPAT_ATMEL_SAMD5X_DAC := atmel,samd5x-dac + +config DT_HAS_ATMEL_SAMD5X_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_SAMD5X_DAC)) + +DT_COMPAT_ATMEL_WINC1500 := atmel,winc1500 + +config DT_HAS_ATMEL_WINC1500_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_WINC1500)) + +DT_COMPAT_ATMEL_XPLAINED_HEADER := atmel-xplained-header + +config DT_HAS_ATMEL_XPLAINED_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_XPLAINED_HEADER)) + +DT_COMPAT_ATMEL_XPLAINED_PRO_HEADER := atmel-xplained-pro-header + +config DT_HAS_ATMEL_XPLAINED_PRO_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ATMEL_XPLAINED_PRO_HEADER)) + +DT_COMPAT_AVAGO_APDS9253 := avago,apds9253 + +config DT_HAS_AVAGO_APDS9253_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AVAGO_APDS9253)) + +DT_COMPAT_AVAGO_APDS9306 := avago,apds9306 + +config DT_HAS_AVAGO_APDS9306_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AVAGO_APDS9306)) + +DT_COMPAT_AVAGO_APDS9960 := avago,apds9960 + +config DT_HAS_AVAGO_APDS9960_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AVAGO_APDS9960)) + +DT_COMPAT_AVIA_HX711_SPI := avia,hx711-spi + +config DT_HAS_AVIA_HX711_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AVIA_HX711_SPI)) + +DT_COMPAT_AWINIC_AW88298 := awinic,aw88298 + +config DT_HAS_AWINIC_AW88298_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AWINIC_AW88298)) + +DT_COMPAT_AWINIC_AW9523B := awinic,aw9523b + +config DT_HAS_AWINIC_AW9523B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AWINIC_AW9523B)) + +DT_COMPAT_AWINIC_AW9523B_GPIO := awinic,aw9523b-gpio + +config DT_HAS_AWINIC_AW9523B_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_AWINIC_AW9523B_GPIO)) + +DT_COMPAT_BFLB_ADC := bflb,adc + +config DT_HAS_BFLB_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_ADC)) + +DT_COMPAT_BFLB_AON_REGULATOR := bflb,aon-regulator + +config DT_HAS_BFLB_AON_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_AON_REGULATOR)) + +DT_COMPAT_BFLB_BCLK := bflb,bclk + +config DT_HAS_BFLB_BCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BCLK)) + +DT_COMPAT_BFLB_BL60X_CLOCK_CONTROLLER := bflb,bl60x-clock-controller + +config DT_HAS_BFLB_BL60X_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL60X_CLOCK_CONTROLLER)) + +DT_COMPAT_BFLB_BL60X_70X_GPIO := bflb,bl60x_70x-gpio + +config DT_HAS_BFLB_BL60X_70X_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL60X_70X_GPIO)) + +DT_COMPAT_BFLB_BL61X_CLOCK_CONTROLLER := bflb,bl61x-clock-controller + +config DT_HAS_BFLB_BL61X_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL61X_CLOCK_CONTROLLER)) + +DT_COMPAT_BFLB_BL61X_PSRAM := bflb,bl61x-psram + +config DT_HAS_BFLB_BL61X_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL61X_PSRAM)) + +DT_COMPAT_BFLB_BL61X_808_GPIO := bflb,bl61x_808-gpio + +config DT_HAS_BFLB_BL61X_808_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL61X_808_GPIO)) + +DT_COMPAT_BFLB_BL70X_CLOCK_CONTROLLER := bflb,bl70x-clock-controller + +config DT_HAS_BFLB_BL70X_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL70X_CLOCK_CONTROLLER)) + +DT_COMPAT_BFLB_BL70X_L_CLOCK_CONTROLLER := bflb,bl70x_l-clock-controller + +config DT_HAS_BFLB_BL70X_L_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL70X_L_CLOCK_CONTROLLER)) + +DT_COMPAT_BFLB_BL70X_L_DLL := bflb,bl70x_l-dll + +config DT_HAS_BFLB_BL70X_L_DLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL70X_L_DLL)) + +DT_COMPAT_BFLB_BL808_CLOCK_CONTROLLER := bflb,bl808-clock-controller + +config DT_HAS_BFLB_BL808_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BL808_CLOCK_CONTROLLER)) + +DT_COMPAT_BFLB_BT_HCI := bflb,bt-hci + +config DT_HAS_BFLB_BT_HCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_BT_HCI)) + +DT_COMPAT_BFLB_CLOCK_CONTROLLER := bflb,clock-controller + +config DT_HAS_BFLB_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_CLOCK_CONTROLLER)) + +DT_COMPAT_BFLB_DBI := bflb,dbi + +config DT_HAS_BFLB_DBI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_DBI)) + +DT_COMPAT_BFLB_DMA := bflb,dma + +config DT_HAS_BFLB_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_DMA)) + +DT_COMPAT_BFLB_EFUSE := bflb,efuse + +config DT_HAS_BFLB_EFUSE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_EFUSE)) + +DT_COMPAT_BFLB_F32K := bflb,f32k + +config DT_HAS_BFLB_F32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_F32K)) + +DT_COMPAT_BFLB_FLASH_CLK := bflb,flash-clk + +config DT_HAS_BFLB_FLASH_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_FLASH_CLK)) + +DT_COMPAT_BFLB_FLASH_CONTROLLER := bflb,flash-controller + +config DT_HAS_BFLB_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_FLASH_CONTROLLER)) + +DT_COMPAT_BFLB_I2C := bflb,i2c + +config DT_HAS_BFLB_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_I2C)) + +DT_COMPAT_BFLB_IRX := bflb,irx + +config DT_HAS_BFLB_IRX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_IRX)) + +DT_COMPAT_BFLB_L1C := bflb,l1c + +config DT_HAS_BFLB_L1C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_L1C)) + +DT_COMPAT_BFLB_MM_CLK := bflb,mm-clk + +config DT_HAS_BFLB_MM_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_MM_CLK)) + +DT_COMPAT_BFLB_PINCTRL := bflb,pinctrl + +config DT_HAS_BFLB_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_PINCTRL)) + +DT_COMPAT_BFLB_PLL := bflb,pll + +config DT_HAS_BFLB_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_PLL)) + +DT_COMPAT_BFLB_POWER_CONTROLLER := bflb,power-controller + +config DT_HAS_BFLB_POWER_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_POWER_CONTROLLER)) + +DT_COMPAT_BFLB_PWM_1 := bflb,pwm-1 + +config DT_HAS_BFLB_PWM_1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_PWM_1)) + +DT_COMPAT_BFLB_PWM_2 := bflb,pwm-2 + +config DT_HAS_BFLB_PWM_2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_PWM_2)) + +DT_COMPAT_BFLB_ROOT_CLK := bflb,root-clk + +config DT_HAS_BFLB_ROOT_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_ROOT_CLK)) + +DT_COMPAT_BFLB_RT_REGULATOR := bflb,rt-regulator + +config DT_HAS_BFLB_RT_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_RT_REGULATOR)) + +DT_COMPAT_BFLB_RTC := bflb,rtc + +config DT_HAS_BFLB_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_RTC)) + +DT_COMPAT_BFLB_SDHC := bflb,sdhc + +config DT_HAS_BFLB_SDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_SDHC)) + +DT_COMPAT_BFLB_SEC_ENG_AES := bflb,sec-eng-aes + +config DT_HAS_BFLB_SEC_ENG_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_SEC_ENG_AES)) + +DT_COMPAT_BFLB_SEC_ENG_SHA := bflb,sec-eng-sha + +config DT_HAS_BFLB_SEC_ENG_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_SEC_ENG_SHA)) + +DT_COMPAT_BFLB_SEC_ENG_TRNG := bflb,sec-eng-trng + +config DT_HAS_BFLB_SEC_ENG_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_SEC_ENG_TRNG)) + +DT_COMPAT_BFLB_SOC_REGULATOR := bflb,soc-regulator + +config DT_HAS_BFLB_SOC_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_SOC_REGULATOR)) + +DT_COMPAT_BFLB_SPI := bflb,spi + +config DT_HAS_BFLB_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_SPI)) + +DT_COMPAT_BFLB_TIMER := bflb,timer + +config DT_HAS_BFLB_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_TIMER)) + +DT_COMPAT_BFLB_TIMER_CHANNEL := bflb,timer-channel + +config DT_HAS_BFLB_TIMER_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_TIMER_CHANNEL)) + +DT_COMPAT_BFLB_TSEN := bflb,tsen + +config DT_HAS_BFLB_TSEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_TSEN)) + +DT_COMPAT_BFLB_UART := bflb,uart + +config DT_HAS_BFLB_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_UART)) + +DT_COMPAT_BFLB_UDC_1 := bflb,udc-1 + +config DT_HAS_BFLB_UDC_1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_UDC_1)) + +DT_COMPAT_BFLB_WDT := bflb,wdt + +config DT_HAS_BFLB_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BFLB_WDT)) + +DT_COMPAT_BOSCH_BMA280 := bosch,bma280 + +config DT_HAS_BOSCH_BMA280_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMA280)) + +DT_COMPAT_BOSCH_BMA4XX := bosch,bma4xx + +config DT_HAS_BOSCH_BMA4XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMA4XX)) + +DT_COMPAT_BOSCH_BMC150_MAGN := bosch,bmc150_magn + +config DT_HAS_BOSCH_BMC150_MAGN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMC150_MAGN)) + +DT_COMPAT_BOSCH_BME280 := bosch,bme280 + +config DT_HAS_BOSCH_BME280_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BME280)) + +DT_COMPAT_BOSCH_BME680 := bosch,bme680 + +config DT_HAS_BOSCH_BME680_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BME680)) + +DT_COMPAT_BOSCH_BMG160 := bosch,bmg160 + +config DT_HAS_BOSCH_BMG160_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMG160)) + +DT_COMPAT_BOSCH_BMI08X_ACCEL := bosch,bmi08x-accel + +config DT_HAS_BOSCH_BMI08X_ACCEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMI08X_ACCEL)) + +DT_COMPAT_BOSCH_BMI08X_GYRO := bosch,bmi08x-gyro + +config DT_HAS_BOSCH_BMI08X_GYRO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMI08X_GYRO)) + +DT_COMPAT_BOSCH_BMI160 := bosch,bmi160 + +config DT_HAS_BOSCH_BMI160_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMI160)) + +DT_COMPAT_BOSCH_BMI270 := bosch,bmi270 + +config DT_HAS_BOSCH_BMI270_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMI270)) + +DT_COMPAT_BOSCH_BMI323 := bosch,bmi323 + +config DT_HAS_BOSCH_BMI323_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMI323)) + +DT_COMPAT_BOSCH_BMM150 := bosch,bmm150 + +config DT_HAS_BOSCH_BMM150_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMM150)) + +DT_COMPAT_BOSCH_BMM350 := bosch,bmm350 + +config DT_HAS_BOSCH_BMM350_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMM350)) + +DT_COMPAT_BOSCH_BMP180 := bosch,bmp180 + +config DT_HAS_BOSCH_BMP180_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMP180)) + +DT_COMPAT_BOSCH_BMP388 := bosch,bmp388 + +config DT_HAS_BOSCH_BMP388_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMP388)) + +DT_COMPAT_BOSCH_BMP390 := bosch,bmp390 + +config DT_HAS_BOSCH_BMP390_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMP390)) + +DT_COMPAT_BOSCH_BMP581 := bosch,bmp581 + +config DT_HAS_BOSCH_BMP581_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BOSCH_BMP581)) + +DT_COMPAT_BRCM_AFBR_S50 := brcm,afbr-s50 + +config DT_HAS_BRCM_AFBR_S50_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_AFBR_S50)) + +DT_COMPAT_BRCM_BCM2711_AUX_UART := brcm,bcm2711-aux-uart + +config DT_HAS_BRCM_BCM2711_AUX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_BCM2711_AUX_UART)) + +DT_COMPAT_BRCM_BCM2711_GPIO := brcm,bcm2711-gpio + +config DT_HAS_BRCM_BCM2711_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_BCM2711_GPIO)) + +DT_COMPAT_BRCM_BCM2711_PINCTRL := brcm,bcm2711-pinctrl + +config DT_HAS_BRCM_BCM2711_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_BCM2711_PINCTRL)) + +DT_COMPAT_BRCM_BRCMSTB_GPIO := brcm,brcmstb-gpio + +config DT_HAS_BRCM_BRCMSTB_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_BRCMSTB_GPIO)) + +DT_COMPAT_BRCM_BRCMSTB_PCIE := brcm,brcmstb-pcie + +config DT_HAS_BRCM_BRCMSTB_PCIE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_BRCMSTB_PCIE)) + +DT_COMPAT_BRCM_IPROC_GPIO := brcm,iproc-gpio + +config DT_HAS_BRCM_IPROC_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_IPROC_GPIO)) + +DT_COMPAT_BRCM_IPROC_I2C := brcm,iproc-i2c + +config DT_HAS_BRCM_IPROC_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_IPROC_I2C)) + +DT_COMPAT_BRCM_IPROC_PAX_DMA_V1 := brcm,iproc-pax-dma-v1 + +config DT_HAS_BRCM_IPROC_PAX_DMA_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_IPROC_PAX_DMA_V1)) + +DT_COMPAT_BRCM_IPROC_PAX_DMA_V2 := brcm,iproc-pax-dma-v2 + +config DT_HAS_BRCM_IPROC_PAX_DMA_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_IPROC_PAX_DMA_V2)) + +DT_COMPAT_BRCM_IPROC_PCIE_EP := brcm,iproc-pcie-ep + +config DT_HAS_BRCM_IPROC_PCIE_EP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_IPROC_PCIE_EP)) + +DT_COMPAT_BRCM_IPROC_RNG200 := brcm,iproc-rng200 + +config DT_HAS_BRCM_IPROC_RNG200_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_BRCM_IPROC_RNG200)) + +DT_COMPAT_CAN_TRANSCEIVER_GPIO := can-transceiver-gpio + +config DT_HAS_CAN_TRANSCEIVER_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CAN_TRANSCEIVER_GPIO)) + +DT_COMPAT_CDNS_I2C := cdns,i2c + +config DT_HAS_CDNS_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_I2C)) + +DT_COMPAT_CDNS_I3C := cdns,i3c + +config DT_HAS_CDNS_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_I3C)) + +DT_COMPAT_CDNS_NAND := cdns,nand + +config DT_HAS_CDNS_NAND_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_NAND)) + +DT_COMPAT_CDNS_QSPI_NOR := cdns,qspi-nor + +config DT_HAS_CDNS_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_QSPI_NOR)) + +DT_COMPAT_CDNS_SDHC := cdns,sdhc + +config DT_HAS_CDNS_SDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_SDHC)) + +DT_COMPAT_CDNS_SPI := cdns,spi + +config DT_HAS_CDNS_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_SPI)) + +DT_COMPAT_CDNS_SWERV_S400 := cdns,swerv,s400 + +config DT_HAS_CDNS_SWERV_S400_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_SWERV_S400)) + +DT_COMPAT_CDNS_SWERV_S420 := cdns,swerv,s420 + +config DT_HAS_CDNS_SWERV_S420_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_SWERV_S420)) + +DT_COMPAT_CDNS_SWERV_PIC := cdns,swerv-pic + +config DT_HAS_CDNS_SWERV_PIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_SWERV_PIC)) + +DT_COMPAT_CDNS_TENSILICA_XTENSA_LX3 := cdns,tensilica-xtensa-lx3 + +config DT_HAS_CDNS_TENSILICA_XTENSA_LX3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_TENSILICA_XTENSA_LX3)) + +DT_COMPAT_CDNS_TENSILICA_XTENSA_LX4 := cdns,tensilica-xtensa-lx4 + +config DT_HAS_CDNS_TENSILICA_XTENSA_LX4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_TENSILICA_XTENSA_LX4)) + +DT_COMPAT_CDNS_TENSILICA_XTENSA_LX6 := cdns,tensilica-xtensa-lx6 + +config DT_HAS_CDNS_TENSILICA_XTENSA_LX6_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_TENSILICA_XTENSA_LX6)) + +DT_COMPAT_CDNS_TENSILICA_XTENSA_LX7 := cdns,tensilica-xtensa-lx7 + +config DT_HAS_CDNS_TENSILICA_XTENSA_LX7_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_TENSILICA_XTENSA_LX7)) + +DT_COMPAT_CDNS_UART := cdns,uart + +config DT_HAS_CDNS_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_UART)) + +DT_COMPAT_CDNS_XTENSA_CORE_INTC := cdns,xtensa-core-intc + +config DT_HAS_CDNS_XTENSA_CORE_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CDNS_XTENSA_CORE_INTC)) + +DT_COMPAT_CHIPONE_CO5300 := chipone,co5300 + +config DT_HAS_CHIPONE_CO5300_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CHIPONE_CO5300)) + +DT_COMPAT_CHIPSEMI_CHSC5X := chipsemi,chsc5x + +config DT_HAS_CHIPSEMI_CHSC5X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CHIPSEMI_CHSC5X)) + +DT_COMPAT_CHIPSEMI_CHSC6540 := chipsemi,chsc6540 + +config DT_HAS_CHIPSEMI_CHSC6540_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CHIPSEMI_CHSC6540)) + +DT_COMPAT_CHIPSEMI_CHSC6X := chipsemi,chsc6x + +config DT_HAS_CHIPSEMI_CHSC6X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CHIPSEMI_CHSC6X)) + +DT_COMPAT_CHIPWEALTH_CH1115 := chipwealth,ch1115 + +config DT_HAS_CHIPWEALTH_CH1115_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CHIPWEALTH_CH1115)) + +DT_COMPAT_CHIPWEALTH_CH1116 := chipwealth,ch1116 + +config DT_HAS_CHIPWEALTH_CH1116_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CHIPWEALTH_CH1116)) + +DT_COMPAT_CIRQUE_PINNACLE := cirque,pinnacle + +config DT_HAS_CIRQUE_PINNACLE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRQUE_PINNACLE)) + +DT_COMPAT_CIRRUS_CP9314 := cirrus,cp9314 + +config DT_HAS_CIRRUS_CP9314_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CP9314)) + +DT_COMPAT_CIRRUS_CS40L26 := cirrus,cs40l26 + +config DT_HAS_CIRRUS_CS40L26_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS40L26)) + +DT_COMPAT_CIRRUS_CS40L27 := cirrus,cs40l27 + +config DT_HAS_CIRRUS_CS40L27_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS40L27)) + +DT_COMPAT_CIRRUS_CS40L50 := cirrus,cs40l50 + +config DT_HAS_CIRRUS_CS40L50_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS40L50)) + +DT_COMPAT_CIRRUS_CS40L51 := cirrus,cs40l51 + +config DT_HAS_CIRRUS_CS40L51_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS40L51)) + +DT_COMPAT_CIRRUS_CS40L52 := cirrus,cs40l52 + +config DT_HAS_CIRRUS_CS40L52_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS40L52)) + +DT_COMPAT_CIRRUS_CS40L53 := cirrus,cs40l53 + +config DT_HAS_CIRRUS_CS40L53_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS40L53)) + +DT_COMPAT_CIRRUS_CS43L22 := cirrus,cs43l22 + +config DT_HAS_CIRRUS_CS43L22_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS43L22)) + +DT_COMPAT_CIRRUS_CS47L63 := cirrus,cs47l63 + +config DT_HAS_CIRRUS_CS47L63_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CIRRUS_CS47L63)) + +DT_COMPAT_CURRENT_SENSE_AMPLIFIER := current-sense-amplifier + +config DT_HAS_CURRENT_SENSE_AMPLIFIER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CURRENT_SENSE_AMPLIFIER)) + +DT_COMPAT_CURRENT_SENSE_SHUNT := current-sense-shunt + +config DT_HAS_CURRENT_SENSE_SHUNT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CURRENT_SENSE_SHUNT)) + +DT_COMPAT_CYPRESS_CY8C95XX_GPIO := cypress,cy8c95xx-gpio + +config DT_HAS_CYPRESS_CY8C95XX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_CY8C95XX_GPIO)) + +DT_COMPAT_CYPRESS_CY8C95XX_GPIO_PORT := cypress,cy8c95xx-gpio-port + +config DT_HAS_CYPRESS_CY8C95XX_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_CY8C95XX_GPIO_PORT)) + +DT_COMPAT_CYPRESS_CY8CMBR3XXX := cypress,cy8cmbr3xxx + +config DT_HAS_CYPRESS_CY8CMBR3XXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_CY8CMBR3XXX)) + +DT_COMPAT_CYPRESS_PSOC6_FLASH_CONTROLLER := cypress,psoc6-flash-controller + +config DT_HAS_CYPRESS_PSOC6_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_FLASH_CONTROLLER)) + +DT_COMPAT_CYPRESS_PSOC6_GPIO := cypress,psoc6-gpio + +config DT_HAS_CYPRESS_PSOC6_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_GPIO)) + +DT_COMPAT_CYPRESS_PSOC6_HSIOM := cypress,psoc6-hsiom + +config DT_HAS_CYPRESS_PSOC6_HSIOM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_HSIOM)) + +DT_COMPAT_CYPRESS_PSOC6_INTMUX := cypress,psoc6-intmux + +config DT_HAS_CYPRESS_PSOC6_INTMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_INTMUX)) + +DT_COMPAT_CYPRESS_PSOC6_INTMUX_CH := cypress,psoc6-intmux-ch + +config DT_HAS_CYPRESS_PSOC6_INTMUX_CH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_INTMUX_CH)) + +DT_COMPAT_CYPRESS_PSOC6_SPI := cypress,psoc6-spi + +config DT_HAS_CYPRESS_PSOC6_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_SPI)) + +DT_COMPAT_CYPRESS_PSOC6_UART := cypress,psoc6-uart + +config DT_HAS_CYPRESS_PSOC6_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_UART)) + +DT_COMPAT_CYPRESS_PSOC6_UID := cypress,psoc6-uid + +config DT_HAS_CYPRESS_PSOC6_UID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_CYPRESS_PSOC6_UID)) + +DT_COMPAT_DAC_LEDS := dac-leds + +config DT_HAS_DAC_LEDS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DAC_LEDS)) + +DT_COMPAT_DAVICOM_DM8806_PHY := davicom,dm8806-phy + +config DT_HAS_DAVICOM_DM8806_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DAVICOM_DM8806_PHY)) + +DT_COMPAT_DAVICOM_DM9051 := davicom,dm9051 + +config DT_HAS_DAVICOM_DM9051_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DAVICOM_DM9051)) + +DT_COMPAT_DECAWAVE_DW1000 := decawave,dw1000 + +config DT_HAS_DECAWAVE_DW1000_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DECAWAVE_DW1000)) + +DT_COMPAT_DFROBOT_A01NYUB := dfrobot,a01nyub + +config DT_HAS_DFROBOT_A01NYUB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DFROBOT_A01NYUB)) + +DT_COMPAT_DIGILENT_PMOD := digilent,pmod + +config DT_HAS_DIGILENT_PMOD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DIGILENT_PMOD)) + +DT_COMPAT_DIODES_PI3USB9201 := diodes,pi3usb9201 + +config DT_HAS_DIODES_PI3USB9201_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DIODES_PI3USB9201)) + +DT_COMPAT_DLG_DA7212 := dlg,da7212 + +config DT_HAS_DLG_DA7212_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_DLG_DA7212)) + +DT_COMPAT_EFINIX_SAPPHIRE_GPIO := efinix,sapphire-gpio + +config DT_HAS_EFINIX_SAPPHIRE_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EFINIX_SAPPHIRE_GPIO)) + +DT_COMPAT_EFINIX_SAPPHIRE_TIMER0 := efinix,sapphire-timer0 + +config DT_HAS_EFINIX_SAPPHIRE_TIMER0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EFINIX_SAPPHIRE_TIMER0)) + +DT_COMPAT_EFINIX_SAPPHIRE_UART0 := efinix,sapphire-uart0 + +config DT_HAS_EFINIX_SAPPHIRE_UART0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EFINIX_SAPPHIRE_UART0)) + +DT_COMPAT_EFINIX_VEXRISCV_SAPPHIRE := efinix,vexriscv-sapphire + +config DT_HAS_EFINIX_VEXRISCV_SAPPHIRE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EFINIX_VEXRISCV_SAPPHIRE)) + +DT_COMPAT_EGIS_ET171_SPI := egis,et171-spi + +config DT_HAS_EGIS_ET171_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EGIS_ET171_SPI)) + +DT_COMPAT_EINK_AC057TC1 := eink,ac057tc1 + +config DT_HAS_EINK_AC057TC1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EINK_AC057TC1)) + +DT_COMPAT_EINK_ED2208_GCA := eink,ed2208-gca + +config DT_HAS_EINK_ED2208_GCA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EINK_ED2208_GCA)) + +DT_COMPAT_ELAN_EM32_AHB := elan,em32-ahb + +config DT_HAS_ELAN_EM32_AHB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ELAN_EM32_AHB)) + +DT_COMPAT_ELAN_EM32_APB := elan,em32-apb + +config DT_HAS_ELAN_EM32_APB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ELAN_EM32_APB)) + +DT_COMPAT_ELAN_EM32_GPIO := elan,em32-gpio + +config DT_HAS_ELAN_EM32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ELAN_EM32_GPIO)) + +DT_COMPAT_ELAN_EM32_PWM := elan,em32-pwm + +config DT_HAS_ELAN_EM32_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ELAN_EM32_PWM)) + +DT_COMPAT_ENE_KB106X_ADC := ene,kb106x-adc + +config DT_HAS_ENE_KB106X_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_ADC)) + +DT_COMPAT_ENE_KB106X_GCFG := ene,kb106x-gcfg + +config DT_HAS_ENE_KB106X_GCFG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_GCFG)) + +DT_COMPAT_ENE_KB106X_GPIO := ene,kb106x-gpio + +config DT_HAS_ENE_KB106X_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_GPIO)) + +DT_COMPAT_ENE_KB106X_PINCTRL := ene,kb106x-pinctrl + +config DT_HAS_ENE_KB106X_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_PINCTRL)) + +DT_COMPAT_ENE_KB106X_PWM := ene,kb106x-pwm + +config DT_HAS_ENE_KB106X_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_PWM)) + +DT_COMPAT_ENE_KB106X_TACH := ene,kb106x-tach + +config DT_HAS_ENE_KB106X_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_TACH)) + +DT_COMPAT_ENE_KB106X_UART := ene,kb106x-uart + +config DT_HAS_ENE_KB106X_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_UART)) + +DT_COMPAT_ENE_KB106X_WATCHDOG := ene,kb106x-watchdog + +config DT_HAS_ENE_KB106X_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB106X_WATCHDOG)) + +DT_COMPAT_ENE_KB1200_ADC := ene,kb1200-adc + +config DT_HAS_ENE_KB1200_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_ADC)) + +DT_COMPAT_ENE_KB1200_GCFG := ene,kb1200-gcfg + +config DT_HAS_ENE_KB1200_GCFG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_GCFG)) + +DT_COMPAT_ENE_KB1200_GPIO := ene,kb1200-gpio + +config DT_HAS_ENE_KB1200_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_GPIO)) + +DT_COMPAT_ENE_KB1200_I2C := ene,kb1200-i2c + +config DT_HAS_ENE_KB1200_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_I2C)) + +DT_COMPAT_ENE_KB1200_PINCTRL := ene,kb1200-pinctrl + +config DT_HAS_ENE_KB1200_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_PINCTRL)) + +DT_COMPAT_ENE_KB1200_PMU := ene,kb1200-pmu + +config DT_HAS_ENE_KB1200_PMU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_PMU)) + +DT_COMPAT_ENE_KB1200_PWM := ene,kb1200-pwm + +config DT_HAS_ENE_KB1200_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_PWM)) + +DT_COMPAT_ENE_KB1200_TACH := ene,kb1200-tach + +config DT_HAS_ENE_KB1200_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_TACH)) + +DT_COMPAT_ENE_KB1200_UART := ene,kb1200-uart + +config DT_HAS_ENE_KB1200_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_UART)) + +DT_COMPAT_ENE_KB1200_WATCHDOG := ene,kb1200-watchdog + +config DT_HAS_ENE_KB1200_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ENE_KB1200_WATCHDOG)) + +DT_COMPAT_EPCOS_B57861S0103A039 := epcos,b57861s0103a039 + +config DT_HAS_EPCOS_B57861S0103A039_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EPCOS_B57861S0103A039)) + +DT_COMPAT_EPSON_RX8130CE_RTC := epson,rx8130ce-rtc + +config DT_HAS_EPSON_RX8130CE_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EPSON_RX8130CE_RTC)) + +DT_COMPAT_ESPRESSIF_ESP_AT := espressif,esp-at + +config DT_HAS_ESPRESSIF_ESP_AT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP_AT)) + +DT_COMPAT_ESPRESSIF_ESP_HOSTED := espressif,esp-hosted + +config DT_HAS_ESPRESSIF_ESP_HOSTED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP_HOSTED)) + +DT_COMPAT_ESPRESSIF_ESP_THREADBR_HEADER := espressif,esp-threadbr-header + +config DT_HAS_ESPRESSIF_ESP_THREADBR_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP_THREADBR_HEADER)) + +DT_COMPAT_ESPRESSIF_ESP32_ADC := espressif,esp32-adc + +config DT_HAS_ESPRESSIF_ESP32_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_ADC)) + +DT_COMPAT_ESPRESSIF_ESP32_AES := espressif,esp32-aes + +config DT_HAS_ESPRESSIF_ESP32_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_AES)) + +DT_COMPAT_ESPRESSIF_ESP32_BT_HCI := espressif,esp32-bt-hci + +config DT_HAS_ESPRESSIF_ESP32_BT_HCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_BT_HCI)) + +DT_COMPAT_ESPRESSIF_ESP32_CLOCK := espressif,esp32-clock + +config DT_HAS_ESPRESSIF_ESP32_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_CLOCK)) + +DT_COMPAT_ESPRESSIF_ESP32_COUNTER := espressif,esp32-counter + +config DT_HAS_ESPRESSIF_ESP32_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_COUNTER)) + +DT_COMPAT_ESPRESSIF_ESP32_DAC := espressif,esp32-dac + +config DT_HAS_ESPRESSIF_ESP32_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_DAC)) + +DT_COMPAT_ESPRESSIF_ESP32_ETH := espressif,esp32-eth + +config DT_HAS_ESPRESSIF_ESP32_ETH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_ETH)) + +DT_COMPAT_ESPRESSIF_ESP32_FLASH_CONTROLLER := espressif,esp32-flash-controller + +config DT_HAS_ESPRESSIF_ESP32_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_FLASH_CONTROLLER)) + +DT_COMPAT_ESPRESSIF_ESP32_GDMA := espressif,esp32-gdma + +config DT_HAS_ESPRESSIF_ESP32_GDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_GDMA)) + +DT_COMPAT_ESPRESSIF_ESP32_GPIO := espressif,esp32-gpio + +config DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_GPIO)) + +DT_COMPAT_ESPRESSIF_ESP32_I2C := espressif,esp32-i2c + +config DT_HAS_ESPRESSIF_ESP32_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_I2C)) + +DT_COMPAT_ESPRESSIF_ESP32_I2S := espressif,esp32-i2s + +config DT_HAS_ESPRESSIF_ESP32_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_I2S)) + +DT_COMPAT_ESPRESSIF_ESP32_IEEE802154 := espressif,esp32-ieee802154 + +config DT_HAS_ESPRESSIF_ESP32_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_IEEE802154)) + +DT_COMPAT_ESPRESSIF_ESP32_INTC := espressif,esp32-intc + +config DT_HAS_ESPRESSIF_ESP32_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_INTC)) + +DT_COMPAT_ESPRESSIF_ESP32_IPM := espressif,esp32-ipm + +config DT_HAS_ESPRESSIF_ESP32_IPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_IPM)) + +DT_COMPAT_ESPRESSIF_ESP32_LCD_CAM := espressif,esp32-lcd-cam + +config DT_HAS_ESPRESSIF_ESP32_LCD_CAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_LCD_CAM)) + +DT_COMPAT_ESPRESSIF_ESP32_LCD_CAM_DVP := espressif,esp32-lcd-cam-dvp + +config DT_HAS_ESPRESSIF_ESP32_LCD_CAM_DVP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_LCD_CAM_DVP)) + +DT_COMPAT_ESPRESSIF_ESP32_LCD_CAM_MIPI_DBI := espressif,esp32-lcd-cam-mipi-dbi + +config DT_HAS_ESPRESSIF_ESP32_LCD_CAM_MIPI_DBI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_LCD_CAM_MIPI_DBI)) + +DT_COMPAT_ESPRESSIF_ESP32_LEDC := espressif,esp32-ledc + +config DT_HAS_ESPRESSIF_ESP32_LEDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_LEDC)) + +DT_COMPAT_ESPRESSIF_ESP32_LPGPIO := espressif,esp32-lpgpio + +config DT_HAS_ESPRESSIF_ESP32_LPGPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_LPGPIO)) + +DT_COMPAT_ESPRESSIF_ESP32_LPUART := espressif,esp32-lpuart + +config DT_HAS_ESPRESSIF_ESP32_LPUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_LPUART)) + +DT_COMPAT_ESPRESSIF_ESP32_MCPWM := espressif,esp32-mcpwm + +config DT_HAS_ESPRESSIF_ESP32_MCPWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_MCPWM)) + +DT_COMPAT_ESPRESSIF_ESP32_MDIO := espressif,esp32-mdio + +config DT_HAS_ESPRESSIF_ESP32_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_MDIO)) + +DT_COMPAT_ESPRESSIF_ESP32_PCNT := espressif,esp32-pcnt + +config DT_HAS_ESPRESSIF_ESP32_PCNT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_PCNT)) + +DT_COMPAT_ESPRESSIF_ESP32_PINCTRL := espressif,esp32-pinctrl + +config DT_HAS_ESPRESSIF_ESP32_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_PINCTRL)) + +DT_COMPAT_ESPRESSIF_ESP32_PSRAM := espressif,esp32-psram + +config DT_HAS_ESPRESSIF_ESP32_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_PSRAM)) + +DT_COMPAT_ESPRESSIF_ESP32_REGULATOR := espressif,esp32-regulator + +config DT_HAS_ESPRESSIF_ESP32_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_REGULATOR)) + +DT_COMPAT_ESPRESSIF_ESP32_RTC_TIMER := espressif,esp32-rtc-timer + +config DT_HAS_ESPRESSIF_ESP32_RTC_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_RTC_TIMER)) + +DT_COMPAT_ESPRESSIF_ESP32_SDHC := espressif,esp32-sdhc + +config DT_HAS_ESPRESSIF_ESP32_SDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_SDHC)) + +DT_COMPAT_ESPRESSIF_ESP32_SDHC_SLOT := espressif,esp32-sdhc-slot + +config DT_HAS_ESPRESSIF_ESP32_SDHC_SLOT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_SDHC_SLOT)) + +DT_COMPAT_ESPRESSIF_ESP32_SHA := espressif,esp32-sha + +config DT_HAS_ESPRESSIF_ESP32_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_SHA)) + +DT_COMPAT_ESPRESSIF_ESP32_SPI := espressif,esp32-spi + +config DT_HAS_ESPRESSIF_ESP32_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_SPI)) + +DT_COMPAT_ESPRESSIF_ESP32_SYSTIMER := espressif,esp32-systimer + +config DT_HAS_ESPRESSIF_ESP32_SYSTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_SYSTIMER)) + +DT_COMPAT_ESPRESSIF_ESP32_TEMP := espressif,esp32-temp + +config DT_HAS_ESPRESSIF_ESP32_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_TEMP)) + +DT_COMPAT_ESPRESSIF_ESP32_TIMER := espressif,esp32-timer + +config DT_HAS_ESPRESSIF_ESP32_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_TIMER)) + +DT_COMPAT_ESPRESSIF_ESP32_TOUCH := espressif,esp32-touch + +config DT_HAS_ESPRESSIF_ESP32_TOUCH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_TOUCH)) + +DT_COMPAT_ESPRESSIF_ESP32_TRNG := espressif,esp32-trng + +config DT_HAS_ESPRESSIF_ESP32_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_TRNG)) + +DT_COMPAT_ESPRESSIF_ESP32_TWAI := espressif,esp32-twai + +config DT_HAS_ESPRESSIF_ESP32_TWAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_TWAI)) + +DT_COMPAT_ESPRESSIF_ESP32_UART := espressif,esp32-uart + +config DT_HAS_ESPRESSIF_ESP32_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_UART)) + +DT_COMPAT_ESPRESSIF_ESP32_USB_OTG := espressif,esp32-usb-otg + +config DT_HAS_ESPRESSIF_ESP32_USB_OTG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_USB_OTG)) + +DT_COMPAT_ESPRESSIF_ESP32_USB_SERIAL := espressif,esp32-usb-serial + +config DT_HAS_ESPRESSIF_ESP32_USB_SERIAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_USB_SERIAL)) + +DT_COMPAT_ESPRESSIF_ESP32_WATCHDOG := espressif,esp32-watchdog + +config DT_HAS_ESPRESSIF_ESP32_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_WATCHDOG)) + +DT_COMPAT_ESPRESSIF_ESP32_WIFI := espressif,esp32-wifi + +config DT_HAS_ESPRESSIF_ESP32_WIFI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_WIFI)) + +DT_COMPAT_ESPRESSIF_ESP32_XT_WDT := espressif,esp32-xt-wdt + +config DT_HAS_ESPRESSIF_ESP32_XT_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_ESP32_XT_WDT)) + +DT_COMPAT_ESPRESSIF_MBOX_ESP32 := espressif,mbox-esp32 + +config DT_HAS_ESPRESSIF_MBOX_ESP32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_MBOX_ESP32)) + +DT_COMPAT_ESPRESSIF_RISCV := espressif,riscv + +config DT_HAS_ESPRESSIF_RISCV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_RISCV)) + +DT_COMPAT_ESPRESSIF_XTENSA_LX6 := espressif,xtensa-lx6 + +config DT_HAS_ESPRESSIF_XTENSA_LX6_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_XTENSA_LX6)) + +DT_COMPAT_ESPRESSIF_XTENSA_LX7 := espressif,xtensa-lx7 + +config DT_HAS_ESPRESSIF_XTENSA_LX7_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ESPRESSIF_XTENSA_LX7)) + +DT_COMPAT_ETHERNET_PHY := ethernet-phy + +config DT_HAS_ETHERNET_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ETHERNET_PHY)) + +DT_COMPAT_ETHERNET_PHY_FIXED_LINK := ethernet-phy-fixed-link + +config DT_HAS_ETHERNET_PHY_FIXED_LINK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ETHERNET_PHY_FIXED_LINK)) + +DT_COMPAT_EVERLIGHT_ALS_PT19 := everlight,als-pt19 + +config DT_HAS_EVERLIGHT_ALS_PT19_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_EVERLIGHT_ALS_PT19)) + +DT_COMPAT_FCS_FXL6408 := fcs,fxl6408 + +config DT_HAS_FCS_FXL6408_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FCS_FXL6408)) + +DT_COMPAT_FESTO_VEAA_X_3 := festo,veaa-x-3 + +config DT_HAS_FESTO_VEAA_X_3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FESTO_VEAA_X_3)) + +DT_COMPAT_FINTEK_F75303 := fintek,f75303 + +config DT_HAS_FINTEK_F75303_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FINTEK_F75303)) + +DT_COMPAT_FIXED_CLOCK := fixed-clock + +config DT_HAS_FIXED_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FIXED_CLOCK)) + +DT_COMPAT_FIXED_FACTOR_CLOCK := fixed-factor-clock + +config DT_HAS_FIXED_FACTOR_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FIXED_FACTOR_CLOCK)) + +DT_COMPAT_FIXED_LAYOUT := fixed-layout + +config DT_HAS_FIXED_LAYOUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FIXED_LAYOUT)) + +DT_COMPAT_FIXED_PARTITIONS := fixed-partitions + +config DT_HAS_FIXED_PARTITIONS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FIXED_PARTITIONS)) + +DT_COMPAT_FIXED_SUBPARTITIONS := fixed-subpartitions + +config DT_HAS_FIXED_SUBPARTITIONS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FIXED_SUBPARTITIONS)) + +DT_COMPAT_FOBE_QUILL_HEADER := fobe,quill-header + +config DT_HAS_FOBE_QUILL_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FOBE_QUILL_HEADER)) + +DT_COMPAT_FOCALTECH_FT5336 := focaltech,ft5336 + +config DT_HAS_FOCALTECH_FT5336_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FOCALTECH_FT5336)) + +DT_COMPAT_FOCALTECH_FT6146 := focaltech,ft6146 + +config DT_HAS_FOCALTECH_FT6146_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FOCALTECH_FT6146)) + +DT_COMPAT_FOCALTECH_FT9001_CPM := focaltech,ft9001-cpm + +config DT_HAS_FOCALTECH_FT9001_CPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FOCALTECH_FT9001_CPM)) + +DT_COMPAT_FOCALTECH_FT9001_CPM_RCTL := focaltech,ft9001-cpm-rctl + +config DT_HAS_FOCALTECH_FT9001_CPM_RCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FOCALTECH_FT9001_CPM_RCTL)) + +DT_COMPAT_FOCALTECH_FT9001_USART := focaltech,ft9001-usart + +config DT_HAS_FOCALTECH_FT9001_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FOCALTECH_FT9001_USART)) + +DT_COMPAT_FRIDA_NT35510 := frida,nt35510 + +config DT_HAS_FRIDA_NT35510_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FRIDA_NT35510)) + +DT_COMPAT_FSL_IMX21_I2C := fsl,imx21-i2c + +config DT_HAS_FSL_IMX21_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FSL_IMX21_I2C)) + +DT_COMPAT_FSL_IMX27_PWM := fsl,imx27-pwm + +config DT_HAS_FSL_IMX27_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FSL_IMX27_PWM)) + +DT_COMPAT_FTDI_FT800 := ftdi,ft800 + +config DT_HAS_FTDI_FT800_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FTDI_FT800)) + +DT_COMPAT_FUJITSU_MB85RCXX := fujitsu,mb85rcxx + +config DT_HAS_FUJITSU_MB85RCXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FUJITSU_MB85RCXX)) + +DT_COMPAT_FUJITSU_MB85RSXX := fujitsu,mb85rsxx + +config DT_HAS_FUJITSU_MB85RSXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FUJITSU_MB85RSXX)) + +DT_COMPAT_FUTABA_SBUS := futaba,sbus + +config DT_HAS_FUTABA_SBUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_FUTABA_SBUS)) + +DT_COMPAT_GAISLER_APBUART := gaisler,apbuart + +config DT_HAS_GAISLER_APBUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GAISLER_APBUART)) + +DT_COMPAT_GAISLER_GPTIMER := gaisler,gptimer + +config DT_HAS_GAISLER_GPTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GAISLER_GPTIMER)) + +DT_COMPAT_GAISLER_GRGPIO := gaisler,grgpio + +config DT_HAS_GAISLER_GRGPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GAISLER_GRGPIO)) + +DT_COMPAT_GAISLER_IRQMP := gaisler,irqmp + +config DT_HAS_GAISLER_IRQMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GAISLER_IRQMP)) + +DT_COMPAT_GAISLER_LEON3 := gaisler,leon3 + +config DT_HAS_GAISLER_LEON3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GAISLER_LEON3)) + +DT_COMPAT_GAISLER_SPIMCTRL := gaisler,spimctrl + +config DT_HAS_GAISLER_SPIMCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GAISLER_SPIMCTRL)) + +DT_COMPAT_GALAXYCORE_GC2145 := galaxycore,gc2145 + +config DT_HAS_GALAXYCORE_GC2145_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GALAXYCORE_GC2145)) + +DT_COMPAT_GALAXYCORE_GC9X01X := galaxycore,gc9x01x + +config DT_HAS_GALAXYCORE_GC9X01X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GALAXYCORE_GC9X01X)) + +DT_COMPAT_GD_GD32_ADC := gd,gd32-adc + +config DT_HAS_GD_GD32_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_ADC)) + +DT_COMPAT_GD_GD32_AFIO := gd,gd32-afio + +config DT_HAS_GD_GD32_AFIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_AFIO)) + +DT_COMPAT_GD_GD32_BACKUP_SRAM := gd,gd32-backup-sram + +config DT_HAS_GD_GD32_BACKUP_SRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_BACKUP_SRAM)) + +DT_COMPAT_GD_GD32_BLDO := gd,gd32-bldo + +config DT_HAS_GD_GD32_BLDO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_BLDO)) + +DT_COMPAT_GD_GD32_CCTL := gd,gd32-cctl + +config DT_HAS_GD_GD32_CCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_CCTL)) + +DT_COMPAT_GD_GD32_DAC := gd,gd32-dac + +config DT_HAS_GD_GD32_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_DAC)) + +DT_COMPAT_GD_GD32_DMA := gd,gd32-dma + +config DT_HAS_GD_GD32_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_DMA)) + +DT_COMPAT_GD_GD32_DMA_V1 := gd,gd32-dma-v1 + +config DT_HAS_GD_GD32_DMA_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_DMA_V1)) + +DT_COMPAT_GD_GD32_EXTI := gd,gd32-exti + +config DT_HAS_GD_GD32_EXTI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_EXTI)) + +DT_COMPAT_GD_GD32_FLASH_CONTROLLER := gd,gd32-flash-controller + +config DT_HAS_GD_GD32_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_FLASH_CONTROLLER)) + +DT_COMPAT_GD_GD32_FWDGT := gd,gd32-fwdgt + +config DT_HAS_GD_GD32_FWDGT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_FWDGT)) + +DT_COMPAT_GD_GD32_GPIO := gd,gd32-gpio + +config DT_HAS_GD_GD32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_GPIO)) + +DT_COMPAT_GD_GD32_I2C := gd,gd32-i2c + +config DT_HAS_GD_GD32_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_I2C)) + +DT_COMPAT_GD_GD32_NV_FLASH_V1 := gd,gd32-nv-flash-v1 + +config DT_HAS_GD_GD32_NV_FLASH_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_NV_FLASH_V1)) + +DT_COMPAT_GD_GD32_NV_FLASH_V2 := gd,gd32-nv-flash-v2 + +config DT_HAS_GD_GD32_NV_FLASH_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_NV_FLASH_V2)) + +DT_COMPAT_GD_GD32_NV_FLASH_V3 := gd,gd32-nv-flash-v3 + +config DT_HAS_GD_GD32_NV_FLASH_V3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_NV_FLASH_V3)) + +DT_COMPAT_GD_GD32_PINCTRL_AF := gd,gd32-pinctrl-af + +config DT_HAS_GD_GD32_PINCTRL_AF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_PINCTRL_AF)) + +DT_COMPAT_GD_GD32_PINCTRL_AFIO := gd,gd32-pinctrl-afio + +config DT_HAS_GD_GD32_PINCTRL_AFIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_PINCTRL_AFIO)) + +DT_COMPAT_GD_GD32_PWM := gd,gd32-pwm + +config DT_HAS_GD_GD32_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_PWM)) + +DT_COMPAT_GD_GD32_RCTL := gd,gd32-rctl + +config DT_HAS_GD_GD32_RCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_RCTL)) + +DT_COMPAT_GD_GD32_RCU := gd,gd32-rcu + +config DT_HAS_GD_GD32_RCU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_RCU)) + +DT_COMPAT_GD_GD32_SPI := gd,gd32-spi + +config DT_HAS_GD_GD32_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_SPI)) + +DT_COMPAT_GD_GD32_SYSCFG := gd,gd32-syscfg + +config DT_HAS_GD_GD32_SYSCFG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_SYSCFG)) + +DT_COMPAT_GD_GD32_TIMER := gd,gd32-timer + +config DT_HAS_GD_GD32_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_TIMER)) + +DT_COMPAT_GD_GD32_TRNG := gd,gd32-trng + +config DT_HAS_GD_GD32_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_TRNG)) + +DT_COMPAT_GD_GD32_USART := gd,gd32-usart + +config DT_HAS_GD_GD32_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_USART)) + +DT_COMPAT_GD_GD32_WWDGT := gd,gd32-wwdgt + +config DT_HAS_GD_GD32_WWDGT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GD_GD32_WWDGT)) + +DT_COMPAT_GLOBALTOP_PA6H := globaltop,pa6h + +config DT_HAS_GLOBALTOP_PA6H_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GLOBALTOP_PA6H)) + +DT_COMPAT_GNSS_NMEA_GENERIC := gnss-nmea-generic + +config DT_HAS_GNSS_NMEA_GENERIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GNSS_NMEA_GENERIC)) + +DT_COMPAT_GOODIX_GT911 := goodix,gt911 + +config DT_HAS_GOODIX_GT911_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GOODIX_GT911)) + +DT_COMPAT_GPIO_7_SEGMENT := gpio-7-segment + +config DT_HAS_GPIO_7_SEGMENT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_7_SEGMENT)) + +DT_COMPAT_GPIO_I2C := gpio-i2c + +config DT_HAS_GPIO_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_I2C)) + +DT_COMPAT_GPIO_I2C_SWITCH := gpio-i2c-switch + +config DT_HAS_GPIO_I2C_SWITCH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_I2C_SWITCH)) + +DT_COMPAT_GPIO_KBD_MATRIX := gpio-kbd-matrix + +config DT_HAS_GPIO_KBD_MATRIX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_KBD_MATRIX)) + +DT_COMPAT_GPIO_KEYS := gpio-keys + +config DT_HAS_GPIO_KEYS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_KEYS)) + +DT_COMPAT_GPIO_LEDS := gpio-leds + +config DT_HAS_GPIO_LEDS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_LEDS)) + +DT_COMPAT_GPIO_MMIO_LATCH := gpio-mmio-latch + +config DT_HAS_GPIO_MMIO_LATCH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_MMIO_LATCH)) + +DT_COMPAT_GPIO_QDEC := gpio-qdec + +config DT_HAS_GPIO_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GPIO_QDEC)) + +DT_COMPAT_GREELED_LPD8803 := greeled,lpd8803 + +config DT_HAS_GREELED_LPD8803_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GREELED_LPD8803)) + +DT_COMPAT_GREELED_LPD8806 := greeled,lpd8806 + +config DT_HAS_GREELED_LPD8806_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GREELED_LPD8806)) + +DT_COMPAT_GROVE_HEADER := grove-header + +config DT_HAS_GROVE_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GROVE_HEADER)) + +DT_COMPAT_GSS_EXPLORIR_M := gss,explorir-m + +config DT_HAS_GSS_EXPLORIR_M_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_GSS_EXPLORIR_M)) + +DT_COMPAT_HAMAMATSU_S11059 := hamamatsu,s11059 + +config DT_HAS_HAMAMATSU_S11059_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HAMAMATSU_S11059)) + +DT_COMPAT_HAZARD3_HAZARD3_INTC := hazard3,hazard3-intc + +config DT_HAS_HAZARD3_HAZARD3_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HAZARD3_HAZARD3_INTC)) + +DT_COMPAT_HC_SR04 := hc-sr04 + +config DT_HAS_HC_SR04_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HC_SR04)) + +DT_COMPAT_HIMAX_HM01B0 := himax,hm01b0 + +config DT_HAS_HIMAX_HM01B0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HIMAX_HM01B0)) + +DT_COMPAT_HIMAX_HM0360 := himax,hm0360 + +config DT_HAS_HIMAX_HM0360_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HIMAX_HM0360)) + +DT_COMPAT_HIMAX_HX8379C := himax,hx8379c + +config DT_HAS_HIMAX_HX8379C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HIMAX_HX8379C)) + +DT_COMPAT_HIMAX_HX8394 := himax,hx8394 + +config DT_HAS_HIMAX_HX8394_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HIMAX_HX8394)) + +DT_COMPAT_HIT_HD44780 := hit,hd44780 + +config DT_HAS_HIT_HD44780_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HIT_HD44780)) + +DT_COMPAT_HOLTEK_HT16K33 := holtek,ht16k33 + +config DT_HAS_HOLTEK_HT16K33_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HOLTEK_HT16K33)) + +DT_COMPAT_HONEYWELL_HMC5883L := honeywell,hmc5883l + +config DT_HAS_HONEYWELL_HMC5883L_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HONEYWELL_HMC5883L)) + +DT_COMPAT_HONEYWELL_MPR := honeywell,mpr + +config DT_HAS_HONEYWELL_MPR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HONEYWELL_MPR)) + +DT_COMPAT_HONEYWELL_SM351LT := honeywell,sm351lt + +config DT_HAS_HONEYWELL_SM351LT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HONEYWELL_SM351LT)) + +DT_COMPAT_HOPERF_HP206C := hoperf,hp206c + +config DT_HAS_HOPERF_HP206C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HOPERF_HP206C)) + +DT_COMPAT_HOPERF_TH02 := hoperf,th02 + +config DT_HAS_HOPERF_TH02_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HOPERF_TH02)) + +DT_COMPAT_HYCON_HY4245 := hycon,hy4245 + +config DT_HAS_HYCON_HY4245_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HYCON_HY4245)) + +DT_COMPAT_HYNITRON_CST8XX := hynitron,cst8xx + +config DT_HAS_HYNITRON_CST8XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HYNITRON_CST8XX)) + +DT_COMPAT_HZGROW_R502A := hzgrow,r502a + +config DT_HAS_HZGROW_R502A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_HZGROW_R502A)) + +DT_COMPAT_ICLEGEND_S3KM1110 := iclegend,s3km1110 + +config DT_HAS_ICLEGEND_S3KM1110_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ICLEGEND_S3KM1110)) + +DT_COMPAT_ILITEK_ILI2132A := ilitek,ili2132a + +config DT_HAS_ILITEK_ILI2132A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI2132A)) + +DT_COMPAT_ILITEK_ILI9163C := ilitek,ili9163c + +config DT_HAS_ILITEK_ILI9163C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI9163C)) + +DT_COMPAT_ILITEK_ILI9340 := ilitek,ili9340 + +config DT_HAS_ILITEK_ILI9340_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI9340)) + +DT_COMPAT_ILITEK_ILI9341 := ilitek,ili9341 + +config DT_HAS_ILITEK_ILI9341_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI9341)) + +DT_COMPAT_ILITEK_ILI9342C := ilitek,ili9342c + +config DT_HAS_ILITEK_ILI9342C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI9342C)) + +DT_COMPAT_ILITEK_ILI9488 := ilitek,ili9488 + +config DT_HAS_ILITEK_ILI9488_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI9488)) + +DT_COMPAT_ILITEK_ILI9806E := ilitek,ili9806e + +config DT_HAS_ILITEK_ILI9806E_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ILITEK_ILI9806E)) + +DT_COMPAT_INFINEON_ADC := infineon,adc + +config DT_HAS_INFINEON_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_ADC)) + +DT_COMPAT_INFINEON_AIROC_WIFI := infineon,airoc-wifi + +config DT_HAS_INFINEON_AIROC_WIFI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_AIROC_WIFI)) + +DT_COMPAT_INFINEON_AUTANALOG := infineon,autanalog + +config DT_HAS_INFINEON_AUTANALOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_AUTANALOG)) + +DT_COMPAT_INFINEON_AUTANALOG_AC_STATE := infineon,autanalog-ac-state + +config DT_HAS_INFINEON_AUTANALOG_AC_STATE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_AUTANALOG_AC_STATE)) + +DT_COMPAT_INFINEON_AUTANALOG_SAR_ADC := infineon,autanalog-sar-adc + +config DT_HAS_INFINEON_AUTANALOG_SAR_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_AUTANALOG_SAR_ADC)) + +DT_COMPAT_INFINEON_BLESS_HCI := infineon,bless-hci + +config DT_HAS_INFINEON_BLESS_HCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_BLESS_HCI)) + +DT_COMPAT_INFINEON_BT_HCI_UART := infineon,bt-hci-uart + +config DT_HAS_INFINEON_BT_HCI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_BT_HCI_UART)) + +DT_COMPAT_INFINEON_CAN := infineon,can + +config DT_HAS_INFINEON_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_CAN)) + +DT_COMPAT_INFINEON_CANFD_CONTROLLER := infineon,canfd-controller + +config DT_HAS_INFINEON_CANFD_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_CANFD_CONTROLLER)) + +DT_COMPAT_INFINEON_CAT1_LP_TIMER_PDL := infineon,cat1-lp-timer-pdl + +config DT_HAS_INFINEON_CAT1_LP_TIMER_PDL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_CAT1_LP_TIMER_PDL)) + +DT_COMPAT_INFINEON_CAT1B_POWER := infineon,cat1b-power + +config DT_HAS_INFINEON_CAT1B_POWER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_CAT1B_POWER)) + +DT_COMPAT_INFINEON_COUNTER := infineon,counter + +config DT_HAS_INFINEON_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_COUNTER)) + +DT_COMPAT_INFINEON_CYW208XX_HCI := infineon,cyw208xx-hci + +config DT_HAS_INFINEON_CYW208XX_HCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_CYW208XX_HCI)) + +DT_COMPAT_INFINEON_CYW43_GPIO := infineon,cyw43-gpio + +config DT_HAS_INFINEON_CYW43_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_CYW43_GPIO)) + +DT_COMPAT_INFINEON_DMA := infineon,dma + +config DT_HAS_INFINEON_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_DMA)) + +DT_COMPAT_INFINEON_DMAC := infineon,dmac + +config DT_HAS_INFINEON_DMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_DMAC)) + +DT_COMPAT_INFINEON_DPS310 := infineon,dps310 + +config DT_HAS_INFINEON_DPS310_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_DPS310)) + +DT_COMPAT_INFINEON_EDGE_NPU := infineon,edge-npu + +config DT_HAS_INFINEON_EDGE_NPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_EDGE_NPU)) + +DT_COMPAT_INFINEON_FIXED_CLOCK := infineon,fixed-clock + +config DT_HAS_INFINEON_FIXED_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_FIXED_CLOCK)) + +DT_COMPAT_INFINEON_FIXED_FACTOR_CLOCK := infineon,fixed-factor-clock + +config DT_HAS_INFINEON_FIXED_FACTOR_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_FIXED_FACTOR_CLOCK)) + +DT_COMPAT_INFINEON_FLASH_CONTROLLER := infineon,flash-controller + +config DT_HAS_INFINEON_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_FLASH_CONTROLLER)) + +DT_COMPAT_INFINEON_FM25XXX := infineon,fm25xxx + +config DT_HAS_INFINEON_FM25XXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_FM25XXX)) + +DT_COMPAT_INFINEON_GPIO := infineon,gpio + +config DT_HAS_INFINEON_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_GPIO)) + +DT_COMPAT_INFINEON_HPPASS_SAR_ADC := infineon,hppass-sar-adc + +config DT_HAS_INFINEON_HPPASS_SAR_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_HPPASS_SAR_ADC)) + +DT_COMPAT_INFINEON_I2C := infineon,i2c + +config DT_HAS_INFINEON_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_I2C)) + +DT_COMPAT_INFINEON_I2S := infineon,i2s + +config DT_HAS_INFINEON_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_I2S)) + +DT_COMPAT_INFINEON_LP_COMP := infineon,lp-comp + +config DT_HAS_INFINEON_LP_COMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_LP_COMP)) + +DT_COMPAT_INFINEON_LP_COMP_CHANNEL := infineon,lp-comp-channel + +config DT_HAS_INFINEON_LP_COMP_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_LP_COMP_CHANNEL)) + +DT_COMPAT_INFINEON_LP_TIMER := infineon,lp-timer + +config DT_HAS_INFINEON_LP_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_LP_TIMER)) + +DT_COMPAT_INFINEON_PDM := infineon,pdm + +config DT_HAS_INFINEON_PDM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_PDM)) + +DT_COMPAT_INFINEON_PERI_DIV := infineon,peri-div + +config DT_HAS_INFINEON_PERI_DIV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_PERI_DIV)) + +DT_COMPAT_INFINEON_PINCTRL := infineon,pinctrl + +config DT_HAS_INFINEON_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_PINCTRL)) + +DT_COMPAT_INFINEON_QSPI_FLASH := infineon,qspi-flash + +config DT_HAS_INFINEON_QSPI_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_QSPI_FLASH)) + +DT_COMPAT_INFINEON_RTC := infineon,rtc + +config DT_HAS_INFINEON_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_RTC)) + +DT_COMPAT_INFINEON_SAR_ADC := infineon,sar-adc + +config DT_HAS_INFINEON_SAR_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_SAR_ADC)) + +DT_COMPAT_INFINEON_SCB := infineon,scb + +config DT_HAS_INFINEON_SCB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_SCB)) + +DT_COMPAT_INFINEON_SDHC_SDIO := infineon,sdhc-sdio + +config DT_HAS_INFINEON_SDHC_SDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_SDHC_SDIO)) + +DT_COMPAT_INFINEON_SHARED_GPIO := infineon,shared-gpio + +config DT_HAS_INFINEON_SHARED_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_SHARED_GPIO)) + +DT_COMPAT_INFINEON_SPI := infineon,spi + +config DT_HAS_INFINEON_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_SPI)) + +DT_COMPAT_INFINEON_TCPWM := infineon,tcpwm + +config DT_HAS_INFINEON_TCPWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_TCPWM)) + +DT_COMPAT_INFINEON_TCPWM_COUNTER := infineon,tcpwm-counter + +config DT_HAS_INFINEON_TCPWM_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_TCPWM_COUNTER)) + +DT_COMPAT_INFINEON_TCPWM_PWM := infineon,tcpwm-pwm + +config DT_HAS_INFINEON_TCPWM_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_TCPWM_PWM)) + +DT_COMPAT_INFINEON_TLE9104 := infineon,tle9104 + +config DT_HAS_INFINEON_TLE9104_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_TLE9104)) + +DT_COMPAT_INFINEON_TLE9104_DIAGNOSTICS := infineon,tle9104-diagnostics + +config DT_HAS_INFINEON_TLE9104_DIAGNOSTICS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_TLE9104_DIAGNOSTICS)) + +DT_COMPAT_INFINEON_TLE9104_GPIO := infineon,tle9104-gpio + +config DT_HAS_INFINEON_TLE9104_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_TLE9104_GPIO)) + +DT_COMPAT_INFINEON_UART := infineon,uart + +config DT_HAS_INFINEON_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_UART)) + +DT_COMPAT_INFINEON_USBHS := infineon,usbhs + +config DT_HAS_INFINEON_USBHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_USBHS)) + +DT_COMPAT_INFINEON_WATCHDOG := infineon,watchdog + +config DT_HAS_INFINEON_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_WATCHDOG)) + +DT_COMPAT_INFINEON_XMC4XXX_ADC := infineon,xmc4xxx-adc + +config DT_HAS_INFINEON_XMC4XXX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_ADC)) + +DT_COMPAT_INFINEON_XMC4XXX_CAN := infineon,xmc4xxx-can + +config DT_HAS_INFINEON_XMC4XXX_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_CAN)) + +DT_COMPAT_INFINEON_XMC4XXX_CAN_NODE := infineon,xmc4xxx-can-node + +config DT_HAS_INFINEON_XMC4XXX_CAN_NODE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_CAN_NODE)) + +DT_COMPAT_INFINEON_XMC4XXX_CCU4_PWM := infineon,xmc4xxx-ccu4-pwm + +config DT_HAS_INFINEON_XMC4XXX_CCU4_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_CCU4_PWM)) + +DT_COMPAT_INFINEON_XMC4XXX_CCU8_PWM := infineon,xmc4xxx-ccu8-pwm + +config DT_HAS_INFINEON_XMC4XXX_CCU8_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_CCU8_PWM)) + +DT_COMPAT_INFINEON_XMC4XXX_DMA := infineon,xmc4xxx-dma + +config DT_HAS_INFINEON_XMC4XXX_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_DMA)) + +DT_COMPAT_INFINEON_XMC4XXX_ETHERNET := infineon,xmc4xxx-ethernet + +config DT_HAS_INFINEON_XMC4XXX_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_ETHERNET)) + +DT_COMPAT_INFINEON_XMC4XXX_FLASH_CONTROLLER := infineon,xmc4xxx-flash-controller + +config DT_HAS_INFINEON_XMC4XXX_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_FLASH_CONTROLLER)) + +DT_COMPAT_INFINEON_XMC4XXX_GPIO := infineon,xmc4xxx-gpio + +config DT_HAS_INFINEON_XMC4XXX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_GPIO)) + +DT_COMPAT_INFINEON_XMC4XXX_I2C := infineon,xmc4xxx-i2c + +config DT_HAS_INFINEON_XMC4XXX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_I2C)) + +DT_COMPAT_INFINEON_XMC4XXX_INTC := infineon,xmc4xxx-intc + +config DT_HAS_INFINEON_XMC4XXX_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_INTC)) + +DT_COMPAT_INFINEON_XMC4XXX_MDIO := infineon,xmc4xxx-mdio + +config DT_HAS_INFINEON_XMC4XXX_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_MDIO)) + +DT_COMPAT_INFINEON_XMC4XXX_NV_FLASH := infineon,xmc4xxx-nv-flash + +config DT_HAS_INFINEON_XMC4XXX_NV_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_NV_FLASH)) + +DT_COMPAT_INFINEON_XMC4XXX_PINCTRL := infineon,xmc4xxx-pinctrl + +config DT_HAS_INFINEON_XMC4XXX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_PINCTRL)) + +DT_COMPAT_INFINEON_XMC4XXX_RTC := infineon,xmc4xxx-rtc + +config DT_HAS_INFINEON_XMC4XXX_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_RTC)) + +DT_COMPAT_INFINEON_XMC4XXX_SPI := infineon,xmc4xxx-spi + +config DT_HAS_INFINEON_XMC4XXX_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_SPI)) + +DT_COMPAT_INFINEON_XMC4XXX_TEMP := infineon,xmc4xxx-temp + +config DT_HAS_INFINEON_XMC4XXX_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_TEMP)) + +DT_COMPAT_INFINEON_XMC4XXX_UART := infineon,xmc4xxx-uart + +config DT_HAS_INFINEON_XMC4XXX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_UART)) + +DT_COMPAT_INFINEON_XMC4XXX_WATCHDOG := infineon,xmc4xxx-watchdog + +config DT_HAS_INFINEON_XMC4XXX_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INFINEON_XMC4XXX_WATCHDOG)) + +DT_COMPAT_INPUT_KEYMAP := input-keymap + +config DT_HAS_INPUT_KEYMAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INPUT_KEYMAP)) + +DT_COMPAT_INTEL_ACE_ART_COUNTER := intel,ace-art-counter + +config DT_HAS_INTEL_ACE_ART_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ACE_ART_COUNTER)) + +DT_COMPAT_INTEL_ACE_INTC := intel,ace-intc + +config DT_HAS_INTEL_ACE_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ACE_INTC)) + +DT_COMPAT_INTEL_ACE_RTC_COUNTER := intel,ace-rtc-counter + +config DT_HAS_INTEL_ACE_RTC_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ACE_RTC_COUNTER)) + +DT_COMPAT_INTEL_ACE_TIMESTAMP := intel,ace-timestamp + +config DT_HAS_INTEL_ACE_TIMESTAMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ACE_TIMESTAMP)) + +DT_COMPAT_INTEL_ADSP_COMMUNICATION_WIDGET := intel,adsp-communication-widget + +config DT_HAS_INTEL_ADSP_COMMUNICATION_WIDGET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_COMMUNICATION_WIDGET)) + +DT_COMPAT_INTEL_ADSP_DFPMCCH := intel,adsp-dfpmcch + +config DT_HAS_INTEL_ADSP_DFPMCCH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_DFPMCCH)) + +DT_COMPAT_INTEL_ADSP_DFPMCCU := intel,adsp-dfpmccu + +config DT_HAS_INTEL_ADSP_DFPMCCU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_DFPMCCU)) + +DT_COMPAT_INTEL_ADSP_DMIC_VSS := intel,adsp-dmic-vss + +config DT_HAS_INTEL_ADSP_DMIC_VSS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_DMIC_VSS)) + +DT_COMPAT_INTEL_ADSP_GPDMA := intel,adsp-gpdma + +config DT_HAS_INTEL_ADSP_GPDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_GPDMA)) + +DT_COMPAT_INTEL_ADSP_HDA_DMIC_CAP := intel,adsp-hda-dmic-cap + +config DT_HAS_INTEL_ADSP_HDA_DMIC_CAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HDA_DMIC_CAP)) + +DT_COMPAT_INTEL_ADSP_HDA_HOST_IN := intel,adsp-hda-host-in + +config DT_HAS_INTEL_ADSP_HDA_HOST_IN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HDA_HOST_IN)) + +DT_COMPAT_INTEL_ADSP_HDA_HOST_OUT := intel,adsp-hda-host-out + +config DT_HAS_INTEL_ADSP_HDA_HOST_OUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HDA_HOST_OUT)) + +DT_COMPAT_INTEL_ADSP_HDA_LINK_IN := intel,adsp-hda-link-in + +config DT_HAS_INTEL_ADSP_HDA_LINK_IN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HDA_LINK_IN)) + +DT_COMPAT_INTEL_ADSP_HDA_LINK_OUT := intel,adsp-hda-link-out + +config DT_HAS_INTEL_ADSP_HDA_LINK_OUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HDA_LINK_OUT)) + +DT_COMPAT_INTEL_ADSP_HDA_SSP_CAP := intel,adsp-hda-ssp-cap + +config DT_HAS_INTEL_ADSP_HDA_SSP_CAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HDA_SSP_CAP)) + +DT_COMPAT_INTEL_ADSP_HOST_IPC := intel,adsp-host-ipc + +config DT_HAS_INTEL_ADSP_HOST_IPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HOST_IPC)) + +DT_COMPAT_INTEL_ADSP_IDC := intel,adsp-idc + +config DT_HAS_INTEL_ADSP_IDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_IDC)) + +DT_COMPAT_INTEL_ADSP_IMR := intel,adsp-imr + +config DT_HAS_INTEL_ADSP_IMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_IMR)) + +DT_COMPAT_INTEL_ADSP_MAILBOX := intel,adsp-mailbox + +config DT_HAS_INTEL_ADSP_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_MAILBOX)) + +DT_COMPAT_INTEL_ADSP_MEM_WINDOW := intel,adsp-mem-window + +config DT_HAS_INTEL_ADSP_MEM_WINDOW_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_MEM_WINDOW)) + +DT_COMPAT_INTEL_ADSP_MIC_PRIVACY := intel,adsp-mic-privacy + +config DT_HAS_INTEL_ADSP_MIC_PRIVACY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_MIC_PRIVACY)) + +DT_COMPAT_INTEL_ADSP_MTL_TLB := intel,adsp-mtl-tlb + +config DT_HAS_INTEL_ADSP_MTL_TLB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_MTL_TLB)) + +DT_COMPAT_INTEL_ADSP_POWER_DOMAIN := intel,adsp-power-domain + +config DT_HAS_INTEL_ADSP_POWER_DOMAIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_POWER_DOMAIN)) + +DT_COMPAT_INTEL_ADSP_SHA := intel,adsp-sha + +config DT_HAS_INTEL_ADSP_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_SHA)) + +DT_COMPAT_INTEL_ADSP_SHIM_CLKCTL := intel,adsp-shim-clkctl + +config DT_HAS_INTEL_ADSP_SHIM_CLKCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_SHIM_CLKCTL)) + +DT_COMPAT_INTEL_ADSP_TIMER := intel,adsp-timer + +config DT_HAS_INTEL_ADSP_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_TIMER)) + +DT_COMPAT_INTEL_ADSP_TLB := intel,adsp-tlb + +config DT_HAS_INTEL_ADSP_TLB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_TLB)) + +DT_COMPAT_INTEL_ADSP_UAOL := intel,adsp-uaol + +config DT_HAS_INTEL_ADSP_UAOL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_UAOL)) + +DT_COMPAT_INTEL_ADSP_WATCHDOG := intel,adsp-watchdog + +config DT_HAS_INTEL_ADSP_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_WATCHDOG)) + +DT_COMPAT_INTEL_AGILEX_CLOCK := intel,agilex-clock + +config DT_HAS_INTEL_AGILEX_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_AGILEX_CLOCK)) + +DT_COMPAT_INTEL_AGILEX5_CLOCK := intel,agilex5-clock + +config DT_HAS_INTEL_AGILEX5_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_AGILEX5_CLOCK)) + +DT_COMPAT_INTEL_ALDER_LAKE := intel,alder-lake + +config DT_HAS_INTEL_ALDER_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ALDER_LAKE)) + +DT_COMPAT_INTEL_ALH_DAI := intel,alh-dai + +config DT_HAS_INTEL_ALH_DAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ALH_DAI)) + +DT_COMPAT_INTEL_APOLLO_LAKE := intel,apollo-lake + +config DT_HAS_INTEL_APOLLO_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_APOLLO_LAKE)) + +DT_COMPAT_INTEL_BARTLETT_LAKE := intel,bartlett-lake + +config DT_HAS_INTEL_BARTLETT_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_BARTLETT_LAKE)) + +DT_COMPAT_INTEL_BLINKY_PWM := intel,blinky-pwm + +config DT_HAS_INTEL_BLINKY_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_BLINKY_PWM)) + +DT_COMPAT_INTEL_CAVS_I2S := intel,cavs-i2s + +config DT_HAS_INTEL_CAVS_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_CAVS_I2S)) + +DT_COMPAT_INTEL_CAVS_INTC := intel,cavs-intc + +config DT_HAS_INTEL_CAVS_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_CAVS_INTC)) + +DT_COMPAT_INTEL_DAI_DMIC := intel,dai-dmic + +config DT_HAS_INTEL_DAI_DMIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_DAI_DMIC)) + +DT_COMPAT_INTEL_E1000 := intel,e1000 + +config DT_HAS_INTEL_E1000_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_E1000)) + +DT_COMPAT_INTEL_ELKHART_LAKE := intel,elkhart-lake + +config DT_HAS_INTEL_ELKHART_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ELKHART_LAKE)) + +DT_COMPAT_INTEL_EMMC_HOST := intel,emmc-host + +config DT_HAS_INTEL_EMMC_HOST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_EMMC_HOST)) + +DT_COMPAT_INTEL_ESPI_PECI := intel,espi-peci + +config DT_HAS_INTEL_ESPI_PECI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ESPI_PECI)) + +DT_COMPAT_INTEL_ETH_PLAT := intel,eth-plat + +config DT_HAS_INTEL_ETH_PLAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ETH_PLAT)) + +DT_COMPAT_INTEL_GPIO := intel,gpio + +config DT_HAS_INTEL_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_GPIO)) + +DT_COMPAT_INTEL_HDA_DAI := intel,hda-dai + +config DT_HAS_INTEL_HDA_DAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_HDA_DAI)) + +DT_COMPAT_INTEL_HPET := intel,hpet + +config DT_HAS_INTEL_HPET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_HPET)) + +DT_COMPAT_INTEL_IBECC := intel,ibecc + +config DT_HAS_INTEL_IBECC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_IBECC)) + +DT_COMPAT_INTEL_IGC_MAC := intel,igc-mac + +config DT_HAS_INTEL_IGC_MAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_IGC_MAC)) + +DT_COMPAT_INTEL_IGC_MDIO := intel,igc-mdio + +config DT_HAS_INTEL_IGC_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_IGC_MDIO)) + +DT_COMPAT_INTEL_IOAPIC := intel,ioapic + +config DT_HAS_INTEL_IOAPIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_IOAPIC)) + +DT_COMPAT_INTEL_ISH := intel,ish + +config DT_HAS_INTEL_ISH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_ISH)) + +DT_COMPAT_INTEL_LAKEMONT := intel,lakemont + +config DT_HAS_INTEL_LAKEMONT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_LAKEMONT)) + +DT_COMPAT_INTEL_LOAPIC := intel,loapic + +config DT_HAS_INTEL_LOAPIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_LOAPIC)) + +DT_COMPAT_INTEL_LPSS := intel,lpss + +config DT_HAS_INTEL_LPSS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_LPSS)) + +DT_COMPAT_INTEL_LW_UART := intel,lw-uart + +config DT_HAS_INTEL_LW_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_LW_UART)) + +DT_COMPAT_INTEL_MULTIBOOT_FRAMEBUFFER := intel,multiboot-framebuffer + +config DT_HAS_INTEL_MULTIBOOT_FRAMEBUFFER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_MULTIBOOT_FRAMEBUFFER)) + +DT_COMPAT_INTEL_NIOSV := intel,niosv + +config DT_HAS_INTEL_NIOSV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_NIOSV)) + +DT_COMPAT_INTEL_PANTHER_LAKE := intel,panther-lake + +config DT_HAS_INTEL_PANTHER_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_PANTHER_LAKE)) + +DT_COMPAT_INTEL_PCH_SMBUS := intel,pch-smbus + +config DT_HAS_INTEL_PCH_SMBUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_PCH_SMBUS)) + +DT_COMPAT_INTEL_PENWELL_SPI := intel,penwell-spi + +config DT_HAS_INTEL_PENWELL_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_PENWELL_SPI)) + +DT_COMPAT_INTEL_RAPTOR_LAKE := intel,raptor-lake + +config DT_HAS_INTEL_RAPTOR_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_RAPTOR_LAKE)) + +DT_COMPAT_INTEL_SEDI_DMA := intel,sedi-dma + +config DT_HAS_INTEL_SEDI_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SEDI_DMA)) + +DT_COMPAT_INTEL_SEDI_GPIO := intel,sedi-gpio + +config DT_HAS_INTEL_SEDI_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SEDI_GPIO)) + +DT_COMPAT_INTEL_SEDI_I2C := intel,sedi-i2c + +config DT_HAS_INTEL_SEDI_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SEDI_I2C)) + +DT_COMPAT_INTEL_SEDI_IPM := intel,sedi-ipm + +config DT_HAS_INTEL_SEDI_IPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SEDI_IPM)) + +DT_COMPAT_INTEL_SEDI_SPI := intel,sedi-spi + +config DT_HAS_INTEL_SEDI_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SEDI_SPI)) + +DT_COMPAT_INTEL_SEDI_UART := intel,sedi-uart + +config DT_HAS_INTEL_SEDI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SEDI_UART)) + +DT_COMPAT_INTEL_SOCFPGA_AGILEX_SIP_SMC := intel,socfpga-agilex-sip-smc + +config DT_HAS_INTEL_SOCFPGA_AGILEX_SIP_SMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SOCFPGA_AGILEX_SIP_SMC)) + +DT_COMPAT_INTEL_SOCFPGA_RESET := intel,socfpga-reset + +config DT_HAS_INTEL_SOCFPGA_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SOCFPGA_RESET)) + +DT_COMPAT_INTEL_SSP := intel,ssp + +config DT_HAS_INTEL_SSP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SSP)) + +DT_COMPAT_INTEL_SSP_DAI := intel,ssp-dai + +config DT_HAS_INTEL_SSP_DAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SSP_DAI)) + +DT_COMPAT_INTEL_SSP_SSPBASE := intel,ssp-sspbase + +config DT_HAS_INTEL_SSP_SSPBASE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_SSP_SSPBASE)) + +DT_COMPAT_INTEL_TCO_WDT := intel,tco-wdt + +config DT_HAS_INTEL_TCO_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_TCO_WDT)) + +DT_COMPAT_INTEL_TIMEAWARE_GPIO := intel,timeaware-gpio + +config DT_HAS_INTEL_TIMEAWARE_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_TIMEAWARE_GPIO)) + +DT_COMPAT_INTEL_UAOL_DAI := intel,uaol-dai + +config DT_HAS_INTEL_UAOL_DAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_UAOL_DAI)) + +DT_COMPAT_INTEL_VT_D := intel,vt-d + +config DT_HAS_INTEL_VT_D_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_VT_D)) + +DT_COMPAT_INTEL_WILDCAT_LAKE := intel,wildcat-lake + +config DT_HAS_INTEL_WILDCAT_LAKE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_WILDCAT_LAKE)) + +DT_COMPAT_INTEL_X86 := intel,x86 + +config DT_HAS_INTEL_X86_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INTEL_X86)) + +DT_COMPAT_INVENSENSE_ICM40627 := invensense,icm40627 + +config DT_HAS_INVENSENSE_ICM40627_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM40627)) + +DT_COMPAT_INVENSENSE_ICM42370P := invensense,icm42370p + +config DT_HAS_INVENSENSE_ICM42370P_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM42370P)) + +DT_COMPAT_INVENSENSE_ICM42605 := invensense,icm42605 + +config DT_HAS_INVENSENSE_ICM42605_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM42605)) + +DT_COMPAT_INVENSENSE_ICM42670P := invensense,icm42670p + +config DT_HAS_INVENSENSE_ICM42670P_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM42670P)) + +DT_COMPAT_INVENSENSE_ICM42670S := invensense,icm42670s + +config DT_HAS_INVENSENSE_ICM42670S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM42670S)) + +DT_COMPAT_INVENSENSE_ICM42686 := invensense,icm42686 + +config DT_HAS_INVENSENSE_ICM42686_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM42686)) + +DT_COMPAT_INVENSENSE_ICM42688 := invensense,icm42688 + +config DT_HAS_INVENSENSE_ICM42688_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM42688)) + +DT_COMPAT_INVENSENSE_ICM4268X := invensense,icm4268x + +config DT_HAS_INVENSENSE_ICM4268X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM4268X)) + +DT_COMPAT_INVENSENSE_ICM45605 := invensense,icm45605 + +config DT_HAS_INVENSENSE_ICM45605_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM45605)) + +DT_COMPAT_INVENSENSE_ICM45605S := invensense,icm45605s + +config DT_HAS_INVENSENSE_ICM45605S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM45605S)) + +DT_COMPAT_INVENSENSE_ICM45686 := invensense,icm45686 + +config DT_HAS_INVENSENSE_ICM45686_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM45686)) + +DT_COMPAT_INVENSENSE_ICM45686S := invensense,icm45686s + +config DT_HAS_INVENSENSE_ICM45686S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM45686S)) + +DT_COMPAT_INVENSENSE_ICM45688P := invensense,icm45688p + +config DT_HAS_INVENSENSE_ICM45688P_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICM45688P)) + +DT_COMPAT_INVENSENSE_ICP101XX := invensense,icp101xx + +config DT_HAS_INVENSENSE_ICP101XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICP101XX)) + +DT_COMPAT_INVENSENSE_ICP201XX := invensense,icp201xx + +config DT_HAS_INVENSENSE_ICP201XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_ICP201XX)) + +DT_COMPAT_INVENSENSE_MPU6050 := invensense,mpu6050 + +config DT_HAS_INVENSENSE_MPU6050_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_MPU6050)) + +DT_COMPAT_INVENSENSE_MPU9250 := invensense,mpu9250 + +config DT_HAS_INVENSENSE_MPU9250_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENSENSE_MPU9250)) + +DT_COMPAT_INVENTEK_ESWIFI := inventek,eswifi + +config DT_HAS_INVENTEK_ESWIFI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENTEK_ESWIFI)) + +DT_COMPAT_INVENTEK_ESWIFI_UART := inventek,eswifi-uart + +config DT_HAS_INVENTEK_ESWIFI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_INVENTEK_ESWIFI_UART)) + +DT_COMPAT_ISENTEK_IST8310 := isentek,ist8310 + +config DT_HAS_ISENTEK_IST8310_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISENTEK_IST8310)) + +DT_COMPAT_ISIL_ISL29035 := isil,isl29035 + +config DT_HAS_ISIL_ISL29035_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISIL_ISL29035)) + +DT_COMPAT_ISSI_IS31FL3194 := issi,is31fl3194 + +config DT_HAS_ISSI_IS31FL3194_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISSI_IS31FL3194)) + +DT_COMPAT_ISSI_IS31FL3197 := issi,is31fl3197 + +config DT_HAS_ISSI_IS31FL3197_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISSI_IS31FL3197)) + +DT_COMPAT_ISSI_IS31FL3216A := issi,is31fl3216a + +config DT_HAS_ISSI_IS31FL3216A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISSI_IS31FL3216A)) + +DT_COMPAT_ISSI_IS31FL3733 := issi,is31fl3733 + +config DT_HAS_ISSI_IS31FL3733_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISSI_IS31FL3733)) + +DT_COMPAT_IST_TSIC_XX6 := ist,tsic-xx6 + +config DT_HAS_IST_TSIC_XX6_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_IST_TSIC_XX6)) + +DT_COMPAT_ISTECH_IST3931 := istech,ist3931 + +config DT_HAS_ISTECH_IST3931_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ISTECH_IST3931)) + +DT_COMPAT_ITE_ENHANCE_I2C := ite,enhance-i2c + +config DT_HAS_ITE_ENHANCE_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_ENHANCE_I2C)) + +DT_COMPAT_ITE_IT51XXX_ADC := ite,it51xxx-adc + +config DT_HAS_ITE_IT51XXX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_ADC)) + +DT_COMPAT_ITE_IT51XXX_COUNTER := ite,it51xxx-counter + +config DT_HAS_ITE_IT51XXX_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_COUNTER)) + +DT_COMPAT_ITE_IT51XXX_ECPM := ite,it51xxx-ecpm + +config DT_HAS_ITE_IT51XXX_ECPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_ECPM)) + +DT_COMPAT_ITE_IT51XXX_GPIO := ite,it51xxx-gpio + +config DT_HAS_ITE_IT51XXX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_GPIO)) + +DT_COMPAT_ITE_IT51XXX_I2C := ite,it51xxx-i2c + +config DT_HAS_ITE_IT51XXX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_I2C)) + +DT_COMPAT_ITE_IT51XXX_I3CM := ite,it51xxx-i3cm + +config DT_HAS_ITE_IT51XXX_I3CM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_I3CM)) + +DT_COMPAT_ITE_IT51XXX_I3CS := ite,it51xxx-i3cs + +config DT_HAS_ITE_IT51XXX_I3CS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_I3CS)) + +DT_COMPAT_ITE_IT51XXX_INTC := ite,it51xxx-intc + +config DT_HAS_ITE_IT51XXX_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_INTC)) + +DT_COMPAT_ITE_IT51XXX_KBD := ite,it51xxx-kbd + +config DT_HAS_ITE_IT51XXX_KBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_KBD)) + +DT_COMPAT_ITE_IT51XXX_MANUAL_FLASH_1K := ite,it51xxx-manual-flash-1k + +config DT_HAS_ITE_IT51XXX_MANUAL_FLASH_1K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_MANUAL_FLASH_1K)) + +DT_COMPAT_ITE_IT51XXX_PS2 := ite,it51xxx-ps2 + +config DT_HAS_ITE_IT51XXX_PS2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_PS2)) + +DT_COMPAT_ITE_IT51XXX_PWM := ite,it51xxx-pwm + +config DT_HAS_ITE_IT51XXX_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_PWM)) + +DT_COMPAT_ITE_IT51XXX_SHA := ite,it51xxx-sha + +config DT_HAS_ITE_IT51XXX_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_SHA)) + +DT_COMPAT_ITE_IT51XXX_SPI := ite,it51xxx-spi + +config DT_HAS_ITE_IT51XXX_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_SPI)) + +DT_COMPAT_ITE_IT51XXX_TACH := ite,it51xxx-tach + +config DT_HAS_ITE_IT51XXX_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_TACH)) + +DT_COMPAT_ITE_IT51XXX_TIMER := ite,it51xxx-timer + +config DT_HAS_ITE_IT51XXX_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_TIMER)) + +DT_COMPAT_ITE_IT51XXX_UART := ite,it51xxx-uart + +config DT_HAS_ITE_IT51XXX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_UART)) + +DT_COMPAT_ITE_IT51XXX_VCMP := ite,it51xxx-vcmp + +config DT_HAS_ITE_IT51XXX_VCMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_VCMP)) + +DT_COMPAT_ITE_IT51XXX_WATCHDOG := ite,it51xxx-watchdog + +config DT_HAS_ITE_IT51XXX_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_WATCHDOG)) + +DT_COMPAT_ITE_IT51XXX_WUC := ite,it51xxx-wuc + +config DT_HAS_ITE_IT51XXX_WUC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_WUC)) + +DT_COMPAT_ITE_IT51XXX_WUC_MAP := ite,it51xxx-wuc-map + +config DT_HAS_ITE_IT51XXX_WUC_MAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT51XXX_WUC_MAP)) + +DT_COMPAT_ITE_IT82XX2_USB := ite,it82xx2-usb + +config DT_HAS_ITE_IT82XX2_USB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT82XX2_USB)) + +DT_COMPAT_ITE_IT8801_ALTCTRL := ite,it8801-altctrl + +config DT_HAS_ITE_IT8801_ALTCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8801_ALTCTRL)) + +DT_COMPAT_ITE_IT8801_GPIO := ite,it8801-gpio + +config DT_HAS_ITE_IT8801_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8801_GPIO)) + +DT_COMPAT_ITE_IT8801_KBD := ite,it8801-kbd + +config DT_HAS_ITE_IT8801_KBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8801_KBD)) + +DT_COMPAT_ITE_IT8801_MFD := ite,it8801-mfd + +config DT_HAS_ITE_IT8801_MFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8801_MFD)) + +DT_COMPAT_ITE_IT8801_MFD_MAP := ite,it8801-mfd-map + +config DT_HAS_ITE_IT8801_MFD_MAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8801_MFD_MAP)) + +DT_COMPAT_ITE_IT8801_PWM := ite,it8801-pwm + +config DT_HAS_ITE_IT8801_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8801_PWM)) + +DT_COMPAT_ITE_IT8XXX2_ADC := ite,it8xxx2-adc + +config DT_HAS_ITE_IT8XXX2_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_ADC)) + +DT_COMPAT_ITE_IT8XXX2_BBRAM := ite,it8xxx2-bbram + +config DT_HAS_ITE_IT8XXX2_BBRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_BBRAM)) + +DT_COMPAT_ITE_IT8XXX2_COUNTER := ite,it8xxx2-counter + +config DT_HAS_ITE_IT8XXX2_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_COUNTER)) + +DT_COMPAT_ITE_IT8XXX2_ESPI := ite,it8xxx2-espi + +config DT_HAS_ITE_IT8XXX2_ESPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_ESPI)) + +DT_COMPAT_ITE_IT8XXX2_FLASH_CONTROLLER := ite,it8xxx2-flash-controller + +config DT_HAS_ITE_IT8XXX2_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_FLASH_CONTROLLER)) + +DT_COMPAT_ITE_IT8XXX2_GPIO := ite,it8xxx2-gpio + +config DT_HAS_ITE_IT8XXX2_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_GPIO)) + +DT_COMPAT_ITE_IT8XXX2_GPIO_V2 := ite,it8xxx2-gpio-v2 + +config DT_HAS_ITE_IT8XXX2_GPIO_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_GPIO_V2)) + +DT_COMPAT_ITE_IT8XXX2_GPIOKSCAN := ite,it8xxx2-gpiokscan + +config DT_HAS_ITE_IT8XXX2_GPIOKSCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_GPIOKSCAN)) + +DT_COMPAT_ITE_IT8XXX2_I2C := ite,it8xxx2-i2c + +config DT_HAS_ITE_IT8XXX2_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_I2C)) + +DT_COMPAT_ITE_IT8XXX2_ILM := ite,it8xxx2-ilm + +config DT_HAS_ITE_IT8XXX2_ILM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_ILM)) + +DT_COMPAT_ITE_IT8XXX2_INTC := ite,it8xxx2-intc + +config DT_HAS_ITE_IT8XXX2_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_INTC)) + +DT_COMPAT_ITE_IT8XXX2_INTC_V2 := ite,it8xxx2-intc-v2 + +config DT_HAS_ITE_IT8XXX2_INTC_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_INTC_V2)) + +DT_COMPAT_ITE_IT8XXX2_KBD := ite,it8xxx2-kbd + +config DT_HAS_ITE_IT8XXX2_KBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_KBD)) + +DT_COMPAT_ITE_IT8XXX2_PECI := ite,it8xxx2-peci + +config DT_HAS_ITE_IT8XXX2_PECI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_PECI)) + +DT_COMPAT_ITE_IT8XXX2_PINCTRL := ite,it8xxx2-pinctrl + +config DT_HAS_ITE_IT8XXX2_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_PINCTRL)) + +DT_COMPAT_ITE_IT8XXX2_PINCTRL_FUNC := ite,it8xxx2-pinctrl-func + +config DT_HAS_ITE_IT8XXX2_PINCTRL_FUNC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_PINCTRL_FUNC)) + +DT_COMPAT_ITE_IT8XXX2_POWER_ELPM := ite,it8xxx2-power-elpm + +config DT_HAS_ITE_IT8XXX2_POWER_ELPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_POWER_ELPM)) + +DT_COMPAT_ITE_IT8XXX2_PWM := ite,it8xxx2-pwm + +config DT_HAS_ITE_IT8XXX2_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_PWM)) + +DT_COMPAT_ITE_IT8XXX2_PWMPRS := ite,it8xxx2-pwmprs + +config DT_HAS_ITE_IT8XXX2_PWMPRS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_PWMPRS)) + +DT_COMPAT_ITE_IT8XXX2_RTC := ite,it8xxx2-rtc + +config DT_HAS_ITE_IT8XXX2_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_RTC)) + +DT_COMPAT_ITE_IT8XXX2_SHA := ite,it8xxx2-sha + +config DT_HAS_ITE_IT8XXX2_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_SHA)) + +DT_COMPAT_ITE_IT8XXX2_SHA_V2 := ite,it8xxx2-sha-v2 + +config DT_HAS_ITE_IT8XXX2_SHA_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_SHA_V2)) + +DT_COMPAT_ITE_IT8XXX2_SHI := ite,it8xxx2-shi + +config DT_HAS_ITE_IT8XXX2_SHI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_SHI)) + +DT_COMPAT_ITE_IT8XXX2_SPI := ite,it8xxx2-spi + +config DT_HAS_ITE_IT8XXX2_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_SPI)) + +DT_COMPAT_ITE_IT8XXX2_TACH := ite,it8xxx2-tach + +config DT_HAS_ITE_IT8XXX2_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_TACH)) + +DT_COMPAT_ITE_IT8XXX2_TIMER := ite,it8xxx2-timer + +config DT_HAS_ITE_IT8XXX2_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_TIMER)) + +DT_COMPAT_ITE_IT8XXX2_UART := ite,it8xxx2-uart + +config DT_HAS_ITE_IT8XXX2_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_UART)) + +DT_COMPAT_ITE_IT8XXX2_USBPD := ite,it8xxx2-usbpd + +config DT_HAS_ITE_IT8XXX2_USBPD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_USBPD)) + +DT_COMPAT_ITE_IT8XXX2_VCMP := ite,it8xxx2-vcmp + +config DT_HAS_ITE_IT8XXX2_VCMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_VCMP)) + +DT_COMPAT_ITE_IT8XXX2_WATCHDOG := ite,it8xxx2-watchdog + +config DT_HAS_ITE_IT8XXX2_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_WATCHDOG)) + +DT_COMPAT_ITE_IT8XXX2_WUC := ite,it8xxx2-wuc + +config DT_HAS_ITE_IT8XXX2_WUC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_WUC)) + +DT_COMPAT_ITE_IT8XXX2_WUC_MAP := ite,it8xxx2-wuc-map + +config DT_HAS_ITE_IT8XXX2_WUC_MAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_IT8XXX2_WUC_MAP)) + +DT_COMPAT_ITE_RISCV_ITE := ite,riscv-ite + +config DT_HAS_ITE_RISCV_ITE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ITE_RISCV_ITE)) + +DT_COMPAT_JDI_LPM013M126 := jdi,lpm013m126 + +config DT_HAS_JDI_LPM013M126_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JDI_LPM013M126)) + +DT_COMPAT_JEDEC_JC_42_4_TEMP := jedec,jc-42.4-temp + +config DT_HAS_JEDEC_JC_42_4_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JEDEC_JC_42_4_TEMP)) + +DT_COMPAT_JEDEC_MSPI_NOR := jedec,mspi-nor + +config DT_HAS_JEDEC_MSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JEDEC_MSPI_NOR)) + +DT_COMPAT_JEDEC_QSPI_NOR := jedec,qspi-nor + +config DT_HAS_JEDEC_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JEDEC_QSPI_NOR)) + +DT_COMPAT_JEDEC_SPI_NAND := jedec,spi-nand + +config DT_HAS_JEDEC_SPI_NAND_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JEDEC_SPI_NAND)) + +DT_COMPAT_JEDEC_SPI_NOR := jedec,spi-nor + +config DT_HAS_JEDEC_SPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JEDEC_SPI_NOR)) + +DT_COMPAT_JHD_JHD1313 := jhd,jhd1313 + +config DT_HAS_JHD_JHD1313_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_JHD_JHD1313)) + +DT_COMPAT_KVASER_PCICAN := kvaser,pcican + +config DT_HAS_KVASER_PCICAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_KVASER_PCICAN)) + +DT_COMPAT_LATTICE_ICE40_FPGA := lattice,ice40-fpga + +config DT_HAS_LATTICE_ICE40_FPGA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LATTICE_ICE40_FPGA)) + +DT_COMPAT_LATTICE_ICE40_FPGA_BASE := lattice,ice40-fpga-base + +config DT_HAS_LATTICE_ICE40_FPGA_BASE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LATTICE_ICE40_FPGA_BASE)) + +DT_COMPAT_LATTICE_ICE40_FPGA_BITBANG := lattice,ice40-fpga-bitbang + +config DT_HAS_LATTICE_ICE40_FPGA_BITBANG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LATTICE_ICE40_FPGA_BITBANG)) + +DT_COMPAT_LED_STRIP_MATRIX := led-strip-matrix + +config DT_HAS_LED_STRIP_MATRIX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LED_STRIP_MATRIX)) + +DT_COMPAT_LEDS_GROUP_MULTICOLOR := leds-group-multicolor + +config DT_HAS_LEDS_GROUP_MULTICOLOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LEDS_GROUP_MULTICOLOR)) + +DT_COMPAT_LINARO_96B_LSCON_1V8 := linaro,96b-lscon-1v8 + +config DT_HAS_LINARO_96B_LSCON_1V8_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LINARO_96B_LSCON_1V8)) + +DT_COMPAT_LINARO_96B_LSCON_3V3 := linaro,96b-lscon-3v3 + +config DT_HAS_LINARO_96B_LSCON_3V3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LINARO_96B_LSCON_3V3)) + +DT_COMPAT_LINARO_IVSHMEM_IPM := linaro,ivshmem-ipm + +config DT_HAS_LINARO_IVSHMEM_IPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LINARO_IVSHMEM_IPM)) + +DT_COMPAT_LINARO_IVSHMEM_MBOX := linaro,ivshmem-mbox + +config DT_HAS_LINARO_IVSHMEM_MBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LINARO_IVSHMEM_MBOX)) + +DT_COMPAT_LINARO_OPTEE_TZ := linaro,optee-tz + +config DT_HAS_LINARO_OPTEE_TZ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LINARO_OPTEE_TZ)) + +DT_COMPAT_LITEON_LTR329 := liteon,ltr329 + +config DT_HAS_LITEON_LTR329_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEON_LTR329)) + +DT_COMPAT_LITEON_LTR553 := liteon,ltr553 + +config DT_HAS_LITEON_LTR553_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEON_LTR553)) + +DT_COMPAT_LITEON_LTRF216A := liteon,ltrf216a + +config DT_HAS_LITEON_LTRF216A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEON_LTRF216A)) + +DT_COMPAT_LITEX_CLK := litex,clk + +config DT_HAS_LITEX_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_CLK)) + +DT_COMPAT_LITEX_CLKOUT := litex,clkout + +config DT_HAS_LITEX_CLKOUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_CLKOUT)) + +DT_COMPAT_LITEX_DNA0 := litex,dna0 + +config DT_HAS_LITEX_DNA0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_DNA0)) + +DT_COMPAT_LITEX_GPIO := litex,gpio + +config DT_HAS_LITEX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_GPIO)) + +DT_COMPAT_LITEX_I2C := litex,i2c + +config DT_HAS_LITEX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_I2C)) + +DT_COMPAT_LITEX_I2S := litex,i2s + +config DT_HAS_LITEX_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_I2S)) + +DT_COMPAT_LITEX_LITEETH := litex,liteeth + +config DT_HAS_LITEX_LITEETH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_LITEETH)) + +DT_COMPAT_LITEX_LITEETH_MDIO := litex,liteeth-mdio + +config DT_HAS_LITEX_LITEETH_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_LITEETH_MDIO)) + +DT_COMPAT_LITEX_LITEI2C := litex,litei2c + +config DT_HAS_LITEX_LITEI2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_LITEI2C)) + +DT_COMPAT_LITEX_MMC := litex,mmc + +config DT_HAS_LITEX_MMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_MMC)) + +DT_COMPAT_LITEX_PRBS := litex,prbs + +config DT_HAS_LITEX_PRBS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_PRBS)) + +DT_COMPAT_LITEX_PWM := litex,pwm + +config DT_HAS_LITEX_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_PWM)) + +DT_COMPAT_LITEX_SOC_CONTROLLER := litex,soc-controller + +config DT_HAS_LITEX_SOC_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_SOC_CONTROLLER)) + +DT_COMPAT_LITEX_SPI := litex,spi + +config DT_HAS_LITEX_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_SPI)) + +DT_COMPAT_LITEX_SPI_LITESPI := litex,spi-litespi + +config DT_HAS_LITEX_SPI_LITESPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_SPI_LITESPI)) + +DT_COMPAT_LITEX_TIMER0 := litex,timer0 + +config DT_HAS_LITEX_TIMER0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_TIMER0)) + +DT_COMPAT_LITEX_UART := litex,uart + +config DT_HAS_LITEX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_UART)) + +DT_COMPAT_LITEX_VEXRISCV_INTC0 := litex,vexriscv-intc0 + +config DT_HAS_LITEX_VEXRISCV_INTC0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_VEXRISCV_INTC0)) + +DT_COMPAT_LITEX_VEXRISCV_STANDARD := litex,vexriscv-standard + +config DT_HAS_LITEX_VEXRISCV_STANDARD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_VEXRISCV_STANDARD)) + +DT_COMPAT_LITEX_WATCHDOG := litex,watchdog + +config DT_HAS_LITEX_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LITEX_WATCHDOG)) + +DT_COMPAT_LLTC_LTC1660 := lltc,ltc1660 + +config DT_HAS_LLTC_LTC1660_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LLTC_LTC1660)) + +DT_COMPAT_LLTC_LTC1665 := lltc,ltc1665 + +config DT_HAS_LLTC_LTC1665_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LLTC_LTC1665)) + +DT_COMPAT_LLTC_LTC2451 := lltc,ltc2451 + +config DT_HAS_LLTC_LTC2451_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LLTC_LTC2451)) + +DT_COMPAT_LM35 := lm35 + +config DT_HAS_LM35_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LM35)) + +DT_COMPAT_LM75 := lm75 + +config DT_HAS_LM75_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LM75)) + +DT_COMPAT_LM77 := lm77 + +config DT_HAS_LM77_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LM77)) + +DT_COMPAT_LOWRISC_IBEX := lowrisc,ibex + +config DT_HAS_LOWRISC_IBEX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LOWRISC_IBEX)) + +DT_COMPAT_LOWRISC_OPENTITAN_AONTIMER := lowrisc,opentitan-aontimer + +config DT_HAS_LOWRISC_OPENTITAN_AONTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LOWRISC_OPENTITAN_AONTIMER)) + +DT_COMPAT_LOWRISC_OPENTITAN_PWRMGR := lowrisc,opentitan-pwrmgr + +config DT_HAS_LOWRISC_OPENTITAN_PWRMGR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LOWRISC_OPENTITAN_PWRMGR)) + +DT_COMPAT_LOWRISC_OPENTITAN_SPI := lowrisc,opentitan-spi + +config DT_HAS_LOWRISC_OPENTITAN_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LOWRISC_OPENTITAN_SPI)) + +DT_COMPAT_LOWRISC_OPENTITAN_UART := lowrisc,opentitan-uart + +config DT_HAS_LOWRISC_OPENTITAN_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LOWRISC_OPENTITAN_UART)) + +DT_COMPAT_LUATOS_AIR530Z := luatos,air530z + +config DT_HAS_LUATOS_AIR530Z_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_LUATOS_AIR530Z)) + +DT_COMPAT_M5STACK_ATOM_HEADER := m5stack,atom-header + +config DT_HAS_M5STACK_ATOM_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_M5STACK_ATOM_HEADER)) + +DT_COMPAT_M5STACK_MBUS_HEADER := m5stack,mbus-header + +config DT_HAS_M5STACK_MBUS_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_M5STACK_MBUS_HEADER)) + +DT_COMPAT_M5STACK_STAMPS3_HEADER := m5stack,stamps3-header + +config DT_HAS_M5STACK_STAMPS3_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_M5STACK_STAMPS3_HEADER)) + +DT_COMPAT_MAXBOTIX_MB7040 := maxbotix,mb7040 + +config DT_HAS_MAXBOTIX_MB7040_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXBOTIX_MB7040)) + +DT_COMPAT_MAXIM_DS1302 := maxim,ds1302 + +config DT_HAS_MAXIM_DS1302_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS1302)) + +DT_COMPAT_MAXIM_DS1307 := maxim,ds1307 + +config DT_HAS_MAXIM_DS1307_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS1307)) + +DT_COMPAT_MAXIM_DS1337 := maxim,ds1337 + +config DT_HAS_MAXIM_DS1337_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS1337)) + +DT_COMPAT_MAXIM_DS18B20 := maxim,ds18b20 + +config DT_HAS_MAXIM_DS18B20_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS18B20)) + +DT_COMPAT_MAXIM_DS18S20 := maxim,ds18s20 + +config DT_HAS_MAXIM_DS18S20_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS18S20)) + +DT_COMPAT_MAXIM_DS2482_800 := maxim,ds2482-800 + +config DT_HAS_MAXIM_DS2482_800_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS2482_800)) + +DT_COMPAT_MAXIM_DS2482_800_CHANNEL := maxim,ds2482-800-channel + +config DT_HAS_MAXIM_DS2482_800_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS2482_800_CHANNEL)) + +DT_COMPAT_MAXIM_DS2484 := maxim,ds2484 + +config DT_HAS_MAXIM_DS2484_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS2484)) + +DT_COMPAT_MAXIM_DS2485 := maxim,ds2485 + +config DT_HAS_MAXIM_DS2485_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS2485)) + +DT_COMPAT_MAXIM_DS3231 := maxim,ds3231 + +config DT_HAS_MAXIM_DS3231_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS3231)) + +DT_COMPAT_MAXIM_DS3231_MFD := maxim,ds3231-mfd + +config DT_HAS_MAXIM_DS3231_MFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS3231_MFD)) + +DT_COMPAT_MAXIM_DS3231_RTC := maxim,ds3231-rtc + +config DT_HAS_MAXIM_DS3231_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS3231_RTC)) + +DT_COMPAT_MAXIM_DS3231_SENSOR := maxim,ds3231-sensor + +config DT_HAS_MAXIM_DS3231_SENSOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_DS3231_SENSOR)) + +DT_COMPAT_MAXIM_MAX11102 := maxim,max11102 + +config DT_HAS_MAXIM_MAX11102_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11102)) + +DT_COMPAT_MAXIM_MAX11103 := maxim,max11103 + +config DT_HAS_MAXIM_MAX11103_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11103)) + +DT_COMPAT_MAXIM_MAX11105 := maxim,max11105 + +config DT_HAS_MAXIM_MAX11105_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11105)) + +DT_COMPAT_MAXIM_MAX11106 := maxim,max11106 + +config DT_HAS_MAXIM_MAX11106_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11106)) + +DT_COMPAT_MAXIM_MAX11110 := maxim,max11110 + +config DT_HAS_MAXIM_MAX11110_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11110)) + +DT_COMPAT_MAXIM_MAX11111 := maxim,max11111 + +config DT_HAS_MAXIM_MAX11111_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11111)) + +DT_COMPAT_MAXIM_MAX11115 := maxim,max11115 + +config DT_HAS_MAXIM_MAX11115_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11115)) + +DT_COMPAT_MAXIM_MAX11116 := maxim,max11116 + +config DT_HAS_MAXIM_MAX11116_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11116)) + +DT_COMPAT_MAXIM_MAX11117 := maxim,max11117 + +config DT_HAS_MAXIM_MAX11117_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11117)) + +DT_COMPAT_MAXIM_MAX11253 := maxim,max11253 + +config DT_HAS_MAXIM_MAX11253_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11253)) + +DT_COMPAT_MAXIM_MAX11254 := maxim,max11254 + +config DT_HAS_MAXIM_MAX11254_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX11254)) + +DT_COMPAT_MAXIM_MAX17048 := maxim,max17048 + +config DT_HAS_MAXIM_MAX17048_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX17048)) + +DT_COMPAT_MAXIM_MAX17055 := maxim,max17055 + +config DT_HAS_MAXIM_MAX17055_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX17055)) + +DT_COMPAT_MAXIM_MAX17262 := maxim,max17262 + +config DT_HAS_MAXIM_MAX17262_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX17262)) + +DT_COMPAT_MAXIM_MAX20335 := maxim,max20335 + +config DT_HAS_MAXIM_MAX20335_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX20335)) + +DT_COMPAT_MAXIM_MAX20335_CHARGER := maxim,max20335-charger + +config DT_HAS_MAXIM_MAX20335_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX20335_CHARGER)) + +DT_COMPAT_MAXIM_MAX20335_REGULATOR := maxim,max20335-regulator + +config DT_HAS_MAXIM_MAX20335_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX20335_REGULATOR)) + +DT_COMPAT_MAXIM_MAX2253X := maxim,max2253x + +config DT_HAS_MAXIM_MAX2253X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX2253X)) + +DT_COMPAT_MAXIM_MAX30101 := maxim,max30101 + +config DT_HAS_MAXIM_MAX30101_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX30101)) + +DT_COMPAT_MAXIM_MAX31790 := maxim,max31790 + +config DT_HAS_MAXIM_MAX31790_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31790)) + +DT_COMPAT_MAXIM_MAX31790_FAN_FAULT := maxim,max31790-fan-fault + +config DT_HAS_MAXIM_MAX31790_FAN_FAULT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31790_FAN_FAULT)) + +DT_COMPAT_MAXIM_MAX31790_FAN_SPEED := maxim,max31790-fan-speed + +config DT_HAS_MAXIM_MAX31790_FAN_SPEED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31790_FAN_SPEED)) + +DT_COMPAT_MAXIM_MAX31790_PWM := maxim,max31790-pwm + +config DT_HAS_MAXIM_MAX31790_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31790_PWM)) + +DT_COMPAT_MAXIM_MAX31855 := maxim,max31855 + +config DT_HAS_MAXIM_MAX31855_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31855)) + +DT_COMPAT_MAXIM_MAX31865 := maxim,max31865 + +config DT_HAS_MAXIM_MAX31865_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31865)) + +DT_COMPAT_MAXIM_MAX31875 := maxim,max31875 + +config DT_HAS_MAXIM_MAX31875_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX31875)) + +DT_COMPAT_MAXIM_MAX32664C := maxim,max32664c + +config DT_HAS_MAXIM_MAX32664C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX32664C)) + +DT_COMPAT_MAXIM_MAX3421E_SPI := maxim,max3421e-spi + +config DT_HAS_MAXIM_MAX3421E_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX3421E_SPI)) + +DT_COMPAT_MAXIM_MAX44009 := maxim,max44009 + +config DT_HAS_MAXIM_MAX44009_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX44009)) + +DT_COMPAT_MAXIM_MAX6675 := maxim,max6675 + +config DT_HAS_MAXIM_MAX6675_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX6675)) + +DT_COMPAT_MAXIM_MAX7219 := maxim,max7219 + +config DT_HAS_MAXIM_MAX7219_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX7219)) + +DT_COMPAT_MAXIM_MAX98091 := maxim,max98091 + +config DT_HAS_MAXIM_MAX98091_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX98091)) + +DT_COMPAT_MAXLINEAR_GPY111 := maxlinear,gpy111 + +config DT_HAS_MAXLINEAR_GPY111_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MAXLINEAR_GPY111)) + +DT_COMPAT_MEAS_HTU21D := meas,htu21d + +config DT_HAS_MEAS_HTU21D_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEAS_HTU21D)) + +DT_COMPAT_MEAS_HTU31D := meas,htu31d + +config DT_HAS_MEAS_HTU31D_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEAS_HTU31D)) + +DT_COMPAT_MEAS_MS5607 := meas,ms5607 + +config DT_HAS_MEAS_MS5607_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEAS_MS5607)) + +DT_COMPAT_MEAS_MS5637 := meas,ms5637 + +config DT_HAS_MEAS_MS5637_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEAS_MS5637)) + +DT_COMPAT_MEAS_MS5837_02BA := meas,ms5837-02ba + +config DT_HAS_MEAS_MS5837_02BA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEAS_MS5837_02BA)) + +DT_COMPAT_MEAS_MS5837_30BA := meas,ms5837-30ba + +config DT_HAS_MEAS_MS5837_30BA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEAS_MS5837_30BA)) + +DT_COMPAT_MEDIATEK_ADSP_INTC := mediatek,adsp_intc + +config DT_HAS_MEDIATEK_ADSP_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEDIATEK_ADSP_INTC)) + +DT_COMPAT_MEDIATEK_AFE := mediatek,afe + +config DT_HAS_MEDIATEK_AFE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEDIATEK_AFE)) + +DT_COMPAT_MEDIATEK_MT818X_CPUCLK := mediatek,mt818x_cpuclk + +config DT_HAS_MEDIATEK_MT818X_CPUCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEDIATEK_MT818X_CPUCLK)) + +DT_COMPAT_MEDIATEK_MT8195_CPUCLK := mediatek,mt8195_cpuclk + +config DT_HAS_MEDIATEK_MT8195_CPUCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEDIATEK_MT8195_CPUCLK)) + +DT_COMPAT_MEDIATEK_OSTIMER64 := mediatek,ostimer64 + +config DT_HAS_MEDIATEK_OSTIMER64_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEDIATEK_OSTIMER64)) + +DT_COMPAT_MELEXIS_MLX90394 := melexis,mlx90394 + +config DT_HAS_MELEXIS_MLX90394_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MELEXIS_MLX90394)) + +DT_COMPAT_MEMSIC_MC3419 := memsic,mc3419 + +config DT_HAS_MEMSIC_MC3419_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEMSIC_MC3419)) + +DT_COMPAT_MEMSIC_MMC56X3 := memsic,mmc56x3 + +config DT_HAS_MEMSIC_MMC56X3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MEMSIC_MMC56X3)) + +DT_COMPAT_MICROBIT_EDGE_CONNECTOR := microbit,edge-connector + +config DT_HAS_MICROBIT_EDGE_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROBIT_EDGE_CONNECTOR)) + +DT_COMPAT_MICROCHIP_AC_G1_COMPARATOR := microchip,ac-g1-comparator + +config DT_HAS_MICROCHIP_AC_G1_COMPARATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_AC_G1_COMPARATOR)) + +DT_COMPAT_MICROCHIP_ADC_G1 := microchip,adc-g1 + +config DT_HAS_MICROCHIP_ADC_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_ADC_G1)) + +DT_COMPAT_MICROCHIP_AES_G1 := microchip,aes-g1 + +config DT_HAS_MICROCHIP_AES_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_AES_G1)) + +DT_COMPAT_MICROCHIP_AIC_G1_INTC := microchip,aic-g1-intc + +config DT_HAS_MICROCHIP_AIC_G1_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_AIC_G1_INTC)) + +DT_COMPAT_MICROCHIP_CAP12XX := microchip,cap12xx + +config DT_HAS_MICROCHIP_CAP12XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_CAP12XX)) + +DT_COMPAT_MICROCHIP_COREUART := microchip,coreuart + +config DT_HAS_MICROCHIP_COREUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_COREUART)) + +DT_COMPAT_MICROCHIP_DAC_G1 := microchip,dac-g1 + +config DT_HAS_MICROCHIP_DAC_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_DAC_G1)) + +DT_COMPAT_MICROCHIP_DBGU_G1_UART := microchip,dbgu-g1-uart + +config DT_HAS_MICROCHIP_DBGU_G1_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_DBGU_G1_UART)) + +DT_COMPAT_MICROCHIP_DMAC_G1_DMA := microchip,dmac-g1-dma + +config DT_HAS_MICROCHIP_DMAC_G1_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_DMAC_G1_DMA)) + +DT_COMPAT_MICROCHIP_DMAC_G2_DMA := microchip,dmac-g2-dma + +config DT_HAS_MICROCHIP_DMAC_G2_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_DMAC_G2_DMA)) + +DT_COMPAT_MICROCHIP_DMEC_ECIA_GIRQ := microchip,dmec-ecia-girq + +config DT_HAS_MICROCHIP_DMEC_ECIA_GIRQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_DMEC_ECIA_GIRQ)) + +DT_COMPAT_MICROCHIP_EIC_G1_INTC := microchip,eic-g1-intc + +config DT_HAS_MICROCHIP_EIC_G1_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_EIC_G1_INTC)) + +DT_COMPAT_MICROCHIP_ENC28J60 := microchip,enc28j60 + +config DT_HAS_MICROCHIP_ENC28J60_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_ENC28J60)) + +DT_COMPAT_MICROCHIP_ENC424J600 := microchip,enc424j600 + +config DT_HAS_MICROCHIP_ENC424J600_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_ENC424J600)) + +DT_COMPAT_MICROCHIP_HWINFO_G1 := microchip,hwinfo-g1 + +config DT_HAS_MICROCHIP_HWINFO_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_HWINFO_G1)) + +DT_COMPAT_MICROCHIP_KSZ8081 := microchip,ksz8081 + +config DT_HAS_MICROCHIP_KSZ8081_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_KSZ8081)) + +DT_COMPAT_MICROCHIP_KSZ9131 := microchip,ksz9131 + +config DT_HAS_MICROCHIP_KSZ9131_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_KSZ9131)) + +DT_COMPAT_MICROCHIP_LAN865X := microchip,lan865x + +config DT_HAS_MICROCHIP_LAN865X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_LAN865X)) + +DT_COMPAT_MICROCHIP_LAN865X_MDIO := microchip,lan865x-mdio + +config DT_HAS_MICROCHIP_LAN865X_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_LAN865X_MDIO)) + +DT_COMPAT_MICROCHIP_LAN8742 := microchip,lan8742 + +config DT_HAS_MICROCHIP_LAN8742_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_LAN8742)) + +DT_COMPAT_MICROCHIP_LAN9250 := microchip,lan9250 + +config DT_HAS_MICROCHIP_LAN9250_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_LAN9250)) + +DT_COMPAT_MICROCHIP_MCP23008 := microchip,mcp23008 + +config DT_HAS_MICROCHIP_MCP23008_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23008)) + +DT_COMPAT_MICROCHIP_MCP23009 := microchip,mcp23009 + +config DT_HAS_MICROCHIP_MCP23009_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23009)) + +DT_COMPAT_MICROCHIP_MCP23016 := microchip,mcp23016 + +config DT_HAS_MICROCHIP_MCP23016_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23016)) + +DT_COMPAT_MICROCHIP_MCP23017 := microchip,mcp23017 + +config DT_HAS_MICROCHIP_MCP23017_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23017)) + +DT_COMPAT_MICROCHIP_MCP23018 := microchip,mcp23018 + +config DT_HAS_MICROCHIP_MCP23018_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23018)) + +DT_COMPAT_MICROCHIP_MCP23S08 := microchip,mcp23s08 + +config DT_HAS_MICROCHIP_MCP23S08_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23S08)) + +DT_COMPAT_MICROCHIP_MCP23S09 := microchip,mcp23s09 + +config DT_HAS_MICROCHIP_MCP23S09_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23S09)) + +DT_COMPAT_MICROCHIP_MCP23S17 := microchip,mcp23s17 + +config DT_HAS_MICROCHIP_MCP23S17_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23S17)) + +DT_COMPAT_MICROCHIP_MCP23S18 := microchip,mcp23s18 + +config DT_HAS_MICROCHIP_MCP23S18_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP23S18)) + +DT_COMPAT_MICROCHIP_MCP2515 := microchip,mcp2515 + +config DT_HAS_MICROCHIP_MCP2515_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP2515)) + +DT_COMPAT_MICROCHIP_MCP251XFD := microchip,mcp251xfd + +config DT_HAS_MICROCHIP_MCP251XFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP251XFD)) + +DT_COMPAT_MICROCHIP_MCP3204 := microchip,mcp3204 + +config DT_HAS_MICROCHIP_MCP3204_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP3204)) + +DT_COMPAT_MICROCHIP_MCP3208 := microchip,mcp3208 + +config DT_HAS_MICROCHIP_MCP3208_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP3208)) + +DT_COMPAT_MICROCHIP_MCP3221 := microchip,mcp3221 + +config DT_HAS_MICROCHIP_MCP3221_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP3221)) + +DT_COMPAT_MICROCHIP_MCP356XR := microchip,mcp356xr + +config DT_HAS_MICROCHIP_MCP356XR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP356XR)) + +DT_COMPAT_MICROCHIP_MCP4725 := microchip,mcp4725 + +config DT_HAS_MICROCHIP_MCP4725_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP4725)) + +DT_COMPAT_MICROCHIP_MCP4728 := microchip,mcp4728 + +config DT_HAS_MICROCHIP_MCP4728_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP4728)) + +DT_COMPAT_MICROCHIP_MCP7940N := microchip,mcp7940n + +config DT_HAS_MICROCHIP_MCP7940N_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP7940N)) + +DT_COMPAT_MICROCHIP_MCP9600 := microchip,mcp9600 + +config DT_HAS_MICROCHIP_MCP9600_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP9600)) + +DT_COMPAT_MICROCHIP_MCP970X := microchip,mcp970x + +config DT_HAS_MICROCHIP_MCP970X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MCP970X)) + +DT_COMPAT_MICROCHIP_MEC5_GPIO := microchip,mec5-gpio + +config DT_HAS_MICROCHIP_MEC5_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MEC5_GPIO)) + +DT_COMPAT_MICROCHIP_MPFS_GPIO := microchip,mpfs-gpio + +config DT_HAS_MICROCHIP_MPFS_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MPFS_GPIO)) + +DT_COMPAT_MICROCHIP_MPFS_I2C := microchip,mpfs-i2c + +config DT_HAS_MICROCHIP_MPFS_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MPFS_I2C)) + +DT_COMPAT_MICROCHIP_MPFS_QSPI := microchip,mpfs-qspi + +config DT_HAS_MICROCHIP_MPFS_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MPFS_QSPI)) + +DT_COMPAT_MICROCHIP_MPFS_RESET := microchip,mpfs-reset + +config DT_HAS_MICROCHIP_MPFS_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MPFS_RESET)) + +DT_COMPAT_MICROCHIP_MPFS_SPI := microchip,mpfs-spi + +config DT_HAS_MICROCHIP_MPFS_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MPFS_SPI)) + +DT_COMPAT_MICROCHIP_MTCH9010 := microchip,mtch9010 + +config DT_HAS_MICROCHIP_MTCH9010_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_MTCH9010)) + +DT_COMPAT_MICROCHIP_NVMCTRL_G1_FLASH := microchip,nvmctrl-g1-flash + +config DT_HAS_MICROCHIP_NVMCTRL_G1_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_NVMCTRL_G1_FLASH)) + +DT_COMPAT_MICROCHIP_PAC194X := microchip,pac194x + +config DT_HAS_MICROCHIP_PAC194X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PAC194X)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_CLOCK := microchip,pic32cm-jh-clock + +config DT_HAS_MICROCHIP_PIC32CM_JH_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_CLOCK)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_FDPLL := microchip,pic32cm-jh-fdpll + +config DT_HAS_MICROCHIP_PIC32CM_JH_FDPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_FDPLL)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_GCLKGEN := microchip,pic32cm-jh-gclkgen + +config DT_HAS_MICROCHIP_PIC32CM_JH_GCLKGEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_GCLKGEN)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_GCLKPERIPH := microchip,pic32cm-jh-gclkperiph + +config DT_HAS_MICROCHIP_PIC32CM_JH_GCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_GCLKPERIPH)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_MCLKCPU := microchip,pic32cm-jh-mclkcpu + +config DT_HAS_MICROCHIP_PIC32CM_JH_MCLKCPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_MCLKCPU)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_MCLKPERIPH := microchip,pic32cm-jh-mclkperiph + +config DT_HAS_MICROCHIP_PIC32CM_JH_MCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_MCLKPERIPH)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_OSC32K := microchip,pic32cm-jh-osc32k + +config DT_HAS_MICROCHIP_PIC32CM_JH_OSC32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_OSC32K)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_OSC48M := microchip,pic32cm-jh-osc48m + +config DT_HAS_MICROCHIP_PIC32CM_JH_OSC48M_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_OSC48M)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_RTC := microchip,pic32cm-jh-rtc + +config DT_HAS_MICROCHIP_PIC32CM_JH_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_RTC)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_XOSC := microchip,pic32cm-jh-xosc + +config DT_HAS_MICROCHIP_PIC32CM_JH_XOSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_XOSC)) + +DT_COMPAT_MICROCHIP_PIC32CM_JH_XOSC32K := microchip,pic32cm-jh-xosc32k + +config DT_HAS_MICROCHIP_PIC32CM_JH_XOSC32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_JH_XOSC32K)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_CLOCK := microchip,pic32cm-pl-clock + +config DT_HAS_MICROCHIP_PIC32CM_PL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_CLOCK)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_GCLKGEN := microchip,pic32cm-pl-gclkgen + +config DT_HAS_MICROCHIP_PIC32CM_PL_GCLKGEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_GCLKGEN)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_GCLKPERIPH := microchip,pic32cm-pl-gclkperiph + +config DT_HAS_MICROCHIP_PIC32CM_PL_GCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_GCLKPERIPH)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_MCLKCPU := microchip,pic32cm-pl-mclkcpu + +config DT_HAS_MICROCHIP_PIC32CM_PL_MCLKCPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_MCLKCPU)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_MCLKPERIPH := microchip,pic32cm-pl-mclkperiph + +config DT_HAS_MICROCHIP_PIC32CM_PL_MCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_MCLKPERIPH)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_OSC32K := microchip,pic32cm-pl-osc32k + +config DT_HAS_MICROCHIP_PIC32CM_PL_OSC32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_OSC32K)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_OSCHF := microchip,pic32cm-pl-oschf + +config DT_HAS_MICROCHIP_PIC32CM_PL_OSCHF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_OSCHF)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_RTC := microchip,pic32cm-pl-rtc + +config DT_HAS_MICROCHIP_PIC32CM_PL_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_RTC)) + +DT_COMPAT_MICROCHIP_PIC32CM_PL_XOSC32K := microchip,pic32cm-pl-xosc32k + +config DT_HAS_MICROCHIP_PIC32CM_PL_XOSC32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CM_PL_XOSC32K)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_CLOCK := microchip,pic32cz-ca-clock + +config DT_HAS_MICROCHIP_PIC32CZ_CA_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_CLOCK)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_DFLL48M := microchip,pic32cz-ca-dfll48m + +config DT_HAS_MICROCHIP_PIC32CZ_CA_DFLL48M_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_DFLL48M)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_DPLL := microchip,pic32cz-ca-dpll + +config DT_HAS_MICROCHIP_PIC32CZ_CA_DPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_DPLL)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_GCLKGEN := microchip,pic32cz-ca-gclkgen + +config DT_HAS_MICROCHIP_PIC32CZ_CA_GCLKGEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_GCLKGEN)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_GCLKPERIPH := microchip,pic32cz-ca-gclkperiph + +config DT_HAS_MICROCHIP_PIC32CZ_CA_GCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_GCLKPERIPH)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_MCLKDOMAIN := microchip,pic32cz-ca-mclkdomain + +config DT_HAS_MICROCHIP_PIC32CZ_CA_MCLKDOMAIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_MCLKDOMAIN)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_MCLKPERIPH := microchip,pic32cz-ca-mclkperiph + +config DT_HAS_MICROCHIP_PIC32CZ_CA_MCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_MCLKPERIPH)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_RTC := microchip,pic32cz-ca-rtc + +config DT_HAS_MICROCHIP_PIC32CZ_CA_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_RTC)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_XOSC := microchip,pic32cz-ca-xosc + +config DT_HAS_MICROCHIP_PIC32CZ_CA_XOSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_XOSC)) + +DT_COMPAT_MICROCHIP_PIC32CZ_CA_XOSC32K := microchip,pic32cz-ca-xosc32k + +config DT_HAS_MICROCHIP_PIC32CZ_CA_XOSC32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PIC32CZ_CA_XOSC32K)) + +DT_COMPAT_MICROCHIP_PORT_G1_GPIO := microchip,port-g1-gpio + +config DT_HAS_MICROCHIP_PORT_G1_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PORT_G1_GPIO)) + +DT_COMPAT_MICROCHIP_PORT_G1_PINCTRL := microchip,port-g1-pinctrl + +config DT_HAS_MICROCHIP_PORT_G1_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_PORT_G1_PINCTRL)) + +DT_COMPAT_MICROCHIP_RSTC_G1_RESET := microchip,rstc-g1-reset + +config DT_HAS_MICROCHIP_RSTC_G1_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_RSTC_G1_RESET)) + +DT_COMPAT_MICROCHIP_RTC_G1 := microchip,rtc-g1 + +config DT_HAS_MICROCHIP_RTC_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_RTC_G1)) + +DT_COMPAT_MICROCHIP_RTC_G1_COUNTER := microchip,rtc-g1-counter + +config DT_HAS_MICROCHIP_RTC_G1_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_RTC_G1_COUNTER)) + +DT_COMPAT_MICROCHIP_RTC_G2 := microchip,rtc-g2 + +config DT_HAS_MICROCHIP_RTC_G2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_RTC_G2)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_CLOCK := microchip,sam-d5x-e5x-clock + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_CLOCK)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_DFLL := microchip,sam-d5x-e5x-dfll + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_DFLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_DFLL)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_FDPLL := microchip,sam-d5x-e5x-fdpll + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_FDPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_FDPLL)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_GCLKGEN := microchip,sam-d5x-e5x-gclkgen + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_GCLKGEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_GCLKGEN)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_GCLKPERIPH := microchip,sam-d5x-e5x-gclkperiph + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_GCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_GCLKPERIPH)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_MCLKCPU := microchip,sam-d5x-e5x-mclkcpu + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_MCLKCPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_MCLKCPU)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_MCLKPERIPH := microchip,sam-d5x-e5x-mclkperiph + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_MCLKPERIPH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_MCLKPERIPH)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_RTC := microchip,sam-d5x-e5x-rtc + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_RTC)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_XOSC := microchip,sam-d5x-e5x-xosc + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_XOSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_XOSC)) + +DT_COMPAT_MICROCHIP_SAM_D5X_E5X_XOSC32K := microchip,sam-d5x-e5x-xosc32k + +config DT_HAS_MICROCHIP_SAM_D5X_E5X_XOSC32K_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_D5X_E5X_XOSC32K)) + +DT_COMPAT_MICROCHIP_SAM_ETHERNET_CONTROLLER := microchip,sam-ethernet-controller + +config DT_HAS_MICROCHIP_SAM_ETHERNET_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_ETHERNET_CONTROLLER)) + +DT_COMPAT_MICROCHIP_SAM_FLEXCOM := microchip,sam-flexcom + +config DT_HAS_MICROCHIP_SAM_FLEXCOM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_FLEXCOM)) + +DT_COMPAT_MICROCHIP_SAM_PIO4 := microchip,sam-pio4 + +config DT_HAS_MICROCHIP_SAM_PIO4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_PIO4)) + +DT_COMPAT_MICROCHIP_SAM_PIT64B := microchip,sam-pit64b + +config DT_HAS_MICROCHIP_SAM_PIT64B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_PIT64B)) + +DT_COMPAT_MICROCHIP_SAM_PIT64B_COUNTER := microchip,sam-pit64b-counter + +config DT_HAS_MICROCHIP_SAM_PIT64B_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_PIT64B_COUNTER)) + +DT_COMPAT_MICROCHIP_SAM_PMC := microchip,sam-pmc + +config DT_HAS_MICROCHIP_SAM_PMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAM_PMC)) + +DT_COMPAT_MICROCHIP_SAMA7G5_PINCTRL := microchip,sama7g5-pinctrl + +config DT_HAS_MICROCHIP_SAMA7G5_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAMA7G5_PINCTRL)) + +DT_COMPAT_MICROCHIP_SAMA7G5_SCKC := microchip,sama7g5-sckc + +config DT_HAS_MICROCHIP_SAMA7G5_SCKC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAMA7G5_SCKC)) + +DT_COMPAT_MICROCHIP_SAMA7G5_SDMMC := microchip,sama7g5-sdmmc + +config DT_HAS_MICROCHIP_SAMA7G5_SDMMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SAMA7G5_SDMMC)) + +DT_COMPAT_MICROCHIP_SERCOM_G1 := microchip,sercom-g1 + +config DT_HAS_MICROCHIP_SERCOM_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SERCOM_G1)) + +DT_COMPAT_MICROCHIP_SERCOM_G1_I2C := microchip,sercom-g1-i2c + +config DT_HAS_MICROCHIP_SERCOM_G1_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SERCOM_G1_I2C)) + +DT_COMPAT_MICROCHIP_SERCOM_G1_SPI := microchip,sercom-g1-spi + +config DT_HAS_MICROCHIP_SERCOM_G1_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SERCOM_G1_SPI)) + +DT_COMPAT_MICROCHIP_SERCOM_G1_UART := microchip,sercom-g1-uart + +config DT_HAS_MICROCHIP_SERCOM_G1_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SERCOM_G1_UART)) + +DT_COMPAT_MICROCHIP_SHA_G1_CRYPTO := microchip,sha-g1-crypto + +config DT_HAS_MICROCHIP_SHA_G1_CRYPTO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_SHA_G1_CRYPTO)) + +DT_COMPAT_MICROCHIP_T1S_PHY := microchip,t1s-phy + +config DT_HAS_MICROCHIP_T1S_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_T1S_PHY)) + +DT_COMPAT_MICROCHIP_TC_G1 := microchip,tc-g1 + +config DT_HAS_MICROCHIP_TC_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TC_G1)) + +DT_COMPAT_MICROCHIP_TC_G1_COUNTER := microchip,tc-g1-counter + +config DT_HAS_MICROCHIP_TC_G1_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TC_G1_COUNTER)) + +DT_COMPAT_MICROCHIP_TC_G1_PWM := microchip,tc-g1-pwm + +config DT_HAS_MICROCHIP_TC_G1_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TC_G1_PWM)) + +DT_COMPAT_MICROCHIP_TC_G2_COUNTER := microchip,tc-g2-counter + +config DT_HAS_MICROCHIP_TC_G2_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TC_G2_COUNTER)) + +DT_COMPAT_MICROCHIP_TCC_G1 := microchip,tcc-g1 + +config DT_HAS_MICROCHIP_TCC_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TCC_G1)) + +DT_COMPAT_MICROCHIP_TCC_G1_COUNTER := microchip,tcc-g1-counter + +config DT_HAS_MICROCHIP_TCC_G1_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TCC_G1_COUNTER)) + +DT_COMPAT_MICROCHIP_TCC_G1_PWM := microchip,tcc-g1-pwm + +config DT_HAS_MICROCHIP_TCC_G1_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TCC_G1_PWM)) + +DT_COMPAT_MICROCHIP_TCN75A := microchip,tcn75a + +config DT_HAS_MICROCHIP_TCN75A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TCN75A)) + +DT_COMPAT_MICROCHIP_TRNG_G1_ENTROPY := microchip,trng-g1-entropy + +config DT_HAS_MICROCHIP_TRNG_G1_ENTROPY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_TRNG_G1_ENTROPY)) + +DT_COMPAT_MICROCHIP_VSC8541 := microchip,vsc8541 + +config DT_HAS_MICROCHIP_VSC8541_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_VSC8541)) + +DT_COMPAT_MICROCHIP_WDT_G1 := microchip,wdt-g1 + +config DT_HAS_MICROCHIP_WDT_G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_WDT_G1)) + +DT_COMPAT_MICROCHIP_XEC_ADC := microchip,xec-adc + +config DT_HAS_MICROCHIP_XEC_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ADC)) + +DT_COMPAT_MICROCHIP_XEC_BASIC_TIMER := microchip,xec-basic-timer + +config DT_HAS_MICROCHIP_XEC_BASIC_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_BASIC_TIMER)) + +DT_COMPAT_MICROCHIP_XEC_BBLED := microchip,xec-bbled + +config DT_HAS_MICROCHIP_XEC_BBLED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_BBLED)) + +DT_COMPAT_MICROCHIP_XEC_BBRAM := microchip,xec-bbram + +config DT_HAS_MICROCHIP_XEC_BBRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_BBRAM)) + +DT_COMPAT_MICROCHIP_XEC_DMAC := microchip,xec-dmac + +config DT_HAS_MICROCHIP_XEC_DMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_DMAC)) + +DT_COMPAT_MICROCHIP_XEC_ECIA := microchip,xec-ecia + +config DT_HAS_MICROCHIP_XEC_ECIA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ECIA)) + +DT_COMPAT_MICROCHIP_XEC_ECIA_GIRQ := microchip,xec-ecia-girq + +config DT_HAS_MICROCHIP_XEC_ECIA_GIRQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ECIA_GIRQ)) + +DT_COMPAT_MICROCHIP_XEC_ECS := microchip,xec-ecs + +config DT_HAS_MICROCHIP_XEC_ECS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ECS)) + +DT_COMPAT_MICROCHIP_XEC_EEPROM := microchip,xec-eeprom + +config DT_HAS_MICROCHIP_XEC_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_EEPROM)) + +DT_COMPAT_MICROCHIP_XEC_ESPI := microchip,xec-espi + +config DT_HAS_MICROCHIP_XEC_ESPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ESPI)) + +DT_COMPAT_MICROCHIP_XEC_ESPI_HOST_DEV := microchip,xec-espi-host-dev + +config DT_HAS_MICROCHIP_XEC_ESPI_HOST_DEV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ESPI_HOST_DEV)) + +DT_COMPAT_MICROCHIP_XEC_ESPI_SAF := microchip,xec-espi-saf + +config DT_HAS_MICROCHIP_XEC_ESPI_SAF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ESPI_SAF)) + +DT_COMPAT_MICROCHIP_XEC_ESPI_SAF_V2 := microchip,xec-espi-saf-v2 + +config DT_HAS_MICROCHIP_XEC_ESPI_SAF_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ESPI_SAF_V2)) + +DT_COMPAT_MICROCHIP_XEC_ESPI_V2 := microchip,xec-espi-v2 + +config DT_HAS_MICROCHIP_XEC_ESPI_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ESPI_V2)) + +DT_COMPAT_MICROCHIP_XEC_ESPI_VW_ROUTING := microchip,xec-espi-vw-routing + +config DT_HAS_MICROCHIP_XEC_ESPI_VW_ROUTING_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_ESPI_VW_ROUTING)) + +DT_COMPAT_MICROCHIP_XEC_GPIO := microchip,xec-gpio + +config DT_HAS_MICROCHIP_XEC_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_GPIO)) + +DT_COMPAT_MICROCHIP_XEC_GPIO_V2 := microchip,xec-gpio-v2 + +config DT_HAS_MICROCHIP_XEC_GPIO_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_GPIO_V2)) + +DT_COMPAT_MICROCHIP_XEC_I2C := microchip,xec-i2c + +config DT_HAS_MICROCHIP_XEC_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_I2C)) + +DT_COMPAT_MICROCHIP_XEC_I2C_V2 := microchip,xec-i2c-v2 + +config DT_HAS_MICROCHIP_XEC_I2C_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_I2C_V2)) + +DT_COMPAT_MICROCHIP_XEC_KBD := microchip,xec-kbd + +config DT_HAS_MICROCHIP_XEC_KBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_KBD)) + +DT_COMPAT_MICROCHIP_XEC_PCR := microchip,xec-pcr + +config DT_HAS_MICROCHIP_XEC_PCR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_PCR)) + +DT_COMPAT_MICROCHIP_XEC_PECI := microchip,xec-peci + +config DT_HAS_MICROCHIP_XEC_PECI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_PECI)) + +DT_COMPAT_MICROCHIP_XEC_PINCTRL := microchip,xec-pinctrl + +config DT_HAS_MICROCHIP_XEC_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_PINCTRL)) + +DT_COMPAT_MICROCHIP_XEC_PS2 := microchip,xec-ps2 + +config DT_HAS_MICROCHIP_XEC_PS2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_PS2)) + +DT_COMPAT_MICROCHIP_XEC_PWM := microchip,xec-pwm + +config DT_HAS_MICROCHIP_XEC_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_PWM)) + +DT_COMPAT_MICROCHIP_XEC_PWMBBLED := microchip,xec-pwmbbled + +config DT_HAS_MICROCHIP_XEC_PWMBBLED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_PWMBBLED)) + +DT_COMPAT_MICROCHIP_XEC_QMSPI := microchip,xec-qmspi + +config DT_HAS_MICROCHIP_XEC_QMSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_QMSPI)) + +DT_COMPAT_MICROCHIP_XEC_QMSPI_LDMA := microchip,xec-qmspi-ldma + +config DT_HAS_MICROCHIP_XEC_QMSPI_LDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_QMSPI_LDMA)) + +DT_COMPAT_MICROCHIP_XEC_RTC := microchip,xec-rtc + +config DT_HAS_MICROCHIP_XEC_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_RTC)) + +DT_COMPAT_MICROCHIP_XEC_RTOS_TIMER := microchip,xec-rtos-timer + +config DT_HAS_MICROCHIP_XEC_RTOS_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_RTOS_TIMER)) + +DT_COMPAT_MICROCHIP_XEC_SYMCR := microchip,xec-symcr + +config DT_HAS_MICROCHIP_XEC_SYMCR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_SYMCR)) + +DT_COMPAT_MICROCHIP_XEC_TACH := microchip,xec-tach + +config DT_HAS_MICROCHIP_XEC_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_TACH)) + +DT_COMPAT_MICROCHIP_XEC_TIMER := microchip,xec-timer + +config DT_HAS_MICROCHIP_XEC_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_TIMER)) + +DT_COMPAT_MICROCHIP_XEC_UART := microchip,xec-uart + +config DT_HAS_MICROCHIP_XEC_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_UART)) + +DT_COMPAT_MICROCHIP_XEC_WATCHDOG := microchip,xec-watchdog + +config DT_HAS_MICROCHIP_XEC_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XEC_WATCHDOG)) + +DT_COMPAT_MICROCHIP_XPRO_HEADER := microchip,xpro-header + +config DT_HAS_MICROCHIP_XPRO_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCHIP_XPRO_HEADER)) + +DT_COMPAT_MICROCRYSTAL_RV_8263_C8 := microcrystal,rv-8263-c8 + +config DT_HAS_MICROCRYSTAL_RV_8263_C8_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV_8263_C8)) + +DT_COMPAT_MICROCRYSTAL_RV3028 := microcrystal,rv3028 + +config DT_HAS_MICROCRYSTAL_RV3028_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV3028)) + +DT_COMPAT_MICROCRYSTAL_RV3032 := microcrystal,rv3032 + +config DT_HAS_MICROCRYSTAL_RV3032_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV3032)) + +DT_COMPAT_MICROCRYSTAL_RV3032_COUNTER := microcrystal,rv3032-counter + +config DT_HAS_MICROCRYSTAL_RV3032_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV3032_COUNTER)) + +DT_COMPAT_MICROCRYSTAL_RV3032_MFD := microcrystal,rv3032-mfd + +config DT_HAS_MICROCRYSTAL_RV3032_MFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV3032_MFD)) + +DT_COMPAT_MICROCRYSTAL_RV3032_TEMP := microcrystal,rv3032-temp + +config DT_HAS_MICROCRYSTAL_RV3032_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV3032_TEMP)) + +DT_COMPAT_MICROCRYSTAL_RV8803 := microcrystal,rv8803 + +config DT_HAS_MICROCRYSTAL_RV8803_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICROCRYSTAL_RV8803)) + +DT_COMPAT_MICRON_MT25QU02G := micron,mt25qu02g + +config DT_HAS_MICRON_MT25QU02G_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MICRON_MT25QU02G)) + +DT_COMPAT_MIKRO_BUS := mikro-bus + +config DT_HAS_MIKRO_BUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MIKRO_BUS)) + +DT_COMPAT_MMIO_SRAM := mmio-sram + +config DT_HAS_MMIO_SRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MMIO_SRAM)) + +DT_COMPAT_MOTORCOMM_YT8521 := motorcomm,yt8521 + +config DT_HAS_MOTORCOMM_YT8521_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MOTORCOMM_YT8521)) + +DT_COMPAT_MOTORCOMM_YT8531 := motorcomm,yt8531 + +config DT_HAS_MOTORCOMM_YT8531_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MOTORCOMM_YT8531)) + +DT_COMPAT_MOTOROLA_MC146818 := motorola,mc146818 + +config DT_HAS_MOTOROLA_MC146818_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MOTOROLA_MC146818)) + +DT_COMPAT_MOTOROLA_MC146818_BBRAM := motorola,mc146818-bbram + +config DT_HAS_MOTOROLA_MC146818_BBRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MOTOROLA_MC146818_BBRAM)) + +DT_COMPAT_MOTOROLA_MC146818_MFD := motorola,mc146818-mfd + +config DT_HAS_MOTOROLA_MC146818_MFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MOTOROLA_MC146818_MFD)) + +DT_COMPAT_MPS_MPM54304 := mps,mpm54304 + +config DT_HAS_MPS_MPM54304_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MPS_MPM54304)) + +DT_COMPAT_MSPI_APS_Z8 := mspi-aps-z8 + +config DT_HAS_MSPI_APS_Z8_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MSPI_APS_Z8)) + +DT_COMPAT_MSPI_APS6404L := mspi-aps6404l + +config DT_HAS_MSPI_APS6404L_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MSPI_APS6404L)) + +DT_COMPAT_MSPI_ATXP032 := mspi-atxp032 + +config DT_HAS_MSPI_ATXP032_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MSPI_ATXP032)) + +DT_COMPAT_MSPI_IS25XX0XX := mspi-is25xX0xx + +config DT_HAS_MSPI_IS25XX0XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MSPI_IS25XX0XX)) + +DT_COMPAT_MTI_CPU_INTC := mti,cpu-intc + +config DT_HAS_MTI_CPU_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MTI_CPU_INTC)) + +DT_COMPAT_MURATA_NCP15WB473 := murata,ncp15wb473 + +config DT_HAS_MURATA_NCP15WB473_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MURATA_NCP15WB473)) + +DT_COMPAT_MURATA_NCP15XH103 := murata,ncp15xh103 + +config DT_HAS_MURATA_NCP15XH103_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MURATA_NCP15XH103)) + +DT_COMPAT_MXICY_MX25U := mxicy,mx25u + +config DT_HAS_MXICY_MX25U_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_MXICY_MX25U)) + +DT_COMPAT_NATIONAL_LM95234 := national,lm95234 + +config DT_HAS_NATIONAL_LM95234_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NATIONAL_LM95234)) + +DT_COMPAT_NEORV32_CPU := neorv32,cpu + +config DT_HAS_NEORV32_CPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NEORV32_CPU)) + +DT_COMPAT_NEORV32_GPIO := neorv32,gpio + +config DT_HAS_NEORV32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NEORV32_GPIO)) + +DT_COMPAT_NEORV32_GPTMR := neorv32,gptmr + +config DT_HAS_NEORV32_GPTMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NEORV32_GPTMR)) + +DT_COMPAT_NEORV32_PWM := neorv32,pwm + +config DT_HAS_NEORV32_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NEORV32_PWM)) + +DT_COMPAT_NEORV32_TRNG := neorv32,trng + +config DT_HAS_NEORV32_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NEORV32_TRNG)) + +DT_COMPAT_NEORV32_UART := neorv32,uart + +config DT_HAS_NEORV32_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NEORV32_UART)) + +DT_COMPAT_NETSOL_S3AXX04 := netsol,s3axx04 + +config DT_HAS_NETSOL_S3AXX04_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NETSOL_S3AXX04)) + +DT_COMPAT_NINTENDO_NUNCHUK := nintendo,nunchuk + +config DT_HAS_NINTENDO_NUNCHUK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NINTENDO_NUNCHUK)) + +DT_COMPAT_NORDIC_AXON := nordic,axon + +config DT_HAS_NORDIC_AXON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_AXON)) + +DT_COMPAT_NORDIC_CORESIGHT_NRF := nordic,coresight-nrf + +config DT_HAS_NORDIC_CORESIGHT_NRF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_CORESIGHT_NRF)) + +DT_COMPAT_NORDIC_EXPANSION_BOARD_HEADER := nordic,expansion-board-header + +config DT_HAS_NORDIC_EXPANSION_BOARD_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_EXPANSION_BOARD_HEADER)) + +DT_COMPAT_NORDIC_IRONSIDE_CALL := nordic,ironside-call + +config DT_HAS_NORDIC_IRONSIDE_CALL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_IRONSIDE_CALL)) + +DT_COMPAT_NORDIC_MBOX_NRF_IPC := nordic,mbox-nrf-ipc + +config DT_HAS_NORDIC_MBOX_NRF_IPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_MBOX_NRF_IPC)) + +DT_COMPAT_NORDIC_MRAM := nordic,mram + +config DT_HAS_NORDIC_MRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_MRAM)) + +DT_COMPAT_NORDIC_NPM10XX := nordic,npm10xx + +config DT_HAS_NORDIC_NPM10XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM10XX)) + +DT_COMPAT_NORDIC_NPM10XX_ADC := nordic,npm10xx-adc + +config DT_HAS_NORDIC_NPM10XX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM10XX_ADC)) + +DT_COMPAT_NORDIC_NPM10XX_CHARGER := nordic,npm10xx-charger + +config DT_HAS_NORDIC_NPM10XX_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM10XX_CHARGER)) + +DT_COMPAT_NORDIC_NPM10XX_GPIO := nordic,npm10xx-gpio + +config DT_HAS_NORDIC_NPM10XX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM10XX_GPIO)) + +DT_COMPAT_NORDIC_NPM10XX_REGULATOR := nordic,npm10xx-regulator + +config DT_HAS_NORDIC_NPM10XX_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM10XX_REGULATOR)) + +DT_COMPAT_NORDIC_NPM1100 := nordic,npm1100 + +config DT_HAS_NORDIC_NPM1100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1100)) + +DT_COMPAT_NORDIC_NPM1300 := nordic,npm1300 + +config DT_HAS_NORDIC_NPM1300_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1300)) + +DT_COMPAT_NORDIC_NPM1300_CHARGER := nordic,npm1300-charger + +config DT_HAS_NORDIC_NPM1300_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1300_CHARGER)) + +DT_COMPAT_NORDIC_NPM1300_GPIO := nordic,npm1300-gpio + +config DT_HAS_NORDIC_NPM1300_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1300_GPIO)) + +DT_COMPAT_NORDIC_NPM1300_LED := nordic,npm1300-led + +config DT_HAS_NORDIC_NPM1300_LED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1300_LED)) + +DT_COMPAT_NORDIC_NPM1300_REGULATOR := nordic,npm1300-regulator + +config DT_HAS_NORDIC_NPM1300_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1300_REGULATOR)) + +DT_COMPAT_NORDIC_NPM1300_WDT := nordic,npm1300-wdt + +config DT_HAS_NORDIC_NPM1300_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1300_WDT)) + +DT_COMPAT_NORDIC_NPM1304 := nordic,npm1304 + +config DT_HAS_NORDIC_NPM1304_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1304)) + +DT_COMPAT_NORDIC_NPM1304_CHARGER := nordic,npm1304-charger + +config DT_HAS_NORDIC_NPM1304_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1304_CHARGER)) + +DT_COMPAT_NORDIC_NPM1304_GPIO := nordic,npm1304-gpio + +config DT_HAS_NORDIC_NPM1304_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1304_GPIO)) + +DT_COMPAT_NORDIC_NPM1304_LED := nordic,npm1304-led + +config DT_HAS_NORDIC_NPM1304_LED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1304_LED)) + +DT_COMPAT_NORDIC_NPM1304_REGULATOR := nordic,npm1304-regulator + +config DT_HAS_NORDIC_NPM1304_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1304_REGULATOR)) + +DT_COMPAT_NORDIC_NPM1304_WDT := nordic,npm1304-wdt + +config DT_HAS_NORDIC_NPM1304_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM1304_WDT)) + +DT_COMPAT_NORDIC_NPM2100 := nordic,npm2100 + +config DT_HAS_NORDIC_NPM2100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM2100)) + +DT_COMPAT_NORDIC_NPM2100_GPIO := nordic,npm2100-gpio + +config DT_HAS_NORDIC_NPM2100_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM2100_GPIO)) + +DT_COMPAT_NORDIC_NPM2100_REGULATOR := nordic,npm2100-regulator + +config DT_HAS_NORDIC_NPM2100_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM2100_REGULATOR)) + +DT_COMPAT_NORDIC_NPM2100_VBAT := nordic,npm2100-vbat + +config DT_HAS_NORDIC_NPM2100_VBAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM2100_VBAT)) + +DT_COMPAT_NORDIC_NPM2100_WDT := nordic,npm2100-wdt + +config DT_HAS_NORDIC_NPM2100_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM2100_WDT)) + +DT_COMPAT_NORDIC_NPM6001 := nordic,npm6001 + +config DT_HAS_NORDIC_NPM6001_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM6001)) + +DT_COMPAT_NORDIC_NPM6001_GPIO := nordic,npm6001-gpio + +config DT_HAS_NORDIC_NPM6001_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM6001_GPIO)) + +DT_COMPAT_NORDIC_NPM6001_REGULATOR := nordic,npm6001-regulator + +config DT_HAS_NORDIC_NPM6001_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM6001_REGULATOR)) + +DT_COMPAT_NORDIC_NPM6001_WDT := nordic,npm6001-wdt + +config DT_HAS_NORDIC_NPM6001_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NPM6001_WDT)) + +DT_COMPAT_NORDIC_NRF_ACL := nordic,nrf-acl + +config DT_HAS_NORDIC_NRF_ACL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_ACL)) + +DT_COMPAT_NORDIC_NRF_ADC := nordic,nrf-adc + +config DT_HAS_NORDIC_NRF_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_ADC)) + +DT_COMPAT_NORDIC_NRF_AUXPLL := nordic,nrf-auxpll + +config DT_HAS_NORDIC_NRF_AUXPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_AUXPLL)) + +DT_COMPAT_NORDIC_NRF_BELLBOARD_RX := nordic,nrf-bellboard-rx + +config DT_HAS_NORDIC_NRF_BELLBOARD_RX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_BELLBOARD_RX)) + +DT_COMPAT_NORDIC_NRF_BELLBOARD_TX := nordic,nrf-bellboard-tx + +config DT_HAS_NORDIC_NRF_BELLBOARD_TX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_BELLBOARD_TX)) + +DT_COMPAT_NORDIC_NRF_BICR := nordic,nrf-bicr + +config DT_HAS_NORDIC_NRF_BICR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_BICR)) + +DT_COMPAT_NORDIC_NRF_BPROT := nordic,nrf-bprot + +config DT_HAS_NORDIC_NRF_BPROT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_BPROT)) + +DT_COMPAT_NORDIC_NRF_CAN := nordic,nrf-can + +config DT_HAS_NORDIC_NRF_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CAN)) + +DT_COMPAT_NORDIC_NRF_CCM := nordic,nrf-ccm + +config DT_HAS_NORDIC_NRF_CCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CCM)) + +DT_COMPAT_NORDIC_NRF_CLIC := nordic,nrf-clic + +config DT_HAS_NORDIC_NRF_CLIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CLIC)) + +DT_COMPAT_NORDIC_NRF_CLOCK := nordic,nrf-clock + +config DT_HAS_NORDIC_NRF_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CLOCK)) + +DT_COMPAT_NORDIC_NRF_COMP := nordic,nrf-comp + +config DT_HAS_NORDIC_NRF_COMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_COMP)) + +DT_COMPAT_NORDIC_NRF_CRACEN_CTRDRBG := nordic,nrf-cracen-ctrdrbg + +config DT_HAS_NORDIC_NRF_CRACEN_CTRDRBG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CRACEN_CTRDRBG)) + +DT_COMPAT_NORDIC_NRF_CTRLAPPERI := nordic,nrf-ctrlapperi + +config DT_HAS_NORDIC_NRF_CTRLAPPERI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CTRLAPPERI)) + +DT_COMPAT_NORDIC_NRF_DCNF := nordic,nrf-dcnf + +config DT_HAS_NORDIC_NRF_DCNF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_DCNF)) + +DT_COMPAT_NORDIC_NRF_DPPIC := nordic,nrf-dppic + +config DT_HAS_NORDIC_NRF_DPPIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_DPPIC)) + +DT_COMPAT_NORDIC_NRF_DPPIC_GLOBAL := nordic,nrf-dppic-global + +config DT_HAS_NORDIC_NRF_DPPIC_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_DPPIC_GLOBAL)) + +DT_COMPAT_NORDIC_NRF_DPPIC_LOCAL := nordic,nrf-dppic-local + +config DT_HAS_NORDIC_NRF_DPPIC_LOCAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_DPPIC_LOCAL)) + +DT_COMPAT_NORDIC_NRF_ECB := nordic,nrf-ecb + +config DT_HAS_NORDIC_NRF_ECB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_ECB)) + +DT_COMPAT_NORDIC_NRF_EGU := nordic,nrf-egu + +config DT_HAS_NORDIC_NRF_EGU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_EGU)) + +DT_COMPAT_NORDIC_NRF_EXMIF := nordic,nrf-exmif + +config DT_HAS_NORDIC_NRF_EXMIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_EXMIF)) + +DT_COMPAT_NORDIC_NRF_FICR := nordic,nrf-ficr + +config DT_HAS_NORDIC_NRF_FICR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_FICR)) + +DT_COMPAT_NORDIC_NRF_FLL16M := nordic,nrf-fll16m + +config DT_HAS_NORDIC_NRF_FLL16M_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_FLL16M)) + +DT_COMPAT_NORDIC_NRF_GPIO := nordic,nrf-gpio + +config DT_HAS_NORDIC_NRF_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GPIO)) + +DT_COMPAT_NORDIC_NRF_GPIO_FORWARDER := nordic,nrf-gpio-forwarder + +config DT_HAS_NORDIC_NRF_GPIO_FORWARDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GPIO_FORWARDER)) + +DT_COMPAT_NORDIC_NRF_GPIOTE := nordic,nrf-gpiote + +config DT_HAS_NORDIC_NRF_GPIOTE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GPIOTE)) + +DT_COMPAT_NORDIC_NRF_GPREGRET := nordic,nrf-gpregret + +config DT_HAS_NORDIC_NRF_GPREGRET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GPREGRET)) + +DT_COMPAT_NORDIC_NRF_GRTC := nordic,nrf-grtc + +config DT_HAS_NORDIC_NRF_GRTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GRTC)) + +DT_COMPAT_NORDIC_NRF_HSFLL_GLOBAL := nordic,nrf-hsfll-global + +config DT_HAS_NORDIC_NRF_HSFLL_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_HSFLL_GLOBAL)) + +DT_COMPAT_NORDIC_NRF_HSFLL_LOCAL := nordic,nrf-hsfll-local + +config DT_HAS_NORDIC_NRF_HSFLL_LOCAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_HSFLL_LOCAL)) + +DT_COMPAT_NORDIC_NRF_I2S := nordic,nrf-i2s + +config DT_HAS_NORDIC_NRF_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_I2S)) + +DT_COMPAT_NORDIC_NRF_IEEE802154 := nordic,nrf-ieee802154 + +config DT_HAS_NORDIC_NRF_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_IEEE802154)) + +DT_COMPAT_NORDIC_NRF_IPC := nordic,nrf-ipc + +config DT_HAS_NORDIC_NRF_IPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_IPC)) + +DT_COMPAT_NORDIC_NRF_IPCT_GLOBAL := nordic,nrf-ipct-global + +config DT_HAS_NORDIC_NRF_IPCT_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_IPCT_GLOBAL)) + +DT_COMPAT_NORDIC_NRF_IPCT_LOCAL := nordic,nrf-ipct-local + +config DT_HAS_NORDIC_NRF_IPCT_LOCAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_IPCT_LOCAL)) + +DT_COMPAT_NORDIC_NRF_IRON_HSFLL_LOCAL := nordic,nrf-iron-hsfll-local + +config DT_HAS_NORDIC_NRF_IRON_HSFLL_LOCAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_IRON_HSFLL_LOCAL)) + +DT_COMPAT_NORDIC_NRF_KMU := nordic,nrf-kmu + +config DT_HAS_NORDIC_NRF_KMU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_KMU)) + +DT_COMPAT_NORDIC_NRF_LED_MATRIX := nordic,nrf-led-matrix + +config DT_HAS_NORDIC_NRF_LED_MATRIX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_LED_MATRIX)) + +DT_COMPAT_NORDIC_NRF_LFCLK := nordic,nrf-lfclk + +config DT_HAS_NORDIC_NRF_LFCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_LFCLK)) + +DT_COMPAT_NORDIC_NRF_LPCOMP := nordic,nrf-lpcomp + +config DT_HAS_NORDIC_NRF_LPCOMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_LPCOMP)) + +DT_COMPAT_NORDIC_NRF_MPC := nordic,nrf-mpc + +config DT_HAS_NORDIC_NRF_MPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_MPC)) + +DT_COMPAT_NORDIC_NRF_MPU := nordic,nrf-mpu + +config DT_HAS_NORDIC_NRF_MPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_MPU)) + +DT_COMPAT_NORDIC_NRF_MRAMC := nordic,nrf-mramc + +config DT_HAS_NORDIC_NRF_MRAMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_MRAMC)) + +DT_COMPAT_NORDIC_NRF_MSPI := nordic,nrf-mspi + +config DT_HAS_NORDIC_NRF_MSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_MSPI)) + +DT_COMPAT_NORDIC_NRF_MUTEX := nordic,nrf-mutex + +config DT_HAS_NORDIC_NRF_MUTEX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_MUTEX)) + +DT_COMPAT_NORDIC_NRF_MWU := nordic,nrf-mwu + +config DT_HAS_NORDIC_NRF_MWU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_MWU)) + +DT_COMPAT_NORDIC_NRF_NFCT := nordic,nrf-nfct + +config DT_HAS_NORDIC_NRF_NFCT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_NFCT)) + +DT_COMPAT_NORDIC_NRF_NFCT_V2 := nordic,nrf-nfct-v2 + +config DT_HAS_NORDIC_NRF_NFCT_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_NFCT_V2)) + +DT_COMPAT_NORDIC_NRF_PDM := nordic,nrf-pdm + +config DT_HAS_NORDIC_NRF_PDM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PDM)) + +DT_COMPAT_NORDIC_NRF_PINCTRL := nordic,nrf-pinctrl + +config DT_HAS_NORDIC_NRF_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PINCTRL)) + +DT_COMPAT_NORDIC_NRF_POWER := nordic,nrf-power + +config DT_HAS_NORDIC_NRF_POWER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_POWER)) + +DT_COMPAT_NORDIC_NRF_PPI := nordic,nrf-ppi + +config DT_HAS_NORDIC_NRF_PPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PPI)) + +DT_COMPAT_NORDIC_NRF_PPIB := nordic,nrf-ppib + +config DT_HAS_NORDIC_NRF_PPIB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PPIB)) + +DT_COMPAT_NORDIC_NRF_PWM := nordic,nrf-pwm + +config DT_HAS_NORDIC_NRF_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PWM)) + +DT_COMPAT_NORDIC_NRF_PWR_ANTSWC := nordic,nrf-pwr-antswc + +config DT_HAS_NORDIC_NRF_PWR_ANTSWC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PWR_ANTSWC)) + +DT_COMPAT_NORDIC_NRF_QDEC := nordic,nrf-qdec + +config DT_HAS_NORDIC_NRF_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_QDEC)) + +DT_COMPAT_NORDIC_NRF_QSPI := nordic,nrf-qspi + +config DT_HAS_NORDIC_NRF_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_QSPI)) + +DT_COMPAT_NORDIC_NRF_RADIO := nordic,nrf-radio + +config DT_HAS_NORDIC_NRF_RADIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_RADIO)) + +DT_COMPAT_NORDIC_NRF_RESET := nordic,nrf-reset + +config DT_HAS_NORDIC_NRF_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_RESET)) + +DT_COMPAT_NORDIC_NRF_RESETINFO := nordic,nrf-resetinfo + +config DT_HAS_NORDIC_NRF_RESETINFO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_RESETINFO)) + +DT_COMPAT_NORDIC_NRF_RNG := nordic,nrf-rng + +config DT_HAS_NORDIC_NRF_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_RNG)) + +DT_COMPAT_NORDIC_NRF_RTC := nordic,nrf-rtc + +config DT_HAS_NORDIC_NRF_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_RTC)) + +DT_COMPAT_NORDIC_NRF_SAADC := nordic,nrf-saadc + +config DT_HAS_NORDIC_NRF_SAADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SAADC)) + +DT_COMPAT_NORDIC_NRF_SPI := nordic,nrf-spi + +config DT_HAS_NORDIC_NRF_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SPI)) + +DT_COMPAT_NORDIC_NRF_SPIM := nordic,nrf-spim + +config DT_HAS_NORDIC_NRF_SPIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SPIM)) + +DT_COMPAT_NORDIC_NRF_SPIS := nordic,nrf-spis + +config DT_HAS_NORDIC_NRF_SPIS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SPIS)) + +DT_COMPAT_NORDIC_NRF_SPU := nordic,nrf-spu + +config DT_HAS_NORDIC_NRF_SPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SPU)) + +DT_COMPAT_NORDIC_NRF_SW_PWM := nordic,nrf-sw-pwm + +config DT_HAS_NORDIC_NRF_SW_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SW_PWM)) + +DT_COMPAT_NORDIC_NRF_SWI := nordic,nrf-swi + +config DT_HAS_NORDIC_NRF_SWI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SWI)) + +DT_COMPAT_NORDIC_NRF_TAMPC := nordic,nrf-tampc + +config DT_HAS_NORDIC_NRF_TAMPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TAMPC)) + +DT_COMPAT_NORDIC_NRF_TBM := nordic,nrf-tbm + +config DT_HAS_NORDIC_NRF_TBM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TBM)) + +DT_COMPAT_NORDIC_NRF_TDM := nordic,nrf-tdm + +config DT_HAS_NORDIC_NRF_TDM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TDM)) + +DT_COMPAT_NORDIC_NRF_TEMP := nordic,nrf-temp + +config DT_HAS_NORDIC_NRF_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TEMP)) + +DT_COMPAT_NORDIC_NRF_TEMP_NRFS := nordic,nrf-temp-nrfs + +config DT_HAS_NORDIC_NRF_TEMP_NRFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TEMP_NRFS)) + +DT_COMPAT_NORDIC_NRF_TIMER := nordic,nrf-timer + +config DT_HAS_NORDIC_NRF_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TIMER)) + +DT_COMPAT_NORDIC_NRF_TWI := nordic,nrf-twi + +config DT_HAS_NORDIC_NRF_TWI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TWI)) + +DT_COMPAT_NORDIC_NRF_TWIM := nordic,nrf-twim + +config DT_HAS_NORDIC_NRF_TWIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TWIM)) + +DT_COMPAT_NORDIC_NRF_TWIS := nordic,nrf-twis + +config DT_HAS_NORDIC_NRF_TWIS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_TWIS)) + +DT_COMPAT_NORDIC_NRF_UART := nordic,nrf-uart + +config DT_HAS_NORDIC_NRF_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_UART)) + +DT_COMPAT_NORDIC_NRF_UARTE := nordic,nrf-uarte + +config DT_HAS_NORDIC_NRF_UARTE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_UARTE)) + +DT_COMPAT_NORDIC_NRF_UICR := nordic,nrf-uicr + +config DT_HAS_NORDIC_NRF_UICR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_UICR)) + +DT_COMPAT_NORDIC_NRF_USBD := nordic,nrf-usbd + +config DT_HAS_NORDIC_NRF_USBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_USBD)) + +DT_COMPAT_NORDIC_NRF_USBHS_WRAPPER := nordic,nrf-usbhs-wrapper + +config DT_HAS_NORDIC_NRF_USBHS_WRAPPER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_USBHS_WRAPPER)) + +DT_COMPAT_NORDIC_NRF_USBREG := nordic,nrf-usbreg + +config DT_HAS_NORDIC_NRF_USBREG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_USBREG)) + +DT_COMPAT_NORDIC_NRF_VBAT := nordic,nrf-vbat + +config DT_HAS_NORDIC_NRF_VBAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VBAT)) + +DT_COMPAT_NORDIC_NRF_VEVIF_EVENT_RX := nordic,nrf-vevif-event-rx + +config DT_HAS_NORDIC_NRF_VEVIF_EVENT_RX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VEVIF_EVENT_RX)) + +DT_COMPAT_NORDIC_NRF_VEVIF_EVENT_TX := nordic,nrf-vevif-event-tx + +config DT_HAS_NORDIC_NRF_VEVIF_EVENT_TX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VEVIF_EVENT_TX)) + +DT_COMPAT_NORDIC_NRF_VEVIF_TASK_RX := nordic,nrf-vevif-task-rx + +config DT_HAS_NORDIC_NRF_VEVIF_TASK_RX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VEVIF_TASK_RX)) + +DT_COMPAT_NORDIC_NRF_VEVIF_TASK_TX := nordic,nrf-vevif-task-tx + +config DT_HAS_NORDIC_NRF_VEVIF_TASK_TX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VEVIF_TASK_TX)) + +DT_COMPAT_NORDIC_NRF_VMC := nordic,nrf-vmc + +config DT_HAS_NORDIC_NRF_VMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VMC)) + +DT_COMPAT_NORDIC_NRF_VPR_COPROCESSOR := nordic,nrf-vpr-coprocessor + +config DT_HAS_NORDIC_NRF_VPR_COPROCESSOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VPR_COPROCESSOR)) + +DT_COMPAT_NORDIC_NRF_WDT := nordic,nrf-wdt + +config DT_HAS_NORDIC_NRF_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_WDT)) + +DT_COMPAT_NORDIC_NRF21540_FEM := nordic,nrf21540-fem + +config DT_HAS_NORDIC_NRF21540_FEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF21540_FEM)) + +DT_COMPAT_NORDIC_NRF21540_FEM_SPI := nordic,nrf21540-fem-spi + +config DT_HAS_NORDIC_NRF21540_FEM_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF21540_FEM_SPI)) + +DT_COMPAT_NORDIC_NRF51_FLASH_CONTROLLER := nordic,nrf51-flash-controller + +config DT_HAS_NORDIC_NRF51_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF51_FLASH_CONTROLLER)) + +DT_COMPAT_NORDIC_NRF51_HFXO := nordic,nrf51-hfxo + +config DT_HAS_NORDIC_NRF51_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF51_HFXO)) + +DT_COMPAT_NORDIC_NRF52_FLASH_CONTROLLER := nordic,nrf52-flash-controller + +config DT_HAS_NORDIC_NRF52_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF52_FLASH_CONTROLLER)) + +DT_COMPAT_NORDIC_NRF52_HFXO := nordic,nrf52-hfxo + +config DT_HAS_NORDIC_NRF52_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF52_HFXO)) + +DT_COMPAT_NORDIC_NRF52X_REGULATOR_HV := nordic,nrf52x-regulator-hv + +config DT_HAS_NORDIC_NRF52X_REGULATOR_HV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF52X_REGULATOR_HV)) + +DT_COMPAT_NORDIC_NRF53_FLASH_CONTROLLER := nordic,nrf53-flash-controller + +config DT_HAS_NORDIC_NRF53_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF53_FLASH_CONTROLLER)) + +DT_COMPAT_NORDIC_NRF53_HFXO := nordic,nrf53-hfxo + +config DT_HAS_NORDIC_NRF53_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF53_HFXO)) + +DT_COMPAT_NORDIC_NRF53_LFXO := nordic,nrf53-lfxo + +config DT_HAS_NORDIC_NRF53_LFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF53_LFXO)) + +DT_COMPAT_NORDIC_NRF53_OSCILLATORS := nordic,nrf53-oscillators + +config DT_HAS_NORDIC_NRF53_OSCILLATORS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF53_OSCILLATORS)) + +DT_COMPAT_NORDIC_NRF53X_REGULATOR_HV := nordic,nrf53x-regulator-hv + +config DT_HAS_NORDIC_NRF53X_REGULATOR_HV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF53X_REGULATOR_HV)) + +DT_COMPAT_NORDIC_NRF53X_REGULATORS := nordic,nrf53x-regulators + +config DT_HAS_NORDIC_NRF53X_REGULATORS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF53X_REGULATORS)) + +DT_COMPAT_NORDIC_NRF54H_HFXO := nordic,nrf54h-hfxo + +config DT_HAS_NORDIC_NRF54H_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF54H_HFXO)) + +DT_COMPAT_NORDIC_NRF54H_LFXO := nordic,nrf54h-lfxo + +config DT_HAS_NORDIC_NRF54H_LFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF54H_LFXO)) + +DT_COMPAT_NORDIC_NRF54L_HFXO := nordic,nrf54l-hfxo + +config DT_HAS_NORDIC_NRF54L_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF54L_HFXO)) + +DT_COMPAT_NORDIC_NRF54L_LFXO := nordic,nrf54l-lfxo + +config DT_HAS_NORDIC_NRF54L_LFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF54L_LFXO)) + +DT_COMPAT_NORDIC_NRF54L_REGULATORS := nordic,nrf54l-regulators + +config DT_HAS_NORDIC_NRF54L_REGULATORS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF54L_REGULATORS)) + +DT_COMPAT_NORDIC_NRF5X_REGULATOR := nordic,nrf5x-regulator + +config DT_HAS_NORDIC_NRF5X_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF5X_REGULATOR)) + +DT_COMPAT_NORDIC_NRF7000_COEX := nordic,nrf7000-coex + +config DT_HAS_NORDIC_NRF7000_COEX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7000_COEX)) + +DT_COMPAT_NORDIC_NRF7000_QSPI := nordic,nrf7000-qspi + +config DT_HAS_NORDIC_NRF7000_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7000_QSPI)) + +DT_COMPAT_NORDIC_NRF7000_SPI := nordic,nrf7000-spi + +config DT_HAS_NORDIC_NRF7000_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7000_SPI)) + +DT_COMPAT_NORDIC_NRF7001_COEX := nordic,nrf7001-coex + +config DT_HAS_NORDIC_NRF7001_COEX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7001_COEX)) + +DT_COMPAT_NORDIC_NRF7001_QSPI := nordic,nrf7001-qspi + +config DT_HAS_NORDIC_NRF7001_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7001_QSPI)) + +DT_COMPAT_NORDIC_NRF7001_SPI := nordic,nrf7001-spi + +config DT_HAS_NORDIC_NRF7001_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7001_SPI)) + +DT_COMPAT_NORDIC_NRF7002_COEX := nordic,nrf7002-coex + +config DT_HAS_NORDIC_NRF7002_COEX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7002_COEX)) + +DT_COMPAT_NORDIC_NRF7002_QSPI := nordic,nrf7002-qspi + +config DT_HAS_NORDIC_NRF7002_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7002_QSPI)) + +DT_COMPAT_NORDIC_NRF7002_SPI := nordic,nrf7002-spi + +config DT_HAS_NORDIC_NRF7002_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7002_SPI)) + +DT_COMPAT_NORDIC_NRF71_HFXO := nordic,nrf71-hfxo + +config DT_HAS_NORDIC_NRF71_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF71_HFXO)) + +DT_COMPAT_NORDIC_NRF71_LFXO := nordic,nrf71-lfxo + +config DT_HAS_NORDIC_NRF71_LFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF71_LFXO)) + +DT_COMPAT_NORDIC_NRF71_UICR := nordic,nrf71-uicr + +config DT_HAS_NORDIC_NRF71_UICR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF71_UICR)) + +DT_COMPAT_NORDIC_NRF7120_WIFI := nordic,nrf7120-wifi + +config DT_HAS_NORDIC_NRF7120_WIFI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF7120_WIFI)) + +DT_COMPAT_NORDIC_NRF91_FLASH_CONTROLLER := nordic,nrf91-flash-controller + +config DT_HAS_NORDIC_NRF91_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF91_FLASH_CONTROLLER)) + +DT_COMPAT_NORDIC_NRF91_SLM := nordic,nrf91-slm + +config DT_HAS_NORDIC_NRF91_SLM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF91_SLM)) + +DT_COMPAT_NORDIC_NRF91X_REGULATORS := nordic,nrf91x-regulators + +config DT_HAS_NORDIC_NRF91X_REGULATORS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF91X_REGULATORS)) + +DT_COMPAT_NORDIC_NRFS_AUDIOPLL := nordic,nrfs-audiopll + +config DT_HAS_NORDIC_NRFS_AUDIOPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRFS_AUDIOPLL)) + +DT_COMPAT_NORDIC_NRFS_GDPWR := nordic,nrfs-gdpwr + +config DT_HAS_NORDIC_NRFS_GDPWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRFS_GDPWR)) + +DT_COMPAT_NORDIC_NRFS_SWEXT := nordic,nrfs-swext + +config DT_HAS_NORDIC_NRFS_SWEXT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRFS_SWEXT)) + +DT_COMPAT_NORDIC_OWNED_MEMORY := nordic,owned-memory + +config DT_HAS_NORDIC_OWNED_MEMORY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_OWNED_MEMORY)) + +DT_COMPAT_NORDIC_OWNED_PARTITIONS := nordic,owned-partitions + +config DT_HAS_NORDIC_OWNED_PARTITIONS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_OWNED_PARTITIONS)) + +DT_COMPAT_NORDIC_QSPI_NOR := nordic,qspi-nor + +config DT_HAS_NORDIC_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_QSPI_NOR)) + +DT_COMPAT_NORDIC_RRAM_CONTROLLER := nordic,rram-controller + +config DT_HAS_NORDIC_RRAM_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_RRAM_CONTROLLER)) + +DT_COMPAT_NORDIC_VPR := nordic,vpr + +config DT_HAS_NORDIC_VPR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_VPR)) + +DT_COMPAT_NORDIC_VREGUSB_REGULATOR := nordic,vregusb-regulator + +config DT_HAS_NORDIC_VREGUSB_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_VREGUSB_REGULATOR)) + +DT_COMPAT_NORDIC_WLAN := nordic,wlan + +config DT_HAS_NORDIC_WLAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_WLAN)) + +DT_COMPAT_NORDIC_THINGY53_EDGE_CONNECTOR := nordic-thingy53-edge-connector + +config DT_HAS_NORDIC_THINGY53_EDGE_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_THINGY53_EDGE_CONNECTOR)) + +DT_COMPAT_NORITAKE_ITRON := noritake,itron + +config DT_HAS_NORITAKE_ITRON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NORITAKE_ITRON)) + +DT_COMPAT_NS16550 := ns16550 + +config DT_HAS_NS16550_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NS16550)) + +DT_COMPAT_NTC_THERMISTOR_GENERIC := ntc-thermistor-generic + +config DT_HAS_NTC_THERMISTOR_GENERIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NTC_THERMISTOR_GENERIC)) + +DT_COMPAT_NUCLEI_BUMBLEBEE := nuclei,bumblebee + +config DT_HAS_NUCLEI_BUMBLEBEE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUCLEI_BUMBLEBEE)) + +DT_COMPAT_NUCLEI_ECLIC := nuclei,eclic + +config DT_HAS_NUCLEI_ECLIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUCLEI_ECLIC)) + +DT_COMPAT_NUCLEI_SYSTIMER := nuclei,systimer + +config DT_HAS_NUCLEI_SYSTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUCLEI_SYSTIMER)) + +DT_COMPAT_NUVOTON_ADC_CMP := nuvoton,adc-cmp + +config DT_HAS_NUVOTON_ADC_CMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_ADC_CMP)) + +DT_COMPAT_NUVOTON_M4_HCLK_CLOCK := nuvoton,m4-hclk-clock + +config DT_HAS_NUVOTON_M4_HCLK_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_M4_HCLK_CLOCK)) + +DT_COMPAT_NUVOTON_M4_HXT_CLOCK := nuvoton,m4-hxt-clock + +config DT_HAS_NUVOTON_M4_HXT_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_M4_HXT_CLOCK)) + +DT_COMPAT_NUVOTON_M4_LXT_CLOCK := nuvoton,m4-lxt-clock + +config DT_HAS_NUVOTON_M4_LXT_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_M4_LXT_CLOCK)) + +DT_COMPAT_NUVOTON_M4_PLL_CLOCK := nuvoton,m4-pll-clock + +config DT_HAS_NUVOTON_M4_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_M4_PLL_CLOCK)) + +DT_COMPAT_NUVOTON_NCT38XX := nuvoton,nct38xx + +config DT_HAS_NUVOTON_NCT38XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NCT38XX)) + +DT_COMPAT_NUVOTON_NCT38XX_GPIO := nuvoton,nct38xx-gpio + +config DT_HAS_NUVOTON_NCT38XX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NCT38XX_GPIO)) + +DT_COMPAT_NUVOTON_NCT38XX_GPIO_ALERT := nuvoton,nct38xx-gpio-alert + +config DT_HAS_NUVOTON_NCT38XX_GPIO_ALERT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NCT38XX_GPIO_ALERT)) + +DT_COMPAT_NUVOTON_NCT38XX_GPIO_PORT := nuvoton,nct38xx-gpio-port + +config DT_HAS_NUVOTON_NCT38XX_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NCT38XX_GPIO_PORT)) + +DT_COMPAT_NUVOTON_NPCK_LCT := nuvoton,npck-lct + +config DT_HAS_NUVOTON_NPCK_LCT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCK_LCT)) + +DT_COMPAT_NUVOTON_NPCM_PCC := nuvoton,npcm-pcc + +config DT_HAS_NUVOTON_NPCM_PCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCM_PCC)) + +DT_COMPAT_NUVOTON_NPCX_ADC := nuvoton,npcx-adc + +config DT_HAS_NUVOTON_NPCX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_ADC)) + +DT_COMPAT_NUVOTON_NPCX_ADC_V2T := nuvoton,npcx-adc-v2t + +config DT_HAS_NUVOTON_NPCX_ADC_V2T_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_ADC_V2T)) + +DT_COMPAT_NUVOTON_NPCX_BBRAM := nuvoton,npcx-bbram + +config DT_HAS_NUVOTON_NPCX_BBRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_BBRAM)) + +DT_COMPAT_NUVOTON_NPCX_BOOTER_VARIANT := nuvoton,npcx-booter-variant + +config DT_HAS_NUVOTON_NPCX_BOOTER_VARIANT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_BOOTER_VARIANT)) + +DT_COMPAT_NUVOTON_NPCX_DRBG := nuvoton,npcx-drbg + +config DT_HAS_NUVOTON_NPCX_DRBG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_DRBG)) + +DT_COMPAT_NUVOTON_NPCX_ESPI := nuvoton,npcx-espi + +config DT_HAS_NUVOTON_NPCX_ESPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_ESPI)) + +DT_COMPAT_NUVOTON_NPCX_ESPI_TAF := nuvoton,npcx-espi-taf + +config DT_HAS_NUVOTON_NPCX_ESPI_TAF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_ESPI_TAF)) + +DT_COMPAT_NUVOTON_NPCX_ESPI_VW_CONF := nuvoton,npcx-espi-vw-conf + +config DT_HAS_NUVOTON_NPCX_ESPI_VW_CONF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_ESPI_VW_CONF)) + +DT_COMPAT_NUVOTON_NPCX_FIU_NOR := nuvoton,npcx-fiu-nor + +config DT_HAS_NUVOTON_NPCX_FIU_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_FIU_NOR)) + +DT_COMPAT_NUVOTON_NPCX_FIU_QSPI := nuvoton,npcx-fiu-qspi + +config DT_HAS_NUVOTON_NPCX_FIU_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_FIU_QSPI)) + +DT_COMPAT_NUVOTON_NPCX_GDMA := nuvoton,npcx-gdma + +config DT_HAS_NUVOTON_NPCX_GDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_GDMA)) + +DT_COMPAT_NUVOTON_NPCX_GPIO := nuvoton,npcx-gpio + +config DT_HAS_NUVOTON_NPCX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_GPIO)) + +DT_COMPAT_NUVOTON_NPCX_HOST_SUB := nuvoton,npcx-host-sub + +config DT_HAS_NUVOTON_NPCX_HOST_SUB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_HOST_SUB)) + +DT_COMPAT_NUVOTON_NPCX_HOST_UART := nuvoton,npcx-host-uart + +config DT_HAS_NUVOTON_NPCX_HOST_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_HOST_UART)) + +DT_COMPAT_NUVOTON_NPCX_I2C_CTRL := nuvoton,npcx-i2c-ctrl + +config DT_HAS_NUVOTON_NPCX_I2C_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_I2C_CTRL)) + +DT_COMPAT_NUVOTON_NPCX_I2C_PORT := nuvoton,npcx-i2c-port + +config DT_HAS_NUVOTON_NPCX_I2C_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_I2C_PORT)) + +DT_COMPAT_NUVOTON_NPCX_I3C := nuvoton,npcx-i3c + +config DT_HAS_NUVOTON_NPCX_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_I3C)) + +DT_COMPAT_NUVOTON_NPCX_ITIM_TIMER := nuvoton,npcx-itim-timer + +config DT_HAS_NUVOTON_NPCX_ITIM_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_ITIM_TIMER)) + +DT_COMPAT_NUVOTON_NPCX_KBD := nuvoton,npcx-kbd + +config DT_HAS_NUVOTON_NPCX_KBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_KBD)) + +DT_COMPAT_NUVOTON_NPCX_LCT_BASE := nuvoton,npcx-lct-base + +config DT_HAS_NUVOTON_NPCX_LCT_BASE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_LCT_BASE)) + +DT_COMPAT_NUVOTON_NPCX_LCT_V1 := nuvoton,npcx-lct-v1 + +config DT_HAS_NUVOTON_NPCX_LCT_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_LCT_V1)) + +DT_COMPAT_NUVOTON_NPCX_LCT_V2 := nuvoton,npcx-lct-v2 + +config DT_HAS_NUVOTON_NPCX_LCT_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_LCT_V2)) + +DT_COMPAT_NUVOTON_NPCX_LEAKAGE_IO := nuvoton,npcx-leakage-io + +config DT_HAS_NUVOTON_NPCX_LEAKAGE_IO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_LEAKAGE_IO)) + +DT_COMPAT_NUVOTON_NPCX_LVOLCTRL_CONF := nuvoton,npcx-lvolctrl-conf + +config DT_HAS_NUVOTON_NPCX_LVOLCTRL_CONF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_LVOLCTRL_CONF)) + +DT_COMPAT_NUVOTON_NPCX_MIWU := nuvoton,npcx-miwu + +config DT_HAS_NUVOTON_NPCX_MIWU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_MIWU)) + +DT_COMPAT_NUVOTON_NPCX_MIWU_INT_MAP := nuvoton,npcx-miwu-int-map + +config DT_HAS_NUVOTON_NPCX_MIWU_INT_MAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_MIWU_INT_MAP)) + +DT_COMPAT_NUVOTON_NPCX_MIWU_WUI_MAP := nuvoton,npcx-miwu-wui-map + +config DT_HAS_NUVOTON_NPCX_MIWU_WUI_MAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_MIWU_WUI_MAP)) + +DT_COMPAT_NUVOTON_NPCX_PCC := nuvoton,npcx-pcc + +config DT_HAS_NUVOTON_NPCX_PCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PCC)) + +DT_COMPAT_NUVOTON_NPCX_PECI := nuvoton,npcx-peci + +config DT_HAS_NUVOTON_NPCX_PECI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PECI)) + +DT_COMPAT_NUVOTON_NPCX_PINCTRL := nuvoton,npcx-pinctrl + +config DT_HAS_NUVOTON_NPCX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PINCTRL)) + +DT_COMPAT_NUVOTON_NPCX_PINCTRL_CONF := nuvoton,npcx-pinctrl-conf + +config DT_HAS_NUVOTON_NPCX_PINCTRL_CONF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PINCTRL_CONF)) + +DT_COMPAT_NUVOTON_NPCX_PINCTRL_DEF := nuvoton,npcx-pinctrl-def + +config DT_HAS_NUVOTON_NPCX_PINCTRL_DEF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PINCTRL_DEF)) + +DT_COMPAT_NUVOTON_NPCX_PINCTRL_NPCKN := nuvoton,npcx-pinctrl-npckn + +config DT_HAS_NUVOTON_NPCX_PINCTRL_NPCKN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PINCTRL_NPCKN)) + +DT_COMPAT_NUVOTON_NPCX_POWER_PSL := nuvoton,npcx-power-psl + +config DT_HAS_NUVOTON_NPCX_POWER_PSL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_POWER_PSL)) + +DT_COMPAT_NUVOTON_NPCX_PS2_CHANNEL := nuvoton,npcx-ps2-channel + +config DT_HAS_NUVOTON_NPCX_PS2_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PS2_CHANNEL)) + +DT_COMPAT_NUVOTON_NPCX_PS2_CTRL := nuvoton,npcx-ps2-ctrl + +config DT_HAS_NUVOTON_NPCX_PS2_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PS2_CTRL)) + +DT_COMPAT_NUVOTON_NPCX_PWM := nuvoton,npcx-pwm + +config DT_HAS_NUVOTON_NPCX_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_PWM)) + +DT_COMPAT_NUVOTON_NPCX_RST := nuvoton,npcx-rst + +config DT_HAS_NUVOTON_NPCX_RST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_RST)) + +DT_COMPAT_NUVOTON_NPCX_SCFG := nuvoton,npcx-scfg + +config DT_HAS_NUVOTON_NPCX_SCFG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_SCFG)) + +DT_COMPAT_NUVOTON_NPCX_SHA := nuvoton,npcx-sha + +config DT_HAS_NUVOTON_NPCX_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_SHA)) + +DT_COMPAT_NUVOTON_NPCX_SHI := nuvoton,npcx-shi + +config DT_HAS_NUVOTON_NPCX_SHI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_SHI)) + +DT_COMPAT_NUVOTON_NPCX_SHI_ENHANCED := nuvoton,npcx-shi-enhanced + +config DT_HAS_NUVOTON_NPCX_SHI_ENHANCED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_SHI_ENHANCED)) + +DT_COMPAT_NUVOTON_NPCX_SOC_ID := nuvoton,npcx-soc-id + +config DT_HAS_NUVOTON_NPCX_SOC_ID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_SOC_ID)) + +DT_COMPAT_NUVOTON_NPCX_SPIP := nuvoton,npcx-spip + +config DT_HAS_NUVOTON_NPCX_SPIP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_SPIP)) + +DT_COMPAT_NUVOTON_NPCX_TACH := nuvoton,npcx-tach + +config DT_HAS_NUVOTON_NPCX_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_TACH)) + +DT_COMPAT_NUVOTON_NPCX_UART := nuvoton,npcx-uart + +config DT_HAS_NUVOTON_NPCX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_UART)) + +DT_COMPAT_NUVOTON_NPCX_UART_NPCKN := nuvoton,npcx-uart-npckn + +config DT_HAS_NUVOTON_NPCX_UART_NPCKN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_UART_NPCKN)) + +DT_COMPAT_NUVOTON_NPCX_WATCHDOG := nuvoton,npcx-watchdog + +config DT_HAS_NUVOTON_NPCX_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NPCX_WATCHDOG)) + +DT_COMPAT_NUVOTON_NUMAKER_ADC := nuvoton,numaker-adc + +config DT_HAS_NUVOTON_NUMAKER_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_ADC)) + +DT_COMPAT_NUVOTON_NUMAKER_CANFD := nuvoton,numaker-canfd + +config DT_HAS_NUVOTON_NUMAKER_CANFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_CANFD)) + +DT_COMPAT_NUVOTON_NUMAKER_ETHERNET := nuvoton,numaker-ethernet + +config DT_HAS_NUVOTON_NUMAKER_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_ETHERNET)) + +DT_COMPAT_NUVOTON_NUMAKER_FMC := nuvoton,numaker-fmc + +config DT_HAS_NUVOTON_NUMAKER_FMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_FMC)) + +DT_COMPAT_NUVOTON_NUMAKER_GPIO := nuvoton,numaker-gpio + +config DT_HAS_NUVOTON_NUMAKER_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_GPIO)) + +DT_COMPAT_NUVOTON_NUMAKER_HSUSBD := nuvoton,numaker-hsusbd + +config DT_HAS_NUVOTON_NUMAKER_HSUSBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_HSUSBD)) + +DT_COMPAT_NUVOTON_NUMAKER_I2C := nuvoton,numaker-i2c + +config DT_HAS_NUVOTON_NUMAKER_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_I2C)) + +DT_COMPAT_NUVOTON_NUMAKER_NPU := nuvoton,numaker-npu + +config DT_HAS_NUVOTON_NUMAKER_NPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_NPU)) + +DT_COMPAT_NUVOTON_NUMAKER_PCC := nuvoton,numaker-pcc + +config DT_HAS_NUVOTON_NUMAKER_PCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_PCC)) + +DT_COMPAT_NUVOTON_NUMAKER_PINCTRL := nuvoton,numaker-pinctrl + +config DT_HAS_NUVOTON_NUMAKER_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_PINCTRL)) + +DT_COMPAT_NUVOTON_NUMAKER_PPC := nuvoton,numaker-ppc + +config DT_HAS_NUVOTON_NUMAKER_PPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_PPC)) + +DT_COMPAT_NUVOTON_NUMAKER_PWM := nuvoton,numaker-pwm + +config DT_HAS_NUVOTON_NUMAKER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_PWM)) + +DT_COMPAT_NUVOTON_NUMAKER_RMC := nuvoton,numaker-rmc + +config DT_HAS_NUVOTON_NUMAKER_RMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_RMC)) + +DT_COMPAT_NUVOTON_NUMAKER_RST := nuvoton,numaker-rst + +config DT_HAS_NUVOTON_NUMAKER_RST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_RST)) + +DT_COMPAT_NUVOTON_NUMAKER_RTC := nuvoton,numaker-rtc + +config DT_HAS_NUVOTON_NUMAKER_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_RTC)) + +DT_COMPAT_NUVOTON_NUMAKER_SCC := nuvoton,numaker-scc + +config DT_HAS_NUVOTON_NUMAKER_SCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_SCC)) + +DT_COMPAT_NUVOTON_NUMAKER_SDHC := nuvoton,numaker-sdhc + +config DT_HAS_NUVOTON_NUMAKER_SDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_SDHC)) + +DT_COMPAT_NUVOTON_NUMAKER_SPI := nuvoton,numaker-spi + +config DT_HAS_NUVOTON_NUMAKER_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_SPI)) + +DT_COMPAT_NUVOTON_NUMAKER_TCPC := nuvoton,numaker-tcpc + +config DT_HAS_NUVOTON_NUMAKER_TCPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_TCPC)) + +DT_COMPAT_NUVOTON_NUMAKER_UART := nuvoton,numaker-uart + +config DT_HAS_NUVOTON_NUMAKER_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_UART)) + +DT_COMPAT_NUVOTON_NUMAKER_USBD := nuvoton,numaker-usbd + +config DT_HAS_NUVOTON_NUMAKER_USBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_USBD)) + +DT_COMPAT_NUVOTON_NUMAKER_VBUS := nuvoton,numaker-vbus + +config DT_HAS_NUVOTON_NUMAKER_VBUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_VBUS)) + +DT_COMPAT_NUVOTON_NUMAKER_WDT := nuvoton,numaker-wdt + +config DT_HAS_NUVOTON_NUMAKER_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_WDT)) + +DT_COMPAT_NUVOTON_NUMAKER_WWDT := nuvoton,numaker-wwdt + +config DT_HAS_NUVOTON_NUMAKER_WWDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMAKER_WWDT)) + +DT_COMPAT_NUVOTON_NUMICRO_GPIO := nuvoton,numicro-gpio + +config DT_HAS_NUVOTON_NUMICRO_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMICRO_GPIO)) + +DT_COMPAT_NUVOTON_NUMICRO_M4_PCC := nuvoton,numicro-m4-pcc + +config DT_HAS_NUVOTON_NUMICRO_M4_PCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMICRO_M4_PCC)) + +DT_COMPAT_NUVOTON_NUMICRO_M4_SCC := nuvoton,numicro-m4-scc + +config DT_HAS_NUVOTON_NUMICRO_M4_SCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMICRO_M4_SCC)) + +DT_COMPAT_NUVOTON_NUMICRO_PINCTRL := nuvoton,numicro-pinctrl + +config DT_HAS_NUVOTON_NUMICRO_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMICRO_PINCTRL)) + +DT_COMPAT_NUVOTON_NUMICRO_UART := nuvoton,numicro-uart + +config DT_HAS_NUVOTON_NUMICRO_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NUVOTON_NUMICRO_UART)) + +DT_COMPAT_NVME_CONTROLLER := nvme-controller + +config DT_HAS_NVME_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NVME_CONTROLLER)) + +DT_COMPAT_NXP_4CH_DMA := nxp,4ch-dma + +config DT_HAS_NXP_4CH_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_4CH_DMA)) + +DT_COMPAT_NXP_ACOMP := nxp,acomp + +config DT_HAS_NXP_ACOMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ACOMP)) + +DT_COMPAT_NXP_ADC12 := nxp,adc12 + +config DT_HAS_NXP_ADC12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ADC12)) + +DT_COMPAT_NXP_AON_WAKEUP_PIN := nxp,aon-wakeup-pin + +config DT_HAS_NXP_AON_WAKEUP_PIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_AON_WAKEUP_PIN)) + +DT_COMPAT_NXP_BT_HCI_UART := nxp,bt-hci-uart + +config DT_HAS_NXP_BT_HCI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_BT_HCI_UART)) + +DT_COMPAT_NXP_C40_FLASH := nxp,c40-flash + +config DT_HAS_NXP_C40_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_C40_FLASH)) + +DT_COMPAT_NXP_C40_FLASH_CONTROLLER := nxp,c40-flash-controller + +config DT_HAS_NXP_C40_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_C40_FLASH_CONTROLLER)) + +DT_COMPAT_NXP_CAM_44PINS_CONNECTOR := nxp,cam-44pins-connector + +config DT_HAS_NXP_CAM_44PINS_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_CAM_44PINS_CONNECTOR)) + +DT_COMPAT_NXP_CMC := nxp,cmc + +config DT_HAS_NXP_CMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_CMC)) + +DT_COMPAT_NXP_CMP := nxp,cmp + +config DT_HAS_NXP_CMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_CMP)) + +DT_COMPAT_NXP_COP := nxp,cop + +config DT_HAS_NXP_COP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_COP)) + +DT_COMPAT_NXP_CRC := nxp,crc + +config DT_HAS_NXP_CRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_CRC)) + +DT_COMPAT_NXP_CTIMER_PWM := nxp,ctimer-pwm + +config DT_HAS_NXP_CTIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_CTIMER_PWM)) + +DT_COMPAT_NXP_DAC12 := nxp,dac12 + +config DT_HAS_NXP_DAC12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DAC12)) + +DT_COMPAT_NXP_DAI_ESAI := nxp,dai-esai + +config DT_HAS_NXP_DAI_ESAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DAI_ESAI)) + +DT_COMPAT_NXP_DAI_MICFIL := nxp,dai-micfil + +config DT_HAS_NXP_DAI_MICFIL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DAI_MICFIL)) + +DT_COMPAT_NXP_DAI_SAI := nxp,dai-sai + +config DT_HAS_NXP_DAI_SAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DAI_SAI)) + +DT_COMPAT_NXP_DCNANO_LCDIF := nxp,dcnano-lcdif + +config DT_HAS_NXP_DCNANO_LCDIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DCNANO_LCDIF)) + +DT_COMPAT_NXP_DMIC := nxp,dmic + +config DT_HAS_NXP_DMIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DMIC)) + +DT_COMPAT_NXP_DSPI := nxp,dspi + +config DT_HAS_NXP_DSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_DSPI)) + +DT_COMPAT_NXP_EDMA := nxp,edma + +config DT_HAS_NXP_EDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_EDMA)) + +DT_COMPAT_NXP_EHCI := nxp,ehci + +config DT_HAS_NXP_EHCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_EHCI)) + +DT_COMPAT_NXP_EIM := nxp,eim + +config DT_HAS_NXP_EIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_EIM)) + +DT_COMPAT_NXP_ELE_TRNG := nxp,ele-trng + +config DT_HAS_NXP_ELE_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ELE_TRNG)) + +DT_COMPAT_NXP_ELS := nxp,els + +config DT_HAS_NXP_ELS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ELS)) + +DT_COMPAT_NXP_ELS_TRNG := nxp,els-trng + +config DT_HAS_NXP_ELS_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ELS_TRNG)) + +DT_COMPAT_NXP_ENET := nxp,enet + +config DT_HAS_NXP_ENET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET)) + +DT_COMPAT_NXP_ENET_MAC := nxp,enet-mac + +config DT_HAS_NXP_ENET_MAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_MAC)) + +DT_COMPAT_NXP_ENET_MDIO := nxp,enet-mdio + +config DT_HAS_NXP_ENET_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_MDIO)) + +DT_COMPAT_NXP_ENET_PTP_CLOCK := nxp,enet-ptp-clock + +config DT_HAS_NXP_ENET_PTP_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_PTP_CLOCK)) + +DT_COMPAT_NXP_ENET_QOS := nxp,enet-qos + +config DT_HAS_NXP_ENET_QOS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_QOS)) + +DT_COMPAT_NXP_ENET_QOS_MAC := nxp,enet-qos-mac + +config DT_HAS_NXP_ENET_QOS_MAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_QOS_MAC)) + +DT_COMPAT_NXP_ENET_QOS_MDIO := nxp,enet-qos-mdio + +config DT_HAS_NXP_ENET_QOS_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_QOS_MDIO)) + +DT_COMPAT_NXP_ENET_QOS_PTP_CLOCK := nxp,enet-qos-ptp-clock + +config DT_HAS_NXP_ENET_QOS_PTP_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ENET_QOS_PTP_CLOCK)) + +DT_COMPAT_NXP_ERM := nxp,erm + +config DT_HAS_NXP_ERM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_ERM)) + +DT_COMPAT_NXP_EWM := nxp,ewm + +config DT_HAS_NXP_EWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_EWM)) + +DT_COMPAT_NXP_FIRC := nxp,firc + +config DT_HAS_NXP_FIRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FIRC)) + +DT_COMPAT_NXP_FLEXCAN := nxp,flexcan + +config DT_HAS_NXP_FLEXCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXCAN)) + +DT_COMPAT_NXP_FLEXCAN_FD := nxp,flexcan-fd + +config DT_HAS_NXP_FLEXCAN_FD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXCAN_FD)) + +DT_COMPAT_NXP_FLEXIO := nxp,flexio + +config DT_HAS_NXP_FLEXIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXIO)) + +DT_COMPAT_NXP_FLEXIO_PWM := nxp,flexio-pwm + +config DT_HAS_NXP_FLEXIO_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXIO_PWM)) + +DT_COMPAT_NXP_FLEXIO_SPI := nxp,flexio-spi + +config DT_HAS_NXP_FLEXIO_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXIO_SPI)) + +DT_COMPAT_NXP_FLEXPWM := nxp,flexpwm + +config DT_HAS_NXP_FLEXPWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXPWM)) + +DT_COMPAT_NXP_FLEXRAM := nxp,flexram + +config DT_HAS_NXP_FLEXRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FLEXRAM)) + +DT_COMPAT_NXP_FS26_WDOG := nxp,fs26-wdog + +config DT_HAS_NXP_FS26_WDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FS26_WDOG)) + +DT_COMPAT_NXP_FTM := nxp,ftm + +config DT_HAS_NXP_FTM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FTM)) + +DT_COMPAT_NXP_FTM_PWM := nxp,ftm-pwm + +config DT_HAS_NXP_FTM_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FTM_PWM)) + +DT_COMPAT_NXP_FXAS21002 := nxp,fxas21002 + +config DT_HAS_NXP_FXAS21002_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FXAS21002)) + +DT_COMPAT_NXP_FXLS8974 := nxp,fxls8974 + +config DT_HAS_NXP_FXLS8974_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FXLS8974)) + +DT_COMPAT_NXP_FXOS8700 := nxp,fxos8700 + +config DT_HAS_NXP_FXOS8700_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FXOS8700)) + +DT_COMPAT_NXP_FXOSC := nxp,fxosc + +config DT_HAS_NXP_FXOSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_FXOSC)) + +DT_COMPAT_NXP_GAU_ADC := nxp,gau-adc + +config DT_HAS_NXP_GAU_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_GAU_ADC)) + +DT_COMPAT_NXP_GAU_DAC := nxp,gau-dac + +config DT_HAS_NXP_GAU_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_GAU_DAC)) + +DT_COMPAT_NXP_GDMA := nxp,gdma + +config DT_HAS_NXP_GDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_GDMA)) + +DT_COMPAT_NXP_GINT := nxp,gint + +config DT_HAS_NXP_GINT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_GINT)) + +DT_COMPAT_NXP_GPIO_CLUSTER := nxp,gpio-cluster + +config DT_HAS_NXP_GPIO_CLUSTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_GPIO_CLUSTER)) + +DT_COMPAT_NXP_GPT_HW_TIMER := nxp,gpt-hw-timer + +config DT_HAS_NXP_GPT_HW_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_GPT_HW_TIMER)) + +DT_COMPAT_NXP_HCI_BLE := nxp,hci-ble + +config DT_HAS_NXP_HCI_BLE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_HCI_BLE)) + +DT_COMPAT_NXP_HDLC_RCP_IF := nxp,hdlc-rcp-if + +config DT_HAS_NXP_HDLC_RCP_IF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_HDLC_RCP_IF)) + +DT_COMPAT_NXP_HPDAC := nxp,hpdac + +config DT_HAS_NXP_HPDAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_HPDAC)) + +DT_COMPAT_NXP_HSCMP := nxp,hscmp + +config DT_HAS_NXP_HSCMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_HSCMP)) + +DT_COMPAT_NXP_I2C_TSC_FPC := nxp,i2c-tsc-fpc + +config DT_HAS_NXP_I2C_TSC_FPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_I2C_TSC_FPC)) + +DT_COMPAT_NXP_IAP_FMC11 := nxp,iap-fmc11 + +config DT_HAS_NXP_IAP_FMC11_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IAP_FMC11)) + +DT_COMPAT_NXP_IAP_FMC54 := nxp,iap-fmc54 + +config DT_HAS_NXP_IAP_FMC54_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IAP_FMC54)) + +DT_COMPAT_NXP_IAP_FMC55 := nxp,iap-fmc55 + +config DT_HAS_NXP_IAP_FMC55_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IAP_FMC55)) + +DT_COMPAT_NXP_IAP_FMC553 := nxp,iap-fmc553 + +config DT_HAS_NXP_IAP_FMC553_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IAP_FMC553)) + +DT_COMPAT_NXP_II2C := nxp,ii2c + +config DT_HAS_NXP_II2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_II2C)) + +DT_COMPAT_NXP_IMX_ANATOP := nxp,imx-anatop + +config DT_HAS_NXP_IMX_ANATOP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_ANATOP)) + +DT_COMPAT_NXP_IMX_BLKCTRL_NS_AON := nxp,imx-blkctrl-ns-aon + +config DT_HAS_NXP_IMX_BLKCTRL_NS_AON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_BLKCTRL_NS_AON)) + +DT_COMPAT_NXP_IMX_BLKCTRL_WAKEUP := nxp,imx-blkctrl-wakeup + +config DT_HAS_NXP_IMX_BLKCTRL_WAKEUP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_BLKCTRL_WAKEUP)) + +DT_COMPAT_NXP_IMX_CAAM := nxp,imx-caam + +config DT_HAS_NXP_IMX_CAAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_CAAM)) + +DT_COMPAT_NXP_IMX_CCM := nxp,imx-ccm + +config DT_HAS_NXP_IMX_CCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_CCM)) + +DT_COMPAT_NXP_IMX_CCM_FNPLL := nxp,imx-ccm-fnpll + +config DT_HAS_NXP_IMX_CCM_FNPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_CCM_FNPLL)) + +DT_COMPAT_NXP_IMX_CCM_REV2 := nxp,imx-ccm-rev2 + +config DT_HAS_NXP_IMX_CCM_REV2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_CCM_REV2)) + +DT_COMPAT_NXP_IMX_CSI := nxp,imx-csi + +config DT_HAS_NXP_IMX_CSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_CSI)) + +DT_COMPAT_NXP_IMX_DTCM := nxp,imx-dtcm + +config DT_HAS_NXP_IMX_DTCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_DTCM)) + +DT_COMPAT_NXP_IMX_ECSPI := nxp,imx-ecspi + +config DT_HAS_NXP_IMX_ECSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_ECSPI)) + +DT_COMPAT_NXP_IMX_ELCDIF := nxp,imx-elcdif + +config DT_HAS_NXP_IMX_ELCDIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_ELCDIF)) + +DT_COMPAT_NXP_IMX_EPIT := nxp,imx-epit + +config DT_HAS_NXP_IMX_EPIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_EPIT)) + +DT_COMPAT_NXP_IMX_FLEXSPI := nxp,imx-flexspi + +config DT_HAS_NXP_IMX_FLEXSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI)) + +DT_COMPAT_NXP_IMX_FLEXSPI_APS6404L := nxp,imx-flexspi-aps6404l + +config DT_HAS_NXP_IMX_FLEXSPI_APS6404L_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_APS6404L)) + +DT_COMPAT_NXP_IMX_FLEXSPI_APS6408L := nxp,imx-flexspi-aps6408l + +config DT_HAS_NXP_IMX_FLEXSPI_APS6408L_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_APS6408L)) + +DT_COMPAT_NXP_IMX_FLEXSPI_HYPERFLASH := nxp,imx-flexspi-hyperflash + +config DT_HAS_NXP_IMX_FLEXSPI_HYPERFLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_HYPERFLASH)) + +DT_COMPAT_NXP_IMX_FLEXSPI_IS66WVQ8M4 := nxp,imx-flexspi-is66wvq8m4 + +config DT_HAS_NXP_IMX_FLEXSPI_IS66WVQ8M4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_IS66WVQ8M4)) + +DT_COMPAT_NXP_IMX_FLEXSPI_IS66WVS8M8 := nxp,imx-flexspi-is66wvs8m8 + +config DT_HAS_NXP_IMX_FLEXSPI_IS66WVS8M8_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_IS66WVS8M8)) + +DT_COMPAT_NXP_IMX_FLEXSPI_MX25UM51345G := nxp,imx-flexspi-mx25um51345g + +config DT_HAS_NXP_IMX_FLEXSPI_MX25UM51345G_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_MX25UM51345G)) + +DT_COMPAT_NXP_IMX_FLEXSPI_NAND := nxp,imx-flexspi-nand + +config DT_HAS_NXP_IMX_FLEXSPI_NAND_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_NAND)) + +DT_COMPAT_NXP_IMX_FLEXSPI_NOR := nxp,imx-flexspi-nor + +config DT_HAS_NXP_IMX_FLEXSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_NOR)) + +DT_COMPAT_NXP_IMX_FLEXSPI_S27KS0641 := nxp,imx-flexspi-s27ks0641 + +config DT_HAS_NXP_IMX_FLEXSPI_S27KS0641_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_S27KS0641)) + +DT_COMPAT_NXP_IMX_FLEXSPI_W956A8MBYA := nxp,imx-flexspi-w956a8mbya + +config DT_HAS_NXP_IMX_FLEXSPI_W956A8MBYA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_FLEXSPI_W956A8MBYA)) + +DT_COMPAT_NXP_IMX_GPIO := nxp,imx-gpio + +config DT_HAS_NXP_IMX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_GPIO)) + +DT_COMPAT_NXP_IMX_GPR := nxp,imx-gpr + +config DT_HAS_NXP_IMX_GPR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_GPR)) + +DT_COMPAT_NXP_IMX_GPT := nxp,imx-gpt + +config DT_HAS_NXP_IMX_GPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_GPT)) + +DT_COMPAT_NXP_IMX_IOMUXC := nxp,imx-iomuxc + +config DT_HAS_NXP_IMX_IOMUXC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_IOMUXC)) + +DT_COMPAT_NXP_IMX_IOMUXC_SCU := nxp,imx-iomuxc-scu + +config DT_HAS_NXP_IMX_IOMUXC_SCU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_IOMUXC_SCU)) + +DT_COMPAT_NXP_IMX_ITCM := nxp,imx-itcm + +config DT_HAS_NXP_IMX_ITCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_ITCM)) + +DT_COMPAT_NXP_IMX_IUART := nxp,imx-iuart + +config DT_HAS_NXP_IMX_IUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_IUART)) + +DT_COMPAT_NXP_IMX_LCDIFV2 := nxp,imx-lcdifv2 + +config DT_HAS_NXP_IMX_LCDIFV2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_LCDIFV2)) + +DT_COMPAT_NXP_IMX_LCDIFV3 := nxp,imx-lcdifv3 + +config DT_HAS_NXP_IMX_LCDIFV3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_LCDIFV3)) + +DT_COMPAT_NXP_IMX_MIPI_DSI := nxp,imx-mipi-dsi + +config DT_HAS_NXP_IMX_MIPI_DSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_MIPI_DSI)) + +DT_COMPAT_NXP_IMX_MU := nxp,imx-mu + +config DT_HAS_NXP_IMX_MU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_MU)) + +DT_COMPAT_NXP_IMX_NETC := nxp,imx-netc + +config DT_HAS_NXP_IMX_NETC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_NETC)) + +DT_COMPAT_NXP_IMX_NETC_BLK_CTRL := nxp,imx-netc-blk-ctrl + +config DT_HAS_NXP_IMX_NETC_BLK_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_NETC_BLK_CTRL)) + +DT_COMPAT_NXP_IMX_NETC_EMDIO := nxp,imx-netc-emdio + +config DT_HAS_NXP_IMX_NETC_EMDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_NETC_EMDIO)) + +DT_COMPAT_NXP_IMX_NETC_PSI := nxp,imx-netc-psi + +config DT_HAS_NXP_IMX_NETC_PSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_NETC_PSI)) + +DT_COMPAT_NXP_IMX_PWM := nxp,imx-pwm + +config DT_HAS_NXP_IMX_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_PWM)) + +DT_COMPAT_NXP_IMX_QTMR := nxp,imx-qtmr + +config DT_HAS_NXP_IMX_QTMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_QTMR)) + +DT_COMPAT_NXP_IMX_RGPIO := nxp,imx-rgpio + +config DT_HAS_NXP_IMX_RGPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_RGPIO)) + +DT_COMPAT_NXP_IMX_SEMC := nxp,imx-semc + +config DT_HAS_NXP_IMX_SEMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_SEMC)) + +DT_COMPAT_NXP_IMX_SNVS_RTC := nxp,imx-snvs-rtc + +config DT_HAS_NXP_IMX_SNVS_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_SNVS_RTC)) + +DT_COMPAT_NXP_IMX_SRC_REV2 := nxp,imx-src-rev2 + +config DT_HAS_NXP_IMX_SRC_REV2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_SRC_REV2)) + +DT_COMPAT_NXP_IMX_TMR := nxp,imx-tmr + +config DT_HAS_NXP_IMX_TMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_TMR)) + +DT_COMPAT_NXP_IMX_UART := nxp,imx-uart + +config DT_HAS_NXP_IMX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_UART)) + +DT_COMPAT_NXP_IMX_USDHC := nxp,imx-usdhc + +config DT_HAS_NXP_IMX_USDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_USDHC)) + +DT_COMPAT_NXP_IMX_WDOG := nxp,imx-wdog + +config DT_HAS_NXP_IMX_WDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX_WDOG)) + +DT_COMPAT_NXP_IMX7D_PINCTRL := nxp,imx7d-pinctrl + +config DT_HAS_NXP_IMX7D_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX7D_PINCTRL)) + +DT_COMPAT_NXP_IMX8_PINCTRL := nxp,imx8-pinctrl + +config DT_HAS_NXP_IMX8_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX8_PINCTRL)) + +DT_COMPAT_NXP_IMX8M_PINCTRL := nxp,imx8m-pinctrl + +config DT_HAS_NXP_IMX8M_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX8M_PINCTRL)) + +DT_COMPAT_NXP_IMX8MP_PINCTRL := nxp,imx8mp-pinctrl + +config DT_HAS_NXP_IMX8MP_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX8MP_PINCTRL)) + +DT_COMPAT_NXP_IMX8ULP_PINCTRL := nxp,imx8ulp-pinctrl + +config DT_HAS_NXP_IMX8ULP_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX8ULP_PINCTRL)) + +DT_COMPAT_NXP_IMX93_MEDIAMIX := nxp,imx93-mediamix + +config DT_HAS_NXP_IMX93_MEDIAMIX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX93_MEDIAMIX)) + +DT_COMPAT_NXP_IMX93_PINCTRL := nxp,imx93-pinctrl + +config DT_HAS_NXP_IMX93_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX93_PINCTRL)) + +DT_COMPAT_NXP_IMX93_VIDEO_PLL := nxp,imx93-video-pll + +config DT_HAS_NXP_IMX93_VIDEO_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMX93_VIDEO_PLL)) + +DT_COMPAT_NXP_IMXRT118X_ARM_PLL := nxp,imxrt118x-arm-pll + +config DT_HAS_NXP_IMXRT118X_ARM_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMXRT118X_ARM_PLL)) + +DT_COMPAT_NXP_IMXRT11XX_ARM_PLL := nxp,imxrt11xx-arm-pll + +config DT_HAS_NXP_IMXRT11XX_ARM_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IMXRT11XX_ARM_PLL)) + +DT_COMPAT_NXP_IRQSTEER_INTC := nxp,irqsteer-intc + +config DT_HAS_NXP_IRQSTEER_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IRQSTEER_INTC)) + +DT_COMPAT_NXP_IRQSTEER_MASTER := nxp,irqsteer-master + +config DT_HAS_NXP_IRQSTEER_MASTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IRQSTEER_MASTER)) + +DT_COMPAT_NXP_IRTC := nxp,irtc + +config DT_HAS_NXP_IRTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_IRTC)) + +DT_COMPAT_NXP_KINETIS_ACMP := nxp,kinetis-acmp + +config DT_HAS_NXP_KINETIS_ACMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_ACMP)) + +DT_COMPAT_NXP_KINETIS_ADC16 := nxp,kinetis-adc16 + +config DT_HAS_NXP_KINETIS_ADC16_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_ADC16)) + +DT_COMPAT_NXP_KINETIS_DAC := nxp,kinetis-dac + +config DT_HAS_NXP_KINETIS_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_DAC)) + +DT_COMPAT_NXP_KINETIS_DAC32 := nxp,kinetis-dac32 + +config DT_HAS_NXP_KINETIS_DAC32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_DAC32)) + +DT_COMPAT_NXP_KINETIS_ETHERNET := nxp,kinetis-ethernet + +config DT_HAS_NXP_KINETIS_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_ETHERNET)) + +DT_COMPAT_NXP_KINETIS_FTFA := nxp,kinetis-ftfa + +config DT_HAS_NXP_KINETIS_FTFA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_FTFA)) + +DT_COMPAT_NXP_KINETIS_FTFC := nxp,kinetis-ftfc + +config DT_HAS_NXP_KINETIS_FTFC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_FTFC)) + +DT_COMPAT_NXP_KINETIS_FTFE := nxp,kinetis-ftfe + +config DT_HAS_NXP_KINETIS_FTFE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_FTFE)) + +DT_COMPAT_NXP_KINETIS_FTFL := nxp,kinetis-ftfl + +config DT_HAS_NXP_KINETIS_FTFL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_FTFL)) + +DT_COMPAT_NXP_KINETIS_GPIO := nxp,kinetis-gpio + +config DT_HAS_NXP_KINETIS_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_GPIO)) + +DT_COMPAT_NXP_KINETIS_I2C := nxp,kinetis-i2c + +config DT_HAS_NXP_KINETIS_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_I2C)) + +DT_COMPAT_NXP_KINETIS_KE1XF_SIM := nxp,kinetis-ke1xf-sim + +config DT_HAS_NXP_KINETIS_KE1XF_SIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_KE1XF_SIM)) + +DT_COMPAT_NXP_KINETIS_LPSCI := nxp,kinetis-lpsci + +config DT_HAS_NXP_KINETIS_LPSCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_LPSCI)) + +DT_COMPAT_NXP_KINETIS_MCG := nxp,kinetis-mcg + +config DT_HAS_NXP_KINETIS_MCG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_MCG)) + +DT_COMPAT_NXP_KINETIS_PCC := nxp,kinetis-pcc + +config DT_HAS_NXP_KINETIS_PCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_PCC)) + +DT_COMPAT_NXP_KINETIS_PTP := nxp,kinetis-ptp + +config DT_HAS_NXP_KINETIS_PTP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_PTP)) + +DT_COMPAT_NXP_KINETIS_PWT := nxp,kinetis-pwt + +config DT_HAS_NXP_KINETIS_PWT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_PWT)) + +DT_COMPAT_NXP_KINETIS_RNGA := nxp,kinetis-rnga + +config DT_HAS_NXP_KINETIS_RNGA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_RNGA)) + +DT_COMPAT_NXP_KINETIS_SCG := nxp,kinetis-scg + +config DT_HAS_NXP_KINETIS_SCG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_SCG)) + +DT_COMPAT_NXP_KINETIS_SIM := nxp,kinetis-sim + +config DT_HAS_NXP_KINETIS_SIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_SIM)) + +DT_COMPAT_NXP_KINETIS_TEMPERATURE := nxp,kinetis-temperature + +config DT_HAS_NXP_KINETIS_TEMPERATURE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_TEMPERATURE)) + +DT_COMPAT_NXP_KINETIS_TPM := nxp,kinetis-tpm + +config DT_HAS_NXP_KINETIS_TPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_TPM)) + +DT_COMPAT_NXP_KINETIS_TRNG := nxp,kinetis-trng + +config DT_HAS_NXP_KINETIS_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_TRNG)) + +DT_COMPAT_NXP_KINETIS_UART := nxp,kinetis-uart + +config DT_HAS_NXP_KINETIS_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_UART)) + +DT_COMPAT_NXP_KINETIS_USBD := nxp,kinetis-usbd + +config DT_HAS_NXP_KINETIS_USBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_USBD)) + +DT_COMPAT_NXP_KINETIS_WDOG := nxp,kinetis-wdog + +config DT_HAS_NXP_KINETIS_WDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_WDOG)) + +DT_COMPAT_NXP_KW41Z_IEEE802154 := nxp,kw41z-ieee802154 + +config DT_HAS_NXP_KW41Z_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_KW41Z_IEEE802154)) + +DT_COMPAT_NXP_LCD_8080 := nxp,lcd-8080 + +config DT_HAS_NXP_LCD_8080_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LCD_8080)) + +DT_COMPAT_NXP_LCD_PMOD := nxp,lcd-pmod + +config DT_HAS_NXP_LCD_PMOD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LCD_PMOD)) + +DT_COMPAT_NXP_LCDIC := nxp,lcdic + +config DT_HAS_NXP_LCDIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LCDIC)) + +DT_COMPAT_NXP_LLWU := nxp,llwu + +config DT_HAS_NXP_LLWU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LLWU)) + +DT_COMPAT_NXP_LP_FLEXCOMM := nxp,lp-flexcomm + +config DT_HAS_NXP_LP_FLEXCOMM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LP_FLEXCOMM)) + +DT_COMPAT_NXP_LPADC_TEMP40 := nxp,lpadc-temp40 + +config DT_HAS_NXP_LPADC_TEMP40_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPADC_TEMP40)) + +DT_COMPAT_NXP_LPC_CRC := nxp,lpc-crc + +config DT_HAS_NXP_LPC_CRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_CRC)) + +DT_COMPAT_NXP_LPC_CTIMER := nxp,lpc-ctimer + +config DT_HAS_NXP_LPC_CTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_CTIMER)) + +DT_COMPAT_NXP_LPC_DMA := nxp,lpc-dma + +config DT_HAS_NXP_LPC_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_DMA)) + +DT_COMPAT_NXP_LPC_FLEXCOMM := nxp,lpc-flexcomm + +config DT_HAS_NXP_LPC_FLEXCOMM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_FLEXCOMM)) + +DT_COMPAT_NXP_LPC_GPIO := nxp,lpc-gpio + +config DT_HAS_NXP_LPC_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_GPIO)) + +DT_COMPAT_NXP_LPC_GPIO_PORT := nxp,lpc-gpio-port + +config DT_HAS_NXP_LPC_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_GPIO_PORT)) + +DT_COMPAT_NXP_LPC_I2C := nxp,lpc-i2c + +config DT_HAS_NXP_LPC_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_I2C)) + +DT_COMPAT_NXP_LPC_I2S := nxp,lpc-i2s + +config DT_HAS_NXP_LPC_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_I2S)) + +DT_COMPAT_NXP_LPC_IOCON := nxp,lpc-iocon + +config DT_HAS_NXP_LPC_IOCON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_IOCON)) + +DT_COMPAT_NXP_LPC_IOCON_PINCTRL := nxp,lpc-iocon-pinctrl + +config DT_HAS_NXP_LPC_IOCON_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_IOCON_PINCTRL)) + +DT_COMPAT_NXP_LPC_IOCON_PIO := nxp,lpc-iocon-pio + +config DT_HAS_NXP_LPC_IOCON_PIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_IOCON_PIO)) + +DT_COMPAT_NXP_LPC_LPADC := nxp,lpc-lpadc + +config DT_HAS_NXP_LPC_LPADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_LPADC)) + +DT_COMPAT_NXP_LPC_MAILBOX := nxp,lpc-mailbox + +config DT_HAS_NXP_LPC_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_MAILBOX)) + +DT_COMPAT_NXP_LPC_MCAN := nxp,lpc-mcan + +config DT_HAS_NXP_LPC_MCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_MCAN)) + +DT_COMPAT_NXP_LPC_RNG := nxp,lpc-rng + +config DT_HAS_NXP_LPC_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_RNG)) + +DT_COMPAT_NXP_LPC_RTC := nxp,lpc-rtc + +config DT_HAS_NXP_LPC_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_RTC)) + +DT_COMPAT_NXP_LPC_RTC_HIGHRES := nxp,lpc-rtc-highres + +config DT_HAS_NXP_LPC_RTC_HIGHRES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_RTC_HIGHRES)) + +DT_COMPAT_NXP_LPC_SDIF := nxp,lpc-sdif + +config DT_HAS_NXP_LPC_SDIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_SDIF)) + +DT_COMPAT_NXP_LPC_SPI := nxp,lpc-spi + +config DT_HAS_NXP_LPC_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_SPI)) + +DT_COMPAT_NXP_LPC_SYSCON := nxp,lpc-syscon + +config DT_HAS_NXP_LPC_SYSCON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_SYSCON)) + +DT_COMPAT_NXP_LPC_SYSCON_RESET := nxp,lpc-syscon-reset + +config DT_HAS_NXP_LPC_SYSCON_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_SYSCON_RESET)) + +DT_COMPAT_NXP_LPC_UID := nxp,lpc-uid + +config DT_HAS_NXP_LPC_UID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_UID)) + +DT_COMPAT_NXP_LPC_USART := nxp,lpc-usart + +config DT_HAS_NXP_LPC_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_USART)) + +DT_COMPAT_NXP_LPC_WWDT := nxp,lpc-wwdt + +config DT_HAS_NXP_LPC_WWDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_WWDT)) + +DT_COMPAT_NXP_LPC11U6X_EEPROM := nxp,lpc11u6x-eeprom + +config DT_HAS_NXP_LPC11U6X_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC11U6X_EEPROM)) + +DT_COMPAT_NXP_LPC11U6X_GPIO := nxp,lpc11u6x-gpio + +config DT_HAS_NXP_LPC11U6X_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC11U6X_GPIO)) + +DT_COMPAT_NXP_LPC11U6X_I2C := nxp,lpc11u6x-i2c + +config DT_HAS_NXP_LPC11U6X_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC11U6X_I2C)) + +DT_COMPAT_NXP_LPC11U6X_PINCTRL := nxp,lpc11u6x-pinctrl + +config DT_HAS_NXP_LPC11U6X_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC11U6X_PINCTRL)) + +DT_COMPAT_NXP_LPC11U6X_SYSCON := nxp,lpc11u6x-syscon + +config DT_HAS_NXP_LPC11U6X_SYSCON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC11U6X_SYSCON)) + +DT_COMPAT_NXP_LPC11U6X_UART := nxp,lpc11u6x-uart + +config DT_HAS_NXP_LPC11U6X_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC11U6X_UART)) + +DT_COMPAT_NXP_LPCIP3511 := nxp,lpcip3511 + +config DT_HAS_NXP_LPCIP3511_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPCIP3511)) + +DT_COMPAT_NXP_LPCMP := nxp,lpcmp + +config DT_HAS_NXP_LPCMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPCMP)) + +DT_COMPAT_NXP_LPDAC := nxp,lpdac + +config DT_HAS_NXP_LPDAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPDAC)) + +DT_COMPAT_NXP_LPI2C := nxp,lpi2c + +config DT_HAS_NXP_LPI2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPI2C)) + +DT_COMPAT_NXP_LPIT := nxp,lpit + +config DT_HAS_NXP_LPIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPIT)) + +DT_COMPAT_NXP_LPIT_CHANNEL := nxp,lpit-channel + +config DT_HAS_NXP_LPIT_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPIT_CHANNEL)) + +DT_COMPAT_NXP_LPSPI := nxp,lpspi + +config DT_HAS_NXP_LPSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPSPI)) + +DT_COMPAT_NXP_LPTMR := nxp,lptmr + +config DT_HAS_NXP_LPTMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPTMR)) + +DT_COMPAT_NXP_LPUART := nxp,lpuart + +config DT_HAS_NXP_LPUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_LPUART)) + +DT_COMPAT_NXP_MBOX_IMX_MU := nxp,mbox-imx-mu + +config DT_HAS_NXP_MBOX_IMX_MU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MBOX_IMX_MU)) + +DT_COMPAT_NXP_MBOX_MAILBOX := nxp,mbox-mailbox + +config DT_HAS_NXP_MBOX_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MBOX_MAILBOX)) + +DT_COMPAT_NXP_MC_CGM := nxp,mc-cgm + +config DT_HAS_NXP_MC_CGM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MC_CGM)) + +DT_COMPAT_NXP_MCI_IO_MUX := nxp,mci-io-mux + +config DT_HAS_NXP_MCI_IO_MUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCI_IO_MUX)) + +DT_COMPAT_NXP_MCR20A := nxp,mcr20a + +config DT_HAS_NXP_MCR20A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCR20A)) + +DT_COMPAT_NXP_MCUX_12B1MSPS_SAR := nxp,mcux-12b1msps-sar + +config DT_HAS_NXP_MCUX_12B1MSPS_SAR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_12B1MSPS_SAR)) + +DT_COMPAT_NXP_MCUX_DCP := nxp,mcux-dcp + +config DT_HAS_NXP_MCUX_DCP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_DCP)) + +DT_COMPAT_NXP_MCUX_EDMA := nxp,mcux-edma + +config DT_HAS_NXP_MCUX_EDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_EDMA)) + +DT_COMPAT_NXP_MCUX_I2S := nxp,mcux-i2s + +config DT_HAS_NXP_MCUX_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_I2S)) + +DT_COMPAT_NXP_MCUX_I3C := nxp,mcux-i3c + +config DT_HAS_NXP_MCUX_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_I3C)) + +DT_COMPAT_NXP_MCUX_KPP := nxp,mcux-kpp + +config DT_HAS_NXP_MCUX_KPP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_KPP)) + +DT_COMPAT_NXP_MCUX_QDC := nxp,mcux-qdc + +config DT_HAS_NXP_MCUX_QDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_QDC)) + +DT_COMPAT_NXP_MCUX_QDEC := nxp,mcux-qdec + +config DT_HAS_NXP_MCUX_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_QDEC)) + +DT_COMPAT_NXP_MCUX_RT_PINCTRL := nxp,mcux-rt-pinctrl + +config DT_HAS_NXP_MCUX_RT_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_RT_PINCTRL)) + +DT_COMPAT_NXP_MCUX_RT11XX_PINCTRL := nxp,mcux-rt11xx-pinctrl + +config DT_HAS_NXP_MCUX_RT11XX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_RT11XX_PINCTRL)) + +DT_COMPAT_NXP_MCUX_XBAR := nxp,mcux-xbar + +config DT_HAS_NXP_MCUX_XBAR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCUX_XBAR)) + +DT_COMPAT_NXP_MCXC_OSC := nxp,mcxc-osc + +config DT_HAS_NXP_MCXC_OSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCXC_OSC)) + +DT_COMPAT_NXP_MCXE31X_SIUL2_PINCTRL := nxp,mcxe31x-siul2-pinctrl + +config DT_HAS_NXP_MCXE31X_SIUL2_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCXE31X_SIUL2_PINCTRL)) + +DT_COMPAT_NXP_MCXN_PSTATE := nxp,mcxn-pstate + +config DT_HAS_NXP_MCXN_PSTATE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCXN_PSTATE)) + +DT_COMPAT_NXP_MCXW_IEEE802154 := nxp,mcxw-ieee802154 + +config DT_HAS_NXP_MCXW_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MCXW_IEEE802154)) + +DT_COMPAT_NXP_MECC := nxp,mecc + +config DT_HAS_NXP_MECC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MECC)) + +DT_COMPAT_NXP_MICFIL := nxp,micfil + +config DT_HAS_NXP_MICFIL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MICFIL)) + +DT_COMPAT_NXP_MIPI_CSI2RX := nxp,mipi-csi2rx + +config DT_HAS_NXP_MIPI_CSI2RX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MIPI_CSI2RX)) + +DT_COMPAT_NXP_MIPI_DBI_DCNANO_LCDIF := nxp,mipi-dbi-dcnano-lcdif + +config DT_HAS_NXP_MIPI_DBI_DCNANO_LCDIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MIPI_DBI_DCNANO_LCDIF)) + +DT_COMPAT_NXP_MIPI_DBI_FLEXIO_LCDIF := nxp,mipi-dbi-flexio-lcdif + +config DT_HAS_NXP_MIPI_DBI_FLEXIO_LCDIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MIPI_DBI_FLEXIO_LCDIF)) + +DT_COMPAT_NXP_MIPI_DSI_2L := nxp,mipi-dsi-2l + +config DT_HAS_NXP_MIPI_DSI_2L_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MIPI_DSI_2L)) + +DT_COMPAT_NXP_MIPI_DSI_DWC := nxp,mipi-dsi-dwc + +config DT_HAS_NXP_MIPI_DSI_DWC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MIPI_DSI_DWC)) + +DT_COMPAT_NXP_MRCC_RESET := nxp,mrcc-reset + +config DT_HAS_NXP_MRCC_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MRCC_RESET)) + +DT_COMPAT_NXP_MRT := nxp,mrt + +config DT_HAS_NXP_MRT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MRT)) + +DT_COMPAT_NXP_MRT_CHANNEL := nxp,mrt-channel + +config DT_HAS_NXP_MRT_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MRT_CHANNEL)) + +DT_COMPAT_NXP_MSF1 := nxp,msf1 + +config DT_HAS_NXP_MSF1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_MSF1)) + +DT_COMPAT_NXP_NBU := nxp,nbu + +config DT_HAS_NXP_NBU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_NBU)) + +DT_COMPAT_NXP_NETC_PTP_CLOCK := nxp,netc-ptp-clock + +config DT_HAS_NXP_NETC_PTP_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_NETC_PTP_CLOCK)) + +DT_COMPAT_NXP_NETC_SWITCH := nxp,netc-switch + +config DT_HAS_NXP_NETC_SWITCH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_NETC_SWITCH)) + +DT_COMPAT_NXP_NX20P3483 := nxp,nx20p3483 + +config DT_HAS_NXP_NX20P3483_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_NX20P3483)) + +DT_COMPAT_NXP_OCOTP := nxp,ocotp + +config DT_HAS_NXP_OCOTP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_OCOTP)) + +DT_COMPAT_NXP_OPAMP := nxp,opamp + +config DT_HAS_NXP_OPAMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_OPAMP)) + +DT_COMPAT_NXP_OPAMP_FAST := nxp,opamp-fast + +config DT_HAS_NXP_OPAMP_FAST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_OPAMP_FAST)) + +DT_COMPAT_NXP_OS_TIMER := nxp,os-timer + +config DT_HAS_NXP_OS_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_OS_TIMER)) + +DT_COMPAT_NXP_P3T1755 := nxp,p3t1755 + +config DT_HAS_NXP_P3T1755_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_P3T1755)) + +DT_COMPAT_NXP_PARALLEL_LCD_CONNECTOR := nxp,parallel-lcd-connector + +config DT_HAS_NXP_PARALLEL_LCD_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PARALLEL_LCD_CONNECTOR)) + +DT_COMPAT_NXP_PCA6408 := nxp,pca6408 + +config DT_HAS_NXP_PCA6408_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA6408)) + +DT_COMPAT_NXP_PCA6416 := nxp,pca6416 + +config DT_HAS_NXP_PCA6416_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA6416)) + +DT_COMPAT_NXP_PCA9420 := nxp,pca9420 + +config DT_HAS_NXP_PCA9420_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9420)) + +DT_COMPAT_NXP_PCA9422 := nxp,pca9422 + +config DT_HAS_NXP_PCA9422_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9422)) + +DT_COMPAT_NXP_PCA9422_CHARGER := nxp,pca9422-charger + +config DT_HAS_NXP_PCA9422_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9422_CHARGER)) + +DT_COMPAT_NXP_PCA9422_REGULATOR := nxp,pca9422-regulator + +config DT_HAS_NXP_PCA9422_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9422_REGULATOR)) + +DT_COMPAT_NXP_PCA9533 := nxp,pca9533 + +config DT_HAS_NXP_PCA9533_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9533)) + +DT_COMPAT_NXP_PCA9538 := nxp,pca9538 + +config DT_HAS_NXP_PCA9538_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9538)) + +DT_COMPAT_NXP_PCA9539 := nxp,pca9539 + +config DT_HAS_NXP_PCA9539_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9539)) + +DT_COMPAT_NXP_PCA9554 := nxp,pca9554 + +config DT_HAS_NXP_PCA9554_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9554)) + +DT_COMPAT_NXP_PCA9555 := nxp,pca9555 + +config DT_HAS_NXP_PCA9555_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9555)) + +DT_COMPAT_NXP_PCA95XX := nxp,pca95xx + +config DT_HAS_NXP_PCA95XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA95XX)) + +DT_COMPAT_NXP_PCA9633 := nxp,pca9633 + +config DT_HAS_NXP_PCA9633_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9633)) + +DT_COMPAT_NXP_PCA9685_PWM := nxp,pca9685-pwm + +config DT_HAS_NXP_PCA9685_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCA9685_PWM)) + +DT_COMPAT_NXP_PCAL6408 := nxp,pcal6408 + +config DT_HAS_NXP_PCAL6408_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL6408)) + +DT_COMPAT_NXP_PCAL6408A := nxp,pcal6408a + +config DT_HAS_NXP_PCAL6408A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL6408A)) + +DT_COMPAT_NXP_PCAL6416 := nxp,pcal6416 + +config DT_HAS_NXP_PCAL6416_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL6416)) + +DT_COMPAT_NXP_PCAL6416A := nxp,pcal6416a + +config DT_HAS_NXP_PCAL6416A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL6416A)) + +DT_COMPAT_NXP_PCAL6524 := nxp,pcal6524 + +config DT_HAS_NXP_PCAL6524_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL6524)) + +DT_COMPAT_NXP_PCAL6534 := nxp,pcal6534 + +config DT_HAS_NXP_PCAL6534_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL6534)) + +DT_COMPAT_NXP_PCAL9538 := nxp,pcal9538 + +config DT_HAS_NXP_PCAL9538_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL9538)) + +DT_COMPAT_NXP_PCAL9539 := nxp,pcal9539 + +config DT_HAS_NXP_PCAL9539_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL9539)) + +DT_COMPAT_NXP_PCAL9722 := nxp,pcal9722 + +config DT_HAS_NXP_PCAL9722_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCAL9722)) + +DT_COMPAT_NXP_PCF2123 := nxp,pcf2123 + +config DT_HAS_NXP_PCF2123_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCF2123)) + +DT_COMPAT_NXP_PCF85063A := nxp,pcf85063a + +config DT_HAS_NXP_PCF85063A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCF85063A)) + +DT_COMPAT_NXP_PCF8523 := nxp,pcf8523 + +config DT_HAS_NXP_PCF8523_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCF8523)) + +DT_COMPAT_NXP_PCF8563 := nxp,pcf8563 + +config DT_HAS_NXP_PCF8563_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCF8563)) + +DT_COMPAT_NXP_PCF857X := nxp,pcf857x + +config DT_HAS_NXP_PCF857X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PCF857X)) + +DT_COMPAT_NXP_PDCFG_POWER := nxp,pdcfg-power + +config DT_HAS_NXP_PDCFG_POWER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PDCFG_POWER)) + +DT_COMPAT_NXP_PF1550 := nxp,pf1550 + +config DT_HAS_NXP_PF1550_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PF1550)) + +DT_COMPAT_NXP_PF1550_CHARGER := nxp,pf1550-charger + +config DT_HAS_NXP_PF1550_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PF1550_CHARGER)) + +DT_COMPAT_NXP_PF1550_REGULATOR := nxp,pf1550-regulator + +config DT_HAS_NXP_PF1550_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PF1550_REGULATOR)) + +DT_COMPAT_NXP_PINT := nxp,pint + +config DT_HAS_NXP_PINT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PINT)) + +DT_COMPAT_NXP_PIT := nxp,pit + +config DT_HAS_NXP_PIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PIT)) + +DT_COMPAT_NXP_PIT_CHANNEL := nxp,pit-channel + +config DT_HAS_NXP_PIT_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PIT_CHANNEL)) + +DT_COMPAT_NXP_PLLDIG := nxp,plldig + +config DT_HAS_NXP_PLLDIG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PLLDIG)) + +DT_COMPAT_NXP_PMC_TMPSNS := nxp,pmc-tmpsns + +config DT_HAS_NXP_PMC_TMPSNS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PMC_TMPSNS)) + +DT_COMPAT_NXP_PORT_PINCTRL := nxp,port-pinctrl + +config DT_HAS_NXP_PORT_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PORT_PINCTRL)) + +DT_COMPAT_NXP_PORT_PINMUX := nxp,port-pinmux + +config DT_HAS_NXP_PORT_PINMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PORT_PINMUX)) + +DT_COMPAT_NXP_PXP := nxp,pxp + +config DT_HAS_NXP_PXP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_PXP)) + +DT_COMPAT_NXP_QDEC_S32 := nxp,qdec-s32 + +config DT_HAS_NXP_QDEC_S32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_QDEC_S32)) + +DT_COMPAT_NXP_QTMR_PWM := nxp,qtmr-pwm + +config DT_HAS_NXP_QTMR_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_QTMR_PWM)) + +DT_COMPAT_NXP_RCM_HWINFO := nxp,rcm-hwinfo + +config DT_HAS_NXP_RCM_HWINFO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RCM_HWINFO)) + +DT_COMPAT_NXP_RDC := nxp,rdc + +config DT_HAS_NXP_RDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RDC)) + +DT_COMPAT_NXP_RSTCTL := nxp,rstctl + +config DT_HAS_NXP_RSTCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RSTCTL)) + +DT_COMPAT_NXP_RSTCTL_HWINFO := nxp,rstctl-hwinfo + +config DT_HAS_NXP_RSTCTL_HWINFO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RSTCTL_HWINFO)) + +DT_COMPAT_NXP_RT_IOCON_PINCTRL := nxp,rt-iocon-pinctrl + +config DT_HAS_NXP_RT_IOCON_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RT_IOCON_PINCTRL)) + +DT_COMPAT_NXP_RT600_DSP_CTRL := nxp,rt600-dsp-ctrl + +config DT_HAS_NXP_RT600_DSP_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RT600_DSP_CTRL)) + +DT_COMPAT_NXP_RT700_DSP_CTRL_HIFI4 := nxp,rt700-dsp-ctrl-hifi4 + +config DT_HAS_NXP_RT700_DSP_CTRL_HIFI4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RT700_DSP_CTRL_HIFI4)) + +DT_COMPAT_NXP_RT7XX_OCOTP := nxp,rt7xx-ocotp + +config DT_HAS_NXP_RT7XX_OCOTP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RT7XX_OCOTP)) + +DT_COMPAT_NXP_RTC := nxp,rtc + +config DT_HAS_NXP_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RTC)) + +DT_COMPAT_NXP_RTC_ANALOG := nxp,rtc-analog + +config DT_HAS_NXP_RTC_ANALOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RTC_ANALOG)) + +DT_COMPAT_NXP_RTC_JDP := nxp,rtc-jdp + +config DT_HAS_NXP_RTC_JDP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RTC_JDP)) + +DT_COMPAT_NXP_RTWDOG := nxp,rtwdog + +config DT_HAS_NXP_RTWDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RTWDOG)) + +DT_COMPAT_NXP_RTXXX_DSP_CTRL := nxp,rtxxx-dsp-ctrl + +config DT_HAS_NXP_RTXXX_DSP_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RTXXX_DSP_CTRL)) + +DT_COMPAT_NXP_RW_PMU := nxp,rw-pmu + +config DT_HAS_NXP_RW_PMU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RW_PMU)) + +DT_COMPAT_NXP_RW_SOC_CTRL := nxp,rw-soc-ctrl + +config DT_HAS_NXP_RW_SOC_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_RW_SOC_CTRL)) + +DT_COMPAT_NXP_S32_ADC_SAR := nxp,s32-adc-sar + +config DT_HAS_NXP_S32_ADC_SAR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_ADC_SAR)) + +DT_COMPAT_NXP_S32_CANXL := nxp,s32-canxl + +config DT_HAS_NXP_S32_CANXL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_CANXL)) + +DT_COMPAT_NXP_S32_CLOCK := nxp,s32-clock + +config DT_HAS_NXP_S32_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_CLOCK)) + +DT_COMPAT_NXP_S32_CRYPTO_HSE_MU := nxp,s32-crypto-hse-mu + +config DT_HAS_NXP_S32_CRYPTO_HSE_MU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_CRYPTO_HSE_MU)) + +DT_COMPAT_NXP_S32_EMIOS := nxp,s32-emios + +config DT_HAS_NXP_S32_EMIOS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_EMIOS)) + +DT_COMPAT_NXP_S32_EMIOS_PWM := nxp,s32-emios-pwm + +config DT_HAS_NXP_S32_EMIOS_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_EMIOS_PWM)) + +DT_COMPAT_NXP_S32_GMAC := nxp,s32-gmac + +config DT_HAS_NXP_S32_GMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_GMAC)) + +DT_COMPAT_NXP_S32_GMAC_MDIO := nxp,s32-gmac-mdio + +config DT_HAS_NXP_S32_GMAC_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_GMAC_MDIO)) + +DT_COMPAT_NXP_S32_LCU := nxp,s32-lcu + +config DT_HAS_NXP_S32_LCU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_LCU)) + +DT_COMPAT_NXP_S32_LINFLEXD := nxp,s32-linflexd + +config DT_HAS_NXP_S32_LINFLEXD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_LINFLEXD)) + +DT_COMPAT_NXP_S32_MC_ME := nxp,s32-mc-me + +config DT_HAS_NXP_S32_MC_ME_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_MC_ME)) + +DT_COMPAT_NXP_S32_MC_RGM := nxp,s32-mc-rgm + +config DT_HAS_NXP_S32_MC_RGM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_MC_RGM)) + +DT_COMPAT_NXP_S32_MRU := nxp,s32-mru + +config DT_HAS_NXP_S32_MRU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_MRU)) + +DT_COMPAT_NXP_S32_NETC_EMDIO := nxp,s32-netc-emdio + +config DT_HAS_NXP_S32_NETC_EMDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_NETC_EMDIO)) + +DT_COMPAT_NXP_S32_NETC_PSI := nxp,s32-netc-psi + +config DT_HAS_NXP_S32_NETC_PSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_NETC_PSI)) + +DT_COMPAT_NXP_S32_NETC_VSI := nxp,s32-netc-vsi + +config DT_HAS_NXP_S32_NETC_VSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_NETC_VSI)) + +DT_COMPAT_NXP_S32_PSI5 := nxp,s32-psi5 + +config DT_HAS_NXP_S32_PSI5_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_PSI5)) + +DT_COMPAT_NXP_S32_QSPI := nxp,s32-qspi + +config DT_HAS_NXP_S32_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_QSPI)) + +DT_COMPAT_NXP_S32_QSPI_DEVICE := nxp,s32-qspi-device + +config DT_HAS_NXP_S32_QSPI_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_QSPI_DEVICE)) + +DT_COMPAT_NXP_S32_QSPI_HYPERFLASH := nxp,s32-qspi-hyperflash + +config DT_HAS_NXP_S32_QSPI_HYPERFLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_QSPI_HYPERFLASH)) + +DT_COMPAT_NXP_S32_QSPI_NOR := nxp,s32-qspi-nor + +config DT_HAS_NXP_S32_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_QSPI_NOR)) + +DT_COMPAT_NXP_S32_QSPI_SFP_FRAD := nxp,s32-qspi-sfp-frad + +config DT_HAS_NXP_S32_QSPI_SFP_FRAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_QSPI_SFP_FRAD)) + +DT_COMPAT_NXP_S32_QSPI_SFP_MDAD := nxp,s32-qspi-sfp-mdad + +config DT_HAS_NXP_S32_QSPI_SFP_MDAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_QSPI_SFP_MDAD)) + +DT_COMPAT_NXP_S32_SENT := nxp,s32-sent + +config DT_HAS_NXP_S32_SENT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_SENT)) + +DT_COMPAT_NXP_S32_SPI := nxp,s32-spi + +config DT_HAS_NXP_S32_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_SPI)) + +DT_COMPAT_NXP_S32_SWT := nxp,s32-swt + +config DT_HAS_NXP_S32_SWT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_SWT)) + +DT_COMPAT_NXP_S32_SYS_TIMER := nxp,s32-sys-timer + +config DT_HAS_NXP_S32_SYS_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_SYS_TIMER)) + +DT_COMPAT_NXP_S32_TRGMUX := nxp,s32-trgmux + +config DT_HAS_NXP_S32_TRGMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_TRGMUX)) + +DT_COMPAT_NXP_S32_WKPU := nxp,s32-wkpu + +config DT_HAS_NXP_S32_WKPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_WKPU)) + +DT_COMPAT_NXP_S32_XSPI := nxp,s32-xspi + +config DT_HAS_NXP_S32_XSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_XSPI)) + +DT_COMPAT_NXP_S32_XSPI_DEVICE := nxp,s32-xspi-device + +config DT_HAS_NXP_S32_XSPI_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_XSPI_DEVICE)) + +DT_COMPAT_NXP_S32_XSPI_HYPERRAM := nxp,s32-xspi-hyperram + +config DT_HAS_NXP_S32_XSPI_HYPERRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_XSPI_HYPERRAM)) + +DT_COMPAT_NXP_S32_XSPI_SFP_FRAD := nxp,s32-xspi-sfp-frad + +config DT_HAS_NXP_S32_XSPI_SFP_FRAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_XSPI_SFP_FRAD)) + +DT_COMPAT_NXP_S32_XSPI_SFP_MDAD := nxp,s32-xspi-sfp-mdad + +config DT_HAS_NXP_S32_XSPI_SFP_MDAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32_XSPI_SFP_MDAD)) + +DT_COMPAT_NXP_S32K3_PMC := nxp,s32k3-pmc + +config DT_HAS_NXP_S32K3_PMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32K3_PMC)) + +DT_COMPAT_NXP_S32K3_SIUL2_PINCTRL := nxp,s32k3-siul2-pinctrl + +config DT_HAS_NXP_S32K3_SIUL2_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32K3_SIUL2_PINCTRL)) + +DT_COMPAT_NXP_S32K5_PINCTRL := nxp,s32k5-pinctrl + +config DT_HAS_NXP_S32K5_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32K5_PINCTRL)) + +DT_COMPAT_NXP_S32ZE_SIUL2_PINCTRL := nxp,s32ze-siul2-pinctrl + +config DT_HAS_NXP_S32ZE_SIUL2_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_S32ZE_SIUL2_PINCTRL)) + +DT_COMPAT_NXP_SAR_ADC := nxp,sar-adc + +config DT_HAS_NXP_SAR_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SAR_ADC)) + +DT_COMPAT_NXP_SC18IM704 := nxp,sc18im704 + +config DT_HAS_NXP_SC18IM704_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SC18IM704)) + +DT_COMPAT_NXP_SC18IM704_GPIO := nxp,sc18im704-gpio + +config DT_HAS_NXP_SC18IM704_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SC18IM704_GPIO)) + +DT_COMPAT_NXP_SC18IM704_I2C := nxp,sc18im704-i2c + +config DT_HAS_NXP_SC18IM704_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SC18IM704_I2C)) + +DT_COMPAT_NXP_SC18IS606 := nxp,sc18is606 + +config DT_HAS_NXP_SC18IS606_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SC18IS606)) + +DT_COMPAT_NXP_SC18IS606_GPIO := nxp,sc18is606-gpio + +config DT_HAS_NXP_SC18IS606_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SC18IS606_GPIO)) + +DT_COMPAT_NXP_SC18IS606_SPI := nxp,sc18is606-spi + +config DT_HAS_NXP_SC18IS606_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SC18IS606_SPI)) + +DT_COMPAT_NXP_SCG_K4 := nxp,scg-k4 + +config DT_HAS_NXP_SCG_K4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SCG_K4)) + +DT_COMPAT_NXP_SCMI_CPU := nxp,scmi-cpu + +config DT_HAS_NXP_SCMI_CPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SCMI_CPU)) + +DT_COMPAT_NXP_SCTIMER_PWM := nxp,sctimer-pwm + +config DT_HAS_NXP_SCTIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SCTIMER_PWM)) + +DT_COMPAT_NXP_SCU_PD := nxp,scu-pd + +config DT_HAS_NXP_SCU_PD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SCU_PD)) + +DT_COMPAT_NXP_SDMA := nxp,sdma + +config DT_HAS_NXP_SDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SDMA)) + +DT_COMPAT_NXP_SEMA42 := nxp,sema42 + +config DT_HAS_NXP_SEMA42_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SEMA42)) + +DT_COMPAT_NXP_SIM_UUID := nxp,sim-uuid + +config DT_HAS_NXP_SIM_UUID_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SIM_UUID)) + +DT_COMPAT_NXP_SIUL2_EIRQ := nxp,siul2-eirq + +config DT_HAS_NXP_SIUL2_EIRQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SIUL2_EIRQ)) + +DT_COMPAT_NXP_SIUL2_GPIO := nxp,siul2-gpio + +config DT_HAS_NXP_SIUL2_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SIUL2_GPIO)) + +DT_COMPAT_NXP_SMARTDMA := nxp,smartdma + +config DT_HAS_NXP_SMARTDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SMARTDMA)) + +DT_COMPAT_NXP_SOF_HOST_DMA := nxp,sof-host-dma + +config DT_HAS_NXP_SOF_HOST_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SOF_HOST_DMA)) + +DT_COMPAT_NXP_SPC := nxp,spc + +config DT_HAS_NXP_SPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SPC)) + +DT_COMPAT_NXP_STM := nxp,stm + +config DT_HAS_NXP_STM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_STM)) + +DT_COMPAT_NXP_SYSCTR := nxp,sysctr + +config DT_HAS_NXP_SYSCTR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SYSCTR)) + +DT_COMPAT_NXP_SYSMPU := nxp,sysmpu + +config DT_HAS_NXP_SYSMPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_SYSMPU)) + +DT_COMPAT_NXP_T1S_PHY := nxp,t1s-phy + +config DT_HAS_NXP_T1S_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_T1S_PHY)) + +DT_COMPAT_NXP_TEMPMON := nxp,tempmon + +config DT_HAS_NXP_TEMPMON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TEMPMON)) + +DT_COMPAT_NXP_TEMPSENSE := nxp,tempsense + +config DT_HAS_NXP_TEMPSENSE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TEMPSENSE)) + +DT_COMPAT_NXP_TJA1103 := nxp,tja1103 + +config DT_HAS_NXP_TJA1103_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TJA1103)) + +DT_COMPAT_NXP_TJA11XX := nxp,tja11xx + +config DT_HAS_NXP_TJA11XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TJA11XX)) + +DT_COMPAT_NXP_TMPSNS := nxp,tmpsns + +config DT_HAS_NXP_TMPSNS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TMPSNS)) + +DT_COMPAT_NXP_TPM_QDEC := nxp,tpm-qdec + +config DT_HAS_NXP_TPM_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TPM_QDEC)) + +DT_COMPAT_NXP_TPM_TIMER := nxp,tpm-timer + +config DT_HAS_NXP_TPM_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TPM_TIMER)) + +DT_COMPAT_NXP_TSI_INPUT := nxp,tsi-input + +config DT_HAS_NXP_TSI_INPUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_TSI_INPUT)) + +DT_COMPAT_NXP_UHC_EHCI := nxp,uhc-ehci + +config DT_HAS_NXP_UHC_EHCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_UHC_EHCI)) + +DT_COMPAT_NXP_UHC_IP3516HS := nxp,uhc-ip3516hs + +config DT_HAS_NXP_UHC_IP3516HS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_UHC_IP3516HS)) + +DT_COMPAT_NXP_UHC_KHCI := nxp,uhc-khci + +config DT_HAS_NXP_UHC_KHCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_UHC_KHCI)) + +DT_COMPAT_NXP_UHC_OHCI := nxp,uhc-ohci + +config DT_HAS_NXP_UHC_OHCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_UHC_OHCI)) + +DT_COMPAT_NXP_USBPHY := nxp,usbphy + +config DT_HAS_NXP_USBPHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_USBPHY)) + +DT_COMPAT_NXP_VBAT := nxp,vbat + +config DT_HAS_NXP_VBAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_VBAT)) + +DT_COMPAT_NXP_VF610_ADC := nxp,vf610-adc + +config DT_HAS_NXP_VF610_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_VF610_ADC)) + +DT_COMPAT_NXP_VIDEO_SMARTDMA := nxp,video-smartdma + +config DT_HAS_NXP_VIDEO_SMARTDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_VIDEO_SMARTDMA)) + +DT_COMPAT_NXP_VREF := nxp,vref + +config DT_HAS_NXP_VREF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_VREF)) + +DT_COMPAT_NXP_VREFV1 := nxp,vrefv1 + +config DT_HAS_NXP_VREFV1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_VREFV1)) + +DT_COMPAT_NXP_WDOG32 := nxp,wdog32 + +config DT_HAS_NXP_WDOG32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_WDOG32)) + +DT_COMPAT_NXP_WIFI := nxp,wifi + +config DT_HAS_NXP_WIFI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_WIFI)) + +DT_COMPAT_NXP_WUU := nxp,wuu + +config DT_HAS_NXP_WUU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_WUU)) + +DT_COMPAT_NXP_XSPI := nxp,xspi + +config DT_HAS_NXP_XSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_XSPI)) + +DT_COMPAT_NXP_XSPI_NOR := nxp,xspi-nor + +config DT_HAS_NXP_XSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_XSPI_NOR)) + +DT_COMPAT_NXP_XSPI_PSRAM := nxp,xspi-psram + +config DT_HAS_NXP_XSPI_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_NXP_XSPI_PSRAM)) + +DT_COMPAT_OMRON_2SMPB_02E := omron,2smpb-02e + +config DT_HAS_OMRON_2SMPB_02E_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OMRON_2SMPB_02E)) + +DT_COMPAT_OMRON_D6F_P0001 := omron,d6f-p0001 + +config DT_HAS_OMRON_D6F_P0001_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OMRON_D6F_P0001)) + +DT_COMPAT_OMRON_D6F_P0010 := omron,d6f-p0010 + +config DT_HAS_OMRON_D6F_P0010_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OMRON_D6F_P0010)) + +DT_COMPAT_ONNN_FUSB307_TCPC := onnn,fusb307-tcpc + +config DT_HAS_ONNN_FUSB307_TCPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ONNN_FUSB307_TCPC)) + +DT_COMPAT_ONNN_LC709203F := onnn,lc709203f + +config DT_HAS_ONNN_LC709203F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ONNN_LC709203F)) + +DT_COMPAT_ONNN_NCP5623 := onnn,ncp5623 + +config DT_HAS_ONNN_NCP5623_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ONNN_NCP5623)) + +DT_COMPAT_ONNN_NCT75 := onnn,nct75 + +config DT_HAS_ONNN_NCT75_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ONNN_NCT75)) + +DT_COMPAT_OPENCORES_OR1K_PIC_LEVEL := opencores,or1k-pic-level + +config DT_HAS_OPENCORES_OR1K_PIC_LEVEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENCORES_OR1K_PIC_LEVEL)) + +DT_COMPAT_OPENCORES_SPI_SIMPLE := opencores,spi-simple + +config DT_HAS_OPENCORES_SPI_SIMPLE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENCORES_SPI_SIMPLE)) + +DT_COMPAT_OPENHWGROUP_CVA6 := openhwgroup,cva6 + +config DT_HAS_OPENHWGROUP_CVA6_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENHWGROUP_CVA6)) + +DT_COMPAT_OPENISA_RI5CY := openisa,ri5cy + +config DT_HAS_OPENISA_RI5CY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RI5CY)) + +DT_COMPAT_OPENISA_RV32M1_EVENT_UNIT := openisa,rv32m1-event-unit + +config DT_HAS_OPENISA_RV32M1_EVENT_UNIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_EVENT_UNIT)) + +DT_COMPAT_OPENISA_RV32M1_FTFE := openisa,rv32m1-ftfe + +config DT_HAS_OPENISA_RV32M1_FTFE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_FTFE)) + +DT_COMPAT_OPENISA_RV32M1_GENFSK := openisa,rv32m1-genfsk + +config DT_HAS_OPENISA_RV32M1_GENFSK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_GENFSK)) + +DT_COMPAT_OPENISA_RV32M1_GPIO := openisa,rv32m1-gpio + +config DT_HAS_OPENISA_RV32M1_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_GPIO)) + +DT_COMPAT_OPENISA_RV32M1_INTMUX := openisa,rv32m1-intmux + +config DT_HAS_OPENISA_RV32M1_INTMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_INTMUX)) + +DT_COMPAT_OPENISA_RV32M1_INTMUX_CH := openisa,rv32m1-intmux-ch + +config DT_HAS_OPENISA_RV32M1_INTMUX_CH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_INTMUX_CH)) + +DT_COMPAT_OPENISA_RV32M1_LPI2C := openisa,rv32m1-lpi2c + +config DT_HAS_OPENISA_RV32M1_LPI2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_LPI2C)) + +DT_COMPAT_OPENISA_RV32M1_LPSPI := openisa,rv32m1-lpspi + +config DT_HAS_OPENISA_RV32M1_LPSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_LPSPI)) + +DT_COMPAT_OPENISA_RV32M1_LPTMR := openisa,rv32m1-lptmr + +config DT_HAS_OPENISA_RV32M1_LPTMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_LPTMR)) + +DT_COMPAT_OPENISA_RV32M1_LPUART := openisa,rv32m1-lpuart + +config DT_HAS_OPENISA_RV32M1_LPUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_LPUART)) + +DT_COMPAT_OPENISA_RV32M1_PCC := openisa,rv32m1-pcc + +config DT_HAS_OPENISA_RV32M1_PCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_PCC)) + +DT_COMPAT_OPENISA_RV32M1_PINCTRL := openisa,rv32m1-pinctrl + +config DT_HAS_OPENISA_RV32M1_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_PINCTRL)) + +DT_COMPAT_OPENISA_RV32M1_PINMUX := openisa,rv32m1-pinmux + +config DT_HAS_OPENISA_RV32M1_PINMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_PINMUX)) + +DT_COMPAT_OPENISA_RV32M1_TPM := openisa,rv32m1-tpm + +config DT_HAS_OPENISA_RV32M1_TPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_TPM)) + +DT_COMPAT_OPENISA_RV32M1_TRNG := openisa,rv32m1-trng + +config DT_HAS_OPENISA_RV32M1_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_RV32M1_TRNG)) + +DT_COMPAT_OPENISA_ZERO_RI5CY := openisa,zero-ri5cy + +config DT_HAS_OPENISA_ZERO_RI5CY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENISA_ZERO_RI5CY)) + +DT_COMPAT_OPENTHREAD_CONFIG := openthread,config + +config DT_HAS_OPENTHREAD_CONFIG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OPENTHREAD_CONFIG)) + +DT_COMPAT_ORISETECH_OTM8009A := orisetech,otm8009a + +config DT_HAS_ORISETECH_OTM8009A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ORISETECH_OTM8009A)) + +DT_COMPAT_OVTI_OV2640 := ovti,ov2640 + +config DT_HAS_OVTI_OV2640_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV2640)) + +DT_COMPAT_OVTI_OV5640 := ovti,ov5640 + +config DT_HAS_OVTI_OV5640_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV5640)) + +DT_COMPAT_OVTI_OV5642 := ovti,ov5642 + +config DT_HAS_OVTI_OV5642_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV5642)) + +DT_COMPAT_OVTI_OV7670 := ovti,ov7670 + +config DT_HAS_OVTI_OV7670_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV7670)) + +DT_COMPAT_OVTI_OV7675 := ovti,ov7675 + +config DT_HAS_OVTI_OV7675_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV7675)) + +DT_COMPAT_OVTI_OV7725 := ovti,ov7725 + +config DT_HAS_OVTI_OV7725_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV7725)) + +DT_COMPAT_OVTI_OV9655 := ovti,ov9655 + +config DT_HAS_OVTI_OV9655_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_OVTI_OV9655)) + +DT_COMPAT_PANASONIC_AMG88XX := panasonic,amg88xx + +config DT_HAS_PANASONIC_AMG88XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PANASONIC_AMG88XX)) + +DT_COMPAT_PANASONIC_REDUCED_ARDUINO_HEADER := panasonic,reduced-arduino-header + +config DT_HAS_PANASONIC_REDUCED_ARDUINO_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PANASONIC_REDUCED_ARDUINO_HEADER)) + +DT_COMPAT_PARADE_PS8XXX := parade,ps8xxx + +config DT_HAS_PARADE_PS8XXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PARADE_PS8XXX)) + +DT_COMPAT_PARADE_TMA525B := parade,tma525b + +config DT_HAS_PARADE_TMA525B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PARADE_TMA525B)) + +DT_COMPAT_PARTICLE_GEN3_HEADER := particle-gen3-header + +config DT_HAS_PARTICLE_GEN3_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PARTICLE_GEN3_HEADER)) + +DT_COMPAT_PCI_HOST_ECAM_GENERIC := pci-host-ecam-generic + +config DT_HAS_PCI_HOST_ECAM_GENERIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PCI_HOST_ECAM_GENERIC)) + +DT_COMPAT_PCIE_CONTROLLER := pcie-controller + +config DT_HAS_PCIE_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PCIE_CONTROLLER)) + +DT_COMPAT_PEACEFAIR_PZEM004T := peacefair,pzem004t + +config DT_HAS_PEACEFAIR_PZEM004T_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PEACEFAIR_PZEM004T)) + +DT_COMPAT_PHOSENSE_XBR818 := phosense,xbr818 + +config DT_HAS_PHOSENSE_XBR818_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PHOSENSE_XBR818)) + +DT_COMPAT_PIXART_PAA3905 := pixart,paa3905 + +config DT_HAS_PIXART_PAA3905_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PIXART_PAA3905)) + +DT_COMPAT_PIXART_PAJ7620 := pixart,paj7620 + +config DT_HAS_PIXART_PAJ7620_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PIXART_PAJ7620)) + +DT_COMPAT_PIXART_PAT912X := pixart,pat912x + +config DT_HAS_PIXART_PAT912X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PIXART_PAT912X)) + +DT_COMPAT_PIXART_PAT9136 := pixart,pat9136 + +config DT_HAS_PIXART_PAT9136_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PIXART_PAT9136)) + +DT_COMPAT_PIXART_PAW32XX := pixart,paw32xx + +config DT_HAS_PIXART_PAW32XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PIXART_PAW32XX)) + +DT_COMPAT_PIXART_PMW3610 := pixart,pmw3610 + +config DT_HAS_PIXART_PMW3610_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PIXART_PMW3610)) + +DT_COMPAT_PLANTOWER_PMS7003 := plantower,pms7003 + +config DT_HAS_PLANTOWER_PMS7003_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PLANTOWER_PMS7003)) + +DT_COMPAT_PNI_RM3100 := pni,rm3100 + +config DT_HAS_PNI_RM3100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PNI_RM3100)) + +DT_COMPAT_POWER_DOMAIN := power-domain + +config DT_HAS_POWER_DOMAIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_POWER_DOMAIN)) + +DT_COMPAT_POWER_DOMAIN_GPIO := power-domain-gpio + +config DT_HAS_POWER_DOMAIN_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_POWER_DOMAIN_GPIO)) + +DT_COMPAT_POWER_DOMAIN_GPIO_MONITOR := power-domain-gpio-monitor + +config DT_HAS_POWER_DOMAIN_GPIO_MONITOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_POWER_DOMAIN_GPIO_MONITOR)) + +DT_COMPAT_POWER_DOMAIN_SOC_STATE_CHANGE := power-domain-soc-state-change + +config DT_HAS_POWER_DOMAIN_SOC_STATE_CHANGE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_POWER_DOMAIN_SOC_STATE_CHANGE)) + +DT_COMPAT_PTC_PT6314 := ptc,pt6314 + +config DT_HAS_PTC_PT6314_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PTC_PT6314)) + +DT_COMPAT_PWM_CLOCK := pwm-clock + +config DT_HAS_PWM_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PWM_CLOCK)) + +DT_COMPAT_PWM_LEDS := pwm-leds + +config DT_HAS_PWM_LEDS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_PWM_LEDS)) + +DT_COMPAT_QCA_AR8031 := qca,ar8031 + +config DT_HAS_QCA_AR8031_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QCA_AR8031)) + +DT_COMPAT_QEMU_FW_CFG_IOPORT := qemu,fw-cfg-ioport + +config DT_HAS_QEMU_FW_CFG_IOPORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QEMU_FW_CFG_IOPORT)) + +DT_COMPAT_QEMU_FW_CFG_MMIO := qemu,fw-cfg-mmio + +config DT_HAS_QEMU_FW_CFG_MMIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QEMU_FW_CFG_MMIO)) + +DT_COMPAT_QEMU_IVSHMEM := qemu,ivshmem + +config DT_HAS_QEMU_IVSHMEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QEMU_IVSHMEM)) + +DT_COMPAT_QEMU_RAMFB := qemu,ramfb + +config DT_HAS_QEMU_RAMFB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QEMU_RAMFB)) + +DT_COMPAT_QEMU_RISCV_VIRT := qemu,riscv-virt + +config DT_HAS_QEMU_RISCV_VIRT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QEMU_RISCV_VIRT)) + +DT_COMPAT_QST_QMI8658A := qst,qmi8658a + +config DT_HAS_QST_QMI8658A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QST_QMI8658A)) + +DT_COMPAT_QUECTEL_BG95 := quectel,bg95 + +config DT_HAS_QUECTEL_BG95_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_BG95)) + +DT_COMPAT_QUECTEL_BG96 := quectel,bg96 + +config DT_HAS_QUECTEL_BG96_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_BG96)) + +DT_COMPAT_QUECTEL_BG9X := quectel,bg9x + +config DT_HAS_QUECTEL_BG9X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_BG9X)) + +DT_COMPAT_QUECTEL_EG25_G := quectel,eg25-g + +config DT_HAS_QUECTEL_EG25_G_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_EG25_G)) + +DT_COMPAT_QUECTEL_EG800Q := quectel,eg800q + +config DT_HAS_QUECTEL_EG800Q_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_EG800Q)) + +DT_COMPAT_QUECTEL_LC26G := quectel,lc26g + +config DT_HAS_QUECTEL_LC26G_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_LC26G)) + +DT_COMPAT_QUECTEL_LC76G := quectel,lc76g + +config DT_HAS_QUECTEL_LC76G_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_LC76G)) + +DT_COMPAT_QUECTEL_LC86G := quectel,lc86g + +config DT_HAS_QUECTEL_LC86G_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUECTEL_LC86G)) + +DT_COMPAT_QUICKLOGIC_EOS_S3_GPIO := quicklogic,eos-s3-gpio + +config DT_HAS_QUICKLOGIC_EOS_S3_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUICKLOGIC_EOS_S3_GPIO)) + +DT_COMPAT_QUICKLOGIC_EOS_S3_PINCTRL := quicklogic,eos-s3-pinctrl + +config DT_HAS_QUICKLOGIC_EOS_S3_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUICKLOGIC_EOS_S3_PINCTRL)) + +DT_COMPAT_QUICKLOGIC_USBSERIALPORT_S3B := quicklogic,usbserialport-s3b + +config DT_HAS_QUICKLOGIC_USBSERIALPORT_S3B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_QUICKLOGIC_USBSERIALPORT_S3B)) + +DT_COMPAT_RADIO_FEM_TWO_CTRL_PINS := radio-fem-two-ctrl-pins + +config DT_HAS_RADIO_FEM_TWO_CTRL_PINS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RADIO_FEM_TWO_CTRL_PINS)) + +DT_COMPAT_RADIO_GPIO_COEX := radio-gpio-coex + +config DT_HAS_RADIO_GPIO_COEX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RADIO_GPIO_COEX)) + +DT_COMPAT_RASPBERRYPI_CORE_SUPPLY_REGULATOR := raspberrypi,core-supply-regulator + +config DT_HAS_RASPBERRYPI_CORE_SUPPLY_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_CORE_SUPPLY_REGULATOR)) + +DT_COMPAT_RASPBERRYPI_CSI_CONNECTOR := raspberrypi,csi-connector + +config DT_HAS_RASPBERRYPI_CSI_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_CSI_CONNECTOR)) + +DT_COMPAT_RASPBERRYPI_PICO_ADC := raspberrypi,pico-adc + +config DT_HAS_RASPBERRYPI_PICO_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_ADC)) + +DT_COMPAT_RASPBERRYPI_PICO_CLOCK := raspberrypi,pico-clock + +config DT_HAS_RASPBERRYPI_PICO_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_CLOCK)) + +DT_COMPAT_RASPBERRYPI_PICO_CLOCK_CONTROLLER := raspberrypi,pico-clock-controller + +config DT_HAS_RASPBERRYPI_PICO_CLOCK_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_CLOCK_CONTROLLER)) + +DT_COMPAT_RASPBERRYPI_PICO_DMA := raspberrypi,pico-dma + +config DT_HAS_RASPBERRYPI_PICO_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_DMA)) + +DT_COMPAT_RASPBERRYPI_PICO_FLASH_CONTROLLER := raspberrypi,pico-flash-controller + +config DT_HAS_RASPBERRYPI_PICO_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_FLASH_CONTROLLER)) + +DT_COMPAT_RASPBERRYPI_PICO_GPIO := raspberrypi,pico-gpio + +config DT_HAS_RASPBERRYPI_PICO_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_GPIO)) + +DT_COMPAT_RASPBERRYPI_PICO_GPIO_PORT := raspberrypi,pico-gpio-port + +config DT_HAS_RASPBERRYPI_PICO_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_GPIO_PORT)) + +DT_COMPAT_RASPBERRYPI_PICO_HEADER := raspberrypi,pico-header + +config DT_HAS_RASPBERRYPI_PICO_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_HEADER)) + +DT_COMPAT_RASPBERRYPI_PICO_I2C := raspberrypi,pico-i2c + +config DT_HAS_RASPBERRYPI_PICO_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_I2C)) + +DT_COMPAT_RASPBERRYPI_PICO_MBOX := raspberrypi,pico-mbox + +config DT_HAS_RASPBERRYPI_PICO_MBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_MBOX)) + +DT_COMPAT_RASPBERRYPI_PICO_MIPI_DBI_PIO := raspberrypi,pico-mipi-dbi-pio + +config DT_HAS_RASPBERRYPI_PICO_MIPI_DBI_PIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_MIPI_DBI_PIO)) + +DT_COMPAT_RASPBERRYPI_PICO_PINCTRL := raspberrypi,pico-pinctrl + +config DT_HAS_RASPBERRYPI_PICO_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PINCTRL)) + +DT_COMPAT_RASPBERRYPI_PICO_PIO := raspberrypi,pico-pio + +config DT_HAS_RASPBERRYPI_PICO_PIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PIO)) + +DT_COMPAT_RASPBERRYPI_PICO_PIO_DEVICE := raspberrypi,pico-pio-device + +config DT_HAS_RASPBERRYPI_PICO_PIO_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PIO_DEVICE)) + +DT_COMPAT_RASPBERRYPI_PICO_PIT := raspberrypi,pico-pit + +config DT_HAS_RASPBERRYPI_PICO_PIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PIT)) + +DT_COMPAT_RASPBERRYPI_PICO_PIT_CHANNEL := raspberrypi,pico-pit-channel + +config DT_HAS_RASPBERRYPI_PICO_PIT_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PIT_CHANNEL)) + +DT_COMPAT_RASPBERRYPI_PICO_PLL := raspberrypi,pico-pll + +config DT_HAS_RASPBERRYPI_PICO_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PLL)) + +DT_COMPAT_RASPBERRYPI_PICO_PWM := raspberrypi,pico-pwm + +config DT_HAS_RASPBERRYPI_PICO_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_PWM)) + +DT_COMPAT_RASPBERRYPI_PICO_RESET := raspberrypi,pico-reset + +config DT_HAS_RASPBERRYPI_PICO_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_RESET)) + +DT_COMPAT_RASPBERRYPI_PICO_RNG := raspberrypi,pico-rng + +config DT_HAS_RASPBERRYPI_PICO_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_RNG)) + +DT_COMPAT_RASPBERRYPI_PICO_ROSC := raspberrypi,pico-rosc + +config DT_HAS_RASPBERRYPI_PICO_ROSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_ROSC)) + +DT_COMPAT_RASPBERRYPI_PICO_RTC := raspberrypi,pico-rtc + +config DT_HAS_RASPBERRYPI_PICO_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_RTC)) + +DT_COMPAT_RASPBERRYPI_PICO_SHA256 := raspberrypi,pico-sha256 + +config DT_HAS_RASPBERRYPI_PICO_SHA256_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_SHA256)) + +DT_COMPAT_RASPBERRYPI_PICO_SIO := raspberrypi,pico-sio + +config DT_HAS_RASPBERRYPI_PICO_SIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_SIO)) + +DT_COMPAT_RASPBERRYPI_PICO_SPI := raspberrypi,pico-spi + +config DT_HAS_RASPBERRYPI_PICO_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_SPI)) + +DT_COMPAT_RASPBERRYPI_PICO_SPI_PIO := raspberrypi,pico-spi-pio + +config DT_HAS_RASPBERRYPI_PICO_SPI_PIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_SPI_PIO)) + +DT_COMPAT_RASPBERRYPI_PICO_TEMP := raspberrypi,pico-temp + +config DT_HAS_RASPBERRYPI_PICO_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_TEMP)) + +DT_COMPAT_RASPBERRYPI_PICO_TIMER := raspberrypi,pico-timer + +config DT_HAS_RASPBERRYPI_PICO_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_TIMER)) + +DT_COMPAT_RASPBERRYPI_PICO_UART := raspberrypi,pico-uart + +config DT_HAS_RASPBERRYPI_PICO_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_UART)) + +DT_COMPAT_RASPBERRYPI_PICO_UART_PIO := raspberrypi,pico-uart-pio + +config DT_HAS_RASPBERRYPI_PICO_UART_PIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_UART_PIO)) + +DT_COMPAT_RASPBERRYPI_PICO_USBD := raspberrypi,pico-usbd + +config DT_HAS_RASPBERRYPI_PICO_USBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_USBD)) + +DT_COMPAT_RASPBERRYPI_PICO_WATCHDOG := raspberrypi,pico-watchdog + +config DT_HAS_RASPBERRYPI_PICO_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_WATCHDOG)) + +DT_COMPAT_RASPBERRYPI_PICO_XOSC := raspberrypi,pico-xosc + +config DT_HAS_RASPBERRYPI_PICO_XOSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_PICO_XOSC)) + +DT_COMPAT_RASPBERRYPI_RP1_GPIO := raspberrypi,rp1-gpio + +config DT_HAS_RASPBERRYPI_RP1_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_RP1_GPIO)) + +DT_COMPAT_RASPBERRYPI_40PINS_HEADER := raspberrypi-40pins-header + +config DT_HAS_RASPBERRYPI_40PINS_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RASPBERRYPI_40PINS_HEADER)) + +DT_COMPAT_RAYDIUM_RM67162 := raydium,rm67162 + +config DT_HAS_RAYDIUM_RM67162_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RAYDIUM_RM67162)) + +DT_COMPAT_RAYDIUM_RM67199 := raydium,rm67199 + +config DT_HAS_RAYDIUM_RM67199_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RAYDIUM_RM67199)) + +DT_COMPAT_RAYDIUM_RM68200 := raydium,rm68200 + +config DT_HAS_RAYDIUM_RM68200_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RAYDIUM_RM68200)) + +DT_COMPAT_RAYDIUM_RM692C9 := raydium,rm692c9 + +config DT_HAS_RAYDIUM_RM692C9_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RAYDIUM_RM692C9)) + +DT_COMPAT_REALTEK_AMEBA_GDMA := realtek,ameba-gdma + +config DT_HAS_REALTEK_AMEBA_GDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_AMEBA_GDMA)) + +DT_COMPAT_REALTEK_AMEBA_GPIO := realtek,ameba-gpio + +config DT_HAS_REALTEK_AMEBA_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_AMEBA_GPIO)) + +DT_COMPAT_REALTEK_AMEBA_LOGUART := realtek,ameba-loguart + +config DT_HAS_REALTEK_AMEBA_LOGUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_AMEBA_LOGUART)) + +DT_COMPAT_REALTEK_AMEBA_PINCTRL := realtek,ameba-pinctrl + +config DT_HAS_REALTEK_AMEBA_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_AMEBA_PINCTRL)) + +DT_COMPAT_REALTEK_AMEBA_RCC := realtek,ameba-rcc + +config DT_HAS_REALTEK_AMEBA_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_AMEBA_RCC)) + +DT_COMPAT_REALTEK_AMEBA_RTC := realtek,ameba-rtc + +config DT_HAS_REALTEK_AMEBA_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_AMEBA_RTC)) + +DT_COMPAT_REALTEK_BEE_AON_QDEC := realtek,bee-aon-qdec + +config DT_HAS_REALTEK_BEE_AON_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_AON_QDEC)) + +DT_COMPAT_REALTEK_BEE_BASIC_QDEC := realtek,bee-basic-qdec + +config DT_HAS_REALTEK_BEE_BASIC_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_BASIC_QDEC)) + +DT_COMPAT_REALTEK_BEE_BASIC_TIMER := realtek,bee-basic-timer + +config DT_HAS_REALTEK_BEE_BASIC_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_BASIC_TIMER)) + +DT_COMPAT_REALTEK_BEE_BT_HCI := realtek,bee-bt-hci + +config DT_HAS_REALTEK_BEE_BT_HCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_BT_HCI)) + +DT_COMPAT_REALTEK_BEE_CCTL := realtek,bee-cctl + +config DT_HAS_REALTEK_BEE_CCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_CCTL)) + +DT_COMPAT_REALTEK_BEE_COUNTER_RTC := realtek,bee-counter-rtc + +config DT_HAS_REALTEK_BEE_COUNTER_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_COUNTER_RTC)) + +DT_COMPAT_REALTEK_BEE_COUNTER_TIMER := realtek,bee-counter-timer + +config DT_HAS_REALTEK_BEE_COUNTER_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_COUNTER_TIMER)) + +DT_COMPAT_REALTEK_BEE_DMA := realtek,bee-dma + +config DT_HAS_REALTEK_BEE_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_DMA)) + +DT_COMPAT_REALTEK_BEE_ENHANCED_TIMER := realtek,bee-enhanced-timer + +config DT_HAS_REALTEK_BEE_ENHANCED_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_ENHANCED_TIMER)) + +DT_COMPAT_REALTEK_BEE_GPIO := realtek,bee-gpio + +config DT_HAS_REALTEK_BEE_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_GPIO)) + +DT_COMPAT_REALTEK_BEE_I2C := realtek,bee-i2c + +config DT_HAS_REALTEK_BEE_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_I2C)) + +DT_COMPAT_REALTEK_BEE_KEYSCAN := realtek,bee-keyscan + +config DT_HAS_REALTEK_BEE_KEYSCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_KEYSCAN)) + +DT_COMPAT_REALTEK_BEE_PINCTRL := realtek,bee-pinctrl + +config DT_HAS_REALTEK_BEE_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_PINCTRL)) + +DT_COMPAT_REALTEK_BEE_PWM := realtek,bee-pwm + +config DT_HAS_REALTEK_BEE_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_PWM)) + +DT_COMPAT_REALTEK_BEE_QDEC := realtek,bee-qdec + +config DT_HAS_REALTEK_BEE_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_QDEC)) + +DT_COMPAT_REALTEK_BEE_TIMER := realtek,bee-timer + +config DT_HAS_REALTEK_BEE_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_TIMER)) + +DT_COMPAT_REALTEK_BEE_TRNG := realtek,bee-trng + +config DT_HAS_REALTEK_BEE_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_TRNG)) + +DT_COMPAT_REALTEK_BEE_UART := realtek,bee-uart + +config DT_HAS_REALTEK_BEE_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_BEE_UART)) + +DT_COMPAT_REALTEK_RTL8211F := realtek,rtl8211f + +config DT_HAS_REALTEK_RTL8211F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTL8211F)) + +DT_COMPAT_REALTEK_RTS5817_CLOCK := realtek,rts5817-clock + +config DT_HAS_REALTEK_RTS5817_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5817_CLOCK)) + +DT_COMPAT_REALTEK_RTS5817_PINCTRL := realtek,rts5817-pinctrl + +config DT_HAS_REALTEK_RTS5817_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5817_PINCTRL)) + +DT_COMPAT_REALTEK_RTS5817_RESET := realtek,rts5817-reset + +config DT_HAS_REALTEK_RTS5817_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5817_RESET)) + +DT_COMPAT_REALTEK_RTS5817_WATCHDOG := realtek,rts5817-watchdog + +config DT_HAS_REALTEK_RTS5817_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5817_WATCHDOG)) + +DT_COMPAT_REALTEK_RTS5912_ADC := realtek,rts5912-adc + +config DT_HAS_REALTEK_RTS5912_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_ADC)) + +DT_COMPAT_REALTEK_RTS5912_BBRAM := realtek,rts5912-bbram + +config DT_HAS_REALTEK_RTS5912_BBRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_BBRAM)) + +DT_COMPAT_REALTEK_RTS5912_ESPI := realtek,rts5912-espi + +config DT_HAS_REALTEK_RTS5912_ESPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_ESPI)) + +DT_COMPAT_REALTEK_RTS5912_FLASH_CONTROLLER := realtek,rts5912-flash-controller + +config DT_HAS_REALTEK_RTS5912_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_FLASH_CONTROLLER)) + +DT_COMPAT_REALTEK_RTS5912_GPIO := realtek,rts5912-gpio + +config DT_HAS_REALTEK_RTS5912_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_GPIO)) + +DT_COMPAT_REALTEK_RTS5912_I2C := realtek,rts5912-i2c + +config DT_HAS_REALTEK_RTS5912_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_I2C)) + +DT_COMPAT_REALTEK_RTS5912_KBD := realtek,rts5912-kbd + +config DT_HAS_REALTEK_RTS5912_KBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_KBD)) + +DT_COMPAT_REALTEK_RTS5912_PINCTRL := realtek,rts5912-pinctrl + +config DT_HAS_REALTEK_RTS5912_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_PINCTRL)) + +DT_COMPAT_REALTEK_RTS5912_PWM := realtek,rts5912-pwm + +config DT_HAS_REALTEK_RTS5912_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_PWM)) + +DT_COMPAT_REALTEK_RTS5912_RTC := realtek,rts5912-rtc + +config DT_HAS_REALTEK_RTS5912_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_RTC)) + +DT_COMPAT_REALTEK_RTS5912_RTMR := realtek,rts5912-rtmr + +config DT_HAS_REALTEK_RTS5912_RTMR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_RTMR)) + +DT_COMPAT_REALTEK_RTS5912_SCCON := realtek,rts5912-sccon + +config DT_HAS_REALTEK_RTS5912_SCCON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_SCCON)) + +DT_COMPAT_REALTEK_RTS5912_SHA := realtek,rts5912-sha + +config DT_HAS_REALTEK_RTS5912_SHA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_SHA)) + +DT_COMPAT_REALTEK_RTS5912_SLWTIMER := realtek,rts5912-slwtimer + +config DT_HAS_REALTEK_RTS5912_SLWTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_SLWTIMER)) + +DT_COMPAT_REALTEK_RTS5912_SPI := realtek,rts5912-spi + +config DT_HAS_REALTEK_RTS5912_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_SPI)) + +DT_COMPAT_REALTEK_RTS5912_TACH := realtek,rts5912-tach + +config DT_HAS_REALTEK_RTS5912_TACH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_TACH)) + +DT_COMPAT_REALTEK_RTS5912_TIMER := realtek,rts5912-timer + +config DT_HAS_REALTEK_RTS5912_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_TIMER)) + +DT_COMPAT_REALTEK_RTS5912_UART := realtek,rts5912-uart + +config DT_HAS_REALTEK_RTS5912_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_UART)) + +DT_COMPAT_REALTEK_RTS5912_ULPM := realtek,rts5912-ulpm + +config DT_HAS_REALTEK_RTS5912_ULPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_ULPM)) + +DT_COMPAT_REALTEK_RTS5912_WATCHDOG := realtek,rts5912-watchdog + +config DT_HAS_REALTEK_RTS5912_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REALTEK_RTS5912_WATCHDOG)) + +DT_COMPAT_REGULATOR_FIXED := regulator-fixed + +config DT_HAS_REGULATOR_FIXED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REGULATOR_FIXED)) + +DT_COMPAT_REGULATOR_GPIO := regulator-gpio + +config DT_HAS_REGULATOR_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REGULATOR_GPIO)) + +DT_COMPAT_RENESAS_BT_HCI_DA1453X := renesas,bt-hci-da1453x + +config DT_HAS_RENESAS_BT_HCI_DA1453X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_BT_HCI_DA1453X)) + +DT_COMPAT_RENESAS_BT_HCI_DA1469X := renesas,bt-hci-da1469x + +config DT_HAS_RENESAS_BT_HCI_DA1469X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_BT_HCI_DA1469X)) + +DT_COMPAT_RENESAS_HS300X := renesas,hs300x + +config DT_HAS_RENESAS_HS300X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_HS300X)) + +DT_COMPAT_RENESAS_HS400X := renesas,hs400x + +config DT_HAS_RENESAS_HS400X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_HS400X)) + +DT_COMPAT_RENESAS_OFS_MEMORY := renesas,ofs-memory + +config DT_HAS_RENESAS_OFS_MEMORY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_OFS_MEMORY)) + +DT_COMPAT_RENESAS_PWM_RCAR := renesas,pwm-rcar + +config DT_HAS_RENESAS_PWM_RCAR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_PWM_RCAR)) + +DT_COMPAT_RENESAS_R8A7795_CPG_MSSR := renesas,r8a7795-cpg-mssr + +config DT_HAS_RENESAS_R8A7795_CPG_MSSR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_R8A7795_CPG_MSSR)) + +DT_COMPAT_RENESAS_R8A779F0_CPG_MSSR := renesas,r8a779f0-cpg-mssr + +config DT_HAS_RENESAS_R8A779F0_CPG_MSSR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_R8A779F0_CPG_MSSR)) + +DT_COMPAT_RENESAS_R8A779G0_CPG_MSSR := renesas,r8a779g0-cpg-mssr + +config DT_HAS_RENESAS_R8A779G0_CPG_MSSR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_R8A779G0_CPG_MSSR)) + +DT_COMPAT_RENESAS_RA_ACMPHS := renesas,ra-acmphs + +config DT_HAS_RENESAS_RA_ACMPHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ACMPHS)) + +DT_COMPAT_RENESAS_RA_ACMPHS_GLOBAL := renesas,ra-acmphs-global + +config DT_HAS_RENESAS_RA_ACMPHS_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ACMPHS_GLOBAL)) + +DT_COMPAT_RENESAS_RA_ADC12 := renesas,ra-adc12 + +config DT_HAS_RENESAS_RA_ADC12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ADC12)) + +DT_COMPAT_RENESAS_RA_ADC16 := renesas,ra-adc16 + +config DT_HAS_RENESAS_RA_ADC16_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ADC16)) + +DT_COMPAT_RENESAS_RA_AGT := renesas,ra-agt + +config DT_HAS_RENESAS_RA_AGT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_AGT)) + +DT_COMPAT_RENESAS_RA_AGT_COUNTER := renesas,ra-agt-counter + +config DT_HAS_RENESAS_RA_AGT_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_AGT_COUNTER)) + +DT_COMPAT_RENESAS_RA_BATTERY_BACKUP := renesas,ra-battery-backup + +config DT_HAS_RENESAS_RA_BATTERY_BACKUP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_BATTERY_BACKUP)) + +DT_COMPAT_RENESAS_RA_CANFD := renesas,ra-canfd + +config DT_HAS_RENESAS_RA_CANFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CANFD)) + +DT_COMPAT_RENESAS_RA_CANFD_GLOBAL := renesas,ra-canfd-global + +config DT_HAS_RENESAS_RA_CANFD_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CANFD_GLOBAL)) + +DT_COMPAT_RENESAS_RA_CEU := renesas,ra-ceu + +config DT_HAS_RENESAS_RA_CEU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CEU)) + +DT_COMPAT_RENESAS_RA_CGC_BUSCLK := renesas,ra-cgc-busclk + +config DT_HAS_RENESAS_RA_CGC_BUSCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_BUSCLK)) + +DT_COMPAT_RENESAS_RA_CGC_EXTERNAL_CLOCK := renesas,ra-cgc-external-clock + +config DT_HAS_RENESAS_RA_CGC_EXTERNAL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_EXTERNAL_CLOCK)) + +DT_COMPAT_RENESAS_RA_CGC_PCLK := renesas,ra-cgc-pclk + +config DT_HAS_RENESAS_RA_CGC_PCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_PCLK)) + +DT_COMPAT_RENESAS_RA_CGC_PCLK_BLOCK := renesas,ra-cgc-pclk-block + +config DT_HAS_RENESAS_RA_CGC_PCLK_BLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_PCLK_BLOCK)) + +DT_COMPAT_RENESAS_RA_CGC_PLL := renesas,ra-cgc-pll + +config DT_HAS_RENESAS_RA_CGC_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_PLL)) + +DT_COMPAT_RENESAS_RA_CGC_PLL_OUT := renesas,ra-cgc-pll-out + +config DT_HAS_RENESAS_RA_CGC_PLL_OUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_PLL_OUT)) + +DT_COMPAT_RENESAS_RA_CGC_SUBCLK := renesas,ra-cgc-subclk + +config DT_HAS_RENESAS_RA_CGC_SUBCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_SUBCLK)) + +DT_COMPAT_RENESAS_RA_CGC_UTASEL := renesas,ra-cgc-utasel + +config DT_HAS_RENESAS_RA_CGC_UTASEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CGC_UTASEL)) + +DT_COMPAT_RENESAS_RA_CRC := renesas,ra-crc + +config DT_HAS_RENESAS_RA_CRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CRC)) + +DT_COMPAT_RENESAS_RA_CTSU := renesas,ra-ctsu + +config DT_HAS_RENESAS_RA_CTSU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CTSU)) + +DT_COMPAT_RENESAS_RA_CTSU_BUTTON := renesas,ra-ctsu-button + +config DT_HAS_RENESAS_RA_CTSU_BUTTON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CTSU_BUTTON)) + +DT_COMPAT_RENESAS_RA_CTSU_SLIDER := renesas,ra-ctsu-slider + +config DT_HAS_RENESAS_RA_CTSU_SLIDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CTSU_SLIDER)) + +DT_COMPAT_RENESAS_RA_CTSU_WHEEL := renesas,ra-ctsu-wheel + +config DT_HAS_RENESAS_RA_CTSU_WHEEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_CTSU_WHEEL)) + +DT_COMPAT_RENESAS_RA_DAC := renesas,ra-dac + +config DT_HAS_RENESAS_RA_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_DAC)) + +DT_COMPAT_RENESAS_RA_DAC_GLOBAL := renesas,ra-dac-global + +config DT_HAS_RENESAS_RA_DAC_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_DAC_GLOBAL)) + +DT_COMPAT_RENESAS_RA_DMA := renesas,ra-dma + +config DT_HAS_RENESAS_RA_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_DMA)) + +DT_COMPAT_RENESAS_RA_DRW := renesas,ra-drw + +config DT_HAS_RENESAS_RA_DRW_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_DRW)) + +DT_COMPAT_RENESAS_RA_ELC := renesas,ra-elc + +config DT_HAS_RENESAS_RA_ELC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ELC)) + +DT_COMPAT_RENESAS_RA_ESWM := renesas,ra-eswm + +config DT_HAS_RENESAS_RA_ESWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ESWM)) + +DT_COMPAT_RENESAS_RA_ETHERNET := renesas,ra-ethernet + +config DT_HAS_RENESAS_RA_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ETHERNET)) + +DT_COMPAT_RENESAS_RA_ETHERNET_RMAC := renesas,ra-ethernet-rmac + +config DT_HAS_RENESAS_RA_ETHERNET_RMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ETHERNET_RMAC)) + +DT_COMPAT_RENESAS_RA_EXTERNAL_INTERRUPT := renesas,ra-external-interrupt + +config DT_HAS_RENESAS_RA_EXTERNAL_INTERRUPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_EXTERNAL_INTERRUPT)) + +DT_COMPAT_RENESAS_RA_FLASH_HP_CONTROLLER := renesas,ra-flash-hp-controller + +config DT_HAS_RENESAS_RA_FLASH_HP_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_FLASH_HP_CONTROLLER)) + +DT_COMPAT_RENESAS_RA_FLASH_LP_CONTROLLER := renesas,ra-flash-lp-controller + +config DT_HAS_RENESAS_RA_FLASH_LP_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_FLASH_LP_CONTROLLER)) + +DT_COMPAT_RENESAS_RA_GLCDC := renesas,ra-glcdc + +config DT_HAS_RENESAS_RA_GLCDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_GLCDC)) + +DT_COMPAT_RENESAS_RA_GPIO_IOPORT := renesas,ra-gpio-ioport + +config DT_HAS_RENESAS_RA_GPIO_IOPORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_GPIO_IOPORT)) + +DT_COMPAT_RENESAS_RA_GPIO_MIPI_HEADER := renesas,ra-gpio-mipi-header + +config DT_HAS_RENESAS_RA_GPIO_MIPI_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_GPIO_MIPI_HEADER)) + +DT_COMPAT_RENESAS_RA_I2C_SCI := renesas,ra-i2c-sci + +config DT_HAS_RENESAS_RA_I2C_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_I2C_SCI)) + +DT_COMPAT_RENESAS_RA_I2C_SCI_B := renesas,ra-i2c-sci-b + +config DT_HAS_RENESAS_RA_I2C_SCI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_I2C_SCI_B)) + +DT_COMPAT_RENESAS_RA_I2S_SSIE := renesas,ra-i2s-ssie + +config DT_HAS_RENESAS_RA_I2S_SSIE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_I2S_SSIE)) + +DT_COMPAT_RENESAS_RA_I3C := renesas,ra-i3c + +config DT_HAS_RENESAS_RA_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_I3C)) + +DT_COMPAT_RENESAS_RA_IIC := renesas,ra-iic + +config DT_HAS_RENESAS_RA_IIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_IIC)) + +DT_COMPAT_RENESAS_RA_IPC_MBOX := renesas,ra-ipc-mbox + +config DT_HAS_RENESAS_RA_IPC_MBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_IPC_MBOX)) + +DT_COMPAT_RENESAS_RA_LVD := renesas,ra-lvd + +config DT_HAS_RENESAS_RA_LVD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_LVD)) + +DT_COMPAT_RENESAS_RA_MDIO := renesas,ra-mdio + +config DT_HAS_RENESAS_RA_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_MDIO)) + +DT_COMPAT_RENESAS_RA_MDIO_RMAC := renesas,ra-mdio-rmac + +config DT_HAS_RENESAS_RA_MDIO_RMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_MDIO_RMAC)) + +DT_COMPAT_RENESAS_RA_MIPI_DSI := renesas,ra-mipi-dsi + +config DT_HAS_RENESAS_RA_MIPI_DSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_MIPI_DSI)) + +DT_COMPAT_RENESAS_RA_MRAM_CONTROLLER := renesas,ra-mram-controller + +config DT_HAS_RENESAS_RA_MRAM_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_MRAM_CONTROLLER)) + +DT_COMPAT_RENESAS_RA_NPU := renesas,ra-npu + +config DT_HAS_RENESAS_RA_NPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_NPU)) + +DT_COMPAT_RENESAS_RA_NV_CODE_FLASH := renesas,ra-nv-code-flash + +config DT_HAS_RENESAS_RA_NV_CODE_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_NV_CODE_FLASH)) + +DT_COMPAT_RENESAS_RA_NV_DATA_FLASH := renesas,ra-nv-data-flash + +config DT_HAS_RENESAS_RA_NV_DATA_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_NV_DATA_FLASH)) + +DT_COMPAT_RENESAS_RA_NV_MRAM := renesas,ra-nv-mram + +config DT_HAS_RENESAS_RA_NV_MRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_NV_MRAM)) + +DT_COMPAT_RENESAS_RA_OSPI_B := renesas,ra-ospi-b + +config DT_HAS_RENESAS_RA_OSPI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_OSPI_B)) + +DT_COMPAT_RENESAS_RA_OSPI_B_NOR := renesas,ra-ospi-b-nor + +config DT_HAS_RENESAS_RA_OSPI_B_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_OSPI_B_NOR)) + +DT_COMPAT_RENESAS_RA_PARALLEL_GRAPHICS_HEADER := renesas,ra-parallel-graphics-header + +config DT_HAS_RENESAS_RA_PARALLEL_GRAPHICS_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_PARALLEL_GRAPHICS_HEADER)) + +DT_COMPAT_RENESAS_RA_PINCTRL_PFS := renesas,ra-pinctrl-pfs + +config DT_HAS_RENESAS_RA_PINCTRL_PFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_PINCTRL_PFS)) + +DT_COMPAT_RENESAS_RA_PWM := renesas,ra-pwm + +config DT_HAS_RENESAS_RA_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_PWM)) + +DT_COMPAT_RENESAS_RA_QSPI := renesas,ra-qspi + +config DT_HAS_RENESAS_RA_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_QSPI)) + +DT_COMPAT_RENESAS_RA_QSPI_NOR := renesas,ra-qspi-nor + +config DT_HAS_RENESAS_RA_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_QSPI_NOR)) + +DT_COMPAT_RENESAS_RA_RSIP_E50D_TRNG := renesas,ra-rsip-e50d-trng + +config DT_HAS_RENESAS_RA_RSIP_E50D_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_RSIP_E50D_TRNG)) + +DT_COMPAT_RENESAS_RA_RSIP_E51A_TRNG := renesas,ra-rsip-e51a-trng + +config DT_HAS_RENESAS_RA_RSIP_E51A_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_RSIP_E51A_TRNG)) + +DT_COMPAT_RENESAS_RA_RTC := renesas,ra-rtc + +config DT_HAS_RENESAS_RA_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_RTC)) + +DT_COMPAT_RENESAS_RA_SAU := renesas,ra-sau + +config DT_HAS_RENESAS_RA_SAU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SAU)) + +DT_COMPAT_RENESAS_RA_SAU_CHANNEL := renesas,ra-sau-channel + +config DT_HAS_RENESAS_RA_SAU_CHANNEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SAU_CHANNEL)) + +DT_COMPAT_RENESAS_RA_SCE5_RNG := renesas,ra-sce5-rng + +config DT_HAS_RENESAS_RA_SCE5_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SCE5_RNG)) + +DT_COMPAT_RENESAS_RA_SCE7_RNG := renesas,ra-sce7-rng + +config DT_HAS_RENESAS_RA_SCE7_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SCE7_RNG)) + +DT_COMPAT_RENESAS_RA_SCE9_RNG := renesas,ra-sce9-rng + +config DT_HAS_RENESAS_RA_SCE9_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SCE9_RNG)) + +DT_COMPAT_RENESAS_RA_SCI := renesas,ra-sci + +config DT_HAS_RENESAS_RA_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SCI)) + +DT_COMPAT_RENESAS_RA_SCI_UART := renesas,ra-sci-uart + +config DT_HAS_RENESAS_RA_SCI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SCI_UART)) + +DT_COMPAT_RENESAS_RA_SDHC := renesas,ra-sdhc + +config DT_HAS_RENESAS_RA_SDHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SDHC)) + +DT_COMPAT_RENESAS_RA_SDRAM := renesas,ra-sdram + +config DT_HAS_RENESAS_RA_SDRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SDRAM)) + +DT_COMPAT_RENESAS_RA_SPI := renesas,ra-spi + +config DT_HAS_RENESAS_RA_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SPI)) + +DT_COMPAT_RENESAS_RA_SPI_SCI := renesas,ra-spi-sci + +config DT_HAS_RENESAS_RA_SPI_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SPI_SCI)) + +DT_COMPAT_RENESAS_RA_SPI_SCI_B := renesas,ra-spi-sci-b + +config DT_HAS_RENESAS_RA_SPI_SCI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_SPI_SCI_B)) + +DT_COMPAT_RENESAS_RA_TRNG := renesas,ra-trng + +config DT_HAS_RENESAS_RA_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_TRNG)) + +DT_COMPAT_RENESAS_RA_UART_SAU := renesas,ra-uart-sau + +config DT_HAS_RENESAS_RA_UART_SAU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_UART_SAU)) + +DT_COMPAT_RENESAS_RA_UDC := renesas,ra-udc + +config DT_HAS_RENESAS_RA_UDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_UDC)) + +DT_COMPAT_RENESAS_RA_ULPT := renesas,ra-ulpt + +config DT_HAS_RENESAS_RA_ULPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ULPT)) + +DT_COMPAT_RENESAS_RA_ULPT_TIMER := renesas,ra-ulpt-timer + +config DT_HAS_RENESAS_RA_ULPT_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_ULPT_TIMER)) + +DT_COMPAT_RENESAS_RA_USBFS := renesas,ra-usbfs + +config DT_HAS_RENESAS_RA_USBFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_USBFS)) + +DT_COMPAT_RENESAS_RA_USBHS := renesas,ra-usbhs + +config DT_HAS_RENESAS_RA_USBHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_USBHS)) + +DT_COMPAT_RENESAS_RA_USBPHYC := renesas,ra-usbphyc + +config DT_HAS_RENESAS_RA_USBPHYC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_USBPHYC)) + +DT_COMPAT_RENESAS_RA_WDT := renesas,ra-wdt + +config DT_HAS_RENESAS_RA_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA_WDT)) + +DT_COMPAT_RENESAS_RA0_PINCTRL_PFS := renesas,ra0-pinctrl-pfs + +config DT_HAS_RENESAS_RA0_PINCTRL_PFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA0_PINCTRL_PFS)) + +DT_COMPAT_RENESAS_RA8_SPI_B := renesas,ra8-spi-b + +config DT_HAS_RENESAS_RA8_SPI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA8_SPI_B)) + +DT_COMPAT_RENESAS_RA8_UART_SCI_B := renesas,ra8-uart-sci-b + +config DT_HAS_RENESAS_RA8_UART_SCI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RA8_UART_SCI_B)) + +DT_COMPAT_RENESAS_RCAR_CAN := renesas,rcar-can + +config DT_HAS_RENESAS_RCAR_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_CAN)) + +DT_COMPAT_RENESAS_RCAR_CMT := renesas,rcar-cmt + +config DT_HAS_RENESAS_RCAR_CMT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_CMT)) + +DT_COMPAT_RENESAS_RCAR_GPIO := renesas,rcar-gpio + +config DT_HAS_RENESAS_RCAR_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_GPIO)) + +DT_COMPAT_RENESAS_RCAR_HSCIF := renesas,rcar-hscif + +config DT_HAS_RENESAS_RCAR_HSCIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_HSCIF)) + +DT_COMPAT_RENESAS_RCAR_I2C := renesas,rcar-i2c + +config DT_HAS_RENESAS_RCAR_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_I2C)) + +DT_COMPAT_RENESAS_RCAR_MMC := renesas,rcar-mmc + +config DT_HAS_RENESAS_RCAR_MMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_MMC)) + +DT_COMPAT_RENESAS_RCAR_PFC := renesas,rcar-pfc + +config DT_HAS_RENESAS_RCAR_PFC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_PFC)) + +DT_COMPAT_RENESAS_RCAR_SCIF := renesas,rcar-scif + +config DT_HAS_RENESAS_RCAR_SCIF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RCAR_SCIF)) + +DT_COMPAT_RENESAS_RX := renesas,rx + +config DT_HAS_RENESAS_RX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX)) + +DT_COMPAT_RENESAS_RX_ADC := renesas,rx-adc + +config DT_HAS_RENESAS_RX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_ADC)) + +DT_COMPAT_RENESAS_RX_CGC_PCLK := renesas,rx-cgc-pclk + +config DT_HAS_RENESAS_RX_CGC_PCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CGC_PCLK)) + +DT_COMPAT_RENESAS_RX_CGC_PCLK_BLOCK := renesas,rx-cgc-pclk-block + +config DT_HAS_RENESAS_RX_CGC_PCLK_BLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CGC_PCLK_BLOCK)) + +DT_COMPAT_RENESAS_RX_CGC_PLL := renesas,rx-cgc-pll + +config DT_HAS_RENESAS_RX_CGC_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CGC_PLL)) + +DT_COMPAT_RENESAS_RX_CGC_ROOT_CLOCK := renesas,rx-cgc-root-clock + +config DT_HAS_RENESAS_RX_CGC_ROOT_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CGC_ROOT_CLOCK)) + +DT_COMPAT_RENESAS_RX_CTSU := renesas,rx-ctsu + +config DT_HAS_RENESAS_RX_CTSU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CTSU)) + +DT_COMPAT_RENESAS_RX_CTSU_BUTTON := renesas,rx-ctsu-button + +config DT_HAS_RENESAS_RX_CTSU_BUTTON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CTSU_BUTTON)) + +DT_COMPAT_RENESAS_RX_CTSU_SLIDER := renesas,rx-ctsu-slider + +config DT_HAS_RENESAS_RX_CTSU_SLIDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CTSU_SLIDER)) + +DT_COMPAT_RENESAS_RX_CTSU_WHEEL := renesas,rx-ctsu-wheel + +config DT_HAS_RENESAS_RX_CTSU_WHEEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_CTSU_WHEEL)) + +DT_COMPAT_RENESAS_RX_DTC := renesas,rx-dtc + +config DT_HAS_RENESAS_RX_DTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_DTC)) + +DT_COMPAT_RENESAS_RX_EXTERNAL_INTERRUPT := renesas,rx-external-interrupt + +config DT_HAS_RENESAS_RX_EXTERNAL_INTERRUPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_EXTERNAL_INTERRUPT)) + +DT_COMPAT_RENESAS_RX_FLASH := renesas,rx-flash + +config DT_HAS_RENESAS_RX_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_FLASH)) + +DT_COMPAT_RENESAS_RX_GPIO := renesas,rx-gpio + +config DT_HAS_RENESAS_RX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_GPIO)) + +DT_COMPAT_RENESAS_RX_GRP_INTC := renesas,rx-grp-intc + +config DT_HAS_RENESAS_RX_GRP_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_GRP_INTC)) + +DT_COMPAT_RENESAS_RX_I2C := renesas,rx-i2c + +config DT_HAS_RENESAS_RX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_I2C)) + +DT_COMPAT_RENESAS_RX_ICU := renesas,rx-icu + +config DT_HAS_RENESAS_RX_ICU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_ICU)) + +DT_COMPAT_RENESAS_RX_IWDT := renesas,rx-iwdt + +config DT_HAS_RENESAS_RX_IWDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_IWDT)) + +DT_COMPAT_RENESAS_RX_LVD := renesas,rx-lvd + +config DT_HAS_RENESAS_RX_LVD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_LVD)) + +DT_COMPAT_RENESAS_RX_MTU := renesas,rx-mtu + +config DT_HAS_RENESAS_RX_MTU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_MTU)) + +DT_COMPAT_RENESAS_RX_MTU_PWM := renesas,rx-mtu-pwm + +config DT_HAS_RENESAS_RX_MTU_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_MTU_PWM)) + +DT_COMPAT_RENESAS_RX_NV_FLASH := renesas,rx-nv-flash + +config DT_HAS_RENESAS_RX_NV_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_NV_FLASH)) + +DT_COMPAT_RENESAS_RX_PINCTRL := renesas,rx-pinctrl + +config DT_HAS_RENESAS_RX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_PINCTRL)) + +DT_COMPAT_RENESAS_RX_PINMUX := renesas,rx-pinmux + +config DT_HAS_RENESAS_RX_PINMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_PINMUX)) + +DT_COMPAT_RENESAS_RX_RSPI := renesas,rx-rspi + +config DT_HAS_RENESAS_RX_RSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_RSPI)) + +DT_COMPAT_RENESAS_RX_SCI := renesas,rx-sci + +config DT_HAS_RENESAS_RX_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_SCI)) + +DT_COMPAT_RENESAS_RX_SWINT := renesas,rx-swint + +config DT_HAS_RENESAS_RX_SWINT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_SWINT)) + +DT_COMPAT_RENESAS_RX_TIMER_CMT := renesas,rx-timer-cmt + +config DT_HAS_RENESAS_RX_TIMER_CMT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_TIMER_CMT)) + +DT_COMPAT_RENESAS_RX_TIMER_CMT_START_CONTROL := renesas,rx-timer-cmt-start-control + +config DT_HAS_RENESAS_RX_TIMER_CMT_START_CONTROL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_TIMER_CMT_START_CONTROL)) + +DT_COMPAT_RENESAS_RX_UART_SCI := renesas,rx-uart-sci + +config DT_HAS_RENESAS_RX_UART_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_UART_SCI)) + +DT_COMPAT_RENESAS_RX_UART_SCI_QEMU := renesas,rx-uart-sci-qemu + +config DT_HAS_RENESAS_RX_UART_SCI_QEMU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RX_UART_SCI_QEMU)) + +DT_COMPAT_RENESAS_RXV1 := renesas,rxv1 + +config DT_HAS_RENESAS_RXV1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RXV1)) + +DT_COMPAT_RENESAS_RXV2 := renesas,rxv2 + +config DT_HAS_RENESAS_RXV2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RXV2)) + +DT_COMPAT_RENESAS_RXV3 := renesas,rxv3 + +config DT_HAS_RENESAS_RXV3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RXV3)) + +DT_COMPAT_RENESAS_RZ_ADC := renesas,rz-adc + +config DT_HAS_RENESAS_RZ_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_ADC)) + +DT_COMPAT_RENESAS_RZ_ADC_C := renesas,rz-adc-c + +config DT_HAS_RENESAS_RZ_ADC_C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_ADC_C)) + +DT_COMPAT_RENESAS_RZ_ADC_E := renesas,rz-adc-e + +config DT_HAS_RENESAS_RZ_ADC_E_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_ADC_E)) + +DT_COMPAT_RENESAS_RZ_CANFD := renesas,rz-canfd + +config DT_HAS_RENESAS_RZ_CANFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CANFD)) + +DT_COMPAT_RENESAS_RZ_CANFD_GLOBAL := renesas,rz-canfd-global + +config DT_HAS_RENESAS_RZ_CANFD_GLOBAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CANFD_GLOBAL)) + +DT_COMPAT_RENESAS_RZ_CGC := renesas,rz-cgc + +config DT_HAS_RENESAS_RZ_CGC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CGC)) + +DT_COMPAT_RENESAS_RZ_CGC_PLL := renesas,rz-cgc-pll + +config DT_HAS_RENESAS_RZ_CGC_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CGC_PLL)) + +DT_COMPAT_RENESAS_RZ_CGC_SUBCLK := renesas,rz-cgc-subclk + +config DT_HAS_RENESAS_RZ_CGC_SUBCLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CGC_SUBCLK)) + +DT_COMPAT_RENESAS_RZ_CGC_SYS_CLOCK := renesas,rz-cgc-sys-clock + +config DT_HAS_RENESAS_RZ_CGC_SYS_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CGC_SYS_CLOCK)) + +DT_COMPAT_RENESAS_RZ_CMTW := renesas,rz-cmtw + +config DT_HAS_RENESAS_RZ_CMTW_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CMTW)) + +DT_COMPAT_RENESAS_RZ_CMTW_COUNTER := renesas,rz-cmtw-counter + +config DT_HAS_RENESAS_RZ_CMTW_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CMTW_COUNTER)) + +DT_COMPAT_RENESAS_RZ_CPG := renesas,rz-cpg + +config DT_HAS_RENESAS_RZ_CPG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CPG)) + +DT_COMPAT_RENESAS_RZ_CPG_CLOCK := renesas,rz-cpg-clock + +config DT_HAS_RENESAS_RZ_CPG_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CPG_CLOCK)) + +DT_COMPAT_RENESAS_RZ_CPG_PLL := renesas,rz-cpg-pll + +config DT_HAS_RENESAS_RZ_CPG_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_CPG_PLL)) + +DT_COMPAT_RENESAS_RZ_DMAC := renesas,rz-dmac + +config DT_HAS_RENESAS_RZ_DMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_DMAC)) + +DT_COMPAT_RENESAS_RZ_DMAC_B := renesas,rz-dmac-b + +config DT_HAS_RENESAS_RZ_DMAC_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_DMAC_B)) + +DT_COMPAT_RENESAS_RZ_EXT_IRQ := renesas,rz-ext-irq + +config DT_HAS_RENESAS_RZ_EXT_IRQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_EXT_IRQ)) + +DT_COMPAT_RENESAS_RZ_GPIO := renesas,rz-gpio + +config DT_HAS_RENESAS_RZ_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPIO)) + +DT_COMPAT_RENESAS_RZ_GPIO_COMMON := renesas,rz-gpio-common + +config DT_HAS_RENESAS_RZ_GPIO_COMMON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPIO_COMMON)) + +DT_COMPAT_RENESAS_RZ_GPIO_COMMON_V2 := renesas,rz-gpio-common-v2 + +config DT_HAS_RENESAS_RZ_GPIO_COMMON_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPIO_COMMON_V2)) + +DT_COMPAT_RENESAS_RZ_GPIO_COMMON_V3 := renesas,rz-gpio-common-v3 + +config DT_HAS_RENESAS_RZ_GPIO_COMMON_V3_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPIO_COMMON_V3)) + +DT_COMPAT_RENESAS_RZ_GPIO_INT := renesas,rz-gpio-int + +config DT_HAS_RENESAS_RZ_GPIO_INT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPIO_INT)) + +DT_COMPAT_RENESAS_RZ_GPT := renesas,rz-gpt + +config DT_HAS_RENESAS_RZ_GPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPT)) + +DT_COMPAT_RENESAS_RZ_GPT_PWM := renesas,rz-gpt-pwm + +config DT_HAS_RENESAS_RZ_GPT_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GPT_PWM)) + +DT_COMPAT_RENESAS_RZ_GTM := renesas,rz-gtm + +config DT_HAS_RENESAS_RZ_GTM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GTM)) + +DT_COMPAT_RENESAS_RZ_GTM_COUNTER := renesas,rz-gtm-counter + +config DT_HAS_RENESAS_RZ_GTM_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GTM_COUNTER)) + +DT_COMPAT_RENESAS_RZ_GTM_OS_TIMER := renesas,rz-gtm-os-timer + +config DT_HAS_RENESAS_RZ_GTM_OS_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_GTM_OS_TIMER)) + +DT_COMPAT_RENESAS_RZ_ICU := renesas,rz-icu + +config DT_HAS_RENESAS_RZ_ICU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_ICU)) + +DT_COMPAT_RENESAS_RZ_ICU_V2 := renesas,rz-icu-v2 + +config DT_HAS_RENESAS_RZ_ICU_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_ICU_V2)) + +DT_COMPAT_RENESAS_RZ_IIC := renesas,rz-iic + +config DT_HAS_RENESAS_RZ_IIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_IIC)) + +DT_COMPAT_RENESAS_RZ_INTC := renesas,rz-intc + +config DT_HAS_RENESAS_RZ_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_INTC)) + +DT_COMPAT_RENESAS_RZ_INTC_V2 := renesas,rz-intc-v2 + +config DT_HAS_RENESAS_RZ_INTC_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_INTC_V2)) + +DT_COMPAT_RENESAS_RZ_MHU_MBOX := renesas,rz-mhu-mbox + +config DT_HAS_RENESAS_RZ_MHU_MBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_MHU_MBOX)) + +DT_COMPAT_RENESAS_RZ_MTU := renesas,rz-mtu + +config DT_HAS_RENESAS_RZ_MTU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_MTU)) + +DT_COMPAT_RENESAS_RZ_MTU_PWM := renesas,rz-mtu-pwm + +config DT_HAS_RENESAS_RZ_MTU_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_MTU_PWM)) + +DT_COMPAT_RENESAS_RZ_QSPI_SPIBSC := renesas,rz-qspi-spibsc + +config DT_HAS_RENESAS_RZ_QSPI_SPIBSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_QSPI_SPIBSC)) + +DT_COMPAT_RENESAS_RZ_QSPI_XSPI := renesas,rz-qspi-xspi + +config DT_HAS_RENESAS_RZ_QSPI_XSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_QSPI_XSPI)) + +DT_COMPAT_RENESAS_RZ_RIIC := renesas,rz-riic + +config DT_HAS_RENESAS_RZ_RIIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_RIIC)) + +DT_COMPAT_RENESAS_RZ_RSPI := renesas,rz-rspi + +config DT_HAS_RENESAS_RZ_RSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_RSPI)) + +DT_COMPAT_RENESAS_RZ_SCI := renesas,rz-sci + +config DT_HAS_RENESAS_RZ_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SCI)) + +DT_COMPAT_RENESAS_RZ_SCI_B := renesas,rz-sci-b + +config DT_HAS_RENESAS_RZ_SCI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SCI_B)) + +DT_COMPAT_RENESAS_RZ_SCI_B_UART := renesas,rz-sci-b-uart + +config DT_HAS_RENESAS_RZ_SCI_B_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SCI_B_UART)) + +DT_COMPAT_RENESAS_RZ_SCI_UART := renesas,rz-sci-uart + +config DT_HAS_RENESAS_RZ_SCI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SCI_UART)) + +DT_COMPAT_RENESAS_RZ_SCIF_UART := renesas,rz-scif-uart + +config DT_HAS_RENESAS_RZ_SCIF_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SCIF_UART)) + +DT_COMPAT_RENESAS_RZ_SPI := renesas,rz-spi + +config DT_HAS_RENESAS_RZ_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SPI)) + +DT_COMPAT_RENESAS_RZ_SPI_B := renesas,rz-spi-b + +config DT_HAS_RENESAS_RZ_SPI_B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SPI_B)) + +DT_COMPAT_RENESAS_RZ_SPIBSC := renesas,rz-spibsc + +config DT_HAS_RENESAS_RZ_SPIBSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_SPIBSC)) + +DT_COMPAT_RENESAS_RZ_TINT := renesas,rz-tint + +config DT_HAS_RENESAS_RZ_TINT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_TINT)) + +DT_COMPAT_RENESAS_RZ_WDT := renesas,rz-wdt + +config DT_HAS_RENESAS_RZ_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_WDT)) + +DT_COMPAT_RENESAS_RZ_XSPI := renesas,rz-xspi + +config DT_HAS_RENESAS_RZ_XSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZ_XSPI)) + +DT_COMPAT_RENESAS_RZA_PINCTRL := renesas,rza-pinctrl + +config DT_HAS_RENESAS_RZA_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA_PINCTRL)) + +DT_COMPAT_RENESAS_RZA2M_ADC := renesas,rza2m-adc + +config DT_HAS_RENESAS_RZA2M_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_ADC)) + +DT_COMPAT_RENESAS_RZA2M_CPG := renesas,rza2m-cpg + +config DT_HAS_RENESAS_RZA2M_CPG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_CPG)) + +DT_COMPAT_RENESAS_RZA2M_GPIO := renesas,rza2m-gpio + +config DT_HAS_RENESAS_RZA2M_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_GPIO)) + +DT_COMPAT_RENESAS_RZA2M_GPIO_INT := renesas,rza2m-gpio-int + +config DT_HAS_RENESAS_RZA2M_GPIO_INT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_GPIO_INT)) + +DT_COMPAT_RENESAS_RZA2M_GPT := renesas,rza2m-gpt + +config DT_HAS_RENESAS_RZA2M_GPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_GPT)) + +DT_COMPAT_RENESAS_RZA2M_GPT_PWM := renesas,rza2m-gpt-pwm + +config DT_HAS_RENESAS_RZA2M_GPT_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_GPT_PWM)) + +DT_COMPAT_RENESAS_RZA2M_OSTM := renesas,rza2m-ostm + +config DT_HAS_RENESAS_RZA2M_OSTM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_OSTM)) + +DT_COMPAT_RENESAS_RZA2M_OSTM_COUNTER := renesas,rza2m-ostm-counter + +config DT_HAS_RENESAS_RZA2M_OSTM_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_OSTM_COUNTER)) + +DT_COMPAT_RENESAS_RZA2M_OSTM_TIMER := renesas,rza2m-ostm-timer + +config DT_HAS_RENESAS_RZA2M_OSTM_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_OSTM_TIMER)) + +DT_COMPAT_RENESAS_RZA2M_PINCTRL := renesas,rza2m-pinctrl + +config DT_HAS_RENESAS_RZA2M_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_PINCTRL)) + +DT_COMPAT_RENESAS_RZA2M_QSPI_SPIBSC := renesas,rza2m-qspi-spibsc + +config DT_HAS_RENESAS_RZA2M_QSPI_SPIBSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_QSPI_SPIBSC)) + +DT_COMPAT_RENESAS_RZA2M_RIIC := renesas,rza2m-riic + +config DT_HAS_RENESAS_RZA2M_RIIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_RIIC)) + +DT_COMPAT_RENESAS_RZA2M_SCIF_UART := renesas,rza2m-scif-uart + +config DT_HAS_RENESAS_RZA2M_SCIF_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZA2M_SCIF_UART)) + +DT_COMPAT_RENESAS_RZG_PINCTRL := renesas,rzg-pinctrl + +config DT_HAS_RENESAS_RZG_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZG_PINCTRL)) + +DT_COMPAT_RENESAS_RZN_PINCTRL := renesas,rzn-pinctrl + +config DT_HAS_RENESAS_RZN_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZN_PINCTRL)) + +DT_COMPAT_RENESAS_RZT_PINCTRL := renesas,rzt-pinctrl + +config DT_HAS_RENESAS_RZT_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZT_PINCTRL)) + +DT_COMPAT_RENESAS_RZT2M_GPIO := renesas,rzt2m-gpio + +config DT_HAS_RENESAS_RZT2M_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZT2M_GPIO)) + +DT_COMPAT_RENESAS_RZT2M_GPIO_COMMON := renesas,rzt2m-gpio-common + +config DT_HAS_RENESAS_RZT2M_GPIO_COMMON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZT2M_GPIO_COMMON)) + +DT_COMPAT_RENESAS_RZT2M_PINCTRL := renesas,rzt2m-pinctrl + +config DT_HAS_RENESAS_RZT2M_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZT2M_PINCTRL)) + +DT_COMPAT_RENESAS_RZT2M_UART := renesas,rzt2m-uart + +config DT_HAS_RENESAS_RZT2M_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZT2M_UART)) + +DT_COMPAT_RENESAS_RZV_PINCTRL := renesas,rzv-pinctrl + +config DT_HAS_RENESAS_RZV_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_RZV_PINCTRL)) + +DT_COMPAT_RENESAS_SLG47105 := renesas,slg47105 + +config DT_HAS_RENESAS_SLG47105_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SLG47105)) + +DT_COMPAT_RENESAS_SLG47115 := renesas,slg47115 + +config DT_HAS_RENESAS_SLG47115_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SLG47115)) + +DT_COMPAT_RENESAS_SLG471X5 := renesas,slg471x5 + +config DT_HAS_RENESAS_SLG471X5_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SLG471X5)) + +DT_COMPAT_RENESAS_SLG47910 := renesas,slg47910 + +config DT_HAS_RENESAS_SLG47910_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SLG47910)) + +DT_COMPAT_RENESAS_SMARTBOND_ADC := renesas,smartbond-adc + +config DT_HAS_RENESAS_SMARTBOND_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_ADC)) + +DT_COMPAT_RENESAS_SMARTBOND_CRYPTO := renesas,smartbond-crypto + +config DT_HAS_RENESAS_SMARTBOND_CRYPTO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_CRYPTO)) + +DT_COMPAT_RENESAS_SMARTBOND_DISPLAY := renesas,smartbond-display + +config DT_HAS_RENESAS_SMARTBOND_DISPLAY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_DISPLAY)) + +DT_COMPAT_RENESAS_SMARTBOND_DMA := renesas,smartbond-dma + +config DT_HAS_RENESAS_SMARTBOND_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_DMA)) + +DT_COMPAT_RENESAS_SMARTBOND_FLASH_CONTROLLER := renesas,smartbond-flash-controller + +config DT_HAS_RENESAS_SMARTBOND_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_FLASH_CONTROLLER)) + +DT_COMPAT_RENESAS_SMARTBOND_GPIO := renesas,smartbond-gpio + +config DT_HAS_RENESAS_SMARTBOND_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_GPIO)) + +DT_COMPAT_RENESAS_SMARTBOND_I2C := renesas,smartbond-i2c + +config DT_HAS_RENESAS_SMARTBOND_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_I2C)) + +DT_COMPAT_RENESAS_SMARTBOND_LP_CLK := renesas,smartbond-lp-clk + +config DT_HAS_RENESAS_SMARTBOND_LP_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_LP_CLK)) + +DT_COMPAT_RENESAS_SMARTBOND_LP_OSC := renesas,smartbond-lp-osc + +config DT_HAS_RENESAS_SMARTBOND_LP_OSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_LP_OSC)) + +DT_COMPAT_RENESAS_SMARTBOND_MIPI_DBI := renesas,smartbond-mipi-dbi + +config DT_HAS_RENESAS_SMARTBOND_MIPI_DBI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_MIPI_DBI)) + +DT_COMPAT_RENESAS_SMARTBOND_NOR_PSRAM := renesas,smartbond-nor-psram + +config DT_HAS_RENESAS_SMARTBOND_NOR_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_NOR_PSRAM)) + +DT_COMPAT_RENESAS_SMARTBOND_PINCTRL := renesas,smartbond-pinctrl + +config DT_HAS_RENESAS_SMARTBOND_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_PINCTRL)) + +DT_COMPAT_RENESAS_SMARTBOND_REGULATOR := renesas,smartbond-regulator + +config DT_HAS_RENESAS_SMARTBOND_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_REGULATOR)) + +DT_COMPAT_RENESAS_SMARTBOND_RTC := renesas,smartbond-rtc + +config DT_HAS_RENESAS_SMARTBOND_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_RTC)) + +DT_COMPAT_RENESAS_SMARTBOND_SDADC := renesas,smartbond-sdadc + +config DT_HAS_RENESAS_SMARTBOND_SDADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_SDADC)) + +DT_COMPAT_RENESAS_SMARTBOND_SPI := renesas,smartbond-spi + +config DT_HAS_RENESAS_SMARTBOND_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_SPI)) + +DT_COMPAT_RENESAS_SMARTBOND_SYS_CLK := renesas,smartbond-sys-clk + +config DT_HAS_RENESAS_SMARTBOND_SYS_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_SYS_CLK)) + +DT_COMPAT_RENESAS_SMARTBOND_TIMER := renesas,smartbond-timer + +config DT_HAS_RENESAS_SMARTBOND_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_TIMER)) + +DT_COMPAT_RENESAS_SMARTBOND_TRNG := renesas,smartbond-trng + +config DT_HAS_RENESAS_SMARTBOND_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_TRNG)) + +DT_COMPAT_RENESAS_SMARTBOND_UART := renesas,smartbond-uart + +config DT_HAS_RENESAS_SMARTBOND_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_UART)) + +DT_COMPAT_RENESAS_SMARTBOND_USBD := renesas,smartbond-usbd + +config DT_HAS_RENESAS_SMARTBOND_USBD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_USBD)) + +DT_COMPAT_RENESAS_SMARTBOND_WATCHDOG := renesas,smartbond-watchdog + +config DT_HAS_RENESAS_SMARTBOND_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RENESAS_SMARTBOND_WATCHDOG)) + +DT_COMPAT_RESET_MMIO := reset-mmio + +config DT_HAS_RESET_MMIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RESET_MMIO)) + +DT_COMPAT_REYAX_RYLRXXX := reyax,rylrxxx + +config DT_HAS_REYAX_RYLRXXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_REYAX_RYLRXXX)) + +DT_COMPAT_RICHTEK_RT1715 := richtek,rt1715 + +config DT_HAS_RICHTEK_RT1715_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RICHTEK_RT1715)) + +DT_COMPAT_RICHTEK_RT1718S := richtek,rt1718s + +config DT_HAS_RICHTEK_RT1718S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RICHTEK_RT1718S)) + +DT_COMPAT_RICHTEK_RT1718S_GPIO_PORT := richtek,rt1718s-gpio-port + +config DT_HAS_RICHTEK_RT1718S_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RICHTEK_RT1718S_GPIO_PORT)) + +DT_COMPAT_RISCV := riscv + +config DT_HAS_RISCV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RISCV)) + +DT_COMPAT_RISCV_APLIC := riscv,aplic + +config DT_HAS_RISCV_APLIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RISCV_APLIC)) + +DT_COMPAT_RISCV_CLIC := riscv,clic + +config DT_HAS_RISCV_CLIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RISCV_CLIC)) + +DT_COMPAT_RISCV_CPU_INTC := riscv,cpu-intc + +config DT_HAS_RISCV_CPU_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RISCV_CPU_INTC)) + +DT_COMPAT_RISCV_IMSIC := riscv,imsic + +config DT_HAS_RISCV_IMSIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RISCV_IMSIC)) + +DT_COMPAT_RISCV_MACHINE_TIMER := riscv,machine-timer + +config DT_HAS_RISCV_MACHINE_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RISCV_MACHINE_TIMER)) + +DT_COMPAT_ROCKTECH_RK043FN02H_CT := rocktech,rk043fn02h-ct + +config DT_HAS_ROCKTECH_RK043FN02H_CT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROCKTECH_RK043FN02H_CT)) + +DT_COMPAT_ROHM_BD8LB600FS := rohm,bd8lb600fs + +config DT_HAS_ROHM_BD8LB600FS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROHM_BD8LB600FS)) + +DT_COMPAT_ROHM_BD8LB600FS_DIAGNOSTICS := rohm,bd8lb600fs-diagnostics + +config DT_HAS_ROHM_BD8LB600FS_DIAGNOSTICS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROHM_BD8LB600FS_DIAGNOSTICS)) + +DT_COMPAT_ROHM_BD8LB600FS_GPIO := rohm,bd8lb600fs-gpio + +config DT_HAS_ROHM_BD8LB600FS_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROHM_BD8LB600FS_GPIO)) + +DT_COMPAT_ROHM_BH1730 := rohm,bh1730 + +config DT_HAS_ROHM_BH1730_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROHM_BH1730)) + +DT_COMPAT_ROHM_BH1750 := rohm,bh1750 + +config DT_HAS_ROHM_BH1750_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROHM_BH1750)) + +DT_COMPAT_ROHM_BH1790 := rohm,bh1790 + +config DT_HAS_ROHM_BH1790_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ROHM_BH1790)) + +DT_COMPAT_RPMSG_UART := rpmsg-uart + +config DT_HAS_RPMSG_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_RPMSG_UART)) + +DT_COMPAT_SAMPLE_CONTROLLER := sample_controller + +config DT_HAS_SAMPLE_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SAMPLE_CONTROLLER)) + +DT_COMPAT_SBS_DEFAULT_SBS_GAUGE := sbs,default-sbs-gauge + +config DT_HAS_SBS_DEFAULT_SBS_GAUGE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SBS_DEFAULT_SBS_GAUGE)) + +DT_COMPAT_SBS_SBS_CHARGER := sbs,sbs-charger + +config DT_HAS_SBS_SBS_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SBS_SBS_CHARGER)) + +DT_COMPAT_SBS_SBS_GAUGE := sbs,sbs-gauge + +config DT_HAS_SBS_SBS_GAUGE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SBS_SBS_GAUGE)) + +DT_COMPAT_SBS_SBS_GAUGE_NEW_API := sbs,sbs-gauge-new-api + +config DT_HAS_SBS_SBS_GAUGE_NEW_API_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SBS_SBS_GAUGE_NEW_API)) + +DT_COMPAT_SCIOSENSE_ENS160 := sciosense,ens160 + +config DT_HAS_SCIOSENSE_ENS160_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SCIOSENSE_ENS160)) + +DT_COMPAT_SCT_SCT2024 := sct,sct2024 + +config DT_HAS_SCT_SCT2024_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SCT_SCT2024)) + +DT_COMPAT_SEEED_GROVE_LCD_RGB := seeed,grove-lcd-rgb + +config DT_HAS_SEEED_GROVE_LCD_RGB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEEED_GROVE_LCD_RGB)) + +DT_COMPAT_SEEED_GROVE_LIGHT := seeed,grove-light + +config DT_HAS_SEEED_GROVE_LIGHT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEEED_GROVE_LIGHT)) + +DT_COMPAT_SEEED_GROVE_TEMPERATURE := seeed,grove-temperature + +config DT_HAS_SEEED_GROVE_TEMPERATURE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEEED_GROVE_TEMPERATURE)) + +DT_COMPAT_SEEED_HM330X := seeed,hm330x + +config DT_HAS_SEEED_HM330X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEEED_HM330X)) + +DT_COMPAT_SEEED_XIAO_EXPAND := seeed,xiao-expand + +config DT_HAS_SEEED_XIAO_EXPAND_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEEED_XIAO_EXPAND)) + +DT_COMPAT_SEEED_XIAO_GPIO := seeed,xiao-gpio + +config DT_HAS_SEEED_XIAO_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEEED_XIAO_GPIO)) + +DT_COMPAT_SEGGER_RTT_UART := segger,rtt-uart + +config DT_HAS_SEGGER_RTT_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEGGER_RTT_UART)) + +DT_COMPAT_SEMTECH_LLCC68 := semtech,llcc68 + +config DT_HAS_SEMTECH_LLCC68_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_LLCC68)) + +DT_COMPAT_SEMTECH_SX1261 := semtech,sx1261 + +config DT_HAS_SEMTECH_SX1261_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1261)) + +DT_COMPAT_SEMTECH_SX1262 := semtech,sx1262 + +config DT_HAS_SEMTECH_SX1262_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1262)) + +DT_COMPAT_SEMTECH_SX1268 := semtech,sx1268 + +config DT_HAS_SEMTECH_SX1268_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1268)) + +DT_COMPAT_SEMTECH_SX1272 := semtech,sx1272 + +config DT_HAS_SEMTECH_SX1272_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1272)) + +DT_COMPAT_SEMTECH_SX1276 := semtech,sx1276 + +config DT_HAS_SEMTECH_SX1276_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1276)) + +DT_COMPAT_SEMTECH_SX1278 := semtech,sx1278 + +config DT_HAS_SEMTECH_SX1278_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1278)) + +DT_COMPAT_SEMTECH_SX1509B := semtech,sx1509b + +config DT_HAS_SEMTECH_SX1509B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX1509B)) + +DT_COMPAT_SEMTECH_SX9500 := semtech,sx9500 + +config DT_HAS_SEMTECH_SX9500_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_SX9500)) + +DT_COMPAT_SENSIRION_SCD40 := sensirion,scd40 + +config DT_HAS_SENSIRION_SCD40_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SCD40)) + +DT_COMPAT_SENSIRION_SCD41 := sensirion,scd41 + +config DT_HAS_SENSIRION_SCD41_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SCD41)) + +DT_COMPAT_SENSIRION_SGP40 := sensirion,sgp40 + +config DT_HAS_SENSIRION_SGP40_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SGP40)) + +DT_COMPAT_SENSIRION_SHT21 := sensirion,sht21 + +config DT_HAS_SENSIRION_SHT21_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SHT21)) + +DT_COMPAT_SENSIRION_SHT3XD := sensirion,sht3xd + +config DT_HAS_SENSIRION_SHT3XD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SHT3XD)) + +DT_COMPAT_SENSIRION_SHT4X := sensirion,sht4x + +config DT_HAS_SENSIRION_SHT4X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SHT4X)) + +DT_COMPAT_SENSIRION_SHTCX := sensirion,shtcx + +config DT_HAS_SENSIRION_SHTCX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_SHTCX)) + +DT_COMPAT_SENSIRION_STCC4 := sensirion,stcc4 + +config DT_HAS_SENSIRION_STCC4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_STCC4)) + +DT_COMPAT_SENSIRION_STS4X := sensirion,sts4x + +config DT_HAS_SENSIRION_STS4X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSIRION_STS4X)) + +DT_COMPAT_SENSRY_SY1XX := sensry,sy1xx + +config DT_HAS_SENSRY_SY1XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX)) + +DT_COMPAT_SENSRY_SY1XX_EVENT_UNIT := sensry,sy1xx-event-unit + +config DT_HAS_SENSRY_SY1XX_EVENT_UNIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_EVENT_UNIT)) + +DT_COMPAT_SENSRY_SY1XX_GPIO := sensry,sy1xx-gpio + +config DT_HAS_SENSRY_SY1XX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_GPIO)) + +DT_COMPAT_SENSRY_SY1XX_I2C := sensry,sy1xx-i2c + +config DT_HAS_SENSRY_SY1XX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_I2C)) + +DT_COMPAT_SENSRY_SY1XX_MAC := sensry,sy1xx-mac + +config DT_HAS_SENSRY_SY1XX_MAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_MAC)) + +DT_COMPAT_SENSRY_SY1XX_MDIO := sensry,sy1xx-mdio + +config DT_HAS_SENSRY_SY1XX_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_MDIO)) + +DT_COMPAT_SENSRY_SY1XX_PINCTRL := sensry,sy1xx-pinctrl + +config DT_HAS_SENSRY_SY1XX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_PINCTRL)) + +DT_COMPAT_SENSRY_SY1XX_SPI := sensry,sy1xx-spi + +config DT_HAS_SENSRY_SY1XX_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_SPI)) + +DT_COMPAT_SENSRY_SY1XX_SYS_TIMER := sensry,sy1xx-sys-timer + +config DT_HAS_SENSRY_SY1XX_SYS_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_SYS_TIMER)) + +DT_COMPAT_SENSRY_SY1XX_TRNG := sensry,sy1xx-trng + +config DT_HAS_SENSRY_SY1XX_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_TRNG)) + +DT_COMPAT_SENSRY_SY1XX_UART := sensry,sy1xx-uart + +config DT_HAS_SENSRY_SY1XX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSRY_SY1XX_UART)) + +DT_COMPAT_SENSYLINK_CHT8315 := sensylink,cht8315 + +config DT_HAS_SENSYLINK_CHT8315_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SENSYLINK_CHT8315)) + +DT_COMPAT_SHARED_IRQ := shared-irq + +config DT_HAS_SHARED_IRQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SHARED_IRQ)) + +DT_COMPAT_SHARP_LS0XX := sharp,ls0xx + +config DT_HAS_SHARP_LS0XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SHARP_LS0XX)) + +DT_COMPAT_SIEMENS_IVSHMEM_ETH := siemens,ivshmem-eth + +config DT_HAS_SIEMENS_IVSHMEM_ETH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIEMENS_IVSHMEM_ETH)) + +DT_COMPAT_SIFIVE_CLIC_DRAFT := sifive,clic-draft + +config DT_HAS_SIFIVE_CLIC_DRAFT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_CLIC_DRAFT)) + +DT_COMPAT_SIFIVE_CLINT0 := sifive,clint0 + +config DT_HAS_SIFIVE_CLINT0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_CLINT0)) + +DT_COMPAT_SIFIVE_DTIM0 := sifive,dtim0 + +config DT_HAS_SIFIVE_DTIM0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_DTIM0)) + +DT_COMPAT_SIFIVE_E24 := sifive,e24 + +config DT_HAS_SIFIVE_E24_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_E24)) + +DT_COMPAT_SIFIVE_E31 := sifive,e31 + +config DT_HAS_SIFIVE_E31_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_E31)) + +DT_COMPAT_SIFIVE_E51 := sifive,e51 + +config DT_HAS_SIFIVE_E51_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_E51)) + +DT_COMPAT_SIFIVE_FU740_C000_DDR := sifive,fu740-c000-ddr + +config DT_HAS_SIFIVE_FU740_C000_DDR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_FU740_C000_DDR)) + +DT_COMPAT_SIFIVE_GPIO0 := sifive,gpio0 + +config DT_HAS_SIFIVE_GPIO0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_GPIO0)) + +DT_COMPAT_SIFIVE_I2C0 := sifive,i2c0 + +config DT_HAS_SIFIVE_I2C0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_I2C0)) + +DT_COMPAT_SIFIVE_PINCTRL := sifive,pinctrl + +config DT_HAS_SIFIVE_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_PINCTRL)) + +DT_COMPAT_SIFIVE_PLIC_1_0_0 := sifive,plic-1.0.0 + +config DT_HAS_SIFIVE_PLIC_1_0_0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_PLIC_1_0_0)) + +DT_COMPAT_SIFIVE_PWM0 := sifive,pwm0 + +config DT_HAS_SIFIVE_PWM0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_PWM0)) + +DT_COMPAT_SIFIVE_S7 := sifive,s7 + +config DT_HAS_SIFIVE_S7_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_S7)) + +DT_COMPAT_SIFIVE_SPI0 := sifive,spi0 + +config DT_HAS_SIFIVE_SPI0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_SPI0)) + +DT_COMPAT_SIFIVE_U54 := sifive,u54 + +config DT_HAS_SIFIVE_U54_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_U54)) + +DT_COMPAT_SIFIVE_UART0 := sifive,uart0 + +config DT_HAS_SIFIVE_UART0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_UART0)) + +DT_COMPAT_SIFIVE_WDT := sifive,wdt + +config DT_HAS_SIFIVE_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFIVE_WDT)) + +DT_COMPAT_SIFLI_SF32LB_AON := sifli,sf32lb-aon + +config DT_HAS_SIFLI_SF32LB_AON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_AON)) + +DT_COMPAT_SIFLI_SF32LB_ATIM := sifli,sf32lb-atim + +config DT_HAS_SIFLI_SF32LB_ATIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_ATIM)) + +DT_COMPAT_SIFLI_SF32LB_ATIM_PWM := sifli,sf32lb-atim-pwm + +config DT_HAS_SIFLI_SF32LB_ATIM_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_ATIM_PWM)) + +DT_COMPAT_SIFLI_SF32LB_AUDCODEC := sifli,sf32lb-audcodec + +config DT_HAS_SIFLI_SF32LB_AUDCODEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_AUDCODEC)) + +DT_COMPAT_SIFLI_SF32LB_CFG := sifli,sf32lb-cfg + +config DT_HAS_SIFLI_SF32LB_CFG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_CFG)) + +DT_COMPAT_SIFLI_SF32LB_CRC := sifli,sf32lb-crc + +config DT_HAS_SIFLI_SF32LB_CRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_CRC)) + +DT_COMPAT_SIFLI_SF32LB_CRYPTO := sifli,sf32lb-crypto + +config DT_HAS_SIFLI_SF32LB_CRYPTO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_CRYPTO)) + +DT_COMPAT_SIFLI_SF32LB_DLL := sifli,sf32lb-dll + +config DT_HAS_SIFLI_SF32LB_DLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_DLL)) + +DT_COMPAT_SIFLI_SF32LB_DMAC := sifli,sf32lb-dmac + +config DT_HAS_SIFLI_SF32LB_DMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_DMAC)) + +DT_COMPAT_SIFLI_SF32LB_EFUSE := sifli,sf32lb-efuse + +config DT_HAS_SIFLI_SF32LB_EFUSE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_EFUSE)) + +DT_COMPAT_SIFLI_SF32LB_GPADC := sifli,sf32lb-gpadc + +config DT_HAS_SIFLI_SF32LB_GPADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_GPADC)) + +DT_COMPAT_SIFLI_SF32LB_GPIO := sifli,sf32lb-gpio + +config DT_HAS_SIFLI_SF32LB_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_GPIO)) + +DT_COMPAT_SIFLI_SF32LB_GPIO_PARENT := sifli,sf32lb-gpio-parent + +config DT_HAS_SIFLI_SF32LB_GPIO_PARENT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_GPIO_PARENT)) + +DT_COMPAT_SIFLI_SF32LB_GPT_PWM := sifli,sf32lb-gpt-pwm + +config DT_HAS_SIFLI_SF32LB_GPT_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_GPT_PWM)) + +DT_COMPAT_SIFLI_SF32LB_GPTIM := sifli,sf32lb-gptim + +config DT_HAS_SIFLI_SF32LB_GPTIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_GPTIM)) + +DT_COMPAT_SIFLI_SF32LB_HXT48 := sifli,sf32lb-hxt48 + +config DT_HAS_SIFLI_SF32LB_HXT48_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_HXT48)) + +DT_COMPAT_SIFLI_SF32LB_I2C := sifli,sf32lb-i2c + +config DT_HAS_SIFLI_SF32LB_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_I2C)) + +DT_COMPAT_SIFLI_SF32LB_LCDC := sifli,sf32lb-lcdc + +config DT_HAS_SIFLI_SF32LB_LCDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_LCDC)) + +DT_COMPAT_SIFLI_SF32LB_LCDC_MIPI_DBI := sifli,sf32lb-lcdc-mipi-dbi + +config DT_HAS_SIFLI_SF32LB_LCDC_MIPI_DBI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_LCDC_MIPI_DBI)) + +DT_COMPAT_SIFLI_SF32LB_MAILBOX := sifli,sf32lb-mailbox + +config DT_HAS_SIFLI_SF32LB_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_MAILBOX)) + +DT_COMPAT_SIFLI_SF32LB_MPI_QSPI_NOR := sifli,sf32lb-mpi-qspi-nor + +config DT_HAS_SIFLI_SF32LB_MPI_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_MPI_QSPI_NOR)) + +DT_COMPAT_SIFLI_SF32LB_PMUC := sifli,sf32lb-pmuc + +config DT_HAS_SIFLI_SF32LB_PMUC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_PMUC)) + +DT_COMPAT_SIFLI_SF32LB_RCC := sifli,sf32lb-rcc + +config DT_HAS_SIFLI_SF32LB_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_RCC)) + +DT_COMPAT_SIFLI_SF32LB_RCC_CLK := sifli,sf32lb-rcc-clk + +config DT_HAS_SIFLI_SF32LB_RCC_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_RCC_CLK)) + +DT_COMPAT_SIFLI_SF32LB_RCC_RCTL := sifli,sf32lb-rcc-rctl + +config DT_HAS_SIFLI_SF32LB_RCC_RCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_RCC_RCTL)) + +DT_COMPAT_SIFLI_SF32LB_RTC := sifli,sf32lb-rtc + +config DT_HAS_SIFLI_SF32LB_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_RTC)) + +DT_COMPAT_SIFLI_SF32LB_RTC_BACKUP := sifli,sf32lb-rtc-backup + +config DT_HAS_SIFLI_SF32LB_RTC_BACKUP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_RTC_BACKUP)) + +DT_COMPAT_SIFLI_SF32LB_SPI := sifli,sf32lb-spi + +config DT_HAS_SIFLI_SF32LB_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_SPI)) + +DT_COMPAT_SIFLI_SF32LB_TRNG := sifli,sf32lb-trng + +config DT_HAS_SIFLI_SF32LB_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_TRNG)) + +DT_COMPAT_SIFLI_SF32LB_TSEN := sifli,sf32lb-tsen + +config DT_HAS_SIFLI_SF32LB_TSEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_TSEN)) + +DT_COMPAT_SIFLI_SF32LB_USART := sifli,sf32lb-usart + +config DT_HAS_SIFLI_SF32LB_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_USART)) + +DT_COMPAT_SIFLI_SF32LB_WDT := sifli,sf32lb-wdt + +config DT_HAS_SIFLI_SF32LB_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB_WDT)) + +DT_COMPAT_SIFLI_SF32LB52X_PINMUX := sifli,sf32lb52x-pinmux + +config DT_HAS_SIFLI_SF32LB52X_PINMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIFLI_SF32LB52X_PINMUX)) + +DT_COMPAT_SILABS_ACMP := silabs,acmp + +config DT_HAS_SILABS_ACMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_ACMP)) + +DT_COMPAT_SILABS_BT_HCI_EFR32 := silabs,bt-hci-efr32 + +config DT_HAS_SILABS_BT_HCI_EFR32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_BT_HCI_EFR32)) + +DT_COMPAT_SILABS_BURAM := silabs,buram + +config DT_HAS_SILABS_BURAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_BURAM)) + +DT_COMPAT_SILABS_BURTC_COUNTER := silabs,burtc-counter + +config DT_HAS_SILABS_BURTC_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_BURTC_COUNTER)) + +DT_COMPAT_SILABS_DBUS_PINCTRL := silabs,dbus-pinctrl + +config DT_HAS_SILABS_DBUS_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_DBUS_PINCTRL)) + +DT_COMPAT_SILABS_EUSART_SPI := silabs,eusart-spi + +config DT_HAS_SILABS_EUSART_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_EUSART_SPI)) + +DT_COMPAT_SILABS_EUSART_UART := silabs,eusart-uart + +config DT_HAS_SILABS_EUSART_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_EUSART_UART)) + +DT_COMPAT_SILABS_EXP_HEADER := silabs,exp-header + +config DT_HAS_SILABS_EXP_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_EXP_HEADER)) + +DT_COMPAT_SILABS_GECKO_ADC := silabs,gecko-adc + +config DT_HAS_SILABS_GECKO_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_ADC)) + +DT_COMPAT_SILABS_GECKO_BURTC := silabs,gecko-burtc + +config DT_HAS_SILABS_GECKO_BURTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_BURTC)) + +DT_COMPAT_SILABS_GECKO_ETHERNET := silabs,gecko-ethernet + +config DT_HAS_SILABS_GECKO_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_ETHERNET)) + +DT_COMPAT_SILABS_GECKO_FLASH_CONTROLLER := silabs,gecko-flash-controller + +config DT_HAS_SILABS_GECKO_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_FLASH_CONTROLLER)) + +DT_COMPAT_SILABS_GECKO_GPIO := silabs,gecko-gpio + +config DT_HAS_SILABS_GECKO_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_GPIO)) + +DT_COMPAT_SILABS_GECKO_GPIO_PORT := silabs,gecko-gpio-port + +config DT_HAS_SILABS_GECKO_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_GPIO_PORT)) + +DT_COMPAT_SILABS_GECKO_I2C := silabs,gecko-i2c + +config DT_HAS_SILABS_GECKO_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_I2C)) + +DT_COMPAT_SILABS_GECKO_LEUART := silabs,gecko-leuart + +config DT_HAS_SILABS_GECKO_LEUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_LEUART)) + +DT_COMPAT_SILABS_GECKO_PINCTRL := silabs,gecko-pinctrl + +config DT_HAS_SILABS_GECKO_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_PINCTRL)) + +DT_COMPAT_SILABS_GECKO_PWM := silabs,gecko-pwm + +config DT_HAS_SILABS_GECKO_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_PWM)) + +DT_COMPAT_SILABS_GECKO_RTCC := silabs,gecko-rtcc + +config DT_HAS_SILABS_GECKO_RTCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_RTCC)) + +DT_COMPAT_SILABS_GECKO_SEMAILBOX := silabs,gecko-semailbox + +config DT_HAS_SILABS_GECKO_SEMAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_SEMAILBOX)) + +DT_COMPAT_SILABS_GECKO_STIMER := silabs,gecko-stimer + +config DT_HAS_SILABS_GECKO_STIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_STIMER)) + +DT_COMPAT_SILABS_GECKO_TIMER := silabs,gecko-timer + +config DT_HAS_SILABS_GECKO_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_TIMER)) + +DT_COMPAT_SILABS_GECKO_TRNG := silabs,gecko-trng + +config DT_HAS_SILABS_GECKO_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_TRNG)) + +DT_COMPAT_SILABS_GECKO_UART := silabs,gecko-uart + +config DT_HAS_SILABS_GECKO_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_UART)) + +DT_COMPAT_SILABS_GECKO_USART := silabs,gecko-usart + +config DT_HAS_SILABS_GECKO_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_USART)) + +DT_COMPAT_SILABS_GECKO_WDOG := silabs,gecko-wdog + +config DT_HAS_SILABS_GECKO_WDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GECKO_WDOG)) + +DT_COMPAT_SILABS_GPCRC := silabs,gpcrc + +config DT_HAS_SILABS_GPCRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GPCRC)) + +DT_COMPAT_SILABS_GPDMA := silabs,gpdma + +config DT_HAS_SILABS_GPDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GPDMA)) + +DT_COMPAT_SILABS_GPIO := silabs,gpio + +config DT_HAS_SILABS_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GPIO)) + +DT_COMPAT_SILABS_GPIO_PORT := silabs,gpio-port + +config DT_HAS_SILABS_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GPIO_PORT)) + +DT_COMPAT_SILABS_GSPI := silabs,gspi + +config DT_HAS_SILABS_GSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_GSPI)) + +DT_COMPAT_SILABS_HFXO := silabs,hfxo + +config DT_HAS_SILABS_HFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_HFXO)) + +DT_COMPAT_SILABS_I2C := silabs,i2c + +config DT_HAS_SILABS_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_I2C)) + +DT_COMPAT_SILABS_IADC := silabs,iadc + +config DT_HAS_SILABS_IADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_IADC)) + +DT_COMPAT_SILABS_LDMA := silabs,ldma + +config DT_HAS_SILABS_LDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_LDMA)) + +DT_COMPAT_SILABS_LETIMER_PWM := silabs,letimer-pwm + +config DT_HAS_SILABS_LETIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_LETIMER_PWM)) + +DT_COMPAT_SILABS_PROTIMER := silabs,protimer + +config DT_HAS_SILABS_PROTIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_PROTIMER)) + +DT_COMPAT_SILABS_PTI := silabs,pti + +config DT_HAS_SILABS_PTI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_PTI)) + +DT_COMPAT_SILABS_RTCC := silabs,rtcc + +config DT_HAS_SILABS_RTCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_RTCC)) + +DT_COMPAT_SILABS_SERIES_CLOCK := silabs,series-clock + +config DT_HAS_SILABS_SERIES_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES_CLOCK)) + +DT_COMPAT_SILABS_SERIES2_DCDC := silabs,series2-dcdc + +config DT_HAS_SILABS_SERIES2_DCDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_DCDC)) + +DT_COMPAT_SILABS_SERIES2_FLASH_CONTROLLER := silabs,series2-flash-controller + +config DT_HAS_SILABS_SERIES2_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_FLASH_CONTROLLER)) + +DT_COMPAT_SILABS_SERIES2_HFRCODPLL := silabs,series2-hfrcodpll + +config DT_HAS_SILABS_SERIES2_HFRCODPLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_HFRCODPLL)) + +DT_COMPAT_SILABS_SERIES2_HFRCOEM23 := silabs,series2-hfrcoem23 + +config DT_HAS_SILABS_SERIES2_HFRCOEM23_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_HFRCOEM23)) + +DT_COMPAT_SILABS_SERIES2_LETIMER := silabs,series2-letimer + +config DT_HAS_SILABS_SERIES2_LETIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_LETIMER)) + +DT_COMPAT_SILABS_SERIES2_LFRCO := silabs,series2-lfrco + +config DT_HAS_SILABS_SERIES2_LFRCO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_LFRCO)) + +DT_COMPAT_SILABS_SERIES2_LFXO := silabs,series2-lfxo + +config DT_HAS_SILABS_SERIES2_LFXO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_LFXO)) + +DT_COMPAT_SILABS_SERIES2_RADIO := silabs,series2-radio + +config DT_HAS_SILABS_SERIES2_RADIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_RADIO)) + +DT_COMPAT_SILABS_SERIES2_TIMER := silabs,series2-timer + +config DT_HAS_SILABS_SERIES2_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SERIES2_TIMER)) + +DT_COMPAT_SILABS_SI32_AES := silabs,si32-aes + +config DT_HAS_SILABS_SI32_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_AES)) + +DT_COMPAT_SILABS_SI32_AHB := silabs,si32-ahb + +config DT_HAS_SILABS_SI32_AHB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_AHB)) + +DT_COMPAT_SILABS_SI32_APB := silabs,si32-apb + +config DT_HAS_SILABS_SI32_APB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_APB)) + +DT_COMPAT_SILABS_SI32_DMA := silabs,si32-dma + +config DT_HAS_SILABS_SI32_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_DMA)) + +DT_COMPAT_SILABS_SI32_FLASH_CONTROLLER := silabs,si32-flash-controller + +config DT_HAS_SILABS_SI32_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_FLASH_CONTROLLER)) + +DT_COMPAT_SILABS_SI32_GPIO := silabs,si32-gpio + +config DT_HAS_SILABS_SI32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_GPIO)) + +DT_COMPAT_SILABS_SI32_PINCTRL := silabs,si32-pinctrl + +config DT_HAS_SILABS_SI32_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_PINCTRL)) + +DT_COMPAT_SILABS_SI32_PLL := silabs,si32-pll + +config DT_HAS_SILABS_SI32_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_PLL)) + +DT_COMPAT_SILABS_SI32_USART := silabs,si32-usart + +config DT_HAS_SILABS_SI32_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI32_USART)) + +DT_COMPAT_SILABS_SI7006 := silabs,si7006 + +config DT_HAS_SILABS_SI7006_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI7006)) + +DT_COMPAT_SILABS_SI7055 := silabs,si7055 + +config DT_HAS_SILABS_SI7055_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI7055)) + +DT_COMPAT_SILABS_SI7060 := silabs,si7060 + +config DT_HAS_SILABS_SI7060_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI7060)) + +DT_COMPAT_SILABS_SI7210 := silabs,si7210 + +config DT_HAS_SILABS_SI7210_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SI7210)) + +DT_COMPAT_SILABS_SIWX91X_ADC := silabs,siwx91x-adc + +config DT_HAS_SILABS_SIWX91X_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_ADC)) + +DT_COMPAT_SILABS_SIWX91X_BT_HCI := silabs,siwx91x-bt-hci + +config DT_HAS_SILABS_SIWX91X_BT_HCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_BT_HCI)) + +DT_COMPAT_SILABS_SIWX91X_CLOCK := silabs,siwx91x-clock + +config DT_HAS_SILABS_SIWX91X_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_CLOCK)) + +DT_COMPAT_SILABS_SIWX91X_DMA := silabs,siwx91x-dma + +config DT_HAS_SILABS_SIWX91X_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_DMA)) + +DT_COMPAT_SILABS_SIWX91X_FLASH_CONTROLLER := silabs,siwx91x-flash-controller + +config DT_HAS_SILABS_SIWX91X_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_FLASH_CONTROLLER)) + +DT_COMPAT_SILABS_SIWX91X_GPIO := silabs,siwx91x-gpio + +config DT_HAS_SILABS_SIWX91X_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_GPIO)) + +DT_COMPAT_SILABS_SIWX91X_GPIO_PORT := silabs,siwx91x-gpio-port + +config DT_HAS_SILABS_SIWX91X_GPIO_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_GPIO_PORT)) + +DT_COMPAT_SILABS_SIWX91X_GPIO_UULP := silabs,siwx91x-gpio-uulp + +config DT_HAS_SILABS_SIWX91X_GPIO_UULP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_GPIO_UULP)) + +DT_COMPAT_SILABS_SIWX91X_I2S := silabs,siwx91x-i2s + +config DT_HAS_SILABS_SIWX91X_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_I2S)) + +DT_COMPAT_SILABS_SIWX91X_NWP := silabs,siwx91x-nwp + +config DT_HAS_SILABS_SIWX91X_NWP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_NWP)) + +DT_COMPAT_SILABS_SIWX91X_PINCTRL := silabs,siwx91x-pinctrl + +config DT_HAS_SILABS_SIWX91X_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_PINCTRL)) + +DT_COMPAT_SILABS_SIWX91X_POWER_DOMAIN := silabs,siwx91x-power-domain + +config DT_HAS_SILABS_SIWX91X_POWER_DOMAIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_POWER_DOMAIN)) + +DT_COMPAT_SILABS_SIWX91X_PWM := silabs,siwx91x-pwm + +config DT_HAS_SILABS_SIWX91X_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_PWM)) + +DT_COMPAT_SILABS_SIWX91X_QSPI_MEMORY := silabs,siwx91x-qspi-memory + +config DT_HAS_SILABS_SIWX91X_QSPI_MEMORY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_QSPI_MEMORY)) + +DT_COMPAT_SILABS_SIWX91X_RNG := silabs,siwx91x-rng + +config DT_HAS_SILABS_SIWX91X_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_RNG)) + +DT_COMPAT_SILABS_SIWX91X_RTC := silabs,siwx91x-rtc + +config DT_HAS_SILABS_SIWX91X_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_RTC)) + +DT_COMPAT_SILABS_SIWX91X_WDT := silabs,siwx91x-wdt + +config DT_HAS_SILABS_SIWX91X_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_WDT)) + +DT_COMPAT_SILABS_SIWX91X_WIFI := silabs,siwx91x-wifi + +config DT_HAS_SILABS_SIWX91X_WIFI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SIWX91X_WIFI)) + +DT_COMPAT_SILABS_SYSRTC := silabs,sysrtc + +config DT_HAS_SILABS_SYSRTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_SYSRTC)) + +DT_COMPAT_SILABS_TIMER_COUNTER := silabs,timer-counter + +config DT_HAS_SILABS_TIMER_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_TIMER_COUNTER)) + +DT_COMPAT_SILABS_TIMER_PWM := silabs,timer-pwm + +config DT_HAS_SILABS_TIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_TIMER_PWM)) + +DT_COMPAT_SILABS_USART_SPI := silabs,usart-spi + +config DT_HAS_SILABS_USART_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_USART_SPI)) + +DT_COMPAT_SILABS_USART_UART := silabs,usart-uart + +config DT_HAS_SILABS_USART_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_USART_UART)) + +DT_COMPAT_SILABS_VDAC := silabs,vdac + +config DT_HAS_SILABS_VDAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILABS_VDAC)) + +DT_COMPAT_SILERGY_SY24561 := silergy,sy24561 + +config DT_HAS_SILERGY_SY24561_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILERGY_SY24561)) + +DT_COMPAT_SILERGY_SY6974B := silergy,sy6974b + +config DT_HAS_SILERGY_SY6974B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SILERGY_SY6974B)) + +DT_COMPAT_SIMCOM_A76XX := simcom,a76xx + +config DT_HAS_SIMCOM_A76XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIMCOM_A76XX)) + +DT_COMPAT_SIMCOM_SIM7080 := simcom,sim7080 + +config DT_HAS_SIMCOM_SIM7080_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SIMCOM_SIM7080)) + +DT_COMPAT_SINOWEALTH_SH1106 := sinowealth,sh1106 + +config DT_HAS_SINOWEALTH_SH1106_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SINOWEALTH_SH1106)) + +DT_COMPAT_SINOWEALTH_SH1107 := sinowealth,sh1107 + +config DT_HAS_SINOWEALTH_SH1107_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SINOWEALTH_SH1107)) + +DT_COMPAT_SINOWEALTH_SH1122 := sinowealth,sh1122 + +config DT_HAS_SINOWEALTH_SH1122_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SINOWEALTH_SH1122)) + +DT_COMPAT_SITRONIX_CF1133 := sitronix,cf1133 + +config DT_HAS_SITRONIX_CF1133_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_CF1133)) + +DT_COMPAT_SITRONIX_ST7305 := sitronix,st7305 + +config DT_HAS_SITRONIX_ST7305_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7305)) + +DT_COMPAT_SITRONIX_ST7306 := sitronix,st7306 + +config DT_HAS_SITRONIX_ST7306_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7306)) + +DT_COMPAT_SITRONIX_ST75256 := sitronix,st75256 + +config DT_HAS_SITRONIX_ST75256_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST75256)) + +DT_COMPAT_SITRONIX_ST7567 := sitronix,st7567 + +config DT_HAS_SITRONIX_ST7567_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7567)) + +DT_COMPAT_SITRONIX_ST7586S := sitronix,st7586s + +config DT_HAS_SITRONIX_ST7586S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7586S)) + +DT_COMPAT_SITRONIX_ST7701 := sitronix,st7701 + +config DT_HAS_SITRONIX_ST7701_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7701)) + +DT_COMPAT_SITRONIX_ST7735R := sitronix,st7735r + +config DT_HAS_SITRONIX_ST7735R_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7735R)) + +DT_COMPAT_SITRONIX_ST7789V := sitronix,st7789v + +config DT_HAS_SITRONIX_ST7789V_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7789V)) + +DT_COMPAT_SITRONIX_ST7796S := sitronix,st7796s + +config DT_HAS_SITRONIX_ST7796S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SITRONIX_ST7796S)) + +DT_COMPAT_SKYWORKS_SKY13317 := skyworks,sky13317 + +config DT_HAS_SKYWORKS_SKY13317_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SKYWORKS_SKY13317)) + +DT_COMPAT_SKYWORKS_SKY13348 := skyworks,sky13348 + +config DT_HAS_SKYWORKS_SKY13348_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SKYWORKS_SKY13348)) + +DT_COMPAT_SKYWORKS_SKY13351 := skyworks,sky13351 + +config DT_HAS_SKYWORKS_SKY13351_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SKYWORKS_SKY13351)) + +DT_COMPAT_SMSC_LAN91C111 := smsc,lan91c111 + +config DT_HAS_SMSC_LAN91C111_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SMSC_LAN91C111)) + +DT_COMPAT_SMSC_LAN91C111_MDIO := smsc,lan91c111-mdio + +config DT_HAS_SMSC_LAN91C111_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SMSC_LAN91C111_MDIO)) + +DT_COMPAT_SMSC_LAN9220 := smsc,lan9220 + +config DT_HAS_SMSC_LAN9220_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SMSC_LAN9220)) + +DT_COMPAT_SNPS_ARC_IOT_SYSCONF := snps,arc-iot-sysconf + +config DT_HAS_SNPS_ARC_IOT_SYSCONF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ARC_IOT_SYSCONF)) + +DT_COMPAT_SNPS_ARC_TIMER := snps,arc-timer + +config DT_HAS_SNPS_ARC_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ARC_TIMER)) + +DT_COMPAT_SNPS_ARCEM := snps,arcem + +config DT_HAS_SNPS_ARCEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ARCEM)) + +DT_COMPAT_SNPS_ARCHS_ICI := snps,archs-ici + +config DT_HAS_SNPS_ARCHS_ICI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ARCHS_ICI)) + +DT_COMPAT_SNPS_ARCHS_IDU_INTC := snps,archs-idu-intc + +config DT_HAS_SNPS_ARCHS_IDU_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ARCHS_IDU_INTC)) + +DT_COMPAT_SNPS_ARCV2_INTC := snps,arcv2-intc + +config DT_HAS_SNPS_ARCV2_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ARCV2_INTC)) + +DT_COMPAT_SNPS_AV5RHX := snps,av5rhx + +config DT_HAS_SNPS_AV5RHX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_AV5RHX)) + +DT_COMPAT_SNPS_AV5RMX := snps,av5rmx + +config DT_HAS_SNPS_AV5RMX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_AV5RMX)) + +DT_COMPAT_SNPS_CREG_GPIO := snps,creg-gpio + +config DT_HAS_SNPS_CREG_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_CREG_GPIO)) + +DT_COMPAT_SNPS_DESIGNWARE_DMA := snps,designware-dma + +config DT_HAS_SNPS_DESIGNWARE_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_DMA)) + +DT_COMPAT_SNPS_DESIGNWARE_DMA_AXI := snps,designware-dma-axi + +config DT_HAS_SNPS_DESIGNWARE_DMA_AXI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_DMA_AXI)) + +DT_COMPAT_SNPS_DESIGNWARE_ETHERNET := snps,designware-ethernet + +config DT_HAS_SNPS_DESIGNWARE_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_ETHERNET)) + +DT_COMPAT_SNPS_DESIGNWARE_GPIO := snps,designware-gpio + +config DT_HAS_SNPS_DESIGNWARE_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_GPIO)) + +DT_COMPAT_SNPS_DESIGNWARE_I2C := snps,designware-i2c + +config DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_I2C)) + +DT_COMPAT_SNPS_DESIGNWARE_I3C := snps,designware-i3c + +config DT_HAS_SNPS_DESIGNWARE_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_I3C)) + +DT_COMPAT_SNPS_DESIGNWARE_INTC := snps,designware-intc + +config DT_HAS_SNPS_DESIGNWARE_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_INTC)) + +DT_COMPAT_SNPS_DESIGNWARE_SPI := snps,designware-spi + +config DT_HAS_SNPS_DESIGNWARE_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_SPI)) + +DT_COMPAT_SNPS_DESIGNWARE_SSI := snps,designware-ssi + +config DT_HAS_SNPS_DESIGNWARE_SSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_SSI)) + +DT_COMPAT_SNPS_DESIGNWARE_USB := snps,designware-usb + +config DT_HAS_SNPS_DESIGNWARE_USB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_USB)) + +DT_COMPAT_SNPS_DESIGNWARE_WATCHDOG := snps,designware-watchdog + +config DT_HAS_SNPS_DESIGNWARE_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DESIGNWARE_WATCHDOG)) + +DT_COMPAT_SNPS_DW_TIMERS := snps,dw-timers + +config DT_HAS_SNPS_DW_TIMERS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DW_TIMERS)) + +DT_COMPAT_SNPS_DWC2 := snps,dwc2 + +config DT_HAS_SNPS_DWC2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DWC2)) + +DT_COMPAT_SNPS_DWCXGMAC := snps,dwcxgmac + +config DT_HAS_SNPS_DWCXGMAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DWCXGMAC)) + +DT_COMPAT_SNPS_DWCXGMAC_MDIO := snps,dwcxgmac-mdio + +config DT_HAS_SNPS_DWCXGMAC_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DWCXGMAC_MDIO)) + +DT_COMPAT_SNPS_DWMAC_MDIO := snps,dwmac-mdio + +config DT_HAS_SNPS_DWMAC_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_DWMAC_MDIO)) + +DT_COMPAT_SNPS_EMSDP_PINCTRL := snps,emsdp-pinctrl + +config DT_HAS_SNPS_EMSDP_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_EMSDP_PINCTRL)) + +DT_COMPAT_SNPS_ETHERNET_CYCLONEV := snps,ethernet-cyclonev + +config DT_HAS_SNPS_ETHERNET_CYCLONEV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_ETHERNET_CYCLONEV)) + +DT_COMPAT_SNPS_HOSTLINK_UART := snps,hostlink-uart + +config DT_HAS_SNPS_HOSTLINK_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_HOSTLINK_UART)) + +DT_COMPAT_SNPS_NSIM_UART := snps,nsim-uart + +config DT_HAS_SNPS_NSIM_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SNPS_NSIM_UART)) + +DT_COMPAT_SOC_NV_FLASH := soc-nv-flash + +config DT_HAS_SOC_NV_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOC_NV_FLASH)) + +DT_COMPAT_SOCIONEXT_DPU := socionext,dpu + +config DT_HAS_SOCIONEXT_DPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOCIONEXT_DPU)) + +DT_COMPAT_SOLDEREDELECTRONICS_EASYC_CONNECTOR := solderedelectronics,easyc-connector + +config DT_HAS_SOLDEREDELECTRONICS_EASYC_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLDEREDELECTRONICS_EASYC_CONNECTOR)) + +DT_COMPAT_SOLOMON_SSD1305 := solomon,ssd1305 + +config DT_HAS_SOLOMON_SSD1305_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1305)) + +DT_COMPAT_SOLOMON_SSD1306 := solomon,ssd1306 + +config DT_HAS_SOLOMON_SSD1306_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1306)) + +DT_COMPAT_SOLOMON_SSD1306B := solomon,ssd1306b + +config DT_HAS_SOLOMON_SSD1306B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1306B)) + +DT_COMPAT_SOLOMON_SSD1309 := solomon,ssd1309 + +config DT_HAS_SOLOMON_SSD1309_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1309)) + +DT_COMPAT_SOLOMON_SSD1315 := solomon,ssd1315 + +config DT_HAS_SOLOMON_SSD1315_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1315)) + +DT_COMPAT_SOLOMON_SSD1320 := solomon,ssd1320 + +config DT_HAS_SOLOMON_SSD1320_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1320)) + +DT_COMPAT_SOLOMON_SSD1322 := solomon,ssd1322 + +config DT_HAS_SOLOMON_SSD1322_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1322)) + +DT_COMPAT_SOLOMON_SSD1325 := solomon,ssd1325 + +config DT_HAS_SOLOMON_SSD1325_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1325)) + +DT_COMPAT_SOLOMON_SSD1327 := solomon,ssd1327 + +config DT_HAS_SOLOMON_SSD1327_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1327)) + +DT_COMPAT_SOLOMON_SSD1331 := solomon,ssd1331 + +config DT_HAS_SOLOMON_SSD1331_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1331)) + +DT_COMPAT_SOLOMON_SSD1351 := solomon,ssd1351 + +config DT_HAS_SOLOMON_SSD1351_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1351)) + +DT_COMPAT_SOLOMON_SSD1357 := solomon,ssd1357 + +config DT_HAS_SOLOMON_SSD1357_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1357)) + +DT_COMPAT_SOLOMON_SSD1363 := solomon,ssd1363 + +config DT_HAS_SOLOMON_SSD1363_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1363)) + +DT_COMPAT_SOLOMON_SSD1608 := solomon,ssd1608 + +config DT_HAS_SOLOMON_SSD1608_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1608)) + +DT_COMPAT_SOLOMON_SSD1673 := solomon,ssd1673 + +config DT_HAS_SOLOMON_SSD1673_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1673)) + +DT_COMPAT_SOLOMON_SSD1675A := solomon,ssd1675a + +config DT_HAS_SOLOMON_SSD1675A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1675A)) + +DT_COMPAT_SOLOMON_SSD1680 := solomon,ssd1680 + +config DT_HAS_SOLOMON_SSD1680_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1680)) + +DT_COMPAT_SOLOMON_SSD1681 := solomon,ssd1681 + +config DT_HAS_SOLOMON_SSD1681_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SOLOMON_SSD1681)) + +DT_COMPAT_SONY_IMX219 := sony,imx219 + +config DT_HAS_SONY_IMX219_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SONY_IMX219)) + +DT_COMPAT_SONY_IMX335 := sony,imx335 + +config DT_HAS_SONY_IMX335_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SONY_IMX335)) + +DT_COMPAT_SPARKFUN_MICROMOD_GPIO := sparkfun,micromod-gpio + +config DT_HAS_SPARKFUN_MICROMOD_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SPARKFUN_MICROMOD_GPIO)) + +DT_COMPAT_SPARKFUN_PRO_MICRO_GPIO := sparkfun,pro-micro-gpio + +config DT_HAS_SPARKFUN_PRO_MICRO_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SPARKFUN_PRO_MICRO_GPIO)) + +DT_COMPAT_SPARKFUN_SERLCD := sparkfun,serlcd + +config DT_HAS_SPARKFUN_SERLCD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SPARKFUN_SERLCD)) + +DT_COMPAT_SPI_HDLC_RCP_IF := spi,hdlc-rcp-if + +config DT_HAS_SPI_HDLC_RCP_IF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SPI_HDLC_RCP_IF)) + +DT_COMPAT_SPINALHDL_VEXRISCV := spinalhdl,vexriscv + +config DT_HAS_SPINALHDL_VEXRISCV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SPINALHDL_VEXRISCV)) + +DT_COMPAT_SQN_GM02S := sqn,gm02s + +config DT_HAS_SQN_GM02S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SQN_GM02S)) + +DT_COMPAT_SQN_HWSPINLOCK := sqn,hwspinlock + +config DT_HAS_SQN_HWSPINLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SQN_HWSPINLOCK)) + +DT_COMPAT_ST_DCMI_CAMERA_FPU_330ZH := st,dcmi-camera-fpu-330zh + +config DT_HAS_ST_DCMI_CAMERA_FPU_330ZH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_DCMI_CAMERA_FPU_330ZH)) + +DT_COMPAT_ST_DSI_LCD_QSH_030 := st,dsi-lcd-qsh-030 + +config DT_HAS_ST_DSI_LCD_QSH_030_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_DSI_LCD_QSH_030)) + +DT_COMPAT_ST_HCI_SPI_V1 := st,hci-spi-v1 + +config DT_HAS_ST_HCI_SPI_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_HCI_SPI_V1)) + +DT_COMPAT_ST_HCI_SPI_V2 := st,hci-spi-v2 + +config DT_HAS_ST_HCI_SPI_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_HCI_SPI_V2)) + +DT_COMPAT_ST_HCI_STM32WB0 := st,hci-stm32wb0 + +config DT_HAS_ST_HCI_STM32WB0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_HCI_STM32WB0)) + +DT_COMPAT_ST_HCI_STM32WBA := st,hci-stm32wba + +config DT_HAS_ST_HCI_STM32WBA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_HCI_STM32WBA)) + +DT_COMPAT_ST_HTS221 := st,hts221 + +config DT_HAS_ST_HTS221_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_HTS221)) + +DT_COMPAT_ST_I3G4250D := st,i3g4250d + +config DT_HAS_ST_I3G4250D_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_I3G4250D)) + +DT_COMPAT_ST_IIS2DH := st,iis2dh + +config DT_HAS_ST_IIS2DH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS2DH)) + +DT_COMPAT_ST_IIS2DLPC := st,iis2dlpc + +config DT_HAS_ST_IIS2DLPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS2DLPC)) + +DT_COMPAT_ST_IIS2ICLX := st,iis2iclx + +config DT_HAS_ST_IIS2ICLX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS2ICLX)) + +DT_COMPAT_ST_IIS2MDC := st,iis2mdc + +config DT_HAS_ST_IIS2MDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS2MDC)) + +DT_COMPAT_ST_IIS328DQ := st,iis328dq + +config DT_HAS_ST_IIS328DQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS328DQ)) + +DT_COMPAT_ST_IIS3DHHC := st,iis3dhhc + +config DT_HAS_ST_IIS3DHHC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS3DHHC)) + +DT_COMPAT_ST_IIS3DWB := st,iis3dwb + +config DT_HAS_ST_IIS3DWB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_IIS3DWB)) + +DT_COMPAT_ST_ILPS22QS := st,ilps22qs + +config DT_HAS_ST_ILPS22QS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_ILPS22QS)) + +DT_COMPAT_ST_ISM330DHCX := st,ism330dhcx + +config DT_HAS_ST_ISM330DHCX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_ISM330DHCX)) + +DT_COMPAT_ST_ISM6HG256X := st,ism6hg256x + +config DT_HAS_ST_ISM6HG256X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_ISM6HG256X)) + +DT_COMPAT_ST_LIS2DE12 := st,lis2de12 + +config DT_HAS_ST_LIS2DE12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DE12)) + +DT_COMPAT_ST_LIS2DH := st,lis2dh + +config DT_HAS_ST_LIS2DH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DH)) + +DT_COMPAT_ST_LIS2DH12 := st,lis2dh12 + +config DT_HAS_ST_LIS2DH12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DH12)) + +DT_COMPAT_ST_LIS2DS12 := st,lis2ds12 + +config DT_HAS_ST_LIS2DS12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DS12)) + +DT_COMPAT_ST_LIS2DU12 := st,lis2du12 + +config DT_HAS_ST_LIS2DU12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DU12)) + +DT_COMPAT_ST_LIS2DUX12 := st,lis2dux12 + +config DT_HAS_ST_LIS2DUX12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DUX12)) + +DT_COMPAT_ST_LIS2DUXS12 := st,lis2duxs12 + +config DT_HAS_ST_LIS2DUXS12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DUXS12)) + +DT_COMPAT_ST_LIS2DW12 := st,lis2dw12 + +config DT_HAS_ST_LIS2DW12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2DW12)) + +DT_COMPAT_ST_LIS2MDL := st,lis2mdl + +config DT_HAS_ST_LIS2MDL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS2MDL)) + +DT_COMPAT_ST_LIS3DH := st,lis3dh + +config DT_HAS_ST_LIS3DH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS3DH)) + +DT_COMPAT_ST_LIS3MDL_MAGN := st,lis3mdl-magn + +config DT_HAS_ST_LIS3MDL_MAGN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LIS3MDL_MAGN)) + +DT_COMPAT_ST_LPS22DF := st,lps22df + +config DT_HAS_ST_LPS22DF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LPS22DF)) + +DT_COMPAT_ST_LPS22HB_PRESS := st,lps22hb-press + +config DT_HAS_ST_LPS22HB_PRESS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LPS22HB_PRESS)) + +DT_COMPAT_ST_LPS22HH := st,lps22hh + +config DT_HAS_ST_LPS22HH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LPS22HH)) + +DT_COMPAT_ST_LPS25HB_PRESS := st,lps25hb-press + +config DT_HAS_ST_LPS25HB_PRESS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LPS25HB_PRESS)) + +DT_COMPAT_ST_LPS28DFW := st,lps28dfw + +config DT_HAS_ST_LPS28DFW_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LPS28DFW)) + +DT_COMPAT_ST_LSM303AGR_ACCEL := st,lsm303agr-accel + +config DT_HAS_ST_LSM303AGR_ACCEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM303AGR_ACCEL)) + +DT_COMPAT_ST_LSM303DLHC_ACCEL := st,lsm303dlhc-accel + +config DT_HAS_ST_LSM303DLHC_ACCEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM303DLHC_ACCEL)) + +DT_COMPAT_ST_LSM303DLHC_MAGN := st,lsm303dlhc-magn + +config DT_HAS_ST_LSM303DLHC_MAGN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM303DLHC_MAGN)) + +DT_COMPAT_ST_LSM6DS0 := st,lsm6ds0 + +config DT_HAS_ST_LSM6DS0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DS0)) + +DT_COMPAT_ST_LSM6DSL := st,lsm6dsl + +config DT_HAS_ST_LSM6DSL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSL)) + +DT_COMPAT_ST_LSM6DSO := st,lsm6dso + +config DT_HAS_ST_LSM6DSO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSO)) + +DT_COMPAT_ST_LSM6DSO16IS := st,lsm6dso16is + +config DT_HAS_ST_LSM6DSO16IS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSO16IS)) + +DT_COMPAT_ST_LSM6DSO32 := st,lsm6dso32 + +config DT_HAS_ST_LSM6DSO32_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSO32)) + +DT_COMPAT_ST_LSM6DSV16X := st,lsm6dsv16x + +config DT_HAS_ST_LSM6DSV16X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSV16X)) + +DT_COMPAT_ST_LSM6DSV320X := st,lsm6dsv320x + +config DT_HAS_ST_LSM6DSV320X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSV320X)) + +DT_COMPAT_ST_LSM6DSV32X := st,lsm6dsv32x + +config DT_HAS_ST_LSM6DSV32X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSV32X)) + +DT_COMPAT_ST_LSM6DSV80X := st,lsm6dsv80x + +config DT_HAS_ST_LSM6DSV80X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM6DSV80X)) + +DT_COMPAT_ST_LSM9DS0_GYRO := st,lsm9ds0-gyro + +config DT_HAS_ST_LSM9DS0_GYRO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM9DS0_GYRO)) + +DT_COMPAT_ST_LSM9DS0_MFD := st,lsm9ds0-mfd + +config DT_HAS_ST_LSM9DS0_MFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM9DS0_MFD)) + +DT_COMPAT_ST_LSM9DS1 := st,lsm9ds1 + +config DT_HAS_ST_LSM9DS1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM9DS1)) + +DT_COMPAT_ST_LSM9DS1_MAG := st,lsm9ds1_mag + +config DT_HAS_ST_LSM9DS1_MAG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_LSM9DS1_MAG)) + +DT_COMPAT_ST_MBOX_STM32_HSEM := st,mbox-stm32-hsem + +config DT_HAS_ST_MBOX_STM32_HSEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_MBOX_STM32_HSEM)) + +DT_COMPAT_ST_MFXSTM32L152 := st,mfxstm32l152 + +config DT_HAS_ST_MFXSTM32L152_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_MFXSTM32L152)) + +DT_COMPAT_ST_MIPID02 := st,mipid02 + +config DT_HAS_ST_MIPID02_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_MIPID02)) + +DT_COMPAT_ST_MPXXDTYY := st,mpxxdtyy + +config DT_HAS_ST_MPXXDTYY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_MPXXDTYY)) + +DT_COMPAT_ST_PSRAM_DEVICE := st,psram-device + +config DT_HAS_ST_PSRAM_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_PSRAM_DEVICE)) + +DT_COMPAT_ST_ST87MXX := st,st87mxx + +config DT_HAS_ST_ST87MXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_ST87MXX)) + +DT_COMPAT_ST_STM32_ADC := st,stm32-adc + +config DT_HAS_ST_STM32_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_ADC)) + +DT_COMPAT_ST_STM32_AES := st,stm32-aes + +config DT_HAS_ST_STM32_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_AES)) + +DT_COMPAT_ST_STM32_BACKUP_SRAM := st,stm32-backup-sram + +config DT_HAS_ST_STM32_BACKUP_SRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BACKUP_SRAM)) + +DT_COMPAT_ST_STM32_BBRAM := st,stm32-bbram + +config DT_HAS_ST_STM32_BBRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BBRAM)) + +DT_COMPAT_ST_STM32_BDMA := st,stm32-bdma + +config DT_HAS_ST_STM32_BDMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BDMA)) + +DT_COMPAT_ST_STM32_BSEC := st,stm32-bsec + +config DT_HAS_ST_STM32_BSEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BSEC)) + +DT_COMPAT_ST_STM32_BXCAN := st,stm32-bxcan + +config DT_HAS_ST_STM32_BXCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BXCAN)) + +DT_COMPAT_ST_STM32_CCM := st,stm32-ccm + +config DT_HAS_ST_STM32_CCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_CCM)) + +DT_COMPAT_ST_STM32_CLOCK_MCO := st,stm32-clock-mco + +config DT_HAS_ST_STM32_CLOCK_MCO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_CLOCK_MCO)) + +DT_COMPAT_ST_STM32_CLOCK_MUX := st,stm32-clock-mux + +config DT_HAS_ST_STM32_CLOCK_MUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_CLOCK_MUX)) + +DT_COMPAT_ST_STM32_COMP := st,stm32-comp + +config DT_HAS_ST_STM32_COMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_COMP)) + +DT_COMPAT_ST_STM32_COUNTER := st,stm32-counter + +config DT_HAS_ST_STM32_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_COUNTER)) + +DT_COMPAT_ST_STM32_CRC := st,stm32-crc + +config DT_HAS_ST_STM32_CRC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_CRC)) + +DT_COMPAT_ST_STM32_CRYP := st,stm32-cryp + +config DT_HAS_ST_STM32_CRYP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_CRYP)) + +DT_COMPAT_ST_STM32_DAC := st,stm32-dac + +config DT_HAS_ST_STM32_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DAC)) + +DT_COMPAT_ST_STM32_DCMI := st,stm32-dcmi + +config DT_HAS_ST_STM32_DCMI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DCMI)) + +DT_COMPAT_ST_STM32_DCMIPP := st,stm32-dcmipp + +config DT_HAS_ST_STM32_DCMIPP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DCMIPP)) + +DT_COMPAT_ST_STM32_DIGI_TEMP := st,stm32-digi-temp + +config DT_HAS_ST_STM32_DIGI_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DIGI_TEMP)) + +DT_COMPAT_ST_STM32_DMA := st,stm32-dma + +config DT_HAS_ST_STM32_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA)) + +DT_COMPAT_ST_STM32_DMA_V1 := st,stm32-dma-v1 + +config DT_HAS_ST_STM32_DMA_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA_V1)) + +DT_COMPAT_ST_STM32_DMA_V2 := st,stm32-dma-v2 + +config DT_HAS_ST_STM32_DMA_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA_V2)) + +DT_COMPAT_ST_STM32_DMA_V2BIS := st,stm32-dma-v2bis + +config DT_HAS_ST_STM32_DMA_V2BIS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMA_V2BIS)) + +DT_COMPAT_ST_STM32_DMAMUX := st,stm32-dmamux + +config DT_HAS_ST_STM32_DMAMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DMAMUX)) + +DT_COMPAT_ST_STM32_DUALREG_PWR := st,stm32-dualreg-pwr + +config DT_HAS_ST_STM32_DUALREG_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_DUALREG_PWR)) + +DT_COMPAT_ST_STM32_EEPROM := st,stm32-eeprom + +config DT_HAS_ST_STM32_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_EEPROM)) + +DT_COMPAT_ST_STM32_ETHERNET := st,stm32-ethernet + +config DT_HAS_ST_STM32_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_ETHERNET)) + +DT_COMPAT_ST_STM32_EXTI := st,stm32-exti + +config DT_HAS_ST_STM32_EXTI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_EXTI)) + +DT_COMPAT_ST_STM32_FDCAN := st,stm32-fdcan + +config DT_HAS_ST_STM32_FDCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FDCAN)) + +DT_COMPAT_ST_STM32_FLASH_CONTROLLER := st,stm32-flash-controller + +config DT_HAS_ST_STM32_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32_FMC := st,stm32-fmc + +config DT_HAS_ST_STM32_FMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FMC)) + +DT_COMPAT_ST_STM32_FMC_MIPI_DBI := st,stm32-fmc-mipi-dbi + +config DT_HAS_ST_STM32_FMC_MIPI_DBI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FMC_MIPI_DBI)) + +DT_COMPAT_ST_STM32_FMC_NOR_PSRAM := st,stm32-fmc-nor-psram + +config DT_HAS_ST_STM32_FMC_NOR_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FMC_NOR_PSRAM)) + +DT_COMPAT_ST_STM32_FMC_SDRAM := st,stm32-fmc-sdram + +config DT_HAS_ST_STM32_FMC_SDRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FMC_SDRAM)) + +DT_COMPAT_ST_STM32_GPIO := st,stm32-gpio + +config DT_HAS_ST_STM32_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_GPIO)) + +DT_COMPAT_ST_STM32_HASH := st,stm32-hash + +config DT_HAS_ST_STM32_HASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_HASH)) + +DT_COMPAT_ST_STM32_HSE_CLOCK := st,stm32-hse-clock + +config DT_HAS_ST_STM32_HSE_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_HSE_CLOCK)) + +DT_COMPAT_ST_STM32_HSEM_MAILBOX := st,stm32-hsem-mailbox + +config DT_HAS_ST_STM32_HSEM_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_HSEM_MAILBOX)) + +DT_COMPAT_ST_STM32_HSI48_CLOCK := st,stm32-hsi48-clock + +config DT_HAS_ST_STM32_HSI48_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_HSI48_CLOCK)) + +DT_COMPAT_ST_STM32_I2C_V1 := st,stm32-i2c-v1 + +config DT_HAS_ST_STM32_I2C_V1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_I2C_V1)) + +DT_COMPAT_ST_STM32_I2C_V2 := st,stm32-i2c-v2 + +config DT_HAS_ST_STM32_I2C_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_I2C_V2)) + +DT_COMPAT_ST_STM32_I2S := st,stm32-i2s + +config DT_HAS_ST_STM32_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_I2S)) + +DT_COMPAT_ST_STM32_I3C := st,stm32-i3c + +config DT_HAS_ST_STM32_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_I3C)) + +DT_COMPAT_ST_STM32_IOCELL := st,stm32-iocell + +config DT_HAS_ST_STM32_IOCELL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_IOCELL)) + +DT_COMPAT_ST_STM32_IPCC_MAILBOX := st,stm32-ipcc-mailbox + +config DT_HAS_ST_STM32_IPCC_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_IPCC_MAILBOX)) + +DT_COMPAT_ST_STM32_JPEG := st,stm32-jpeg + +config DT_HAS_ST_STM32_JPEG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_JPEG)) + +DT_COMPAT_ST_STM32_LPTIM := st,stm32-lptim + +config DT_HAS_ST_STM32_LPTIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_LPTIM)) + +DT_COMPAT_ST_STM32_LPUART := st,stm32-lpuart + +config DT_HAS_ST_STM32_LPUART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_LPUART)) + +DT_COMPAT_ST_STM32_LSE_CLOCK := st,stm32-lse-clock + +config DT_HAS_ST_STM32_LSE_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_LSE_CLOCK)) + +DT_COMPAT_ST_STM32_LTDC := st,stm32-ltdc + +config DT_HAS_ST_STM32_LTDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_LTDC)) + +DT_COMPAT_ST_STM32_MDIO := st,stm32-mdio + +config DT_HAS_ST_STM32_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_MDIO)) + +DT_COMPAT_ST_STM32_MIPI_DSI := st,stm32-mipi-dsi + +config DT_HAS_ST_STM32_MIPI_DSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_MIPI_DSI)) + +DT_COMPAT_ST_STM32_MSI_CLOCK := st,stm32-msi-clock + +config DT_HAS_ST_STM32_MSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_MSI_CLOCK)) + +DT_COMPAT_ST_STM32_NPU := st,stm32-npu + +config DT_HAS_ST_STM32_NPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_NPU)) + +DT_COMPAT_ST_STM32_NPU_CACHE := st,stm32-npu-cache + +config DT_HAS_ST_STM32_NPU_CACHE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_NPU_CACHE)) + +DT_COMPAT_ST_STM32_NV_FLASH := st,stm32-nv-flash + +config DT_HAS_ST_STM32_NV_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_NV_FLASH)) + +DT_COMPAT_ST_STM32_NVM_OTP := st,stm32-nvm-otp + +config DT_HAS_ST_STM32_NVM_OTP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_NVM_OTP)) + +DT_COMPAT_ST_STM32_OPAMP := st,stm32-opamp + +config DT_HAS_ST_STM32_OPAMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OPAMP)) + +DT_COMPAT_ST_STM32_OSPI := st,stm32-ospi + +config DT_HAS_ST_STM32_OSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OSPI)) + +DT_COMPAT_ST_STM32_OSPI_CONTROLLER := st,stm32-ospi-controller + +config DT_HAS_ST_STM32_OSPI_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OSPI_CONTROLLER)) + +DT_COMPAT_ST_STM32_OSPI_NOR := st,stm32-ospi-nor + +config DT_HAS_ST_STM32_OSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OSPI_NOR)) + +DT_COMPAT_ST_STM32_OSPI_PSRAM := st,stm32-ospi-psram + +config DT_HAS_ST_STM32_OSPI_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OSPI_PSRAM)) + +DT_COMPAT_ST_STM32_OTGFS := st,stm32-otgfs + +config DT_HAS_ST_STM32_OTGFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OTGFS)) + +DT_COMPAT_ST_STM32_OTGHS := st,stm32-otghs + +config DT_HAS_ST_STM32_OTGHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_OTGHS)) + +DT_COMPAT_ST_STM32_PINCTRL := st,stm32-pinctrl + +config DT_HAS_ST_STM32_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_PINCTRL)) + +DT_COMPAT_ST_STM32_PWM := st,stm32-pwm + +config DT_HAS_ST_STM32_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_PWM)) + +DT_COMPAT_ST_STM32_PWR := st,stm32-pwr + +config DT_HAS_ST_STM32_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_PWR)) + +DT_COMPAT_ST_STM32_QDEC := st,stm32-qdec + +config DT_HAS_ST_STM32_QDEC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_QDEC)) + +DT_COMPAT_ST_STM32_QSPI := st,stm32-qspi + +config DT_HAS_ST_STM32_QSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_QSPI)) + +DT_COMPAT_ST_STM32_QSPI_CONTROLLER := st,stm32-qspi-controller + +config DT_HAS_ST_STM32_QSPI_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_QSPI_CONTROLLER)) + +DT_COMPAT_ST_STM32_QSPI_NOR := st,stm32-qspi-nor + +config DT_HAS_ST_STM32_QSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_QSPI_NOR)) + +DT_COMPAT_ST_STM32_RCC := st,stm32-rcc + +config DT_HAS_ST_STM32_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_RCC)) + +DT_COMPAT_ST_STM32_RCC_RCTL := st,stm32-rcc-rctl + +config DT_HAS_ST_STM32_RCC_RCTL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_RCC_RCTL)) + +DT_COMPAT_ST_STM32_RNG := st,stm32-rng + +config DT_HAS_ST_STM32_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_RNG)) + +DT_COMPAT_ST_STM32_RNG_NOIRQ := st,stm32-rng-noirq + +config DT_HAS_ST_STM32_RNG_NOIRQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_RNG_NOIRQ)) + +DT_COMPAT_ST_STM32_RTC := st,stm32-rtc + +config DT_HAS_ST_STM32_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_RTC)) + +DT_COMPAT_ST_STM32_SAI := st,stm32-sai + +config DT_HAS_ST_STM32_SAI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SAI)) + +DT_COMPAT_ST_STM32_SDMMC := st,stm32-sdmmc + +config DT_HAS_ST_STM32_SDMMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SDMMC)) + +DT_COMPAT_ST_STM32_SMBUS := st,stm32-smbus + +config DT_HAS_ST_STM32_SMBUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SMBUS)) + +DT_COMPAT_ST_STM32_SPI := st,stm32-spi + +config DT_HAS_ST_STM32_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SPI)) + +DT_COMPAT_ST_STM32_SPI_FIFO := st,stm32-spi-fifo + +config DT_HAS_ST_STM32_SPI_FIFO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SPI_FIFO)) + +DT_COMPAT_ST_STM32_SPI_HOST_CMD := st,stm32-spi-host-cmd + +config DT_HAS_ST_STM32_SPI_HOST_CMD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SPI_HOST_CMD)) + +DT_COMPAT_ST_STM32_SPI_SUBGHZ := st,stm32-spi-subghz + +config DT_HAS_ST_STM32_SPI_SUBGHZ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_SPI_SUBGHZ)) + +DT_COMPAT_ST_STM32_TEMP := st,stm32-temp + +config DT_HAS_ST_STM32_TEMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_TEMP)) + +DT_COMPAT_ST_STM32_TEMP_CAL := st,stm32-temp-cal + +config DT_HAS_ST_STM32_TEMP_CAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_TEMP_CAL)) + +DT_COMPAT_ST_STM32_TIMERS := st,stm32-timers + +config DT_HAS_ST_STM32_TIMERS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_TIMERS)) + +DT_COMPAT_ST_STM32_TSC := st,stm32-tsc + +config DT_HAS_ST_STM32_TSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_TSC)) + +DT_COMPAT_ST_STM32_UART := st,stm32-uart + +config DT_HAS_ST_STM32_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_UART)) + +DT_COMPAT_ST_STM32_UCPD := st,stm32-ucpd + +config DT_HAS_ST_STM32_UCPD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_UCPD)) + +DT_COMPAT_ST_STM32_USART := st,stm32-usart + +config DT_HAS_ST_STM32_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_USART)) + +DT_COMPAT_ST_STM32_USB := st,stm32-usb + +config DT_HAS_ST_STM32_USB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_USB)) + +DT_COMPAT_ST_STM32_USBPHYC := st,stm32-usbphyc + +config DT_HAS_ST_STM32_USBPHYC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_USBPHYC)) + +DT_COMPAT_ST_STM32_VBAT := st,stm32-vbat + +config DT_HAS_ST_STM32_VBAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_VBAT)) + +DT_COMPAT_ST_STM32_VDDCORE := st,stm32-vddcore + +config DT_HAS_ST_STM32_VDDCORE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_VDDCORE)) + +DT_COMPAT_ST_STM32_VENC := st,stm32-venc + +config DT_HAS_ST_STM32_VENC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_VENC)) + +DT_COMPAT_ST_STM32_VREF := st,stm32-vref + +config DT_HAS_ST_STM32_VREF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_VREF)) + +DT_COMPAT_ST_STM32_VREFBUF := st,stm32-vrefbuf + +config DT_HAS_ST_STM32_VREFBUF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_VREFBUF)) + +DT_COMPAT_ST_STM32_WATCHDOG := st,stm32-watchdog + +config DT_HAS_ST_STM32_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_WATCHDOG)) + +DT_COMPAT_ST_STM32_WINDOW_WATCHDOG := st,stm32-window-watchdog + +config DT_HAS_ST_STM32_WINDOW_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_WINDOW_WATCHDOG)) + +DT_COMPAT_ST_STM32_XSPI := st,stm32-xspi + +config DT_HAS_ST_STM32_XSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_XSPI)) + +DT_COMPAT_ST_STM32_XSPI_CONTROLLER := st,stm32-xspi-controller + +config DT_HAS_ST_STM32_XSPI_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_XSPI_CONTROLLER)) + +DT_COMPAT_ST_STM32_XSPI_NOR := st,stm32-xspi-nor + +config DT_HAS_ST_STM32_XSPI_NOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_XSPI_NOR)) + +DT_COMPAT_ST_STM32_XSPI_PSRAM := st,stm32-xspi-psram + +config DT_HAS_ST_STM32_XSPI_PSRAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_XSPI_PSRAM)) + +DT_COMPAT_ST_STM32_XSPIM := st,stm32-xspim + +config DT_HAS_ST_STM32_XSPIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_XSPIM)) + +DT_COMPAT_ST_STM32C0_HSI_CLOCK := st,stm32c0-hsi-clock + +config DT_HAS_ST_STM32C0_HSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32C0_HSI_CLOCK)) + +DT_COMPAT_ST_STM32C0_TEMP_CAL := st,stm32c0-temp-cal + +config DT_HAS_ST_STM32C0_TEMP_CAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32C0_TEMP_CAL)) + +DT_COMPAT_ST_STM32C5_FLASH_CONTROLLER := st,stm32c5-flash-controller + +config DT_HAS_ST_STM32C5_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32C5_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32C5_RCC := st,stm32c5-rcc + +config DT_HAS_ST_STM32C5_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32C5_RCC)) + +DT_COMPAT_ST_STM32C5_XSIK_CLOCK := st,stm32c5-xsik-clock + +config DT_HAS_ST_STM32C5_XSIK_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32C5_XSIK_CLOCK)) + +DT_COMPAT_ST_STM32F0_PLL_CLOCK := st,stm32f0-pll-clock + +config DT_HAS_ST_STM32F0_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F0_PLL_CLOCK)) + +DT_COMPAT_ST_STM32F0_RCC := st,stm32f0-rcc + +config DT_HAS_ST_STM32F0_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F0_RCC)) + +DT_COMPAT_ST_STM32F1_ADC := st,stm32f1-adc + +config DT_HAS_ST_STM32F1_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F1_ADC)) + +DT_COMPAT_ST_STM32F1_CLOCK_MCO := st,stm32f1-clock-mco + +config DT_HAS_ST_STM32F1_CLOCK_MCO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F1_CLOCK_MCO)) + +DT_COMPAT_ST_STM32F1_FLASH_CONTROLLER := st,stm32f1-flash-controller + +config DT_HAS_ST_STM32F1_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F1_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32F1_PINCTRL := st,stm32f1-pinctrl + +config DT_HAS_ST_STM32F1_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F1_PINCTRL)) + +DT_COMPAT_ST_STM32F1_PLL_CLOCK := st,stm32f1-pll-clock + +config DT_HAS_ST_STM32F1_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F1_PLL_CLOCK)) + +DT_COMPAT_ST_STM32F100_PLL_CLOCK := st,stm32f100-pll-clock + +config DT_HAS_ST_STM32F100_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F100_PLL_CLOCK)) + +DT_COMPAT_ST_STM32F105_PLL_CLOCK := st,stm32f105-pll-clock + +config DT_HAS_ST_STM32F105_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F105_PLL_CLOCK)) + +DT_COMPAT_ST_STM32F105_PLL2_CLOCK := st,stm32f105-pll2-clock + +config DT_HAS_ST_STM32F105_PLL2_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F105_PLL2_CLOCK)) + +DT_COMPAT_ST_STM32F2_FLASH_CONTROLLER := st,stm32f2-flash-controller + +config DT_HAS_ST_STM32F2_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F2_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32F4_ADC := st,stm32f4-adc + +config DT_HAS_ST_STM32F4_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F4_ADC)) + +DT_COMPAT_ST_STM32F4_FLASH_CONTROLLER := st,stm32f4-flash-controller + +config DT_HAS_ST_STM32F4_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F4_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32F4_FSOTG := st,stm32f4-fsotg + +config DT_HAS_ST_STM32F4_FSOTG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F4_FSOTG)) + +DT_COMPAT_ST_STM32F4_NV_FLASH := st,stm32f4-nv-flash + +config DT_HAS_ST_STM32F4_NV_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F4_NV_FLASH)) + +DT_COMPAT_ST_STM32F4_RCC := st,stm32f4-rcc + +config DT_HAS_ST_STM32F4_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F4_RCC)) + +DT_COMPAT_ST_STM32F7_FLASH_CONTROLLER := st,stm32f7-flash-controller + +config DT_HAS_ST_STM32F7_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32F7_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32FX_PLL_CLOCK := st,stm32fx-pll-clock + +config DT_HAS_ST_STM32FX_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32FX_PLL_CLOCK)) + +DT_COMPAT_ST_STM32G0_EXTI := st,stm32g0-exti + +config DT_HAS_ST_STM32G0_EXTI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G0_EXTI)) + +DT_COMPAT_ST_STM32G0_FLASH_CONTROLLER := st,stm32g0-flash-controller + +config DT_HAS_ST_STM32G0_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G0_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32G0_HSI_CLOCK := st,stm32g0-hsi-clock + +config DT_HAS_ST_STM32G0_HSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G0_HSI_CLOCK)) + +DT_COMPAT_ST_STM32G0_PLL_CLOCK := st,stm32g0-pll-clock + +config DT_HAS_ST_STM32G0_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G0_PLL_CLOCK)) + +DT_COMPAT_ST_STM32G4_COMP := st,stm32g4-comp + +config DT_HAS_ST_STM32G4_COMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G4_COMP)) + +DT_COMPAT_ST_STM32G4_FLASH_CONTROLLER := st,stm32g4-flash-controller + +config DT_HAS_ST_STM32G4_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G4_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32G4_OPAMP := st,stm32g4-opamp + +config DT_HAS_ST_STM32G4_OPAMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G4_OPAMP)) + +DT_COMPAT_ST_STM32G4_PLL_CLOCK := st,stm32g4-pll-clock + +config DT_HAS_ST_STM32G4_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32G4_PLL_CLOCK)) + +DT_COMPAT_ST_STM32H5_ETHERNET := st,stm32h5-ethernet + +config DT_HAS_ST_STM32H5_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H5_ETHERNET)) + +DT_COMPAT_ST_STM32H5_IOCELL := st,stm32h5-iocell + +config DT_HAS_ST_STM32H5_IOCELL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H5_IOCELL)) + +DT_COMPAT_ST_STM32H5_PINCTRL := st,stm32h5-pinctrl + +config DT_HAS_ST_STM32H5_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H5_PINCTRL)) + +DT_COMPAT_ST_STM32H5_RCC := st,stm32h5-rcc + +config DT_HAS_ST_STM32H5_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H5_RCC)) + +DT_COMPAT_ST_STM32H7_COMP := st,stm32h7-comp + +config DT_HAS_ST_STM32H7_COMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_COMP)) + +DT_COMPAT_ST_STM32H7_ETHERNET := st,stm32h7-ethernet + +config DT_HAS_ST_STM32H7_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_ETHERNET)) + +DT_COMPAT_ST_STM32H7_FDCAN := st,stm32h7-fdcan + +config DT_HAS_ST_STM32H7_FDCAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_FDCAN)) + +DT_COMPAT_ST_STM32H7_FLASH_CONTROLLER := st,stm32h7-flash-controller + +config DT_HAS_ST_STM32H7_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32H7_FMC := st,stm32h7-fmc + +config DT_HAS_ST_STM32H7_FMC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_FMC)) + +DT_COMPAT_ST_STM32H7_HSI_CLOCK := st,stm32h7-hsi-clock + +config DT_HAS_ST_STM32H7_HSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_HSI_CLOCK)) + +DT_COMPAT_ST_STM32H7_I2S := st,stm32h7-i2s + +config DT_HAS_ST_STM32H7_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_I2S)) + +DT_COMPAT_ST_STM32H7_PLL_CLOCK := st,stm32h7-pll-clock + +config DT_HAS_ST_STM32H7_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_PLL_CLOCK)) + +DT_COMPAT_ST_STM32H7_PWR := st,stm32h7-pwr + +config DT_HAS_ST_STM32H7_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_PWR)) + +DT_COMPAT_ST_STM32H7_RCC := st,stm32h7-rcc + +config DT_HAS_ST_STM32H7_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_RCC)) + +DT_COMPAT_ST_STM32H7_SPI := st,stm32h7-spi + +config DT_HAS_ST_STM32H7_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_SPI)) + +DT_COMPAT_ST_STM32H7RS_EXTI := st,stm32h7rs-exti + +config DT_HAS_ST_STM32H7RS_EXTI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7RS_EXTI)) + +DT_COMPAT_ST_STM32H7RS_PLL_CLOCK := st,stm32h7rs-pll-clock + +config DT_HAS_ST_STM32H7RS_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7RS_PLL_CLOCK)) + +DT_COMPAT_ST_STM32H7RS_PWR := st,stm32h7rs-pwr + +config DT_HAS_ST_STM32H7RS_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7RS_PWR)) + +DT_COMPAT_ST_STM32H7RS_RCC := st,stm32h7rs-rcc + +config DT_HAS_ST_STM32H7RS_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7RS_RCC)) + +DT_COMPAT_ST_STM32L0_HSI_CLOCK := st,stm32l0-hsi-clock + +config DT_HAS_ST_STM32L0_HSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L0_HSI_CLOCK)) + +DT_COMPAT_ST_STM32L0_MSI_CLOCK := st,stm32l0-msi-clock + +config DT_HAS_ST_STM32L0_MSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L0_MSI_CLOCK)) + +DT_COMPAT_ST_STM32L0_NV_FLASH := st,stm32l0-nv-flash + +config DT_HAS_ST_STM32L0_NV_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L0_NV_FLASH)) + +DT_COMPAT_ST_STM32L0_PLL_CLOCK := st,stm32l0-pll-clock + +config DT_HAS_ST_STM32L0_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L0_PLL_CLOCK)) + +DT_COMPAT_ST_STM32L4_AES := st,stm32l4-aes + +config DT_HAS_ST_STM32L4_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L4_AES)) + +DT_COMPAT_ST_STM32L4_FLASH_CONTROLLER := st,stm32l4-flash-controller + +config DT_HAS_ST_STM32L4_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L4_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32L4_PLL_CLOCK := st,stm32l4-pll-clock + +config DT_HAS_ST_STM32L4_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L4_PLL_CLOCK)) + +DT_COMPAT_ST_STM32L5_FLASH_CONTROLLER := st,stm32l5-flash-controller + +config DT_HAS_ST_STM32L5_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32L5_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32MP1_RCC := st,stm32mp1-rcc + +config DT_HAS_ST_STM32MP1_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32MP1_RCC)) + +DT_COMPAT_ST_STM32MP13_CPU_CLOCK_MUX := st,stm32mp13-cpu-clock-mux + +config DT_HAS_ST_STM32MP13_CPU_CLOCK_MUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32MP13_CPU_CLOCK_MUX)) + +DT_COMPAT_ST_STM32MP13_ETHERNET := st,stm32mp13-ethernet + +config DT_HAS_ST_STM32MP13_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32MP13_ETHERNET)) + +DT_COMPAT_ST_STM32MP13_PLL_CLOCK := st,stm32mp13-pll-clock + +config DT_HAS_ST_STM32MP13_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32MP13_PLL_CLOCK)) + +DT_COMPAT_ST_STM32MP2_GPIO := st,stm32mp2-gpio + +config DT_HAS_ST_STM32MP2_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32MP2_GPIO)) + +DT_COMPAT_ST_STM32MP2_RCC := st,stm32mp2-rcc + +config DT_HAS_ST_STM32MP2_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32MP2_RCC)) + +DT_COMPAT_ST_STM32N6_ADC := st,stm32n6-adc + +config DT_HAS_ST_STM32N6_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_ADC)) + +DT_COMPAT_ST_STM32N6_CPU_CLOCK_MUX := st,stm32n6-cpu-clock-mux + +config DT_HAS_ST_STM32N6_CPU_CLOCK_MUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_CPU_CLOCK_MUX)) + +DT_COMPAT_ST_STM32N6_ETHERNET := st,stm32n6-ethernet + +config DT_HAS_ST_STM32N6_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_ETHERNET)) + +DT_COMPAT_ST_STM32N6_HSE_CLOCK := st,stm32n6-hse-clock + +config DT_HAS_ST_STM32N6_HSE_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_HSE_CLOCK)) + +DT_COMPAT_ST_STM32N6_IC_CLOCK_MUX := st,stm32n6-ic-clock-mux + +config DT_HAS_ST_STM32N6_IC_CLOCK_MUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_IC_CLOCK_MUX)) + +DT_COMPAT_ST_STM32N6_OTGHS := st,stm32n6-otghs + +config DT_HAS_ST_STM32N6_OTGHS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_OTGHS)) + +DT_COMPAT_ST_STM32N6_PINCTRL := st,stm32n6-pinctrl + +config DT_HAS_ST_STM32N6_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_PINCTRL)) + +DT_COMPAT_ST_STM32N6_PLL_CLOCK := st,stm32n6-pll-clock + +config DT_HAS_ST_STM32N6_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_PLL_CLOCK)) + +DT_COMPAT_ST_STM32N6_RAMCFG := st,stm32n6-ramcfg + +config DT_HAS_ST_STM32N6_RAMCFG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_RAMCFG)) + +DT_COMPAT_ST_STM32N6_RCC := st,stm32n6-rcc + +config DT_HAS_ST_STM32N6_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32N6_RCC)) + +DT_COMPAT_ST_STM32U0_PLL_CLOCK := st,stm32u0-pll-clock + +config DT_HAS_ST_STM32U0_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U0_PLL_CLOCK)) + +DT_COMPAT_ST_STM32U3_FLASH_CONTROLLER := st,stm32u3-flash-controller + +config DT_HAS_ST_STM32U3_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U3_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32U3_MSI_CLOCK := st,stm32u3-msi-clock + +config DT_HAS_ST_STM32U3_MSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U3_MSI_CLOCK)) + +DT_COMPAT_ST_STM32U5_DMA := st,stm32u5-dma + +config DT_HAS_ST_STM32U5_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_DMA)) + +DT_COMPAT_ST_STM32U5_MIPI_DSI := st,stm32u5-mipi-dsi + +config DT_HAS_ST_STM32U5_MIPI_DSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_MIPI_DSI)) + +DT_COMPAT_ST_STM32U5_MSI_CLOCK := st,stm32u5-msi-clock + +config DT_HAS_ST_STM32U5_MSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_MSI_CLOCK)) + +DT_COMPAT_ST_STM32U5_OTGHS_PHY := st,stm32u5-otghs-phy + +config DT_HAS_ST_STM32U5_OTGHS_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_OTGHS_PHY)) + +DT_COMPAT_ST_STM32U5_PLL_CLOCK := st,stm32u5-pll-clock + +config DT_HAS_ST_STM32U5_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_PLL_CLOCK)) + +DT_COMPAT_ST_STM32U5_PWR := st,stm32u5-pwr + +config DT_HAS_ST_STM32U5_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_PWR)) + +DT_COMPAT_ST_STM32U5_RCC := st,stm32u5-rcc + +config DT_HAS_ST_STM32U5_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32U5_RCC)) + +DT_COMPAT_ST_STM32WB_FLASH_CONTROLLER := st,stm32wb-flash-controller + +config DT_HAS_ST_STM32WB_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32WB_PLL_CLOCK := st,stm32wb-pll-clock + +config DT_HAS_ST_STM32WB_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB_PLL_CLOCK)) + +DT_COMPAT_ST_STM32WB_RCC := st,stm32wb-rcc + +config DT_HAS_ST_STM32WB_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB_RCC)) + +DT_COMPAT_ST_STM32WB_RF := st,stm32wb-rf + +config DT_HAS_ST_STM32WB_RF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB_RF)) + +DT_COMPAT_ST_STM32WB0_ADC := st,stm32wb0-adc + +config DT_HAS_ST_STM32WB0_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_ADC)) + +DT_COMPAT_ST_STM32WB0_FLASH_CONTROLLER := st,stm32wb0-flash-controller + +config DT_HAS_ST_STM32WB0_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32WB0_GPIO_INTC := st,stm32wb0-gpio-intc + +config DT_HAS_ST_STM32WB0_GPIO_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_GPIO_INTC)) + +DT_COMPAT_ST_STM32WB0_LSI_CLOCK := st,stm32wb0-lsi-clock + +config DT_HAS_ST_STM32WB0_LSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_LSI_CLOCK)) + +DT_COMPAT_ST_STM32WB0_PWR := st,stm32wb0-pwr + +config DT_HAS_ST_STM32WB0_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_PWR)) + +DT_COMPAT_ST_STM32WB0_RADIO_TIMER := st,stm32wb0-radio-timer + +config DT_HAS_ST_STM32WB0_RADIO_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_RADIO_TIMER)) + +DT_COMPAT_ST_STM32WB0_RCC := st,stm32wb0-rcc + +config DT_HAS_ST_STM32WB0_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WB0_RCC)) + +DT_COMPAT_ST_STM32WBA_FLASH_CONTROLLER := st,stm32wba-flash-controller + +config DT_HAS_ST_STM32WBA_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WBA_FLASH_CONTROLLER)) + +DT_COMPAT_ST_STM32WBA_HSE_CLOCK := st,stm32wba-hse-clock + +config DT_HAS_ST_STM32WBA_HSE_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WBA_HSE_CLOCK)) + +DT_COMPAT_ST_STM32WBA_IEEE802154 := st,stm32wba-ieee802154 + +config DT_HAS_ST_STM32WBA_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WBA_IEEE802154)) + +DT_COMPAT_ST_STM32WBA_PLL_CLOCK := st,stm32wba-pll-clock + +config DT_HAS_ST_STM32WBA_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WBA_PLL_CLOCK)) + +DT_COMPAT_ST_STM32WBA_PWR := st,stm32wba-pwr + +config DT_HAS_ST_STM32WBA_PWR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WBA_PWR)) + +DT_COMPAT_ST_STM32WBA_RCC := st,stm32wba-rcc + +config DT_HAS_ST_STM32WBA_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WBA_RCC)) + +DT_COMPAT_ST_STM32WL_HSE_CLOCK := st,stm32wl-hse-clock + +config DT_HAS_ST_STM32WL_HSE_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WL_HSE_CLOCK)) + +DT_COMPAT_ST_STM32WL_RCC := st,stm32wl-rcc + +config DT_HAS_ST_STM32WL_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WL_RCC)) + +DT_COMPAT_ST_STM32WL_SUBGHZ_RADIO := st,stm32wl-subghz-radio + +config DT_HAS_ST_STM32WL_SUBGHZ_RADIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32WL_SUBGHZ_RADIO)) + +DT_COMPAT_ST_STMPE1600 := st,stmpe1600 + +config DT_HAS_ST_STMPE1600_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STMPE1600)) + +DT_COMPAT_ST_STMPE811 := st,stmpe811 + +config DT_HAS_ST_STMPE811_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STMPE811)) + +DT_COMPAT_ST_STTS22H := st,stts22h + +config DT_HAS_ST_STTS22H_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STTS22H)) + +DT_COMPAT_ST_STTS751 := st,stts751 + +config DT_HAS_ST_STTS751_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STTS751)) + +DT_COMPAT_ST_VL53L0X := st,vl53l0x + +config DT_HAS_ST_VL53L0X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_VL53L0X)) + +DT_COMPAT_ST_VL53L1X := st,vl53l1x + +config DT_HAS_ST_VL53L1X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_VL53L1X)) + +DT_COMPAT_ST_MORPHO_HEADER := st-morpho-header + +config DT_HAS_ST_MORPHO_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_MORPHO_HEADER)) + +DT_COMPAT_STEMMA_QT_CONNECTOR := stemma-qt-connector + +config DT_HAS_STEMMA_QT_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_STEMMA_QT_CONNECTOR)) + +DT_COMPAT_SWERV_PIC := swerv,pic + +config DT_HAS_SWERV_PIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWERV_PIC)) + +DT_COMPAT_SWIR_HL7800 := swir,hl7800 + +config DT_HAS_SWIR_HL7800_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL7800)) + +DT_COMPAT_SWIR_HL7812 := swir,hl7812 + +config DT_HAS_SWIR_HL7812_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL7812)) + +DT_COMPAT_SWIR_HL7812_GNSS := swir,hl7812-gnss + +config DT_HAS_SWIR_HL7812_GNSS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL7812_GNSS)) + +DT_COMPAT_SWIR_HL7812_OFFLOAD := swir,hl7812-offload + +config DT_HAS_SWIR_HL7812_OFFLOAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL7812_OFFLOAD)) + +DT_COMPAT_SWIR_HL78XX := swir,hl78xx + +config DT_HAS_SWIR_HL78XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL78XX)) + +DT_COMPAT_SWIR_HL78XX_GNSS := swir,hl78xx-gnss + +config DT_HAS_SWIR_HL78XX_GNSS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL78XX_GNSS)) + +DT_COMPAT_SWIR_HL78XX_OFFLOAD := swir,hl78xx-offload + +config DT_HAS_SWIR_HL78XX_OFFLOAD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWIR_HL78XX_OFFLOAD)) + +DT_COMPAT_SWJ_CONNECTOR := swj-connector + +config DT_HAS_SWJ_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SWJ_CONNECTOR)) + +DT_COMPAT_SYNA_SR100_CLOCK := syna,sr100-clock + +config DT_HAS_SYNA_SR100_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SYNA_SR100_CLOCK)) + +DT_COMPAT_SYNA_SR100_PINCTRL := syna,sr100-pinctrl + +config DT_HAS_SYNA_SR100_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SYNA_SR100_PINCTRL)) + +DT_COMPAT_SYNA_SR100_RESET := syna,sr100-reset + +config DT_HAS_SYNA_SR100_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SYNA_SR100_RESET)) + +DT_COMPAT_SYSCON := syscon + +config DT_HAS_SYSCON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_SYSCON)) + +DT_COMPAT_TBS_CRSF := tbs,crsf + +config DT_HAS_TBS_CRSF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TBS_CRSF)) + +DT_COMPAT_TDK_NTCG163JF103FT1 := tdk,ntcg163jf103ft1 + +config DT_HAS_TDK_NTCG163JF103FT1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TDK_NTCG163JF103FT1)) + +DT_COMPAT_TELINK_B91 := telink,b91 + +config DT_HAS_TELINK_B91_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91)) + +DT_COMPAT_TELINK_B91_ADC := telink,b91-adc + +config DT_HAS_TELINK_B91_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_ADC)) + +DT_COMPAT_TELINK_B91_FLASH_CONTROLLER := telink,b91-flash-controller + +config DT_HAS_TELINK_B91_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_FLASH_CONTROLLER)) + +DT_COMPAT_TELINK_B91_GPIO := telink,b91-gpio + +config DT_HAS_TELINK_B91_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_GPIO)) + +DT_COMPAT_TELINK_B91_I2C := telink,b91-i2c + +config DT_HAS_TELINK_B91_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_I2C)) + +DT_COMPAT_TELINK_B91_PINCTRL := telink,b91-pinctrl + +config DT_HAS_TELINK_B91_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_PINCTRL)) + +DT_COMPAT_TELINK_B91_POWER := telink,b91-power + +config DT_HAS_TELINK_B91_POWER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_POWER)) + +DT_COMPAT_TELINK_B91_PWM := telink,b91-pwm + +config DT_HAS_TELINK_B91_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_PWM)) + +DT_COMPAT_TELINK_B91_SPI := telink,b91-spi + +config DT_HAS_TELINK_B91_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_SPI)) + +DT_COMPAT_TELINK_B91_TRNG := telink,b91-trng + +config DT_HAS_TELINK_B91_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_TRNG)) + +DT_COMPAT_TELINK_B91_UART := telink,b91-uart + +config DT_HAS_TELINK_B91_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_UART)) + +DT_COMPAT_TELINK_B91_ZB := telink,b91-zb + +config DT_HAS_TELINK_B91_ZB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELINK_B91_ZB)) + +DT_COMPAT_TELIT_LE910C1TX := telit,le910c1tx + +config DT_HAS_TELIT_LE910C1TX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELIT_LE910C1TX)) + +DT_COMPAT_TELIT_ME310G1 := telit,me310g1 + +config DT_HAS_TELIT_ME310G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELIT_ME310G1)) + +DT_COMPAT_TELIT_ME910G1 := telit,me910g1 + +config DT_HAS_TELIT_ME910G1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TELIT_ME910G1)) + +DT_COMPAT_TEST_GPIO_ENABLE_DISABLE_INTERRUPT := test-gpio-enable-disable-interrupt + +config DT_HAS_TEST_GPIO_ENABLE_DISABLE_INTERRUPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TEST_GPIO_ENABLE_DISABLE_INTERRUPT)) + +DT_COMPAT_TI_ADS1013 := ti,ads1013 + +config DT_HAS_TI_ADS1013_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1013)) + +DT_COMPAT_TI_ADS1014 := ti,ads1014 + +config DT_HAS_TI_ADS1014_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1014)) + +DT_COMPAT_TI_ADS1015 := ti,ads1015 + +config DT_HAS_TI_ADS1015_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1015)) + +DT_COMPAT_TI_ADS1112 := ti,ads1112 + +config DT_HAS_TI_ADS1112_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1112)) + +DT_COMPAT_TI_ADS1113 := ti,ads1113 + +config DT_HAS_TI_ADS1113_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1113)) + +DT_COMPAT_TI_ADS1114 := ti,ads1114 + +config DT_HAS_TI_ADS1114_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1114)) + +DT_COMPAT_TI_ADS1115 := ti,ads1115 + +config DT_HAS_TI_ADS1115_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1115)) + +DT_COMPAT_TI_ADS1119 := ti,ads1119 + +config DT_HAS_TI_ADS1119_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1119)) + +DT_COMPAT_TI_ADS114S06 := ti,ads114s06 + +config DT_HAS_TI_ADS114S06_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS114S06)) + +DT_COMPAT_TI_ADS114S08 := ti,ads114s08 + +config DT_HAS_TI_ADS114S08_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS114S08)) + +DT_COMPAT_TI_ADS124S06 := ti,ads124s06 + +config DT_HAS_TI_ADS124S06_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS124S06)) + +DT_COMPAT_TI_ADS124S08 := ti,ads124s08 + +config DT_HAS_TI_ADS124S08_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS124S08)) + +DT_COMPAT_TI_ADS131M02 := ti,ads131m02 + +config DT_HAS_TI_ADS131M02_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS131M02)) + +DT_COMPAT_TI_ADS1X4S0X_GPIO := ti,ads1x4s0x-gpio + +config DT_HAS_TI_ADS1X4S0X_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS1X4S0X_GPIO)) + +DT_COMPAT_TI_ADS7052 := ti,ads7052 + +config DT_HAS_TI_ADS7052_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7052)) + +DT_COMPAT_TI_ADS7950 := ti,ads7950 + +config DT_HAS_TI_ADS7950_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7950)) + +DT_COMPAT_TI_ADS7951 := ti,ads7951 + +config DT_HAS_TI_ADS7951_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7951)) + +DT_COMPAT_TI_ADS7952 := ti,ads7952 + +config DT_HAS_TI_ADS7952_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7952)) + +DT_COMPAT_TI_ADS7953 := ti,ads7953 + +config DT_HAS_TI_ADS7953_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7953)) + +DT_COMPAT_TI_ADS7954 := ti,ads7954 + +config DT_HAS_TI_ADS7954_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7954)) + +DT_COMPAT_TI_ADS7955 := ti,ads7955 + +config DT_HAS_TI_ADS7955_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7955)) + +DT_COMPAT_TI_ADS7956 := ti,ads7956 + +config DT_HAS_TI_ADS7956_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7956)) + +DT_COMPAT_TI_ADS7957 := ti,ads7957 + +config DT_HAS_TI_ADS7957_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7957)) + +DT_COMPAT_TI_ADS7958 := ti,ads7958 + +config DT_HAS_TI_ADS7958_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7958)) + +DT_COMPAT_TI_ADS7959 := ti,ads7959 + +config DT_HAS_TI_ADS7959_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7959)) + +DT_COMPAT_TI_ADS7960 := ti,ads7960 + +config DT_HAS_TI_ADS7960_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7960)) + +DT_COMPAT_TI_ADS7961 := ti,ads7961 + +config DT_HAS_TI_ADS7961_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_ADS7961)) + +DT_COMPAT_TI_AM335X_ADC := ti,am335x-adc + +config DT_HAS_TI_AM335X_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_AM335X_ADC)) + +DT_COMPAT_TI_AM654_TIMER := ti,am654-timer + +config DT_HAS_TI_AM654_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_AM654_TIMER)) + +DT_COMPAT_TI_BOOSTERPACK_HEADER := ti,boosterpack-header + +config DT_HAS_TI_BOOSTERPACK_HEADER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BOOSTERPACK_HEADER)) + +DT_COMPAT_TI_BQ24190 := ti,bq24190 + +config DT_HAS_TI_BQ24190_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ24190)) + +DT_COMPAT_TI_BQ25180 := ti,bq25180 + +config DT_HAS_TI_BQ25180_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ25180)) + +DT_COMPAT_TI_BQ25186 := ti,bq25186 + +config DT_HAS_TI_BQ25186_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ25186)) + +DT_COMPAT_TI_BQ25188 := ti,bq25188 + +config DT_HAS_TI_BQ25188_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ25188)) + +DT_COMPAT_TI_BQ25713 := ti,bq25713 + +config DT_HAS_TI_BQ25713_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ25713)) + +DT_COMPAT_TI_BQ274XX := ti,bq274xx + +config DT_HAS_TI_BQ274XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ274XX)) + +DT_COMPAT_TI_BQ27Z746 := ti,bq27z746 + +config DT_HAS_TI_BQ27Z746_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ27Z746)) + +DT_COMPAT_TI_BQ32002 := ti,bq32002 + +config DT_HAS_TI_BQ32002_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ32002)) + +DT_COMPAT_TI_BQ40Z50 := ti,bq40z50 + +config DT_HAS_TI_BQ40Z50_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_BQ40Z50)) + +DT_COMPAT_TI_CC1200 := ti,cc1200 + +config DT_HAS_TI_CC1200_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC1200)) + +DT_COMPAT_TI_CC13XX_CC26XX_ADC := ti,cc13xx-cc26xx-adc + +config DT_HAS_TI_CC13XX_CC26XX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_ADC)) + +DT_COMPAT_TI_CC13XX_CC26XX_FLASH_CONTROLLER := ti,cc13xx-cc26xx-flash-controller + +config DT_HAS_TI_CC13XX_CC26XX_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_FLASH_CONTROLLER)) + +DT_COMPAT_TI_CC13XX_CC26XX_GPIO := ti,cc13xx-cc26xx-gpio + +config DT_HAS_TI_CC13XX_CC26XX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_GPIO)) + +DT_COMPAT_TI_CC13XX_CC26XX_I2C := ti,cc13xx-cc26xx-i2c + +config DT_HAS_TI_CC13XX_CC26XX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_I2C)) + +DT_COMPAT_TI_CC13XX_CC26XX_IEEE802154 := ti,cc13xx-cc26xx-ieee802154 + +config DT_HAS_TI_CC13XX_CC26XX_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_IEEE802154)) + +DT_COMPAT_TI_CC13XX_CC26XX_IEEE802154_SUBGHZ := ti,cc13xx-cc26xx-ieee802154-subghz + +config DT_HAS_TI_CC13XX_CC26XX_IEEE802154_SUBGHZ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_IEEE802154_SUBGHZ)) + +DT_COMPAT_TI_CC13XX_CC26XX_PINCTRL := ti,cc13xx-cc26xx-pinctrl + +config DT_HAS_TI_CC13XX_CC26XX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_PINCTRL)) + +DT_COMPAT_TI_CC13XX_CC26XX_RADIO := ti,cc13xx-cc26xx-radio + +config DT_HAS_TI_CC13XX_CC26XX_RADIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_RADIO)) + +DT_COMPAT_TI_CC13XX_CC26XX_RTC_TIMER := ti,cc13xx-cc26xx-rtc-timer + +config DT_HAS_TI_CC13XX_CC26XX_RTC_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_RTC_TIMER)) + +DT_COMPAT_TI_CC13XX_CC26XX_SPI := ti,cc13xx-cc26xx-spi + +config DT_HAS_TI_CC13XX_CC26XX_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_SPI)) + +DT_COMPAT_TI_CC13XX_CC26XX_TIMER := ti,cc13xx-cc26xx-timer + +config DT_HAS_TI_CC13XX_CC26XX_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_TIMER)) + +DT_COMPAT_TI_CC13XX_CC26XX_TIMER_PWM := ti,cc13xx-cc26xx-timer-pwm + +config DT_HAS_TI_CC13XX_CC26XX_TIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_TIMER_PWM)) + +DT_COMPAT_TI_CC13XX_CC26XX_TRNG := ti,cc13xx-cc26xx-trng + +config DT_HAS_TI_CC13XX_CC26XX_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_TRNG)) + +DT_COMPAT_TI_CC13XX_CC26XX_UART := ti,cc13xx-cc26xx-uart + +config DT_HAS_TI_CC13XX_CC26XX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_UART)) + +DT_COMPAT_TI_CC13XX_CC26XX_WATCHDOG := ti,cc13xx-cc26xx-watchdog + +config DT_HAS_TI_CC13XX_CC26XX_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC13XX_CC26XX_WATCHDOG)) + +DT_COMPAT_TI_CC23X0_ADC := ti,cc23x0-adc + +config DT_HAS_TI_CC23X0_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_ADC)) + +DT_COMPAT_TI_CC23X0_AES := ti,cc23x0-aes + +config DT_HAS_TI_CC23X0_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_AES)) + +DT_COMPAT_TI_CC23X0_CCFG_FLASH := ti,cc23x0-ccfg-flash + +config DT_HAS_TI_CC23X0_CCFG_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_CCFG_FLASH)) + +DT_COMPAT_TI_CC23X0_DMA := ti,cc23x0-dma + +config DT_HAS_TI_CC23X0_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_DMA)) + +DT_COMPAT_TI_CC23X0_FLASH_CONTROLLER := ti,cc23x0-flash-controller + +config DT_HAS_TI_CC23X0_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_FLASH_CONTROLLER)) + +DT_COMPAT_TI_CC23X0_GPIO := ti,cc23x0-gpio + +config DT_HAS_TI_CC23X0_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_GPIO)) + +DT_COMPAT_TI_CC23X0_I2C := ti,cc23x0-i2c + +config DT_HAS_TI_CC23X0_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_I2C)) + +DT_COMPAT_TI_CC23X0_LF_XOSC := ti,cc23x0-lf-xosc + +config DT_HAS_TI_CC23X0_LF_XOSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_LF_XOSC)) + +DT_COMPAT_TI_CC23X0_LGPT := ti,cc23x0-lgpt + +config DT_HAS_TI_CC23X0_LGPT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_LGPT)) + +DT_COMPAT_TI_CC23X0_LGPT_PWM := ti,cc23x0-lgpt-pwm + +config DT_HAS_TI_CC23X0_LGPT_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_LGPT_PWM)) + +DT_COMPAT_TI_CC23X0_PINCTRL := ti,cc23x0-pinctrl + +config DT_HAS_TI_CC23X0_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_PINCTRL)) + +DT_COMPAT_TI_CC23X0_RTC := ti,cc23x0-rtc + +config DT_HAS_TI_CC23X0_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_RTC)) + +DT_COMPAT_TI_CC23X0_SPI := ti,cc23x0-spi + +config DT_HAS_TI_CC23X0_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_SPI)) + +DT_COMPAT_TI_CC23X0_SYSTIM_TIMER := ti,cc23x0-systim-timer + +config DT_HAS_TI_CC23X0_SYSTIM_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_SYSTIM_TIMER)) + +DT_COMPAT_TI_CC23X0_UART := ti,cc23x0-uart + +config DT_HAS_TI_CC23X0_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_UART)) + +DT_COMPAT_TI_CC23X0_WDT := ti,cc23x0-wdt + +config DT_HAS_TI_CC23X0_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC23X0_WDT)) + +DT_COMPAT_TI_CC2520 := ti,cc2520 + +config DT_HAS_TI_CC2520_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC2520)) + +DT_COMPAT_TI_CC32XX_ADC := ti,cc32xx-adc + +config DT_HAS_TI_CC32XX_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC32XX_ADC)) + +DT_COMPAT_TI_CC32XX_GPIO := ti,cc32xx-gpio + +config DT_HAS_TI_CC32XX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC32XX_GPIO)) + +DT_COMPAT_TI_CC32XX_I2C := ti,cc32xx-i2c + +config DT_HAS_TI_CC32XX_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC32XX_I2C)) + +DT_COMPAT_TI_CC32XX_PINCTRL := ti,cc32xx-pinctrl + +config DT_HAS_TI_CC32XX_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC32XX_PINCTRL)) + +DT_COMPAT_TI_CC32XX_UART := ti,cc32xx-uart + +config DT_HAS_TI_CC32XX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC32XX_UART)) + +DT_COMPAT_TI_CC32XX_WATCHDOG := ti,cc32xx-watchdog + +config DT_HAS_TI_CC32XX_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CC32XX_WATCHDOG)) + +DT_COMPAT_TI_CONTROL_MODULE := ti,control-module + +config DT_HAS_TI_CONTROL_MODULE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_CONTROL_MODULE)) + +DT_COMPAT_TI_DAC161S997 := ti,dac161s997 + +config DT_HAS_TI_DAC161S997_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC161S997)) + +DT_COMPAT_TI_DAC43608 := ti,dac43608 + +config DT_HAS_TI_DAC43608_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC43608)) + +DT_COMPAT_TI_DAC5311 := ti,dac5311 + +config DT_HAS_TI_DAC5311_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC5311)) + +DT_COMPAT_TI_DAC53608 := ti,dac53608 + +config DT_HAS_TI_DAC53608_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC53608)) + +DT_COMPAT_TI_DAC60508 := ti,dac60508 + +config DT_HAS_TI_DAC60508_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC60508)) + +DT_COMPAT_TI_DAC6311 := ti,dac6311 + +config DT_HAS_TI_DAC6311_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC6311)) + +DT_COMPAT_TI_DAC70508 := ti,dac70508 + +config DT_HAS_TI_DAC70508_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC70508)) + +DT_COMPAT_TI_DAC7311 := ti,dac7311 + +config DT_HAS_TI_DAC7311_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC7311)) + +DT_COMPAT_TI_DAC80508 := ti,dac80508 + +config DT_HAS_TI_DAC80508_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC80508)) + +DT_COMPAT_TI_DAC8311 := ti,dac8311 + +config DT_HAS_TI_DAC8311_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC8311)) + +DT_COMPAT_TI_DAC8411 := ti,dac8411 + +config DT_HAS_TI_DAC8411_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAC8411)) + +DT_COMPAT_TI_DACX0501 := ti,dacx0501 + +config DT_HAS_TI_DACX0501_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DACX0501)) + +DT_COMPAT_TI_DAVINCI_GPIO := ti,davinci-gpio + +config DT_HAS_TI_DAVINCI_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAVINCI_GPIO)) + +DT_COMPAT_TI_DAVINCI_GPIO_NEXUS := ti,davinci-gpio-nexus + +config DT_HAS_TI_DAVINCI_GPIO_NEXUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DAVINCI_GPIO_NEXUS)) + +DT_COMPAT_TI_DP83825 := ti,dp83825 + +config DT_HAS_TI_DP83825_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DP83825)) + +DT_COMPAT_TI_DP83867 := ti,dp83867 + +config DT_HAS_TI_DP83867_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DP83867)) + +DT_COMPAT_TI_DRV2605 := ti,drv2605 + +config DT_HAS_TI_DRV2605_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DRV2605)) + +DT_COMPAT_TI_DRV84XX := ti,drv84xx + +config DT_HAS_TI_DRV84XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_DRV84XX)) + +DT_COMPAT_TI_FDC1004 := ti,fdc1004 + +config DT_HAS_TI_FDC1004_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_FDC1004)) + +DT_COMPAT_TI_FDC2X1X := ti,fdc2x1x + +config DT_HAS_TI_FDC2X1X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_FDC2X1X)) + +DT_COMPAT_TI_HDC := ti,hdc + +config DT_HAS_TI_HDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_HDC)) + +DT_COMPAT_TI_HDC2010 := ti,hdc2010 + +config DT_HAS_TI_HDC2010_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_HDC2010)) + +DT_COMPAT_TI_HDC2021 := ti,hdc2021 + +config DT_HAS_TI_HDC2021_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_HDC2021)) + +DT_COMPAT_TI_HDC2022 := ti,hdc2022 + +config DT_HAS_TI_HDC2022_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_HDC2022)) + +DT_COMPAT_TI_HDC2080 := ti,hdc2080 + +config DT_HAS_TI_HDC2080_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_HDC2080)) + +DT_COMPAT_TI_HDC302X := ti,hdc302x + +config DT_HAS_TI_HDC302X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_HDC302X)) + +DT_COMPAT_TI_INA219 := ti,ina219 + +config DT_HAS_TI_INA219_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA219)) + +DT_COMPAT_TI_INA226 := ti,ina226 + +config DT_HAS_TI_INA226_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA226)) + +DT_COMPAT_TI_INA228 := ti,ina228 + +config DT_HAS_TI_INA228_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA228)) + +DT_COMPAT_TI_INA230 := ti,ina230 + +config DT_HAS_TI_INA230_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA230)) + +DT_COMPAT_TI_INA232 := ti,ina232 + +config DT_HAS_TI_INA232_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA232)) + +DT_COMPAT_TI_INA236 := ti,ina236 + +config DT_HAS_TI_INA236_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA236)) + +DT_COMPAT_TI_INA237 := ti,ina237 + +config DT_HAS_TI_INA237_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA237)) + +DT_COMPAT_TI_INA3221 := ti,ina3221 + +config DT_HAS_TI_INA3221_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA3221)) + +DT_COMPAT_TI_INA7XX := ti,ina7xx + +config DT_HAS_TI_INA7XX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_INA7XX)) + +DT_COMPAT_TI_J7_RTI_WDT := ti,j7-rti-wdt + +config DT_HAS_TI_J7_RTI_WDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_J7_RTI_WDT)) + +DT_COMPAT_TI_K2G_SCI := ti,k2g-sci + +config DT_HAS_TI_K2G_SCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_K2G_SCI)) + +DT_COMPAT_TI_K2G_SCI_CLK := ti,k2g-sci-clk + +config DT_HAS_TI_K2G_SCI_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_K2G_SCI_CLK)) + +DT_COMPAT_TI_K3_PINCTRL := ti,k3-pinctrl + +config DT_HAS_TI_K3_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_K3_PINCTRL)) + +DT_COMPAT_TI_LMP90077 := ti,lmp90077 + +config DT_HAS_TI_LMP90077_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90077)) + +DT_COMPAT_TI_LMP90078 := ti,lmp90078 + +config DT_HAS_TI_LMP90078_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90078)) + +DT_COMPAT_TI_LMP90079 := ti,lmp90079 + +config DT_HAS_TI_LMP90079_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90079)) + +DT_COMPAT_TI_LMP90080 := ti,lmp90080 + +config DT_HAS_TI_LMP90080_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90080)) + +DT_COMPAT_TI_LMP90097 := ti,lmp90097 + +config DT_HAS_TI_LMP90097_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90097)) + +DT_COMPAT_TI_LMP90098 := ti,lmp90098 + +config DT_HAS_TI_LMP90098_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90098)) + +DT_COMPAT_TI_LMP90099 := ti,lmp90099 + +config DT_HAS_TI_LMP90099_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90099)) + +DT_COMPAT_TI_LMP90100 := ti,lmp90100 + +config DT_HAS_TI_LMP90100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90100)) + +DT_COMPAT_TI_LMP90XXX_GPIO := ti,lmp90xxx-gpio + +config DT_HAS_TI_LMP90XXX_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LMP90XXX_GPIO)) + +DT_COMPAT_TI_LP3943 := ti,lp3943 + +config DT_HAS_TI_LP3943_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP3943)) + +DT_COMPAT_TI_LP5009 := ti,lp5009 + +config DT_HAS_TI_LP5009_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5009)) + +DT_COMPAT_TI_LP5012 := ti,lp5012 + +config DT_HAS_TI_LP5012_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5012)) + +DT_COMPAT_TI_LP5018 := ti,lp5018 + +config DT_HAS_TI_LP5018_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5018)) + +DT_COMPAT_TI_LP5024 := ti,lp5024 + +config DT_HAS_TI_LP5024_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5024)) + +DT_COMPAT_TI_LP5030 := ti,lp5030 + +config DT_HAS_TI_LP5030_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5030)) + +DT_COMPAT_TI_LP5036 := ti,lp5036 + +config DT_HAS_TI_LP5036_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5036)) + +DT_COMPAT_TI_LP5562 := ti,lp5562 + +config DT_HAS_TI_LP5562_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5562)) + +DT_COMPAT_TI_LP5569 := ti,lp5569 + +config DT_HAS_TI_LP5569_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_LP5569)) + +DT_COMPAT_TI_MSP432P4XX_UART := ti,msp432p4xx-uart + +config DT_HAS_TI_MSP432P4XX_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSP432P4XX_UART)) + +DT_COMPAT_TI_MSPM0_ADC12 := ti,mspm0-adc12 + +config DT_HAS_TI_MSPM0_ADC12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_ADC12)) + +DT_COMPAT_TI_MSPM0_AES := ti,mspm0-aes + +config DT_HAS_TI_MSPM0_AES_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_AES)) + +DT_COMPAT_TI_MSPM0_CANFD := ti,mspm0-canfd + +config DT_HAS_TI_MSPM0_CANFD_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_CANFD)) + +DT_COMPAT_TI_MSPM0_CLK := ti,mspm0-clk + +config DT_HAS_TI_MSPM0_CLK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_CLK)) + +DT_COMPAT_TI_MSPM0_COMPARATOR := ti,mspm0-comparator + +config DT_HAS_TI_MSPM0_COMPARATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_COMPARATOR)) + +DT_COMPAT_TI_MSPM0_DAC := ti,mspm0-dac + +config DT_HAS_TI_MSPM0_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_DAC)) + +DT_COMPAT_TI_MSPM0_DMA := ti,mspm0-dma + +config DT_HAS_TI_MSPM0_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_DMA)) + +DT_COMPAT_TI_MSPM0_GPIO := ti,mspm0-gpio + +config DT_HAS_TI_MSPM0_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_GPIO)) + +DT_COMPAT_TI_MSPM0_OSC := ti,mspm0-osc + +config DT_HAS_TI_MSPM0_OSC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_OSC)) + +DT_COMPAT_TI_MSPM0_PINCTRL := ti,mspm0-pinctrl + +config DT_HAS_TI_MSPM0_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_PINCTRL)) + +DT_COMPAT_TI_MSPM0_PLL := ti,mspm0-pll + +config DT_HAS_TI_MSPM0_PLL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_PLL)) + +DT_COMPAT_TI_MSPM0_RTC := ti,mspm0-rtc + +config DT_HAS_TI_MSPM0_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_RTC)) + +DT_COMPAT_TI_MSPM0_SPI := ti,mspm0-spi + +config DT_HAS_TI_MSPM0_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_SPI)) + +DT_COMPAT_TI_MSPM0_TIMER := ti,mspm0-timer + +config DT_HAS_TI_MSPM0_TIMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_TIMER)) + +DT_COMPAT_TI_MSPM0_TIMER_COUNTER := ti,mspm0-timer-counter + +config DT_HAS_TI_MSPM0_TIMER_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_TIMER_COUNTER)) + +DT_COMPAT_TI_MSPM0_TIMER_PWM := ti,mspm0-timer-pwm + +config DT_HAS_TI_MSPM0_TIMER_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_TIMER_PWM)) + +DT_COMPAT_TI_MSPM0_TRNG := ti,mspm0-trng + +config DT_HAS_TI_MSPM0_TRNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_TRNG)) + +DT_COMPAT_TI_MSPM0_UART := ti,mspm0-uart + +config DT_HAS_TI_MSPM0_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_UART)) + +DT_COMPAT_TI_MSPM0_VREF := ti,mspm0-vref + +config DT_HAS_TI_MSPM0_VREF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_VREF)) + +DT_COMPAT_TI_MSPM0_WATCHDOG := ti,mspm0-watchdog + +config DT_HAS_TI_MSPM0_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_MSPM0_WATCHDOG)) + +DT_COMPAT_TI_OMAP_I2C := ti,omap-i2c + +config DT_HAS_TI_OMAP_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_OMAP_I2C)) + +DT_COMPAT_TI_OMAP_MAILBOX := ti,omap-mailbox + +config DT_HAS_TI_OMAP_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_OMAP_MAILBOX)) + +DT_COMPAT_TI_OMAP_MCSPI := ti,omap-mcspi + +config DT_HAS_TI_OMAP_MCSPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_OMAP_MCSPI)) + +DT_COMPAT_TI_OPT3001 := ti,opt3001 + +config DT_HAS_TI_OPT3001_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_OPT3001)) + +DT_COMPAT_TI_OPT3004 := ti,opt3004 + +config DT_HAS_TI_OPT3004_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_OPT3004)) + +DT_COMPAT_TI_PCM1681 := ti,pcm1681 + +config DT_HAS_TI_PCM1681_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_PCM1681)) + +DT_COMPAT_TI_SCI_PM_DOMAIN := ti,sci-pm-domain + +config DT_HAS_TI_SCI_PM_DOMAIN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_SCI_PM_DOMAIN)) + +DT_COMPAT_TI_SECURE_PROXY := ti,secure-proxy + +config DT_HAS_TI_SECURE_PROXY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_SECURE_PROXY)) + +DT_COMPAT_TI_SN74HC595 := ti,sn74hc595 + +config DT_HAS_TI_SN74HC595_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_SN74HC595)) + +DT_COMPAT_TI_STELLARIS_ETHERNET := ti,stellaris-ethernet + +config DT_HAS_TI_STELLARIS_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_STELLARIS_ETHERNET)) + +DT_COMPAT_TI_STELLARIS_FLASH_CONTROLLER := ti,stellaris-flash-controller + +config DT_HAS_TI_STELLARIS_FLASH_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_STELLARIS_FLASH_CONTROLLER)) + +DT_COMPAT_TI_STELLARIS_GPIO := ti,stellaris-gpio + +config DT_HAS_TI_STELLARIS_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_STELLARIS_GPIO)) + +DT_COMPAT_TI_STELLARIS_UART := ti,stellaris-uart + +config DT_HAS_TI_STELLARIS_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_STELLARIS_UART)) + +DT_COMPAT_TI_TAS2563 := ti,tas2563 + +config DT_HAS_TI_TAS2563_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TAS2563)) + +DT_COMPAT_TI_TAS6422DAC := ti,tas6422dac + +config DT_HAS_TI_TAS6422DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TAS6422DAC)) + +DT_COMPAT_TI_TCA6424A := ti,tca6424a + +config DT_HAS_TI_TCA6424A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TCA6424A)) + +DT_COMPAT_TI_TCA9538 := ti,tca9538 + +config DT_HAS_TI_TCA9538_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TCA9538)) + +DT_COMPAT_TI_TCA9544A := ti,tca9544a + +config DT_HAS_TI_TCA9544A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TCA9544A)) + +DT_COMPAT_TI_TCA9546A := ti,tca9546a + +config DT_HAS_TI_TCA9546A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TCA9546A)) + +DT_COMPAT_TI_TCA9548A := ti,tca9548a + +config DT_HAS_TI_TCA9548A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TCA9548A)) + +DT_COMPAT_TI_TCAN4X5X := ti,tcan4x5x + +config DT_HAS_TI_TCAN4X5X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TCAN4X5X)) + +DT_COMPAT_TI_TLA2021 := ti,tla2021 + +config DT_HAS_TI_TLA2021_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLA2021)) + +DT_COMPAT_TI_TLA2022 := ti,tla2022 + +config DT_HAS_TI_TLA2022_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLA2022)) + +DT_COMPAT_TI_TLA2024 := ti,tla2024 + +config DT_HAS_TI_TLA2024_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLA2024)) + +DT_COMPAT_TI_TLC59108 := ti,tlc59108 + +config DT_HAS_TI_TLC59108_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLC59108)) + +DT_COMPAT_TI_TLC5971 := ti,tlc5971 + +config DT_HAS_TI_TLC5971_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLC5971)) + +DT_COMPAT_TI_TLC59731 := ti,tlc59731 + +config DT_HAS_TI_TLC59731_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLC59731)) + +DT_COMPAT_TI_TLV320AIC3110 := ti,tlv320aic3110 + +config DT_HAS_TI_TLV320AIC3110_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLV320AIC3110)) + +DT_COMPAT_TI_TLV320DAC := ti,tlv320dac + +config DT_HAS_TI_TLV320DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TLV320DAC)) + +DT_COMPAT_TI_TMAG3001 := ti,tmag3001 + +config DT_HAS_TI_TMAG3001_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMAG3001)) + +DT_COMPAT_TI_TMAG5170 := ti,tmag5170 + +config DT_HAS_TI_TMAG5170_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMAG5170)) + +DT_COMPAT_TI_TMAG5273 := ti,tmag5273 + +config DT_HAS_TI_TMAG5273_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMAG5273)) + +DT_COMPAT_TI_TMP007 := ti,tmp007 + +config DT_HAS_TI_TMP007_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP007)) + +DT_COMPAT_TI_TMP1075 := ti,tmp1075 + +config DT_HAS_TI_TMP1075_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP1075)) + +DT_COMPAT_TI_TMP108 := ti,tmp108 + +config DT_HAS_TI_TMP108_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP108)) + +DT_COMPAT_TI_TMP112 := ti,tmp112 + +config DT_HAS_TI_TMP112_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP112)) + +DT_COMPAT_TI_TMP114 := ti,tmp114 + +config DT_HAS_TI_TMP114_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP114)) + +DT_COMPAT_TI_TMP11X := ti,tmp11x + +config DT_HAS_TI_TMP11X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP11X)) + +DT_COMPAT_TI_TMP11X_EEPROM := ti,tmp11x-eeprom + +config DT_HAS_TI_TMP11X_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP11X_EEPROM)) + +DT_COMPAT_TI_TMP435 := ti,tmp435 + +config DT_HAS_TI_TMP435_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TMP435)) + +DT_COMPAT_TI_TPS382X := ti,tps382x + +config DT_HAS_TI_TPS382X_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TPS382X)) + +DT_COMPAT_TI_TPS55287 := ti,tps55287 + +config DT_HAS_TI_TPS55287_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_TPS55287)) + +DT_COMPAT_TI_VIM := ti,vim + +config DT_HAS_TI_VIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TI_VIM)) + +DT_COMPAT_TITANMEC_TM1637 := titanmec,tm1637 + +config DT_HAS_TITANMEC_TM1637_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TITANMEC_TM1637)) + +DT_COMPAT_TRASNA_LEXI_R10 := trasna,lexi-r10 + +config DT_HAS_TRASNA_LEXI_R10_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TRASNA_LEXI_R10)) + +DT_COMPAT_TSC_KEYS := tsc-keys + +config DT_HAS_TSC_KEYS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_TSC_KEYS)) + +DT_COMPAT_U_BLOX_F9P := u-blox,f9p + +config DT_HAS_U_BLOX_F9P_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_U_BLOX_F9P)) + +DT_COMPAT_U_BLOX_LARA_R6 := u-blox,lara-r6 + +config DT_HAS_U_BLOX_LARA_R6_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_U_BLOX_LARA_R6)) + +DT_COMPAT_U_BLOX_M8 := u-blox,m8 + +config DT_HAS_U_BLOX_M8_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_U_BLOX_M8)) + +DT_COMPAT_U_BLOX_SARA_R4 := u-blox,sara-r4 + +config DT_HAS_U_BLOX_SARA_R4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_U_BLOX_SARA_R4)) + +DT_COMPAT_U_BLOX_SARA_R5 := u-blox,sara-r5 + +config DT_HAS_U_BLOX_SARA_R5_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_U_BLOX_SARA_R5)) + +DT_COMPAT_UART_HDLC_RCP_IF := uart,hdlc-rcp-if + +config DT_HAS_UART_HDLC_RCP_IF_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_UART_HDLC_RCP_IF)) + +DT_COMPAT_ULTRACHIP_UC8151D := ultrachip,uc8151d + +config DT_HAS_ULTRACHIP_UC8151D_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ULTRACHIP_UC8151D)) + +DT_COMPAT_ULTRACHIP_UC8175 := ultrachip,uc8175 + +config DT_HAS_ULTRACHIP_UC8175_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ULTRACHIP_UC8175)) + +DT_COMPAT_ULTRACHIP_UC8176 := ultrachip,uc8176 + +config DT_HAS_ULTRACHIP_UC8176_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ULTRACHIP_UC8176)) + +DT_COMPAT_ULTRACHIP_UC8179 := ultrachip,uc8179 + +config DT_HAS_ULTRACHIP_UC8179_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ULTRACHIP_UC8179)) + +DT_COMPAT_USB_AUDIO := usb-audio + +config DT_HAS_USB_AUDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_AUDIO)) + +DT_COMPAT_USB_AUDIO_FEATURE_VOLUME := usb-audio-feature-volume + +config DT_HAS_USB_AUDIO_FEATURE_VOLUME_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_AUDIO_FEATURE_VOLUME)) + +DT_COMPAT_USB_AUDIO_HP := usb-audio-hp + +config DT_HAS_USB_AUDIO_HP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_AUDIO_HP)) + +DT_COMPAT_USB_AUDIO_HS := usb-audio-hs + +config DT_HAS_USB_AUDIO_HS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_AUDIO_HS)) + +DT_COMPAT_USB_AUDIO_MIC := usb-audio-mic + +config DT_HAS_USB_AUDIO_MIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_AUDIO_MIC)) + +DT_COMPAT_USB_C_CONNECTOR := usb-c-connector + +config DT_HAS_USB_C_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_C_CONNECTOR)) + +DT_COMPAT_USB_NOP_XCEIV := usb-nop-xceiv + +config DT_HAS_USB_NOP_XCEIV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_NOP_XCEIV)) + +DT_COMPAT_USB_ULPI_PHY := usb-ulpi-phy + +config DT_HAS_USB_ULPI_PHY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_USB_ULPI_PHY)) + +DT_COMPAT_VIRTIO_CONSOLE := virtio,console + +config DT_HAS_VIRTIO_CONSOLE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VIRTIO_CONSOLE)) + +DT_COMPAT_VIRTIO_DEVICE4 := virtio,device4 + +config DT_HAS_VIRTIO_DEVICE4_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VIRTIO_DEVICE4)) + +DT_COMPAT_VIRTIO_MMIO := virtio,mmio + +config DT_HAS_VIRTIO_MMIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VIRTIO_MMIO)) + +DT_COMPAT_VIRTIO_NET := virtio,net + +config DT_HAS_VIRTIO_NET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VIRTIO_NET)) + +DT_COMPAT_VIRTIO_PCI := virtio,pci + +config DT_HAS_VIRTIO_PCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VIRTIO_PCI)) + +DT_COMPAT_VISHAY_VCNL36825T := vishay,vcnl36825t + +config DT_HAS_VISHAY_VCNL36825T_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VISHAY_VCNL36825T)) + +DT_COMPAT_VISHAY_VCNL4040 := vishay,vcnl4040 + +config DT_HAS_VISHAY_VCNL4040_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VISHAY_VCNL4040)) + +DT_COMPAT_VISHAY_VEML6031 := vishay,veml6031 + +config DT_HAS_VISHAY_VEML6031_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VISHAY_VEML6031)) + +DT_COMPAT_VISHAY_VEML6046 := vishay,veml6046 + +config DT_HAS_VISHAY_VEML6046_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VISHAY_VEML6046)) + +DT_COMPAT_VISHAY_VEML7700 := vishay,veml7700 + +config DT_HAS_VISHAY_VEML7700_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VISHAY_VEML7700)) + +DT_COMPAT_VISHAY_VS1838B := vishay,vs1838b + +config DT_HAS_VISHAY_VS1838B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VISHAY_VS1838B)) + +DT_COMPAT_VND_ADC := vnd,adc + +config DT_HAS_VND_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ADC)) + +DT_COMPAT_VND_ADC_TEMP_SENSOR := vnd,adc-temp-sensor + +config DT_HAS_VND_ADC_TEMP_SENSOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ADC_TEMP_SENSOR)) + +DT_COMPAT_VND_ARRAY_HOLDER := vnd,array-holder + +config DT_HAS_VND_ARRAY_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ARRAY_HOLDER)) + +DT_COMPAT_VND_BUSY_SIM := vnd,busy-sim + +config DT_HAS_VND_BUSY_SIM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_BUSY_SIM)) + +DT_COMPAT_VND_CAN_CONTROLLER := vnd,can-controller + +config DT_HAS_VND_CAN_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_CAN_CONTROLLER)) + +DT_COMPAT_VND_CAN_TRANSCEIVER := vnd,can-transceiver + +config DT_HAS_VND_CAN_TRANSCEIVER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_CAN_TRANSCEIVER)) + +DT_COMPAT_VND_CHILD_BINDINGS := vnd,child-bindings + +config DT_HAS_VND_CHILD_BINDINGS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_CHILD_BINDINGS)) + +DT_COMPAT_VND_CLOCK := vnd,clock + +config DT_HAS_VND_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_CLOCK)) + +DT_COMPAT_VND_CPU_FREQ_THERMAL_CAP_SENSOR := vnd,cpu-freq-thermal-cap-sensor + +config DT_HAS_VND_CPU_FREQ_THERMAL_CAP_SENSOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_CPU_FREQ_THERMAL_CAP_SENSOR)) + +DT_COMPAT_VND_CPU_INTC := vnd,cpu-intc + +config DT_HAS_VND_CPU_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_CPU_INTC)) + +DT_COMPAT_VND_DAC := vnd,dac + +config DT_HAS_VND_DAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_DAC)) + +DT_COMPAT_VND_DAC_OUTPUTS := vnd,dac-outputs + +config DT_HAS_VND_DAC_OUTPUTS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_DAC_OUTPUTS)) + +DT_COMPAT_VND_DEVICE_WITH_PROPS := vnd,device-with-props + +config DT_HAS_VND_DEVICE_WITH_PROPS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_DEVICE_WITH_PROPS)) + +DT_COMPAT_VND_DISABLED_COMPAT := vnd,disabled-compat + +config DT_HAS_VND_DISABLED_COMPAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_DISABLED_COMPAT)) + +DT_COMPAT_VND_DMA := vnd,dma + +config DT_HAS_VND_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_DMA)) + +DT_COMPAT_VND_EMUL_TESTER := vnd,emul-tester + +config DT_HAS_VND_EMUL_TESTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_EMUL_TESTER)) + +DT_COMPAT_VND_ENUM_HOLDER := vnd,enum-holder + +config DT_HAS_VND_ENUM_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_HOLDER)) + +DT_COMPAT_VND_ENUM_HOLDER_INST := vnd,enum-holder-inst + +config DT_HAS_VND_ENUM_HOLDER_INST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_HOLDER_INST)) + +DT_COMPAT_VND_ENUM_INT_ARRAY_HOLDER := vnd,enum-int-array-holder + +config DT_HAS_VND_ENUM_INT_ARRAY_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_INT_ARRAY_HOLDER)) + +DT_COMPAT_VND_ENUM_INT_REQUIRED_FALSE_HOLDER := vnd,enum-int-required-false-holder + +config DT_HAS_VND_ENUM_INT_REQUIRED_FALSE_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_INT_REQUIRED_FALSE_HOLDER)) + +DT_COMPAT_VND_ENUM_REQUIRED_FALSE_HOLDER := vnd,enum-required-false-holder + +config DT_HAS_VND_ENUM_REQUIRED_FALSE_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_REQUIRED_FALSE_HOLDER)) + +DT_COMPAT_VND_ENUM_REQUIRED_FALSE_HOLDER_INST := vnd,enum-required-false-holder-inst + +config DT_HAS_VND_ENUM_REQUIRED_FALSE_HOLDER_INST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_REQUIRED_FALSE_HOLDER_INST)) + +DT_COMPAT_VND_ENUM_STRING_ARRAY_HOLDER := vnd,enum-string-array-holder + +config DT_HAS_VND_ENUM_STRING_ARRAY_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ENUM_STRING_ARRAY_HOLDER)) + +DT_COMPAT_VND_ETHERNET := vnd,ethernet + +config DT_HAS_VND_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_ETHERNET)) + +DT_COMPAT_VND_GPIO := vnd,gpio + +config DT_HAS_VND_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GPIO)) + +DT_COMPAT_VND_GPIO_DEVICE := vnd,gpio-device + +config DT_HAS_VND_GPIO_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GPIO_DEVICE)) + +DT_COMPAT_VND_GPIO_EXPANDER := vnd,gpio-expander + +config DT_HAS_VND_GPIO_EXPANDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GPIO_EXPANDER)) + +DT_COMPAT_VND_GPIO_INTC_DEVICE := vnd,gpio-intc-device + +config DT_HAS_VND_GPIO_INTC_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GPIO_INTC_DEVICE)) + +DT_COMPAT_VND_GPIO_NEXUS := vnd,gpio-nexus + +config DT_HAS_VND_GPIO_NEXUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GPIO_NEXUS)) + +DT_COMPAT_VND_GPIO_ONE_CELL := vnd,gpio-one-cell + +config DT_HAS_VND_GPIO_ONE_CELL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GPIO_ONE_CELL)) + +DT_COMPAT_VND_GREAT_GRANDCHILD_BINDINGS := vnd,great-grandchild-bindings + +config DT_HAS_VND_GREAT_GRANDCHILD_BINDINGS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_GREAT_GRANDCHILD_BINDINGS)) + +DT_COMPAT_VND_HWSPINLOCK := vnd,hwspinlock + +config DT_HAS_VND_HWSPINLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_HWSPINLOCK)) + +DT_COMPAT_VND_HWSPINLOCK_CONSUMER := vnd,hwspinlock-consumer + +config DT_HAS_VND_HWSPINLOCK_CONSUMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_HWSPINLOCK_CONSUMER)) + +DT_COMPAT_VND_HWSPINLOCK_DEVICE := vnd,hwspinlock-device + +config DT_HAS_VND_HWSPINLOCK_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_HWSPINLOCK_DEVICE)) + +DT_COMPAT_VND_I2C := vnd,i2c + +config DT_HAS_VND_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I2C)) + +DT_COMPAT_VND_I2C_DEVICE := vnd,i2c-device + +config DT_HAS_VND_I2C_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I2C_DEVICE)) + +DT_COMPAT_VND_I2C_MUX := vnd,i2c-mux + +config DT_HAS_VND_I2C_MUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I2C_MUX)) + +DT_COMPAT_VND_I2S := vnd,i2s + +config DT_HAS_VND_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I2S)) + +DT_COMPAT_VND_I3C := vnd,i3c + +config DT_HAS_VND_I3C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I3C)) + +DT_COMPAT_VND_I3C_DEVICE := vnd,i3c-device + +config DT_HAS_VND_I3C_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I3C_DEVICE)) + +DT_COMPAT_VND_I3C_I2C_DEVICE := vnd,i3c-i2c-device + +config DT_HAS_VND_I3C_I2C_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_I3C_I2C_DEVICE)) + +DT_COMPAT_VND_IEEE802154 := vnd,ieee802154 + +config DT_HAS_VND_IEEE802154_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_IEEE802154)) + +DT_COMPAT_VND_INPUT_DEVICE := vnd,input-device + +config DT_HAS_VND_INPUT_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_INPUT_DEVICE)) + +DT_COMPAT_VND_INTC := vnd,intc + +config DT_HAS_VND_INTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_INTC)) + +DT_COMPAT_VND_INTERRUPT_HOLDER := vnd,interrupt-holder + +config DT_HAS_VND_INTERRUPT_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_INTERRUPT_HOLDER)) + +DT_COMPAT_VND_INTERRUPT_HOLDER_EXTENDED := vnd,interrupt-holder-extended + +config DT_HAS_VND_INTERRUPT_HOLDER_EXTENDED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_INTERRUPT_HOLDER_EXTENDED)) + +DT_COMPAT_VND_INTR_NEXUS := vnd,intr-nexus + +config DT_HAS_VND_INTR_NEXUS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_INTR_NEXUS)) + +DT_COMPAT_VND_MBOX := vnd,mbox + +config DT_HAS_VND_MBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_MBOX)) + +DT_COMPAT_VND_MBOX_CONSUMER := vnd,mbox-consumer + +config DT_HAS_VND_MBOX_CONSUMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_MBOX_CONSUMER)) + +DT_COMPAT_VND_MBOX_ZERO_CELL := vnd,mbox-zero-cell + +config DT_HAS_VND_MBOX_ZERO_CELL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_MBOX_ZERO_CELL)) + +DT_COMPAT_VND_MEMORY_ATTR := vnd,memory-attr + +config DT_HAS_VND_MEMORY_ATTR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_MEMORY_ATTR)) + +DT_COMPAT_VND_MIPI_DSI := vnd,mipi-dsi + +config DT_HAS_VND_MIPI_DSI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_MIPI_DSI)) + +DT_COMPAT_VND_NON_DEPRECATED_LABEL := vnd,non-deprecated-label + +config DT_HAS_VND_NON_DEPRECATED_LABEL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_NON_DEPRECATED_LABEL)) + +DT_COMPAT_VND_NVMEM_CONSUMER := vnd,nvmem-consumer + +config DT_HAS_VND_NVMEM_CONSUMER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_NVMEM_CONSUMER)) + +DT_COMPAT_VND_PCIE := vnd,pcie + +config DT_HAS_VND_PCIE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_PCIE)) + +DT_COMPAT_VND_PHANDLE_HOLDER := vnd,phandle-holder + +config DT_HAS_VND_PHANDLE_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_PHANDLE_HOLDER)) + +DT_COMPAT_VND_PINCTRL := vnd,pinctrl + +config DT_HAS_VND_PINCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_PINCTRL)) + +DT_COMPAT_VND_PINCTRL_DEVICE := vnd,pinctrl-device + +config DT_HAS_VND_PINCTRL_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_PINCTRL_DEVICE)) + +DT_COMPAT_VND_PINCTRL_TEST := vnd,pinctrl-test + +config DT_HAS_VND_PINCTRL_TEST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_PINCTRL_TEST)) + +DT_COMPAT_VND_PWM := vnd,pwm + +config DT_HAS_VND_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_PWM)) + +DT_COMPAT_VND_REG_HOLDER := vnd,reg-holder + +config DT_HAS_VND_REG_HOLDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_REG_HOLDER)) + +DT_COMPAT_VND_REG_HOLDER_2 := vnd,reg-holder-2 + +config DT_HAS_VND_REG_HOLDER_2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_REG_HOLDER_2)) + +DT_COMPAT_VND_REG_HOLDER_64 := vnd,reg-holder-64 + +config DT_HAS_VND_REG_HOLDER_64_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_REG_HOLDER_64)) + +DT_COMPAT_VND_RESERVED_COMPAT := vnd,reserved-compat + +config DT_HAS_VND_RESERVED_COMPAT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_RESERVED_COMPAT)) + +DT_COMPAT_VND_RESET := vnd,reset + +config DT_HAS_VND_RESET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_RESET)) + +DT_COMPAT_VND_SERIAL := vnd,serial + +config DT_HAS_VND_SERIAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_SERIAL)) + +DT_COMPAT_VND_SPI := vnd,spi + +config DT_HAS_VND_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_SPI)) + +DT_COMPAT_VND_SPI_DEVICE := vnd,spi-device + +config DT_HAS_VND_SPI_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_SPI_DEVICE)) + +DT_COMPAT_VND_SPI_DEVICE_2 := vnd,spi-device-2 + +config DT_HAS_VND_SPI_DEVICE_2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_SPI_DEVICE_2)) + +DT_COMPAT_VND_STRING := vnd,string + +config DT_HAS_VND_STRING_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_STRING)) + +DT_COMPAT_VND_STRING_ARRAY := vnd,string-array + +config DT_HAS_VND_STRING_ARRAY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_STRING_ARRAY)) + +DT_COMPAT_VND_STRING_ARRAY_TOKEN := vnd,string-array-token + +config DT_HAS_VND_STRING_ARRAY_TOKEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_STRING_ARRAY_TOKEN)) + +DT_COMPAT_VND_STRING_ARRAY_UNQUOTED := vnd,string-array-unquoted + +config DT_HAS_VND_STRING_ARRAY_UNQUOTED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_STRING_ARRAY_UNQUOTED)) + +DT_COMPAT_VND_STRING_TOKEN := vnd,string-token + +config DT_HAS_VND_STRING_TOKEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_STRING_TOKEN)) + +DT_COMPAT_VND_STRING_UNQUOTED := vnd,string-unquoted + +config DT_HAS_VND_STRING_UNQUOTED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_STRING_UNQUOTED)) + +DT_COMPAT_VND_TEST_FOREACH_REG := vnd,test-foreach-reg + +config DT_HAS_VND_TEST_FOREACH_REG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_TEST_FOREACH_REG)) + +DT_COMPAT_VND_TEST_FOREACH_REG_UNIQUE := vnd,test-foreach-reg-unique + +config DT_HAS_VND_TEST_FOREACH_REG_UNIQUE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_TEST_FOREACH_REG_UNIQUE)) + +DT_COMPAT_VND_VIDEO_MULTI_PORT := vnd,video-multi-port + +config DT_HAS_VND_VIDEO_MULTI_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_VIDEO_MULTI_PORT)) + +DT_COMPAT_VND_VIDEO_SINGLE_PORT := vnd,video-single-port + +config DT_HAS_VND_VIDEO_SINGLE_PORT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_VIDEO_SINGLE_PORT)) + +DT_COMPAT_VND_W1 := vnd,w1 + +config DT_HAS_VND_W1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VND_W1)) + +DT_COMPAT_VOLTAGE_DIVIDER := voltage-divider + +config DT_HAS_VOLTAGE_DIVIDER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_VOLTAGE_DIVIDER)) + +DT_COMPAT_WAVESHARE_DSI2DPI := waveshare,dsi2dpi + +config DT_HAS_WAVESHARE_DSI2DPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WAVESHARE_DSI2DPI)) + +DT_COMPAT_WCH_00X_AFIO := wch,00x-afio + +config DT_HAS_WCH_00X_AFIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_00X_AFIO)) + +DT_COMPAT_WCH_20X_30X_AFIO := wch,20x_30x-afio + +config DT_HAS_WCH_20X_30X_AFIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_20X_30X_AFIO)) + +DT_COMPAT_WCH_ADC := wch,adc + +config DT_HAS_WCH_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_ADC)) + +DT_COMPAT_WCH_AFIO := wch,afio + +config DT_HAS_WCH_AFIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_AFIO)) + +DT_COMPAT_WCH_CH32V00X_HSE_CLOCK := wch,ch32v00x-hse-clock + +config DT_HAS_WCH_CH32V00X_HSE_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_CH32V00X_HSE_CLOCK)) + +DT_COMPAT_WCH_CH32V00X_HSI_CLOCK := wch,ch32v00x-hsi-clock + +config DT_HAS_WCH_CH32V00X_HSI_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_CH32V00X_HSI_CLOCK)) + +DT_COMPAT_WCH_CH32V00X_PLL_CLOCK := wch,ch32v00x-pll-clock + +config DT_HAS_WCH_CH32V00X_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_CH32V00X_PLL_CLOCK)) + +DT_COMPAT_WCH_CH32V20X_30X_PLL_CLOCK := wch,ch32v20x_30x-pll-clock + +config DT_HAS_WCH_CH32V20X_30X_PLL_CLOCK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_CH32V20X_30X_PLL_CLOCK)) + +DT_COMPAT_WCH_CH9350L := wch,ch9350l + +config DT_HAS_WCH_CH9350L_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_CH9350L)) + +DT_COMPAT_WCH_ETHERNET := wch,ethernet + +config DT_HAS_WCH_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_ETHERNET)) + +DT_COMPAT_WCH_ETHERNET_CONTROLLER := wch,ethernet-controller + +config DT_HAS_WCH_ETHERNET_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_ETHERNET_CONTROLLER)) + +DT_COMPAT_WCH_EXTI := wch,exti + +config DT_HAS_WCH_EXTI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_EXTI)) + +DT_COMPAT_WCH_GPIO := wch,gpio + +config DT_HAS_WCH_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_GPIO)) + +DT_COMPAT_WCH_GPTM := wch,gptm + +config DT_HAS_WCH_GPTM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_GPTM)) + +DT_COMPAT_WCH_GPTM_PWM := wch,gptm-pwm + +config DT_HAS_WCH_GPTM_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_GPTM_PWM)) + +DT_COMPAT_WCH_I2C := wch,i2c + +config DT_HAS_WCH_I2C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_I2C)) + +DT_COMPAT_WCH_IWDG := wch,iwdg + +config DT_HAS_WCH_IWDG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_IWDG)) + +DT_COMPAT_WCH_MDIO := wch,mdio + +config DT_HAS_WCH_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_MDIO)) + +DT_COMPAT_WCH_PFIC := wch,pfic + +config DT_HAS_WCH_PFIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_PFIC)) + +DT_COMPAT_WCH_QINGKE_V2 := wch,qingke-v2 + +config DT_HAS_WCH_QINGKE_V2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_QINGKE_V2)) + +DT_COMPAT_WCH_QINGKE_V4B := wch,qingke-v4b + +config DT_HAS_WCH_QINGKE_V4B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_QINGKE_V4B)) + +DT_COMPAT_WCH_QINGKE_V4C := wch,qingke-v4c + +config DT_HAS_WCH_QINGKE_V4C_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_QINGKE_V4C)) + +DT_COMPAT_WCH_QINGKE_V4F := wch,qingke-v4f + +config DT_HAS_WCH_QINGKE_V4F_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_QINGKE_V4F)) + +DT_COMPAT_WCH_RCC := wch,rcc + +config DT_HAS_WCH_RCC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_RCC)) + +DT_COMPAT_WCH_RNG := wch,rng + +config DT_HAS_WCH_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_RNG)) + +DT_COMPAT_WCH_SPI := wch,spi + +config DT_HAS_WCH_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_SPI)) + +DT_COMPAT_WCH_SYSTICK := wch,systick + +config DT_HAS_WCH_SYSTICK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_SYSTICK)) + +DT_COMPAT_WCH_USART := wch,usart + +config DT_HAS_WCH_USART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_USART)) + +DT_COMPAT_WCH_WCH_DMA := wch,wch-dma + +config DT_HAS_WCH_WCH_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WCH_WCH_DMA)) + +DT_COMPAT_WE_WSEN_HIDS_2525020210002 := we,wsen-hids-2525020210002 + +config DT_HAS_WE_WSEN_HIDS_2525020210002_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_HIDS_2525020210002)) + +DT_COMPAT_WE_WSEN_ISDS_2536030320001 := we,wsen-isds-2536030320001 + +config DT_HAS_WE_WSEN_ISDS_2536030320001_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_ISDS_2536030320001)) + +DT_COMPAT_WE_WSEN_ITDS_2533020201601 := we,wsen-itds-2533020201601 + +config DT_HAS_WE_WSEN_ITDS_2533020201601_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_ITDS_2533020201601)) + +DT_COMPAT_WE_WSEN_PADS_2511020213301 := we,wsen-pads-2511020213301 + +config DT_HAS_WE_WSEN_PADS_2511020213301_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_PADS_2511020213301)) + +DT_COMPAT_WE_WSEN_PDMS_25131308XXX05 := we,wsen-pdms-25131308XXX05 + +config DT_HAS_WE_WSEN_PDMS_25131308XXX05_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_PDMS_25131308XXX05)) + +DT_COMPAT_WE_WSEN_PDUS_25131308XXXXX := we,wsen-pdus-25131308XXXXX + +config DT_HAS_WE_WSEN_PDUS_25131308XXXXX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_PDUS_25131308XXXXX)) + +DT_COMPAT_WE_WSEN_TIDS_2521020222501 := we,wsen-tids-2521020222501 + +config DT_HAS_WE_WSEN_TIDS_2521020222501_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WE_WSEN_TIDS_2521020222501)) + +DT_COMPAT_WEACT_DCMI_CAMERA_CONNECTOR := weact,dcmi-camera-connector + +config DT_HAS_WEACT_DCMI_CAMERA_CONNECTOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WEACT_DCMI_CAMERA_CONNECTOR)) + +DT_COMPAT_WINSEN_MHZ19B := winsen,mhz19b + +config DT_HAS_WINSEN_MHZ19B_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WINSEN_MHZ19B)) + +DT_COMPAT_WIZNET_W5500 := wiznet,w5500 + +config DT_HAS_WIZNET_W5500_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WIZNET_W5500)) + +DT_COMPAT_WIZNET_W6100 := wiznet,w6100 + +config DT_HAS_WIZNET_W6100_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WIZNET_W6100)) + +DT_COMPAT_WNC_M14A2A := wnc,m14a2a + +config DT_HAS_WNC_M14A2A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WNC_M14A2A)) + +DT_COMPAT_WOLFSON_WM8904 := wolfson,wm8904 + +config DT_HAS_WOLFSON_WM8904_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WOLFSON_WM8904)) + +DT_COMPAT_WOLFSON_WM8962 := wolfson,wm8962 + +config DT_HAS_WOLFSON_WM8962_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WOLFSON_WM8962)) + +DT_COMPAT_WORLDSEMI_WS2812_GPIO := worldsemi,ws2812-gpio + +config DT_HAS_WORLDSEMI_WS2812_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WORLDSEMI_WS2812_GPIO)) + +DT_COMPAT_WORLDSEMI_WS2812_I2S := worldsemi,ws2812-i2s + +config DT_HAS_WORLDSEMI_WS2812_I2S_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WORLDSEMI_WS2812_I2S)) + +DT_COMPAT_WORLDSEMI_WS2812_RPI_PICO_PIO := worldsemi,ws2812-rpi_pico-pio + +config DT_HAS_WORLDSEMI_WS2812_RPI_PICO_PIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WORLDSEMI_WS2812_RPI_PICO_PIO)) + +DT_COMPAT_WORLDSEMI_WS2812_SPI := worldsemi,ws2812-spi + +config DT_HAS_WORLDSEMI_WS2812_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WORLDSEMI_WS2812_SPI)) + +DT_COMPAT_WORLDSEMI_WS2812_UART := worldsemi,ws2812-uart + +config DT_HAS_WORLDSEMI_WS2812_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_WORLDSEMI_WS2812_UART)) + +DT_COMPAT_X_POWERS_AXP192 := x-powers,axp192 + +config DT_HAS_X_POWERS_AXP192_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP192)) + +DT_COMPAT_X_POWERS_AXP192_GPIO := x-powers,axp192-gpio + +config DT_HAS_X_POWERS_AXP192_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP192_GPIO)) + +DT_COMPAT_X_POWERS_AXP192_LED := x-powers,axp192-led + +config DT_HAS_X_POWERS_AXP192_LED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP192_LED)) + +DT_COMPAT_X_POWERS_AXP192_REGULATOR := x-powers,axp192-regulator + +config DT_HAS_X_POWERS_AXP192_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP192_REGULATOR)) + +DT_COMPAT_X_POWERS_AXP2101 := x-powers,axp2101 + +config DT_HAS_X_POWERS_AXP2101_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP2101)) + +DT_COMPAT_X_POWERS_AXP2101_CHARGER := x-powers,axp2101-charger + +config DT_HAS_X_POWERS_AXP2101_CHARGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP2101_CHARGER)) + +DT_COMPAT_X_POWERS_AXP2101_FUEL_GAUGE := x-powers,axp2101-fuel-gauge + +config DT_HAS_X_POWERS_AXP2101_FUEL_GAUGE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP2101_FUEL_GAUGE)) + +DT_COMPAT_X_POWERS_AXP2101_LED := x-powers,axp2101-led + +config DT_HAS_X_POWERS_AXP2101_LED_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP2101_LED)) + +DT_COMPAT_X_POWERS_AXP2101_REGULATOR := x-powers,axp2101-regulator + +config DT_HAS_X_POWERS_AXP2101_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_X_POWERS_AXP2101_REGULATOR)) + +DT_COMPAT_XEN_HVC_CONSOLEIO := xen,hvc-consoleio + +config DT_HAS_XEN_HVC_CONSOLEIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XEN_HVC_CONSOLEIO)) + +DT_COMPAT_XEN_HVC_UART := xen,hvc-uart + +config DT_HAS_XEN_HVC_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XEN_HVC_UART)) + +DT_COMPAT_XEN_XEN := xen,xen + +config DT_HAS_XEN_XEN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XEN_XEN)) + +DT_COMPAT_XLNX_AXI_DMA_1_00_A := xlnx,axi-dma-1.00.a + +config DT_HAS_XLNX_AXI_DMA_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_AXI_DMA_1_00_A)) + +DT_COMPAT_XLNX_AXI_ETHERNET_1_00_A := xlnx,axi-ethernet-1.00.a + +config DT_HAS_XLNX_AXI_ETHERNET_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_AXI_ETHERNET_1_00_A)) + +DT_COMPAT_XLNX_AXI_ETHERNET_1_00_A_MDIO := xlnx,axi-ethernet-1.00.a-mdio + +config DT_HAS_XLNX_AXI_ETHERNET_1_00_A_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_AXI_ETHERNET_1_00_A_MDIO)) + +DT_COMPAT_XLNX_ETH_DMA := xlnx,eth-dma + +config DT_HAS_XLNX_ETH_DMA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_ETH_DMA)) + +DT_COMPAT_XLNX_FPGA := xlnx,fpga + +config DT_HAS_XLNX_FPGA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_FPGA)) + +DT_COMPAT_XLNX_GEM := xlnx,gem + +config DT_HAS_XLNX_GEM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_GEM)) + +DT_COMPAT_XLNX_MBOX_VERSAL_IPI_MAILBOX := xlnx,mbox-versal-ipi-mailbox + +config DT_HAS_XLNX_MBOX_VERSAL_IPI_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_MBOX_VERSAL_IPI_MAILBOX)) + +DT_COMPAT_XLNX_PINCTRL_ZYNQ := xlnx,pinctrl-zynq + +config DT_HAS_XLNX_PINCTRL_ZYNQ_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_PINCTRL_ZYNQ)) + +DT_COMPAT_XLNX_PINCTRL_ZYNQMP := xlnx,pinctrl-zynqmp + +config DT_HAS_XLNX_PINCTRL_ZYNQMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_PINCTRL_ZYNQMP)) + +DT_COMPAT_XLNX_PS_GPIO := xlnx,ps-gpio + +config DT_HAS_XLNX_PS_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_PS_GPIO)) + +DT_COMPAT_XLNX_PS_GPIO_BANK := xlnx,ps-gpio-bank + +config DT_HAS_XLNX_PS_GPIO_BANK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_PS_GPIO_BANK)) + +DT_COMPAT_XLNX_TTCPS := xlnx,ttcps + +config DT_HAS_XLNX_TTCPS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_TTCPS)) + +DT_COMPAT_XLNX_VERSAL_8_9A := xlnx,versal-8.9a + +config DT_HAS_XLNX_VERSAL_8_9A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_VERSAL_8_9A)) + +DT_COMPAT_XLNX_VERSAL_WWDT := xlnx,versal-wwdt + +config DT_HAS_XLNX_VERSAL_WWDT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_VERSAL_WWDT)) + +DT_COMPAT_XLNX_XPS_ETHERNETLITE_1_00_A := xlnx,xps-ethernetlite-1.00.a + +config DT_HAS_XLNX_XPS_ETHERNETLITE_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_ETHERNETLITE_1_00_A)) + +DT_COMPAT_XLNX_XPS_ETHERNETLITE_1_00_A_MAC := xlnx,xps-ethernetlite-1.00.a-mac + +config DT_HAS_XLNX_XPS_ETHERNETLITE_1_00_A_MAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_ETHERNETLITE_1_00_A_MAC)) + +DT_COMPAT_XLNX_XPS_ETHERNETLITE_1_00_A_MDIO := xlnx,xps-ethernetlite-1.00.a-mdio + +config DT_HAS_XLNX_XPS_ETHERNETLITE_1_00_A_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_ETHERNETLITE_1_00_A_MDIO)) + +DT_COMPAT_XLNX_XPS_ETHERNETLITE_3_00_A := xlnx,xps-ethernetlite-3.00.a + +config DT_HAS_XLNX_XPS_ETHERNETLITE_3_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_ETHERNETLITE_3_00_A)) + +DT_COMPAT_XLNX_XPS_ETHERNETLITE_3_00_A_MAC := xlnx,xps-ethernetlite-3.00.a-mac + +config DT_HAS_XLNX_XPS_ETHERNETLITE_3_00_A_MAC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_ETHERNETLITE_3_00_A_MAC)) + +DT_COMPAT_XLNX_XPS_ETHERNETLITE_3_00_A_MDIO := xlnx,xps-ethernetlite-3.00.a-mdio + +config DT_HAS_XLNX_XPS_ETHERNETLITE_3_00_A_MDIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_ETHERNETLITE_3_00_A_MDIO)) + +DT_COMPAT_XLNX_XPS_GPIO_1_00_A := xlnx,xps-gpio-1.00.a + +config DT_HAS_XLNX_XPS_GPIO_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_GPIO_1_00_A)) + +DT_COMPAT_XLNX_XPS_GPIO_1_00_A_GPIO2 := xlnx,xps-gpio-1.00.a-gpio2 + +config DT_HAS_XLNX_XPS_GPIO_1_00_A_GPIO2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_GPIO_1_00_A_GPIO2)) + +DT_COMPAT_XLNX_XPS_IIC_2_00_A := xlnx,xps-iic-2.00.a + +config DT_HAS_XLNX_XPS_IIC_2_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_IIC_2_00_A)) + +DT_COMPAT_XLNX_XPS_IIC_2_1 := xlnx,xps-iic-2.1 + +config DT_HAS_XLNX_XPS_IIC_2_1_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_IIC_2_1)) + +DT_COMPAT_XLNX_XPS_SPI_2_00_A := xlnx,xps-spi-2.00.a + +config DT_HAS_XLNX_XPS_SPI_2_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_SPI_2_00_A)) + +DT_COMPAT_XLNX_XPS_TIMEBASE_WDT_1_00_A := xlnx,xps-timebase-wdt-1.00.a + +config DT_HAS_XLNX_XPS_TIMEBASE_WDT_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_TIMEBASE_WDT_1_00_A)) + +DT_COMPAT_XLNX_XPS_TIMER_1_00_A := xlnx,xps-timer-1.00.a + +config DT_HAS_XLNX_XPS_TIMER_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_TIMER_1_00_A)) + +DT_COMPAT_XLNX_XPS_TIMER_1_00_A_PWM := xlnx,xps-timer-1.00.a-pwm + +config DT_HAS_XLNX_XPS_TIMER_1_00_A_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_TIMER_1_00_A_PWM)) + +DT_COMPAT_XLNX_XPS_UARTLITE_1_00_A := xlnx,xps-uartlite-1.00.a + +config DT_HAS_XLNX_XPS_UARTLITE_1_00_A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XPS_UARTLITE_1_00_A)) + +DT_COMPAT_XLNX_XUARTPS := xlnx,xuartps + +config DT_HAS_XLNX_XUARTPS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_XUARTPS)) + +DT_COMPAT_XLNX_ZYNQ_OCM := xlnx,zynq-ocm + +config DT_HAS_XLNX_ZYNQ_OCM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_ZYNQ_OCM)) + +DT_COMPAT_XLNX_ZYNQMP_DDRC_2_40A := xlnx,zynqmp-ddrc-2.40a + +config DT_HAS_XLNX_ZYNQMP_DDRC_2_40A_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_ZYNQMP_DDRC_2_40A)) + +DT_COMPAT_XLNX_ZYNQMP_IPI_MAILBOX := xlnx,zynqmp-ipi-mailbox + +config DT_HAS_XLNX_ZYNQMP_IPI_MAILBOX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XLNX_ZYNQMP_IPI_MAILBOX)) + +DT_COMPAT_XPTEK_XPT2046 := xptek,xpt2046 + +config DT_HAS_XPTEK_XPT2046_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XPTEK_XPT2046)) + +DT_COMPAT_XUANTIE_E907 := xuantie,e907 + +config DT_HAS_XUANTIE_E907_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_XUANTIE_E907)) + +DT_COMPAT_ZEPHYR_ADC_EMUL := zephyr,adc-emul + +config DT_HAS_ZEPHYR_ADC_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_ADC_EMUL)) + +DT_COMPAT_ZEPHYR_BBRAM_EMUL := zephyr,bbram-emul + +config DT_HAS_ZEPHYR_BBRAM_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BBRAM_EMUL)) + +DT_COMPAT_ZEPHYR_BIOMETRICS_EMUL := zephyr,biometrics-emul + +config DT_HAS_ZEPHYR_BIOMETRICS_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BIOMETRICS_EMUL)) + +DT_COMPAT_ZEPHYR_BT_HCI_3WIRE_UART := zephyr,bt-hci-3wire-uart + +config DT_HAS_ZEPHYR_BT_HCI_3WIRE_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_3WIRE_UART)) + +DT_COMPAT_ZEPHYR_BT_HCI_ENTROPY := zephyr,bt-hci-entropy + +config DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_ENTROPY)) + +DT_COMPAT_ZEPHYR_BT_HCI_IPC := zephyr,bt-hci-ipc + +config DT_HAS_ZEPHYR_BT_HCI_IPC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_IPC)) + +DT_COMPAT_ZEPHYR_BT_HCI_LL_SW_SPLIT := zephyr,bt-hci-ll-sw-split + +config DT_HAS_ZEPHYR_BT_HCI_LL_SW_SPLIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_LL_SW_SPLIT)) + +DT_COMPAT_ZEPHYR_BT_HCI_SPI := zephyr,bt-hci-spi + +config DT_HAS_ZEPHYR_BT_HCI_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_SPI)) + +DT_COMPAT_ZEPHYR_BT_HCI_SPI_SLAVE := zephyr,bt-hci-spi-slave + +config DT_HAS_ZEPHYR_BT_HCI_SPI_SLAVE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_SPI_SLAVE)) + +DT_COMPAT_ZEPHYR_BT_HCI_UART := zephyr,bt-hci-uart + +config DT_HAS_ZEPHYR_BT_HCI_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_UART)) + +DT_COMPAT_ZEPHYR_BT_HCI_USERCHAN := zephyr,bt-hci-userchan + +config DT_HAS_ZEPHYR_BT_HCI_USERCHAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_BT_HCI_USERCHAN)) + +DT_COMPAT_ZEPHYR_CAN_LOOPBACK := zephyr,can-loopback + +config DT_HAS_ZEPHYR_CAN_LOOPBACK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_CAN_LOOPBACK)) + +DT_COMPAT_ZEPHYR_CDC_ACM_UART := zephyr,cdc-acm-uart + +config DT_HAS_ZEPHYR_CDC_ACM_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_CDC_ACM_UART)) + +DT_COMPAT_ZEPHYR_CDC_ECM_ETHERNET := zephyr,cdc-ecm-ethernet + +config DT_HAS_ZEPHYR_CDC_ECM_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_CDC_ECM_ETHERNET)) + +DT_COMPAT_ZEPHYR_CDC_NCM_ETHERNET := zephyr,cdc-ncm-ethernet + +config DT_HAS_ZEPHYR_CDC_NCM_ETHERNET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_CDC_NCM_ETHERNET)) + +DT_COMPAT_ZEPHYR_CHARGER_GPIO := zephyr,charger-gpio + +config DT_HAS_ZEPHYR_CHARGER_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_CHARGER_GPIO)) + +DT_COMPAT_ZEPHYR_COREDUMP := zephyr,coredump + +config DT_HAS_ZEPHYR_COREDUMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_COREDUMP)) + +DT_COMPAT_ZEPHYR_COUNTER_WATCHDOG := zephyr,counter-watchdog + +config DT_HAS_ZEPHYR_COUNTER_WATCHDOG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_COUNTER_WATCHDOG)) + +DT_COMPAT_ZEPHYR_CPU_FREQ_THERMAL_CAP := zephyr,cpu-freq-thermal-cap + +config DT_HAS_ZEPHYR_CPU_FREQ_THERMAL_CAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_CPU_FREQ_THERMAL_CAP)) + +DT_COMPAT_ZEPHYR_DAC_EMUL := zephyr,dac-emul + +config DT_HAS_ZEPHYR_DAC_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_DAC_EMUL)) + +DT_COMPAT_ZEPHYR_DEVMUX := zephyr,devmux + +config DT_HAS_ZEPHYR_DEVMUX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_DEVMUX)) + +DT_COMPAT_ZEPHYR_DISPLAYS := zephyr,displays + +config DT_HAS_ZEPHYR_DISPLAYS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_DISPLAYS)) + +DT_COMPAT_ZEPHYR_DMA_EMUL := zephyr,dma-emul + +config DT_HAS_ZEPHYR_DMA_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_DMA_EMUL)) + +DT_COMPAT_ZEPHYR_DUMMY_DC := zephyr,dummy-dc + +config DT_HAS_ZEPHYR_DUMMY_DC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_DUMMY_DC)) + +DT_COMPAT_ZEPHYR_EMU_EEPROM := zephyr,emu-eeprom + +config DT_HAS_ZEPHYR_EMU_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_EMU_EEPROM)) + +DT_COMPAT_ZEPHYR_ESPI_EMUL_CONTROLLER := zephyr,espi-emul-controller + +config DT_HAS_ZEPHYR_ESPI_EMUL_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_ESPI_EMUL_CONTROLLER)) + +DT_COMPAT_ZEPHYR_FAKE_CAN := zephyr,fake-can + +config DT_HAS_ZEPHYR_FAKE_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_CAN)) + +DT_COMPAT_ZEPHYR_FAKE_COMP := zephyr,fake-comp + +config DT_HAS_ZEPHYR_FAKE_COMP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_COMP)) + +DT_COMPAT_ZEPHYR_FAKE_EEPROM := zephyr,fake-eeprom + +config DT_HAS_ZEPHYR_FAKE_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_EEPROM)) + +DT_COMPAT_ZEPHYR_FAKE_PWM := zephyr,fake-pwm + +config DT_HAS_ZEPHYR_FAKE_PWM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_PWM)) + +DT_COMPAT_ZEPHYR_FAKE_REGULATOR := zephyr,fake-regulator + +config DT_HAS_ZEPHYR_FAKE_REGULATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_REGULATOR)) + +DT_COMPAT_ZEPHYR_FAKE_RTC := zephyr,fake-rtc + +config DT_HAS_ZEPHYR_FAKE_RTC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_RTC)) + +DT_COMPAT_ZEPHYR_FAKE_STEPPER_CTRL := zephyr,fake-stepper-ctrl + +config DT_HAS_ZEPHYR_FAKE_STEPPER_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_STEPPER_CTRL)) + +DT_COMPAT_ZEPHYR_FAKE_STEPPER_DRIVER := zephyr,fake-stepper-driver + +config DT_HAS_ZEPHYR_FAKE_STEPPER_DRIVER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FAKE_STEPPER_DRIVER)) + +DT_COMPAT_ZEPHYR_FLASH_DISK := zephyr,flash-disk + +config DT_HAS_ZEPHYR_FLASH_DISK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FLASH_DISK)) + +DT_COMPAT_ZEPHYR_FSTAB := zephyr,fstab + +config DT_HAS_ZEPHYR_FSTAB_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FSTAB)) + +DT_COMPAT_ZEPHYR_FSTAB_EXT2 := zephyr,fstab,ext2 + +config DT_HAS_ZEPHYR_FSTAB_EXT2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FSTAB_EXT2)) + +DT_COMPAT_ZEPHYR_FSTAB_FATFS := zephyr,fstab,fatfs + +config DT_HAS_ZEPHYR_FSTAB_FATFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FSTAB_FATFS)) + +DT_COMPAT_ZEPHYR_FSTAB_LITTLEFS := zephyr,fstab,littlefs + +config DT_HAS_ZEPHYR_FSTAB_LITTLEFS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FSTAB_LITTLEFS)) + +DT_COMPAT_ZEPHYR_FTL_DHARA := zephyr,ftl-dhara + +config DT_HAS_ZEPHYR_FTL_DHARA_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FTL_DHARA)) + +DT_COMPAT_ZEPHYR_FUEL_GAUGE_COMPOSITE := zephyr,fuel-gauge-composite + +config DT_HAS_ZEPHYR_FUEL_GAUGE_COMPOSITE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_FUEL_GAUGE_COMPOSITE)) + +DT_COMPAT_ZEPHYR_GENERIC_PSTATE := zephyr,generic-pstate + +config DT_HAS_ZEPHYR_GENERIC_PSTATE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_GENERIC_PSTATE)) + +DT_COMPAT_ZEPHYR_GNSS_EMUL := zephyr,gnss-emul + +config DT_HAS_ZEPHYR_GNSS_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_GNSS_EMUL)) + +DT_COMPAT_ZEPHYR_GPIO_EMUL := zephyr,gpio-emul + +config DT_HAS_ZEPHYR_GPIO_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_GPIO_EMUL)) + +DT_COMPAT_ZEPHYR_GPIO_EMUL_SDL := zephyr,gpio-emul-sdl + +config DT_HAS_ZEPHYR_GPIO_EMUL_SDL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_GPIO_EMUL_SDL)) + +DT_COMPAT_ZEPHYR_GPIO_STEP_DIR_STEPPER_CTRL := zephyr,gpio-step-dir-stepper-ctrl + +config DT_HAS_ZEPHYR_GPIO_STEP_DIR_STEPPER_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_GPIO_STEP_DIR_STEPPER_CTRL)) + +DT_COMPAT_ZEPHYR_H_BRIDGE_STEPPER_CTRL := zephyr,h-bridge-stepper-ctrl + +config DT_HAS_ZEPHYR_H_BRIDGE_STEPPER_CTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_H_BRIDGE_STEPPER_CTRL)) + +DT_COMPAT_ZEPHYR_HID_DEVICE := zephyr,hid-device + +config DT_HAS_ZEPHYR_HID_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_HID_DEVICE)) + +DT_COMPAT_ZEPHYR_HUB12 := zephyr,hub12 + +config DT_HAS_ZEPHYR_HUB12_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_HUB12)) + +DT_COMPAT_ZEPHYR_I2C_DUMP_ALLOWLIST := zephyr,i2c-dump-allowlist + +config DT_HAS_ZEPHYR_I2C_DUMP_ALLOWLIST_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_I2C_DUMP_ALLOWLIST)) + +DT_COMPAT_ZEPHYR_I2C_EMUL_CONTROLLER := zephyr,i2c-emul-controller + +config DT_HAS_ZEPHYR_I2C_EMUL_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_I2C_EMUL_CONTROLLER)) + +DT_COMPAT_ZEPHYR_I2C_TARGET_EEPROM := zephyr,i2c-target-eeprom + +config DT_HAS_ZEPHYR_I2C_TARGET_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_I2C_TARGET_EEPROM)) + +DT_COMPAT_ZEPHYR_IEEE802154_UART_PIPE := zephyr,ieee802154-uart-pipe + +config DT_HAS_ZEPHYR_IEEE802154_UART_PIPE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_IEEE802154_UART_PIPE)) + +DT_COMPAT_ZEPHYR_INPUT_DOUBLE_TAP := zephyr,input-double-tap + +config DT_HAS_ZEPHYR_INPUT_DOUBLE_TAP_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_INPUT_DOUBLE_TAP)) + +DT_COMPAT_ZEPHYR_INPUT_LONGPRESS := zephyr,input-longpress + +config DT_HAS_ZEPHYR_INPUT_LONGPRESS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_INPUT_LONGPRESS)) + +DT_COMPAT_ZEPHYR_INPUT_SDL_TOUCH := zephyr,input-sdl-touch + +config DT_HAS_ZEPHYR_INPUT_SDL_TOUCH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_INPUT_SDL_TOUCH)) + +DT_COMPAT_ZEPHYR_IPC_ICBMSG := zephyr,ipc-icbmsg + +config DT_HAS_ZEPHYR_IPC_ICBMSG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_IPC_ICBMSG)) + +DT_COMPAT_ZEPHYR_IPC_ICMSG := zephyr,ipc-icmsg + +config DT_HAS_ZEPHYR_IPC_ICMSG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_IPC_ICMSG)) + +DT_COMPAT_ZEPHYR_IPC_ICMSG_ME_FOLLOWER := zephyr,ipc-icmsg-me-follower + +config DT_HAS_ZEPHYR_IPC_ICMSG_ME_FOLLOWER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_IPC_ICMSG_ME_FOLLOWER)) + +DT_COMPAT_ZEPHYR_IPC_ICMSG_ME_INITIATOR := zephyr,ipc-icmsg-me-initiator + +config DT_HAS_ZEPHYR_IPC_ICMSG_ME_INITIATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_IPC_ICMSG_ME_INITIATOR)) + +DT_COMPAT_ZEPHYR_IPC_OPENAMP_STATIC_VRINGS := zephyr,ipc-openamp-static-vrings + +config DT_HAS_ZEPHYR_IPC_OPENAMP_STATIC_VRINGS_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_IPC_OPENAMP_STATIC_VRINGS)) + +DT_COMPAT_ZEPHYR_LOG_UART := zephyr,log-uart + +config DT_HAS_ZEPHYR_LOG_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_LOG_UART)) + +DT_COMPAT_ZEPHYR_LVGL_BUTTON_INPUT := zephyr,lvgl-button-input + +config DT_HAS_ZEPHYR_LVGL_BUTTON_INPUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_LVGL_BUTTON_INPUT)) + +DT_COMPAT_ZEPHYR_LVGL_ENCODER_INPUT := zephyr,lvgl-encoder-input + +config DT_HAS_ZEPHYR_LVGL_ENCODER_INPUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_LVGL_ENCODER_INPUT)) + +DT_COMPAT_ZEPHYR_LVGL_KEYPAD_INPUT := zephyr,lvgl-keypad-input + +config DT_HAS_ZEPHYR_LVGL_KEYPAD_INPUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_LVGL_KEYPAD_INPUT)) + +DT_COMPAT_ZEPHYR_LVGL_POINTER_INPUT := zephyr,lvgl-pointer-input + +config DT_HAS_ZEPHYR_LVGL_POINTER_INPUT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_LVGL_POINTER_INPUT)) + +DT_COMPAT_ZEPHYR_MAPPED_PARTITION := zephyr,mapped-partition + +config DT_HAS_ZEPHYR_MAPPED_PARTITION_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MAPPED_PARTITION)) + +DT_COMPAT_ZEPHYR_MBOX_IPM := zephyr,mbox-ipm + +config DT_HAS_ZEPHYR_MBOX_IPM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MBOX_IPM)) + +DT_COMPAT_ZEPHYR_MCTP_I2C_GPIO_CONTROLLER := zephyr,mctp-i2c-gpio-controller + +config DT_HAS_ZEPHYR_MCTP_I2C_GPIO_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MCTP_I2C_GPIO_CONTROLLER)) + +DT_COMPAT_ZEPHYR_MCTP_I2C_GPIO_TARGET := zephyr,mctp-i2c-gpio-target + +config DT_HAS_ZEPHYR_MCTP_I2C_GPIO_TARGET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MCTP_I2C_GPIO_TARGET)) + +DT_COMPAT_ZEPHYR_MCTP_I3C_CONTROLLER := zephyr,mctp-i3c-controller + +config DT_HAS_ZEPHYR_MCTP_I3C_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MCTP_I3C_CONTROLLER)) + +DT_COMPAT_ZEPHYR_MCTP_I3C_ENDPOINT := zephyr,mctp-i3c-endpoint + +config DT_HAS_ZEPHYR_MCTP_I3C_ENDPOINT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MCTP_I3C_ENDPOINT)) + +DT_COMPAT_ZEPHYR_MCTP_I3C_TARGET := zephyr,mctp-i3c-target + +config DT_HAS_ZEPHYR_MCTP_I3C_TARGET_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MCTP_I3C_TARGET)) + +DT_COMPAT_ZEPHYR_MDIO_GPIO := zephyr,mdio-gpio + +config DT_HAS_ZEPHYR_MDIO_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MDIO_GPIO)) + +DT_COMPAT_ZEPHYR_MEMORY_REGION := zephyr,memory-region + +config DT_HAS_ZEPHYR_MEMORY_REGION_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MEMORY_REGION)) + +DT_COMPAT_ZEPHYR_MIDI2_DEVICE := zephyr,midi2-device + +config DT_HAS_ZEPHYR_MIDI2_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MIDI2_DEVICE)) + +DT_COMPAT_ZEPHYR_MIPI_DBI_BITBANG := zephyr,mipi-dbi-bitbang + +config DT_HAS_ZEPHYR_MIPI_DBI_BITBANG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MIPI_DBI_BITBANG)) + +DT_COMPAT_ZEPHYR_MIPI_DBI_SPI := zephyr,mipi-dbi-spi + +config DT_HAS_ZEPHYR_MIPI_DBI_SPI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MIPI_DBI_SPI)) + +DT_COMPAT_ZEPHYR_MMC_DISK := zephyr,mmc-disk + +config DT_HAS_ZEPHYR_MMC_DISK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MMC_DISK)) + +DT_COMPAT_ZEPHYR_MODBUS_SERIAL := zephyr,modbus-serial + +config DT_HAS_ZEPHYR_MODBUS_SERIAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MODBUS_SERIAL)) + +DT_COMPAT_ZEPHYR_MSPI_EMUL_CONTROLLER := zephyr,mspi-emul-controller + +config DT_HAS_ZEPHYR_MSPI_EMUL_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MSPI_EMUL_CONTROLLER)) + +DT_COMPAT_ZEPHYR_MSPI_EMUL_DEVICE := zephyr,mspi-emul-device + +config DT_HAS_ZEPHYR_MSPI_EMUL_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MSPI_EMUL_DEVICE)) + +DT_COMPAT_ZEPHYR_MSPI_EMUL_FLASH := zephyr,mspi-emul-flash + +config DT_HAS_ZEPHYR_MSPI_EMUL_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_MSPI_EMUL_FLASH)) + +DT_COMPAT_ZEPHYR_NATIVE_LINUX_CAN := zephyr,native-linux-can + +config DT_HAS_ZEPHYR_NATIVE_LINUX_CAN_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_LINUX_CAN)) + +DT_COMPAT_ZEPHYR_NATIVE_LINUX_EVDEV := zephyr,native-linux-evdev + +config DT_HAS_ZEPHYR_NATIVE_LINUX_EVDEV_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_LINUX_EVDEV)) + +DT_COMPAT_ZEPHYR_NATIVE_POSIX_UDC := zephyr,native-posix-udc + +config DT_HAS_ZEPHYR_NATIVE_POSIX_UDC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_POSIX_UDC)) + +DT_COMPAT_ZEPHYR_NATIVE_PTY_UART := zephyr,native-pty-uart + +config DT_HAS_ZEPHYR_NATIVE_PTY_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_PTY_UART)) + +DT_COMPAT_ZEPHYR_NATIVE_SIM_COUNTER := zephyr,native-sim-counter + +config DT_HAS_ZEPHYR_NATIVE_SIM_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_SIM_COUNTER)) + +DT_COMPAT_ZEPHYR_NATIVE_SIM_CPU := zephyr,native-sim-cpu + +config DT_HAS_ZEPHYR_NATIVE_SIM_CPU_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_SIM_CPU)) + +DT_COMPAT_ZEPHYR_NATIVE_SIM_PSTATE := zephyr,native-sim-pstate + +config DT_HAS_ZEPHYR_NATIVE_SIM_PSTATE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_SIM_PSTATE)) + +DT_COMPAT_ZEPHYR_NATIVE_SIM_RNG := zephyr,native-sim-rng + +config DT_HAS_ZEPHYR_NATIVE_SIM_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_SIM_RNG)) + +DT_COMPAT_ZEPHYR_NATIVE_TTY_UART := zephyr,native-tty-uart + +config DT_HAS_ZEPHYR_NATIVE_TTY_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NATIVE_TTY_UART)) + +DT_COMPAT_ZEPHYR_NUS_UART := zephyr,nus-uart + +config DT_HAS_ZEPHYR_NUS_UART_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_NUS_UART)) + +DT_COMPAT_ZEPHYR_OTP_EMUL := zephyr,otp-emul + +config DT_HAS_ZEPHYR_OTP_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_OTP_EMUL)) + +DT_COMPAT_ZEPHYR_PANEL_COLOR_PALETTE := zephyr,panel-color-palette + +config DT_HAS_ZEPHYR_PANEL_COLOR_PALETTE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PANEL_COLOR_PALETTE)) + +DT_COMPAT_ZEPHYR_PANEL_TIMING := zephyr,panel-timing + +config DT_HAS_ZEPHYR_PANEL_TIMING_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PANEL_TIMING)) + +DT_COMPAT_ZEPHYR_PDM_DMIC := zephyr,pdm-dmic + +config DT_HAS_ZEPHYR_PDM_DMIC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PDM_DMIC)) + +DT_COMPAT_ZEPHYR_PERIPHERAL_DEVICE := zephyr,peripheral-device + +config DT_HAS_ZEPHYR_PERIPHERAL_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PERIPHERAL_DEVICE)) + +DT_COMPAT_ZEPHYR_POWER_STATE := zephyr,power-state + +config DT_HAS_ZEPHYR_POWER_STATE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_POWER_STATE)) + +DT_COMPAT_ZEPHYR_PSA_CRYPTO_RNG := zephyr,psa-crypto-rng + +config DT_HAS_ZEPHYR_PSA_CRYPTO_RNG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PSA_CRYPTO_RNG)) + +DT_COMPAT_ZEPHYR_PSTATE := zephyr,pstate + +config DT_HAS_ZEPHYR_PSTATE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PSTATE)) + +DT_COMPAT_ZEPHYR_PWM_BITBANG := zephyr,pwm-bitbang + +config DT_HAS_ZEPHYR_PWM_BITBANG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_PWM_BITBANG)) + +DT_COMPAT_ZEPHYR_RAM_DISK := zephyr,ram-disk + +config DT_HAS_ZEPHYR_RAM_DISK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_RAM_DISK)) + +DT_COMPAT_ZEPHYR_RETAINED_RAM := zephyr,retained-ram + +config DT_HAS_ZEPHYR_RETAINED_RAM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_RETAINED_RAM)) + +DT_COMPAT_ZEPHYR_RETAINED_REG := zephyr,retained-reg + +config DT_HAS_ZEPHYR_RETAINED_REG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_RETAINED_REG)) + +DT_COMPAT_ZEPHYR_RETENTION := zephyr,retention + +config DT_HAS_ZEPHYR_RETENTION_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_RETENTION)) + +DT_COMPAT_ZEPHYR_RTC_COUNTER := zephyr,rtc-counter + +config DT_HAS_ZEPHYR_RTC_COUNTER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_RTC_COUNTER)) + +DT_COMPAT_ZEPHYR_RTC_EMUL := zephyr,rtc-emul + +config DT_HAS_ZEPHYR_RTC_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_RTC_EMUL)) + +DT_COMPAT_ZEPHYR_SDHC_SPI_SLOT := zephyr,sdhc-spi-slot + +config DT_HAS_ZEPHYR_SDHC_SPI_SLOT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SDHC_SPI_SLOT)) + +DT_COMPAT_ZEPHYR_SDL_DC := zephyr,sdl-dc + +config DT_HAS_ZEPHYR_SDL_DC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SDL_DC)) + +DT_COMPAT_ZEPHYR_SDMMC_DISK := zephyr,sdmmc-disk + +config DT_HAS_ZEPHYR_SDMMC_DISK_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SDMMC_DISK)) + +DT_COMPAT_ZEPHYR_SENSING := zephyr,sensing + +config DT_HAS_ZEPHYR_SENSING_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SENSING)) + +DT_COMPAT_ZEPHYR_SENSING_HINGE_ANGLE := zephyr,sensing-hinge-angle + +config DT_HAS_ZEPHYR_SENSING_HINGE_ANGLE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SENSING_HINGE_ANGLE)) + +DT_COMPAT_ZEPHYR_SENSING_PHY_3D_SENSOR := zephyr,sensing-phy-3d-sensor + +config DT_HAS_ZEPHYR_SENSING_PHY_3D_SENSOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SENSING_PHY_3D_SENSOR)) + +DT_COMPAT_ZEPHYR_SIM_EEPROM := zephyr,sim-eeprom + +config DT_HAS_ZEPHYR_SIM_EEPROM_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SIM_EEPROM)) + +DT_COMPAT_ZEPHYR_SIM_FLASH := zephyr,sim-flash + +config DT_HAS_ZEPHYR_SIM_FLASH_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SIM_FLASH)) + +DT_COMPAT_ZEPHYR_SPI_BITBANG := zephyr,spi-bitbang + +config DT_HAS_ZEPHYR_SPI_BITBANG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SPI_BITBANG)) + +DT_COMPAT_ZEPHYR_SPI_EMUL_CONTROLLER := zephyr,spi-emul-controller + +config DT_HAS_ZEPHYR_SPI_EMUL_CONTROLLER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SPI_EMUL_CONTROLLER)) + +DT_COMPAT_ZEPHYR_SWDP_GPIO := zephyr,swdp-gpio + +config DT_HAS_ZEPHYR_SWDP_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_SWDP_GPIO)) + +DT_COMPAT_ZEPHYR_TACH_GPIO := zephyr,tach-gpio + +config DT_HAS_ZEPHYR_TACH_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_TACH_GPIO)) + +DT_COMPAT_ZEPHYR_UAC2 := zephyr,uac2 + +config DT_HAS_ZEPHYR_UAC2_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UAC2)) + +DT_COMPAT_ZEPHYR_UAC2_AUDIO_STREAMING := zephyr,uac2-audio-streaming + +config DT_HAS_ZEPHYR_UAC2_AUDIO_STREAMING_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UAC2_AUDIO_STREAMING)) + +DT_COMPAT_ZEPHYR_UAC2_CLOCK_SOURCE := zephyr,uac2-clock-source + +config DT_HAS_ZEPHYR_UAC2_CLOCK_SOURCE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UAC2_CLOCK_SOURCE)) + +DT_COMPAT_ZEPHYR_UAC2_FEATURE_UNIT := zephyr,uac2-feature-unit + +config DT_HAS_ZEPHYR_UAC2_FEATURE_UNIT_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UAC2_FEATURE_UNIT)) + +DT_COMPAT_ZEPHYR_UAC2_INPUT_TERMINAL := zephyr,uac2-input-terminal + +config DT_HAS_ZEPHYR_UAC2_INPUT_TERMINAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UAC2_INPUT_TERMINAL)) + +DT_COMPAT_ZEPHYR_UAC2_OUTPUT_TERMINAL := zephyr,uac2-output-terminal + +config DT_HAS_ZEPHYR_UAC2_OUTPUT_TERMINAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UAC2_OUTPUT_TERMINAL)) + +DT_COMPAT_ZEPHYR_UART_BITBANG := zephyr,uart-bitbang + +config DT_HAS_ZEPHYR_UART_BITBANG_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UART_BITBANG)) + +DT_COMPAT_ZEPHYR_UART_BRIDGE := zephyr,uart-bridge + +config DT_HAS_ZEPHYR_UART_BRIDGE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UART_BRIDGE)) + +DT_COMPAT_ZEPHYR_UART_EMUL := zephyr,uart-emul + +config DT_HAS_ZEPHYR_UART_EMUL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UART_EMUL)) + +DT_COMPAT_ZEPHYR_UDC_SKELETON := zephyr,udc-skeleton + +config DT_HAS_ZEPHYR_UDC_SKELETON_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UDC_SKELETON)) + +DT_COMPAT_ZEPHYR_UDC_VIRTUAL := zephyr,udc-virtual + +config DT_HAS_ZEPHYR_UDC_VIRTUAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UDC_VIRTUAL)) + +DT_COMPAT_ZEPHYR_UHC_VIRTUAL := zephyr,uhc-virtual + +config DT_HAS_ZEPHYR_UHC_VIRTUAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UHC_VIRTUAL)) + +DT_COMPAT_ZEPHYR_USB_C_PWRCTRL := zephyr,usb-c-pwrctrl + +config DT_HAS_ZEPHYR_USB_C_PWRCTRL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_USB_C_PWRCTRL)) + +DT_COMPAT_ZEPHYR_USB_C_VBUS_ADC := zephyr,usb-c-vbus-adc + +config DT_HAS_ZEPHYR_USB_C_VBUS_ADC_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_USB_C_VBUS_ADC)) + +DT_COMPAT_ZEPHYR_USB_C_VBUS_TCPCI := zephyr,usb-c-vbus-tcpci + +config DT_HAS_ZEPHYR_USB_C_VBUS_TCPCI_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_USB_C_VBUS_TCPCI)) + +DT_COMPAT_ZEPHYR_UVC_DEVICE := zephyr,uvc-device + +config DT_HAS_ZEPHYR_UVC_DEVICE_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_UVC_DEVICE)) + +DT_COMPAT_ZEPHYR_VIDEO_EMUL_IMAGER := zephyr,video-emul-imager + +config DT_HAS_ZEPHYR_VIDEO_EMUL_IMAGER_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_VIDEO_EMUL_IMAGER)) + +DT_COMPAT_ZEPHYR_VIDEO_EMUL_RX := zephyr,video-emul-rx + +config DT_HAS_ZEPHYR_VIDEO_EMUL_RX_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_VIDEO_EMUL_RX)) + +DT_COMPAT_ZEPHYR_VIDEO_SW_GENERATOR := zephyr,video-sw-generator + +config DT_HAS_ZEPHYR_VIDEO_SW_GENERATOR_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_VIDEO_SW_GENERATOR)) + +DT_COMPAT_ZEPHYR_W1_GPIO := zephyr,w1-gpio + +config DT_HAS_ZEPHYR_W1_GPIO_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_W1_GPIO)) + +DT_COMPAT_ZEPHYR_W1_SERIAL := zephyr,w1-serial + +config DT_HAS_ZEPHYR_W1_SERIAL_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZEPHYR_W1_SERIAL)) + +DT_COMPAT_ZHIANTEC_ZFM_X0 := zhiantec,zfm-x0 + +config DT_HAS_ZHIANTEC_ZFM_X0_ENABLED + def_bool $(dt_compat_enabled,$(DT_COMPAT_ZHIANTEC_ZFM_X0)) diff --git a/zephyrproject/build/mcuboot/Kconfig/Kconfig.modules b/zephyrproject/build/mcuboot/Kconfig/Kconfig.modules new file mode 100644 index 0000000..ccff75f --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/Kconfig.modules @@ -0,0 +1,360 @@ +menu "acpica (/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica)" +osource "$(ZEPHYR_ACPICA_KCONFIG)" +config ZEPHYR_ACPICA_MODULE + bool + default y +endmenu +menu "cmsis (/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis)" +osource "$(ZEPHYR_CMSIS_KCONFIG)" +config ZEPHYR_CMSIS_MODULE + bool + default y +endmenu +menu "cmsis-dsp (/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp)" +osource "$(ZEPHYR_CMSIS_DSP_KCONFIG)" +config ZEPHYR_CMSIS_DSP_MODULE + bool + default y +endmenu +menu "cmsis-nn (/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn)" +osource "$(ZEPHYR_CMSIS_NN_KCONFIG)" +config ZEPHYR_CMSIS_NN_MODULE + bool + default y +endmenu +menu "cmsis_6 (/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6)" +osource "$(ZEPHYR_CMSIS_6_KCONFIG)" +config ZEPHYR_CMSIS_6_MODULE + bool + default y +endmenu +menu "dhara (/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara)" +osource "$(ZEPHYR_DHARA_KCONFIG)" +config ZEPHYR_DHARA_MODULE + bool + default y +endmenu +menu "fatfs (/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs)" +osource "$(ZEPHYR_FATFS_KCONFIG)" +config ZEPHYR_FATFS_MODULE + bool + default y +endmenu +config ZEPHYR_ADI_MODULE + bool + default y +menu "hal_afbr (/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr)" +osource "$(ZEPHYR_HAL_AFBR_KCONFIG)" +config ZEPHYR_HAL_AFBR_MODULE + bool + default y + +config ZEPHYR_HAL_AFBR_MODULE_BLOBS + bool +endmenu +menu "hal_ambiq (/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq)" +osource "$(ZEPHYR_HAL_AMBIQ_KCONFIG)" +config ZEPHYR_HAL_AMBIQ_MODULE + bool + default y +endmenu +config ZEPHYR_ATMEL_MODULE + bool + default y +menu "hal_bouffalolab (/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab)" +osource "$(ZEPHYR_HAL_BOUFFALOLAB_KCONFIG)" +config ZEPHYR_HAL_BOUFFALOLAB_MODULE + bool + default y + +config ZEPHYR_HAL_BOUFFALOLAB_MODULE_BLOBS + bool +endmenu +menu "hal_espressif (/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif)" +osource "/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/zephyr/Kconfig" +config ZEPHYR_HAL_ESPRESSIF_MODULE + bool + default y + +config ZEPHYR_HAL_ESPRESSIF_MODULE_BLOBS + bool +endmenu +menu "hal_ethos_u (/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u)" +osource "$(ZEPHYR_HAL_ETHOS_U_KCONFIG)" +config ZEPHYR_HAL_ETHOS_U_MODULE + bool + default y +endmenu +menu "hal_gigadevice (/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice)" +osource "$(ZEPHYR_HAL_GIGADEVICE_KCONFIG)" +config ZEPHYR_HAL_GIGADEVICE_MODULE + bool + default y +endmenu +menu "hal_infineon (/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon)" +osource "$(ZEPHYR_HAL_INFINEON_KCONFIG)" +config ZEPHYR_HAL_INFINEON_MODULE + bool + default y + +config ZEPHYR_HAL_INFINEON_MODULE_BLOBS + bool +endmenu +menu "hal_intel (/home/jeremy/utat-dev/zephyrproject/modules/hal/intel)" +osource "/home/jeremy/utat-dev/zephyrproject/modules/hal/intel/zephyr/Kconfig" +config ZEPHYR_HAL_INTEL_MODULE + bool + default y +endmenu +config ZEPHYR_MICROCHIP_MODULE + bool + default y +menu "hal_nordic (/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic)" +osource "$(ZEPHYR_HAL_NORDIC_KCONFIG)" +config ZEPHYR_HAL_NORDIC_MODULE + bool + default y + +config ZEPHYR_HAL_NORDIC_MODULE_BLOBS + bool +endmenu +config ZEPHYR_NUVOTON_MODULE + bool + default y +menu "hal_nxp (/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp)" +osource "$(ZEPHYR_HAL_NXP_KCONFIG)" +config ZEPHYR_HAL_NXP_MODULE + bool + default y + +config ZEPHYR_HAL_NXP_MODULE_BLOBS + bool +endmenu +config ZEPHYR_OPENISA_MODULE + bool + default y +config ZEPHYR_QUICKLOGIC_MODULE + bool + default y +menu "hal_realtek (/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek)" +osource "$(ZEPHYR_HAL_REALTEK_KCONFIG)" +config ZEPHYR_HAL_REALTEK_MODULE + bool + default y + +config ZEPHYR_HAL_REALTEK_MODULE_BLOBS + bool +endmenu +config ZEPHYR_HAL_RENESAS_MODULE + bool + default y + +config ZEPHYR_HAL_RENESAS_MODULE_BLOBS + bool +menu "hal_rpi_pico (/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico)" +osource "$(ZEPHYR_HAL_RPI_PICO_KCONFIG)" +config ZEPHYR_HAL_RPI_PICO_MODULE + bool + default y +endmenu +menu "hal_sifli (/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli)" +osource "$(ZEPHYR_HAL_SIFLI_KCONFIG)" +config ZEPHYR_HAL_SIFLI_MODULE + bool + default y + +config ZEPHYR_HAL_SIFLI_MODULE_BLOBS + bool +endmenu +menu "hal_silabs (/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs)" +osource "$(ZEPHYR_HAL_SILABS_KCONFIG)" +config ZEPHYR_HAL_SILABS_MODULE + bool + default y + +config ZEPHYR_HAL_SILABS_MODULE_BLOBS + bool +endmenu +menu "hal_st (/home/jeremy/utat-dev/zephyrproject/modules/hal/st)" +osource "$(ZEPHYR_HAL_ST_KCONFIG)" +config ZEPHYR_HAL_ST_MODULE + bool + default y +endmenu +config ZEPHYR_HAL_STM32_MODULE + bool + default y + +config ZEPHYR_HAL_STM32_MODULE_BLOBS + bool +menu "hal_tdk (/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk)" +osource "$(ZEPHYR_HAL_TDK_KCONFIG)" +config ZEPHYR_HAL_TDK_MODULE + bool + default y +endmenu +menu "hal_telink (/home/jeremy/utat-dev/zephyrproject/modules/hal/telink)" +osource "/home/jeremy/utat-dev/zephyrproject/modules/hal/telink/Kconfig" +config ZEPHYR_HAL_TELINK_MODULE + bool + default y +endmenu +config ZEPHYR_TI_MODULE + bool + default y +menu "hal_wch (/home/jeremy/utat-dev/zephyrproject/modules/hal/wch)" +osource "$(ZEPHYR_HAL_WCH_KCONFIG)" +config ZEPHYR_HAL_WCH_MODULE + bool + default y +endmenu +config ZEPHYR_HAL_WURTHELEKTRONIK_MODULE + bool + default y +config ZEPHYR_XTENSA_MODULE + bool + default y +menu "hostap (/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap)" +osource "$(ZEPHYR_HOSTAP_KCONFIG)" +config ZEPHYR_HOSTAP_MODULE + bool + default y +endmenu +menu "liblc3 (/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3)" +osource "$(ZEPHYR_LIBLC3_KCONFIG)" +config ZEPHYR_LIBLC3_MODULE + bool + default y +endmenu +config ZEPHYR_LIBMCTP_MODULE + bool + default y +config ZEPHYR_LIBMETAL_MODULE + bool + default y +menu "libsbc (/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc)" +osource "$(ZEPHYR_LIBSBC_KCONFIG)" +config ZEPHYR_LIBSBC_MODULE + bool + default y +endmenu +menu "littlefs (/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs)" +osource "$(ZEPHYR_LITTLEFS_KCONFIG)" +config ZEPHYR_LITTLEFS_MODULE + bool + default y +endmenu +menu "lora-basics-modem (/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem)" +osource "$(ZEPHYR_LORA_BASICS_MODEM_KCONFIG)" +config ZEPHYR_LORA_BASICS_MODEM_MODULE + bool + default y +endmenu +menu "loramac-node (/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node)" +osource "$(ZEPHYR_LORAMAC_NODE_KCONFIG)" +config ZEPHYR_LORAMAC_NODE_MODULE + bool + default y +endmenu +menu "lvgl (/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl)" +osource "/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl/zephyr/Kconfig" +config ZEPHYR_LVGL_MODULE + bool + default y +endmenu +menu "mbedtls (/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls)" +osource "$(ZEPHYR_MBEDTLS_KCONFIG)" +config ZEPHYR_MBEDTLS_MODULE + bool + default y +endmenu +config ZEPHYR_MBEDTLS_3_6_MODULE + bool + default y +config ZEPHYR_MCUBOOT_MODULE + bool + default y +config ZEPHYR_MIPI_SYS_T_MODULE + bool + default y +config ZEPHYR_MLDSA_NATIVE_MODULE + bool + default y +menu "nanopb (/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb)" +osource "$(ZEPHYR_NANOPB_KCONFIG)" +config ZEPHYR_NANOPB_MODULE + bool + default y +endmenu +menu "nrf_wifi (/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi)" +osource "$(ZEPHYR_NRF_WIFI_KCONFIG)" +config ZEPHYR_NRF_WIFI_MODULE + bool + default y + +config ZEPHYR_NRF_WIFI_MODULE_BLOBS + bool +endmenu +config ZEPHYR_OPEN_AMP_MODULE + bool + default y +menu "openthread (/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread)" +osource "$(ZEPHYR_OPENTHREAD_KCONFIG)" +config ZEPHYR_OPENTHREAD_MODULE + bool + default y +endmenu +menu "percepio (/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio)" +osource "/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/zephyr/Kconfig" +config ZEPHYR_PERCEPIO_MODULE + bool + default y +endmenu +menu "picolibc (/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc)" +osource "/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc/zephyr/Kconfig" +config ZEPHYR_PICOLIBC_MODULE + bool + default y +endmenu +config ZEPHYR_PSA_ARCH_TESTS_MODULE + bool + default y +menu "segger (/home/jeremy/utat-dev/zephyrproject/modules/debug/segger)" +osource "$(ZEPHYR_SEGGER_KCONFIG)" +config ZEPHYR_SEGGER_MODULE + bool + default y +endmenu +config ZEPHYR_TF_M_TESTS_MODULE + bool + default y +config ZEPHYR_TF_PSA_CRYPTO_MODULE + bool + default y +menu "trusted-firmware-a (/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a)" +osource "$(ZEPHYR_TRUSTED_FIRMWARE_A_KCONFIG)" +config ZEPHYR_TRUSTED_FIRMWARE_A_MODULE + bool + default y +endmenu +menu "trusted-firmware-m (/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m)" +osource "$(ZEPHYR_TRUSTED_FIRMWARE_M_KCONFIG)" +config ZEPHYR_TRUSTED_FIRMWARE_M_MODULE + bool + default y +endmenu +menu "uoscore-uedhoc (/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc)" +osource "$(ZEPHYR_UOSCORE_UEDHOC_KCONFIG)" +config ZEPHYR_UOSCORE_UEDHOC_MODULE + bool + default y +endmenu +menu "zcbor (/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor)" +osource "$(ZEPHYR_ZCBOR_KCONFIG)" +config ZEPHYR_ZCBOR_MODULE + bool + default y +endmenu +config ZEPHYR_NRF_HW_MODELS_MODULE + bool + default y diff --git a/zephyrproject/build/mcuboot/Kconfig/Kconfig.sysbuild.modules b/zephyrproject/build/mcuboot/Kconfig/Kconfig.sysbuild.modules new file mode 100644 index 0000000..ea5b9e3 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/Kconfig.sysbuild.modules @@ -0,0 +1,195 @@ +config ZEPHYR_ACPICA_MODULE + bool + default y +config ZEPHYR_CMSIS_MODULE + bool + default y +config ZEPHYR_CMSIS_DSP_MODULE + bool + default y +config ZEPHYR_CMSIS_NN_MODULE + bool + default y +config ZEPHYR_CMSIS_6_MODULE + bool + default y +config ZEPHYR_DHARA_MODULE + bool + default y +config ZEPHYR_FATFS_MODULE + bool + default y +config ZEPHYR_ADI_MODULE + bool + default y +config ZEPHYR_HAL_AFBR_MODULE + bool + default y +config ZEPHYR_HAL_AMBIQ_MODULE + bool + default y +config ZEPHYR_ATMEL_MODULE + bool + default y +config ZEPHYR_HAL_BOUFFALOLAB_MODULE + bool + default y +config ZEPHYR_HAL_ESPRESSIF_MODULE + bool + default y +config ZEPHYR_HAL_ETHOS_U_MODULE + bool + default y +config ZEPHYR_HAL_GIGADEVICE_MODULE + bool + default y +config ZEPHYR_HAL_INFINEON_MODULE + bool + default y +config ZEPHYR_HAL_INTEL_MODULE + bool + default y +config ZEPHYR_MICROCHIP_MODULE + bool + default y +config ZEPHYR_HAL_NORDIC_MODULE + bool + default y +config ZEPHYR_NUVOTON_MODULE + bool + default y +config ZEPHYR_HAL_NXP_MODULE + bool + default y +config ZEPHYR_OPENISA_MODULE + bool + default y +config ZEPHYR_QUICKLOGIC_MODULE + bool + default y +config ZEPHYR_HAL_REALTEK_MODULE + bool + default y +config ZEPHYR_HAL_RENESAS_MODULE + bool + default y +config ZEPHYR_HAL_RPI_PICO_MODULE + bool + default y +config ZEPHYR_HAL_SIFLI_MODULE + bool + default y +config ZEPHYR_HAL_SILABS_MODULE + bool + default y +config ZEPHYR_HAL_ST_MODULE + bool + default y +config ZEPHYR_HAL_STM32_MODULE + bool + default y +config ZEPHYR_HAL_TDK_MODULE + bool + default y +config ZEPHYR_HAL_TELINK_MODULE + bool + default y +config ZEPHYR_TI_MODULE + bool + default y +config ZEPHYR_HAL_WCH_MODULE + bool + default y +config ZEPHYR_HAL_WURTHELEKTRONIK_MODULE + bool + default y +config ZEPHYR_XTENSA_MODULE + bool + default y +config ZEPHYR_HOSTAP_MODULE + bool + default y +config ZEPHYR_LIBLC3_MODULE + bool + default y +config ZEPHYR_LIBMCTP_MODULE + bool + default y +config ZEPHYR_LIBMETAL_MODULE + bool + default y +config ZEPHYR_LIBSBC_MODULE + bool + default y +config ZEPHYR_LITTLEFS_MODULE + bool + default y +config ZEPHYR_LORA_BASICS_MODEM_MODULE + bool + default y +config ZEPHYR_LORAMAC_NODE_MODULE + bool + default y +config ZEPHYR_LVGL_MODULE + bool + default y +config ZEPHYR_MBEDTLS_MODULE + bool + default y +config ZEPHYR_MBEDTLS_3_6_MODULE + bool + default y +config ZEPHYR_MCUBOOT_MODULE + bool + default y +config ZEPHYR_MIPI_SYS_T_MODULE + bool + default y +config ZEPHYR_MLDSA_NATIVE_MODULE + bool + default y +config ZEPHYR_NANOPB_MODULE + bool + default y +config ZEPHYR_NRF_WIFI_MODULE + bool + default y +config ZEPHYR_OPEN_AMP_MODULE + bool + default y +config ZEPHYR_OPENTHREAD_MODULE + bool + default y +config ZEPHYR_PERCEPIO_MODULE + bool + default y +config ZEPHYR_PICOLIBC_MODULE + bool + default y +config ZEPHYR_PSA_ARCH_TESTS_MODULE + bool + default y +config ZEPHYR_SEGGER_MODULE + bool + default y +config ZEPHYR_TF_M_TESTS_MODULE + bool + default y +config ZEPHYR_TF_PSA_CRYPTO_MODULE + bool + default y +config ZEPHYR_TRUSTED_FIRMWARE_A_MODULE + bool + default y +config ZEPHYR_TRUSTED_FIRMWARE_M_MODULE + bool + default y +config ZEPHYR_UOSCORE_UEDHOC_MODULE + bool + default y +config ZEPHYR_ZCBOR_MODULE + bool + default y +config ZEPHYR_NRF_HW_MODELS_MODULE + bool + default y diff --git a/zephyrproject/build/mcuboot/Kconfig/arch/Kconfig b/zephyrproject/build/mcuboot/Kconfig/arch/Kconfig new file mode 100644 index 0000000..b2e3cda --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/arch/Kconfig @@ -0,0 +1,12 @@ +# Load Zephyr Arch Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/rx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/x86/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/xtensa/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/sparc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/riscv/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/posix/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/openrisc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/mips/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arm64/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arm/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arc/Kconfig" diff --git a/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig new file mode 100644 index 0000000..bce8751 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig @@ -0,0 +1,2 @@ +# Load Zephyr board Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/Kconfig" diff --git a/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.defconfig b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.defconfig new file mode 100644 index 0000000..295c378 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.defconfig @@ -0,0 +1,2 @@ +# Load Zephyr board defconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/Kconfig.defconfig" diff --git a/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.nucleo_g431rb b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.nucleo_g431rb new file mode 100644 index 0000000..9430c54 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.nucleo_g431rb @@ -0,0 +1,2 @@ +# Load board Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/Kconfig.nucleo_g431rb" diff --git a/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.sysbuild b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.sysbuild new file mode 100644 index 0000000..dbee52d --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.sysbuild @@ -0,0 +1,2 @@ +# Load Sysbuild board Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/Kconfig.sysbuild" diff --git a/zephyrproject/build/mcuboot/Kconfig/kconfig_module_dirs.cmake b/zephyrproject/build/mcuboot/Kconfig/kconfig_module_dirs.cmake new file mode 100644 index 0000000..7693385 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/kconfig_module_dirs.cmake @@ -0,0 +1,66 @@ +set(kconfig_env_dirs) +list(APPEND kconfig_env_dirs ZEPHYR_ACPICA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica) +list(APPEND kconfig_env_dirs ZEPHYR_CMSIS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis) +list(APPEND kconfig_env_dirs ZEPHYR_CMSIS_DSP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp) +list(APPEND kconfig_env_dirs ZEPHYR_CMSIS_NN_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn) +list(APPEND kconfig_env_dirs ZEPHYR_CMSIS_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6) +list(APPEND kconfig_env_dirs ZEPHYR_DHARA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara) +list(APPEND kconfig_env_dirs ZEPHYR_FATFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs) +list(APPEND kconfig_env_dirs ZEPHYR_ADI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/adi) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_AFBR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_AMBIQ_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq) +list(APPEND kconfig_env_dirs ZEPHYR_ATMEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_BOUFFALOLAB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_ESPRESSIF_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_ETHOS_U_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_GIGADEVICE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_INFINEON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_INTEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/intel) +list(APPEND kconfig_env_dirs ZEPHYR_MICROCHIP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_NORDIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic) +list(APPEND kconfig_env_dirs ZEPHYR_NUVOTON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_NXP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp) +list(APPEND kconfig_env_dirs ZEPHYR_OPENISA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa) +list(APPEND kconfig_env_dirs ZEPHYR_QUICKLOGIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_REALTEK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_RENESAS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_RPI_PICO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_SIFLI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_SILABS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_ST_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/st) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_STM32_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_TDK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_TELINK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/telink) +list(APPEND kconfig_env_dirs ZEPHYR_TI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ti) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_WCH_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wch) +list(APPEND kconfig_env_dirs ZEPHYR_HAL_WURTHELEKTRONIK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik) +list(APPEND kconfig_env_dirs ZEPHYR_XTENSA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa) +list(APPEND kconfig_env_dirs ZEPHYR_HOSTAP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap) +list(APPEND kconfig_env_dirs ZEPHYR_LIBLC3_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3) +list(APPEND kconfig_env_dirs ZEPHYR_LIBMCTP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp) +list(APPEND kconfig_env_dirs ZEPHYR_LIBMETAL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal) +list(APPEND kconfig_env_dirs ZEPHYR_LIBSBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc) +list(APPEND kconfig_env_dirs ZEPHYR_LITTLEFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs) +list(APPEND kconfig_env_dirs ZEPHYR_LORA_BASICS_MODEM_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem) +list(APPEND kconfig_env_dirs ZEPHYR_LORAMAC_NODE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node) +list(APPEND kconfig_env_dirs ZEPHYR_LVGL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl) +list(APPEND kconfig_env_dirs ZEPHYR_MBEDTLS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls) +list(APPEND kconfig_env_dirs ZEPHYR_MBEDTLS_3_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6) +list(APPEND kconfig_env_dirs ZEPHYR_MCUBOOT_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot) +list(APPEND kconfig_env_dirs ZEPHYR_MIPI_SYS_T_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t) +list(APPEND kconfig_env_dirs ZEPHYR_MLDSA_NATIVE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native) +list(APPEND kconfig_env_dirs ZEPHYR_NANOPB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb) +list(APPEND kconfig_env_dirs ZEPHYR_NRF_WIFI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi) +list(APPEND kconfig_env_dirs ZEPHYR_OPEN_AMP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp) +list(APPEND kconfig_env_dirs ZEPHYR_OPENTHREAD_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread) +list(APPEND kconfig_env_dirs ZEPHYR_PERCEPIO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio) +list(APPEND kconfig_env_dirs ZEPHYR_PICOLIBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc) +list(APPEND kconfig_env_dirs ZEPHYR_PSA_ARCH_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests) +list(APPEND kconfig_env_dirs ZEPHYR_SEGGER_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/segger) +list(APPEND kconfig_env_dirs ZEPHYR_TF_M_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests) +list(APPEND kconfig_env_dirs ZEPHYR_TF_PSA_CRYPTO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto) +list(APPEND kconfig_env_dirs ZEPHYR_TRUSTED_FIRMWARE_A_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a) +list(APPEND kconfig_env_dirs ZEPHYR_TRUSTED_FIRMWARE_M_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m) +list(APPEND kconfig_env_dirs ZEPHYR_UOSCORE_UEDHOC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc) +list(APPEND kconfig_env_dirs ZEPHYR_ZCBOR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor) +list(APPEND kconfig_env_dirs ZEPHYR_NRF_HW_MODELS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models) diff --git a/zephyrproject/build/mcuboot/Kconfig/kconfig_module_dirs.env b/zephyrproject/build/mcuboot/Kconfig/kconfig_module_dirs.env new file mode 100644 index 0000000..3371408 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/kconfig_module_dirs.env @@ -0,0 +1,65 @@ +ZEPHYR_ACPICA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica +ZEPHYR_CMSIS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis +ZEPHYR_CMSIS_DSP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp +ZEPHYR_CMSIS_NN_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn +ZEPHYR_CMSIS_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6 +ZEPHYR_DHARA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara +ZEPHYR_FATFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs +ZEPHYR_ADI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/adi +ZEPHYR_HAL_AFBR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr +ZEPHYR_HAL_AMBIQ_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq +ZEPHYR_ATMEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel +ZEPHYR_HAL_BOUFFALOLAB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab +ZEPHYR_HAL_ESPRESSIF_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif +ZEPHYR_HAL_ETHOS_U_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u +ZEPHYR_HAL_GIGADEVICE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice +ZEPHYR_HAL_INFINEON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon +ZEPHYR_HAL_INTEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/intel +ZEPHYR_MICROCHIP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip +ZEPHYR_HAL_NORDIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic +ZEPHYR_NUVOTON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton +ZEPHYR_HAL_NXP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp +ZEPHYR_OPENISA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa +ZEPHYR_QUICKLOGIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic +ZEPHYR_HAL_REALTEK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek +ZEPHYR_HAL_RENESAS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas +ZEPHYR_HAL_RPI_PICO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico +ZEPHYR_HAL_SIFLI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli +ZEPHYR_HAL_SILABS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs +ZEPHYR_HAL_ST_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/st +ZEPHYR_HAL_STM32_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32 +ZEPHYR_HAL_TDK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk +ZEPHYR_HAL_TELINK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/telink +ZEPHYR_TI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ti +ZEPHYR_HAL_WCH_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wch +ZEPHYR_HAL_WURTHELEKTRONIK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik +ZEPHYR_XTENSA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa +ZEPHYR_HOSTAP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap +ZEPHYR_LIBLC3_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3 +ZEPHYR_LIBMCTP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp +ZEPHYR_LIBMETAL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal +ZEPHYR_LIBSBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc +ZEPHYR_LITTLEFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs +ZEPHYR_LORA_BASICS_MODEM_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem +ZEPHYR_LORAMAC_NODE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node +ZEPHYR_LVGL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl +ZEPHYR_MBEDTLS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls +ZEPHYR_MBEDTLS_3_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6 +ZEPHYR_MCUBOOT_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot +ZEPHYR_MIPI_SYS_T_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t +ZEPHYR_MLDSA_NATIVE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native +ZEPHYR_NANOPB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb +ZEPHYR_NRF_WIFI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi +ZEPHYR_OPEN_AMP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp +ZEPHYR_OPENTHREAD_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread +ZEPHYR_PERCEPIO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio +ZEPHYR_PICOLIBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc +ZEPHYR_PSA_ARCH_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests +ZEPHYR_SEGGER_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/segger +ZEPHYR_TF_M_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests +ZEPHYR_TF_PSA_CRYPTO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto +ZEPHYR_TRUSTED_FIRMWARE_A_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a +ZEPHYR_TRUSTED_FIRMWARE_M_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m +ZEPHYR_UOSCORE_UEDHOC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc +ZEPHYR_ZCBOR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor +ZEPHYR_NRF_HW_MODELS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models diff --git a/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig new file mode 100644 index 0000000..30bb798 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig @@ -0,0 +1,131 @@ +# Load Zephyr SoC Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynqmp/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynq7000/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versalnet/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal2/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xen/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/wch/ch32v/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/simplelink/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/mspm0/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/lm3s6965/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/k3/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/telink/tlsr/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/syna/sr100/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/starfive/jh71xx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/qemu_arc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_v/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_classic/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk4xd/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsk/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsdp/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/arc_iot/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/silabs/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifli/sf32/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifive/sifive_freedom/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sensry/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/rockchip/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/riscv_virtual/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/cortex_r8_virtual/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/smartbond/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rz/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rcar/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/ra/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/fingerprint/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ec/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/bee/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ameba/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/raspberrypi/rpi_pico/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/quicklogic/eos_s3/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/virt_riscv/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/or1k/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/malta/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openisa/rv32m1/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openhwgroup/cva6/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/oct/osd32mp15x/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/s32/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/rw/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/mcx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/lpc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/layerscape/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/kinetis/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imxrt/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numicro/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numaker/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcm/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nordic/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/neorv32/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/native/inf_clock/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sama7/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sam_d5x_e5x/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic64/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cz_ca/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cx_sg/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_sg_gc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_pl/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_jh/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32ck_sg_gc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/miv/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/mec/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/mediatek/mt8xxx/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/lowrisc/opentitan/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/litex/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ite/ec/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/wildcat_lake/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/raptor_lake/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/panther_lake/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/lakemont/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga_std/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_niosv/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_ish/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_adsp/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/elkhart_lake/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/atom/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/apollo_lake/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/alder_lake/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/psoc4/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/edge/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat3/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1c/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1b/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1a/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gd/gd32/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/leon3/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/gr716a/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/focaltech/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/espressif/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb1200/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb106x/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/elan/em32f967/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/egis/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/efinix/sapphire/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/xtensa_sample_controller/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/swerv/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/sample_controller32/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/dc233c/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcmvk/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2712/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2711/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/blackberry/qnxhv_vm/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/bflb/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam0/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aspeed/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/beetle/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/antmicro/myra/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/andestech/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_7_0/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_6_0/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ambiq/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/allwinner/sun8i_h3/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/ensemble/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/balletto/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aesc/Kconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/adi/max32/Kconfig" diff --git a/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.defconfig b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.defconfig new file mode 100644 index 0000000..0a84a36 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.defconfig @@ -0,0 +1,131 @@ +# Load Zephyr SoC defconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynqmp/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynq7000/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versalnet/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal2/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xen/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/wch/ch32v/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/simplelink/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/mspm0/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/lm3s6965/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/k3/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/telink/tlsr/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/syna/sr100/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/starfive/jh71xx/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/qemu_arc/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_v/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_classic/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk4xd/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsk/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsdp/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/arc_iot/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/silabs/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifli/sf32/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifive/sifive_freedom/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sensry/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/rockchip/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/riscv_virtual/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/cortex_r8_virtual/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/smartbond/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rz/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rx/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rcar/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/ra/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/fingerprint/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ec/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/bee/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ameba/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/raspberrypi/rpi_pico/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/quicklogic/eos_s3/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/virt_riscv/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/or1k/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/malta/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openisa/rv32m1/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openhwgroup/cva6/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/oct/osd32mp15x/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/s32/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/rw/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/mcx/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/lpc/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/layerscape/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/kinetis/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imxrt/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imx/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numicro/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numaker/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcx/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcm/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nordic/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/neorv32/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/native/inf_clock/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sama7/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sam_d5x_e5x/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic64/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cz_ca/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cx_sg/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_sg_gc/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_pl/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_jh/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32ck_sg_gc/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/miv/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/mec/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/mediatek/mt8xxx/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/lowrisc/opentitan/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/litex/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ite/ec/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/wildcat_lake/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/raptor_lake/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/panther_lake/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/lakemont/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga_std/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_niosv/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_ish/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_adsp/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/elkhart_lake/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/atom/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/apollo_lake/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/alder_lake/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/psoc4/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/edge/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat3/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1c/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1b/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1a/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gd/gd32/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/leon3/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/gr716a/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/focaltech/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/espressif/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb1200/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb106x/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/elan/em32f967/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/egis/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/efinix/sapphire/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/xtensa_sample_controller/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/swerv/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/sample_controller32/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/dc233c/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcmvk/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2712/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2711/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/blackberry/qnxhv_vm/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/bflb/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam0/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aspeed/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/beetle/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/antmicro/myra/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/andestech/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_7_0/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_6_0/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ambiq/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/allwinner/sun8i_h3/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/ensemble/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/balletto/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aesc/Kconfig.defconfig" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/adi/max32/Kconfig.defconfig" diff --git a/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.soc b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.soc new file mode 100644 index 0000000..8b11ac2 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.soc @@ -0,0 +1,131 @@ +# Load SoC Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynqmp/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynq7000/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versalnet/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal2/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xen/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/wch/ch32v/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/simplelink/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/mspm0/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/lm3s6965/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/k3/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/telink/tlsr/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/syna/sr100/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/starfive/jh71xx/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/qemu_arc/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_v/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_classic/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk4xd/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsk/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsdp/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/arc_iot/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/silabs/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifli/sf32/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifive/sifive_freedom/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sensry/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/rockchip/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/riscv_virtual/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/cortex_r8_virtual/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/smartbond/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rz/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rx/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rcar/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/ra/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/fingerprint/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ec/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/bee/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ameba/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/raspberrypi/rpi_pico/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/quicklogic/eos_s3/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/virt_riscv/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/or1k/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/malta/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openisa/rv32m1/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openhwgroup/cva6/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/oct/osd32mp15x/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/s32/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/rw/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/mcx/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/lpc/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/layerscape/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/kinetis/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imxrt/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imx/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numicro/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numaker/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcx/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcm/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nordic/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/neorv32/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/native/inf_clock/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sama7/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sam_d5x_e5x/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic64/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cz_ca/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cx_sg/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_sg_gc/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_pl/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_jh/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32ck_sg_gc/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/miv/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/mec/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/mediatek/mt8xxx/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/lowrisc/opentitan/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/litex/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ite/ec/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/wildcat_lake/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/raptor_lake/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/panther_lake/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/lakemont/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga_std/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_niosv/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_ish/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_adsp/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/elkhart_lake/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/atom/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/apollo_lake/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/alder_lake/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/psoc4/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/edge/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat3/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1c/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1b/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1a/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gd/gd32/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/leon3/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/gr716a/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/focaltech/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/espressif/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb1200/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb106x/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/elan/em32f967/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/egis/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/efinix/sapphire/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/xtensa_sample_controller/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/swerv/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/sample_controller32/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/dc233c/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcmvk/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2712/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2711/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/blackberry/qnxhv_vm/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/bflb/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam0/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aspeed/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/beetle/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/antmicro/myra/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/andestech/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_7_0/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_6_0/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ambiq/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/allwinner/sun8i_h3/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/ensemble/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/balletto/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aesc/Kconfig.soc" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/adi/max32/Kconfig.soc" diff --git a/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.sysbuild b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.sysbuild new file mode 100644 index 0000000..739c049 --- /dev/null +++ b/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.sysbuild @@ -0,0 +1,131 @@ +# Load Sysbuild SoC Kconfig descriptions. +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynqmp/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/zynq7000/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versalnet/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal2/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xlnx/versal/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/xen/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/wch/ch32v/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/simplelink/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/mspm0/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/lm3s6965/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ti/k3/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/telink/tlsr/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/syna/sr100/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/starfive/jh71xx/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/qemu_arc/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_v/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/nsim/arc_classic/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk4xd/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/hsdk/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsk/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/emsdp/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/snps/arc_iot/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/silabs/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifli/sf32/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sifive/sifive_freedom/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/sensry/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/rockchip/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/riscv_virtual/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renode/cortex_r8_virtual/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/smartbond/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rz/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rx/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/rcar/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/renesas/ra/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/fingerprint/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ec/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/bee/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/realtek/ameba/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/raspberrypi/rpi_pico/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/quicklogic/eos_s3/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/virt_riscv/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/or1k/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/qemu/malta/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openisa/rv32m1/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/openhwgroup/cva6/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/oct/osd32mp15x/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/s32/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/rw/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/mcx/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/lpc/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/layerscape/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/kinetis/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imxrt/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nxp/imx/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numicro/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/numaker/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcx/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nuvoton/npcm/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/nordic/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/neorv32/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/native/inf_clock/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sama7/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/sam/sam_d5x_e5x/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic64/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cz_ca/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cx_sg/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_sg_gc/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_pl/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32cm_jh/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/pic32c/pic32ck_sg_gc/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/miv/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/microchip/mec/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/mediatek/mt8xxx/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/lowrisc/opentitan/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/litex/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ite/ec/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/wildcat_lake/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/raptor_lake/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/panther_lake/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/lakemont/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga_std/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_socfpga/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_niosv/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_ish/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/intel_adsp/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/elkhart_lake/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/atom/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/apollo_lake/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/intel/alder_lake/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/psoc4/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/edge/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat3/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1c/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1b/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/infineon/cat1a/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gd/gd32/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/leon3/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/gaisler/gr716a/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/focaltech/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/espressif/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb1200/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ene/kb106x/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/elan/em32f967/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/egis/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/efinix/sapphire/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/xtensa_sample_controller/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/swerv/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/sample_controller32/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/cdns/dc233c/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcmvk/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2712/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/brcm/bcm2711/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/blackberry/qnxhv_vm/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/bflb/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam0/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/atmel/sam/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aspeed/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/arm/beetle/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/antmicro/myra/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/andestech/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_7_0/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/amd/acp_6_0/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/ambiq/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/allwinner/sun8i_h3/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/ensemble/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/alif/balletto/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/aesc/Kconfig.sysbuild" +osource "/home/jeremy/utat-dev/zephyrproject/zephyr/soc/adi/max32/Kconfig.sysbuild" diff --git a/zephyrproject/build/mcuboot/app/libapp.a b/zephyrproject/build/mcuboot/app/libapp.a new file mode 100644 index 0000000000000000000000000000000000000000..bc734cda9b7f0e50ff85a7403b4b7ea4faee06e6 GIT binary patch literal 67278 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/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo atmel_rf2xx_xpro && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo boostxl_ulpsense && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo buydisplay_2_8_tft_touch_arduino && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo buydisplay_3_5_tft_touch_arduino && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo canis_canpico && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo dac80508_evm && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo dfrobot_can_bus_v2_0 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo dvp_20pin_ov7670 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo dvp_fpc24_mt9m114 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ek_ra8d1_rtk7eka6m3b00001bu && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo elecfreaks_can_bus_ef02037 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo esp_8266 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo esp_8266_arduino && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo esp_8266_mikrobus && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo esp_threadbr_ethernet && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo eval_ad4052_ardz && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo eval_adxl362_ardz && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo eval_adxl367_ardz && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo eval_adxl372_ardz && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo eval_cn0391_ardz && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo frdm_cr20a && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo frdm_kw41z && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo frdm_stbc_agm01 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ftdi_vm800c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo g1120b0mipi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo inventek_eswifi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo inventek_eswifi_arduino_spi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo inventek_eswifi_arduino_uart && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo keyestudio_can_bus_ks0411 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo lcd_par_s035_8080 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo lcd_par_s035_spi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo link_board_eth && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo lmp90100_evb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ls013b7dh03 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo m5stack_cardputer && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo m5stack_core2_ext && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo m5stack_unit_gesture && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo m5stack_unit_minioled && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo max7219_8x8 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mchp_rnbd451_bt_mikrobus && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mchp_rnbd451_bt_xplained_pro && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_3d_hall_3_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_accel13_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_accel4_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_adc_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_air_quality_3_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_ambient_2_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_ble_tiny_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_can_fd_6_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_can_spi_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_eeprom_13_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_eth3_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_eth_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_flash_5_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_flash_6_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_flash_8_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_h_bridge_4_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_illuminance_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_ir_gesture_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_lsm6dsl_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_lte_iot10_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_lte_iot7_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_mcp2517fd_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_mcp251863_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_mcp2518fd_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_mcp25625_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_pressure_3_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_proximity_9_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_rs485_isolator_5_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_rtc_18_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_stepper_18_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_stepper_19_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_temp_hum_click && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_weather_click_i2c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_weather_click_spi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_wifi_bt_click_arduino && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo mikroe_wifi_bt_click_mikrobus && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo npm1100_ek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo npm1300_ek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo npm1304_ek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo npm2100_ek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo npm6001_ek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb2_coex && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb2_nrf7000 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb2_nrf7001 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb_coex && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002eb_coex_sa && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002ek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002ek_coex && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002ek_nrf7000 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nrf7002ek_nrf7001 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_adtja1101 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_btb44_ov5640 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_m2_1xk_wifi_bt && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_m2_2el_wifi_bt && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_m2_2ll_wifi_bt && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_mx8_dsi_oled1a && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_mx9_dsi_oled && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nxp_s32k5xx_mb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo olimex_shield_midi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo openthread_rcp_arduino_serial && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo openthread_rcp_arduino_spi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo p3t1755dp_ard_i2c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo p3t1755dp_ard_i3c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo pmod_acl && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo pmod_sd && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo raspberry_pi_camera_module_2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo renesas_aik_ov2640_cam && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo renesas_us159_da14531evz && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo reyax_lora && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rk043fn02h_ct && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rk043fn66hs_ctg && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rk055hdmipi4m && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rk055hdmipi4ma0 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rpi_pico_uno_flexypin && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rtk0eg0019b01002bj && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rtk7eka6m3b00001bu && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rtklcdpar1s00001be && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rtkmipilcdb00000be && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo seeed_w5500 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo seeed_xiao_can && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo seeed_xiao_cob_led && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo seeed_xiao_expansion_board && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo seeed_xiao_hsp24 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo seeed_xiao_round_display && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo semtech_sx1261mb2bas && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo semtech_sx1262mb2das && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo semtech_sx1272mb2das && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo semtech_sx1276mb1mas && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sh1106_128x64 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sparkfun_carrier_asset_tracker && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sparkfun_environmental_combo && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sparkfun_max3421e && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sparkfun_rv8803 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sparkfun_sara_r4 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo sparkfun_shtc3 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ssd1306_128x32 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ssd1306_128x64 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ssd1306_128x64_spi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st7735r_ada_160x128 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st7789v_tl019fqv01 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st7789v_waveshare_240x240 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st87mxx && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_b_cams_imx_mb1854 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_b_cams_omv_mb1683 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_b_dsi_mb1314 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_b_lcd40_dsi1_mb1166 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_b_lcd40_dsi1_mb1166_a09 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_lcd_dsi_mb1835 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_mb1897_cam && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo st_stm32f4dis_cam && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo swir_hl78xx_ev_kit && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo tcan4550evm && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ti_bp_bassensorsmkii && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo v2c_daplink && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo v2c_daplink_cfg && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_7inch_dsi_lcd_c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdeh0154a07 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdeh0213b1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdeh0213b72 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdeh029a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdew042t2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdew042t2-p && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdew075t7 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_epaper_gdey0213b74 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_pico_lcd_1_14 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_pico_oled_1_3 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo waveshare_pico_ups_b && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo weact_ov2640_cam_module && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wiznet_w5500 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wnc_m14a2a && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_53l0a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_bnrg2a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_eeprma2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_gfx01m2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_gnss1a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_idb05a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks01a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks01a2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks01a2_shub && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks01a3 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks01a3_shub && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks02a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks02a1_mic && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks02a1_shub && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks4a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks4a1_shub1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks4a1_shub2 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_iks5a1 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_wb05kn1_spi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo x_nucleo_wb05kn1_uart && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo zc143ac72mipi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo zhaw_lumamatrix + pool = console + + +############################################# +# Custom command for CMakeFiles/snippets + +build CMakeFiles/snippets | ${cmake_ninja_workdir}CMakeFiles/snippets: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo bt-ll-sw-split && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo cdc-acm-console && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-128M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-16M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-2M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-32M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-4M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-64M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-flash-8M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-psram-2M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-psram-4M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-psram-8M && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-psram-reloc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo espressif-psram-wifi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo hci-uart-native-sim && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-flpr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-flpr-xip && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-log-stm && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-log-stm-dict && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-log-stm-tpiu-dict && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-ppr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nordic-ppr-xip && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo nus-console && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ram-console && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo ram-tracing && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rp2-boot-mode-retention && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rtt-console && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo rtt-tracing && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo semihost-tracing && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo serial-console && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo silabs-pti && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo slot1-partition && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo socketcan-native-sim && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo usbip-native-sim && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo video-sw-generator && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wifi-credentials && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wifi-enterprise && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wifi-ip && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wifi-ipv4 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo wifi-ipv6 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo xen_dom0 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo xiao-serial-console + pool = console + + +############################################# +# Custom command for CMakeFiles/menuconfig + +build CMakeFiles/menuconfig | ${cmake_ninja_workdir}CMakeFiles/menuconfig: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kconfig && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E env ZEPHYR_BASE=/home/jeremy/utat-dev/zephyrproject/zephyr PYTHON_EXECUTABLE=/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 srctree=/home/jeremy/utat-dev/zephyrproject/zephyr ZEPHYR_ACPICA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica ZEPHYR_CMSIS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis ZEPHYR_CMSIS_DSP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp ZEPHYR_CMSIS_NN_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn ZEPHYR_CMSIS_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6 ZEPHYR_DHARA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara ZEPHYR_FATFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs ZEPHYR_ADI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/adi ZEPHYR_HAL_AFBR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr ZEPHYR_HAL_AMBIQ_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq ZEPHYR_ATMEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel ZEPHYR_HAL_BOUFFALOLAB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab ZEPHYR_HAL_ESPRESSIF_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif ZEPHYR_HAL_ETHOS_U_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u ZEPHYR_HAL_GIGADEVICE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice ZEPHYR_HAL_INFINEON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon ZEPHYR_HAL_INTEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/intel ZEPHYR_MICROCHIP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip ZEPHYR_HAL_NORDIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic ZEPHYR_NUVOTON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton ZEPHYR_HAL_NXP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp ZEPHYR_OPENISA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa ZEPHYR_QUICKLOGIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic ZEPHYR_HAL_REALTEK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek ZEPHYR_HAL_RENESAS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas ZEPHYR_HAL_RPI_PICO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico ZEPHYR_HAL_SIFLI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli ZEPHYR_HAL_SILABS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs ZEPHYR_HAL_ST_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/st ZEPHYR_HAL_STM32_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32 ZEPHYR_HAL_TDK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk ZEPHYR_HAL_TELINK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/telink ZEPHYR_TI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ti ZEPHYR_HAL_WCH_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wch ZEPHYR_HAL_WURTHELEKTRONIK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik ZEPHYR_XTENSA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa ZEPHYR_HOSTAP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap ZEPHYR_LIBLC3_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3 ZEPHYR_LIBMCTP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp ZEPHYR_LIBMETAL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal ZEPHYR_LIBSBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc ZEPHYR_LITTLEFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs ZEPHYR_LORA_BASICS_MODEM_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem ZEPHYR_LORAMAC_NODE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node ZEPHYR_LVGL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl ZEPHYR_MBEDTLS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls ZEPHYR_MBEDTLS_3_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6 ZEPHYR_MCUBOOT_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot ZEPHYR_MIPI_SYS_T_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t ZEPHYR_MLDSA_NATIVE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native ZEPHYR_NANOPB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb ZEPHYR_NRF_WIFI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi ZEPHYR_OPEN_AMP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp ZEPHYR_OPENTHREAD_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread ZEPHYR_PERCEPIO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio ZEPHYR_PICOLIBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc ZEPHYR_PSA_ARCH_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests ZEPHYR_SEGGER_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/segger ZEPHYR_TF_M_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests ZEPHYR_TF_PSA_CRYPTO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto ZEPHYR_TRUSTED_FIRMWARE_A_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a ZEPHYR_TRUSTED_FIRMWARE_M_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m ZEPHYR_UOSCORE_UEDHOC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc ZEPHYR_ZCBOR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor ZEPHYR_NRF_HW_MODELS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models KERNELVERSION=0x4046300 APPVERSION=2.4.0 APP_VERSION_EXTENDED_STRING=2.4.0+0 APP_VERSION_TWEAK_STRING=2.4.0+0 APP_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr CONFIG_=CONFIG_ KCONFIG_CONFIG=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/.config KCONFIG_BOARD_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards BOARD=nucleo_g431rb BOARD_REVISION= BOARD_QUALIFIERS=stm32g431xx HWM_SCHEME=v2 KCONFIG_BINARY_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig APPLICATION_SOURCE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr ZEPHYR_TOOLCHAIN_VARIANT=zephyr TOOLCHAIN_VARIANT_COMPILER=gnu TOOLCHAIN_KCONFIG_DIR=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/cmake/zephyr TOOLCHAIN_HAS_NEWLIB=n TOOLCHAIN_HAS_PICOLIBC=y TOOLCHAIN_HAS_GLIBCXX=y TOOLCHAIN_HAS_LIBCXX=n EDT_PICKLE=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/edt.pickle ZEPHYR_ACPICA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/acpica/Kconfig ZEPHYR_CMSIS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis/Kconfig ZEPHYR_CMSIS_DSP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-dsp/Kconfig ZEPHYR_CMSIS_NN_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-nn/Kconfig ZEPHYR_CMSIS_6_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/Kconfig ZEPHYR_DHARA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/dhara/Kconfig ZEPHYR_FATFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/fatfs/Kconfig ZEPHYR_HAL_AFBR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_afbr/Kconfig ZEPHYR_HAL_AMBIQ_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ambiq/Kconfig ZEPHYR_HAL_BOUFFALOLAB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_bouffalolab/Kconfig ZEPHYR_HAL_ESPRESSIF_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_espressif/Kconfig ZEPHYR_HAL_ETHOS_U_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ethos_u/Kconfig ZEPHYR_HAL_GIGADEVICE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_gigadevice/Kconfig ZEPHYR_HAL_INFINEON_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_infineon/Kconfig ZEPHYR_HAL_NORDIC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nordic/Kconfig ZEPHYR_HAL_NXP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nxp/Kconfig ZEPHYR_HAL_REALTEK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_realtek/Kconfig ZEPHYR_HAL_RPI_PICO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_rpi_pico/Kconfig ZEPHYR_HAL_SIFLI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_sifli/Kconfig ZEPHYR_HAL_SILABS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_silabs/Kconfig ZEPHYR_HAL_ST_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_st/Kconfig ZEPHYR_HAL_TDK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_tdk/Kconfig ZEPHYR_HAL_WCH_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_wch/Kconfig ZEPHYR_HOSTAP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hostap/Kconfig ZEPHYR_LIBLC3_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/liblc3/Kconfig ZEPHYR_LIBSBC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/libsbc/Kconfig ZEPHYR_LITTLEFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/littlefs/Kconfig ZEPHYR_LORA_BASICS_MODEM_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lora-basics-modem/Kconfig ZEPHYR_LORAMAC_NODE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/loramac-node/Kconfig ZEPHYR_LVGL_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lvgl/Kconfig ZEPHYR_MBEDTLS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/mbedtls/Kconfig ZEPHYR_NANOPB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nanopb/Kconfig ZEPHYR_NRF_WIFI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nrf_wifi/Kconfig ZEPHYR_OPENTHREAD_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/openthread/Kconfig ZEPHYR_PERCEPIO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/percepio/Kconfig ZEPHYR_SEGGER_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/segger/Kconfig ZEPHYR_TRUSTED_FIRMWARE_A_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-a/Kconfig ZEPHYR_TRUSTED_FIRMWARE_M_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-m/Kconfig ZEPHYR_UOSCORE_UEDHOC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/uoscore-uedhoc/Kconfig ZEPHYR_ZCBOR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/zcbor/Kconfig ARCH=* ARCH_DIR=/home/jeremy/utat-dev/zephyrproject/zephyr/arch SHIELD_AS_LIST='' DTS_POST_CPP=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre DTS_ROOT_BINDINGS=/home/jeremy/utat-dev/zephyrproject/zephyr/dts/bindings /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/kconfig/menuconfig.py /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig + pool = console + + +############################################# +# Custom command for CMakeFiles/guiconfig + +build CMakeFiles/guiconfig | ${cmake_ninja_workdir}CMakeFiles/guiconfig: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kconfig && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E env ZEPHYR_BASE=/home/jeremy/utat-dev/zephyrproject/zephyr PYTHON_EXECUTABLE=/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 srctree=/home/jeremy/utat-dev/zephyrproject/zephyr ZEPHYR_ACPICA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica ZEPHYR_CMSIS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis ZEPHYR_CMSIS_DSP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp ZEPHYR_CMSIS_NN_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn ZEPHYR_CMSIS_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6 ZEPHYR_DHARA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara ZEPHYR_FATFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs ZEPHYR_ADI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/adi ZEPHYR_HAL_AFBR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr ZEPHYR_HAL_AMBIQ_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq ZEPHYR_ATMEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel ZEPHYR_HAL_BOUFFALOLAB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab ZEPHYR_HAL_ESPRESSIF_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif ZEPHYR_HAL_ETHOS_U_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u ZEPHYR_HAL_GIGADEVICE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice ZEPHYR_HAL_INFINEON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon ZEPHYR_HAL_INTEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/intel ZEPHYR_MICROCHIP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip ZEPHYR_HAL_NORDIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic ZEPHYR_NUVOTON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton ZEPHYR_HAL_NXP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp ZEPHYR_OPENISA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa ZEPHYR_QUICKLOGIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic ZEPHYR_HAL_REALTEK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek ZEPHYR_HAL_RENESAS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas ZEPHYR_HAL_RPI_PICO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico ZEPHYR_HAL_SIFLI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli ZEPHYR_HAL_SILABS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs ZEPHYR_HAL_ST_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/st ZEPHYR_HAL_STM32_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32 ZEPHYR_HAL_TDK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk ZEPHYR_HAL_TELINK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/telink ZEPHYR_TI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ti ZEPHYR_HAL_WCH_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wch ZEPHYR_HAL_WURTHELEKTRONIK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik ZEPHYR_XTENSA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa ZEPHYR_HOSTAP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap ZEPHYR_LIBLC3_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3 ZEPHYR_LIBMCTP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp ZEPHYR_LIBMETAL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal ZEPHYR_LIBSBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc ZEPHYR_LITTLEFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs ZEPHYR_LORA_BASICS_MODEM_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem ZEPHYR_LORAMAC_NODE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node ZEPHYR_LVGL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl ZEPHYR_MBEDTLS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls ZEPHYR_MBEDTLS_3_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6 ZEPHYR_MCUBOOT_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot ZEPHYR_MIPI_SYS_T_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t ZEPHYR_MLDSA_NATIVE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native ZEPHYR_NANOPB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb ZEPHYR_NRF_WIFI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi ZEPHYR_OPEN_AMP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp ZEPHYR_OPENTHREAD_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread ZEPHYR_PERCEPIO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio ZEPHYR_PICOLIBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc ZEPHYR_PSA_ARCH_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests ZEPHYR_SEGGER_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/segger ZEPHYR_TF_M_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests ZEPHYR_TF_PSA_CRYPTO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto ZEPHYR_TRUSTED_FIRMWARE_A_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a ZEPHYR_TRUSTED_FIRMWARE_M_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m ZEPHYR_UOSCORE_UEDHOC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc ZEPHYR_ZCBOR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor ZEPHYR_NRF_HW_MODELS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models KERNELVERSION=0x4046300 APPVERSION=2.4.0 APP_VERSION_EXTENDED_STRING=2.4.0+0 APP_VERSION_TWEAK_STRING=2.4.0+0 APP_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr CONFIG_=CONFIG_ KCONFIG_CONFIG=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/.config KCONFIG_BOARD_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards BOARD=nucleo_g431rb BOARD_REVISION= BOARD_QUALIFIERS=stm32g431xx HWM_SCHEME=v2 KCONFIG_BINARY_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig APPLICATION_SOURCE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr ZEPHYR_TOOLCHAIN_VARIANT=zephyr TOOLCHAIN_VARIANT_COMPILER=gnu TOOLCHAIN_KCONFIG_DIR=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/cmake/zephyr TOOLCHAIN_HAS_NEWLIB=n TOOLCHAIN_HAS_PICOLIBC=y TOOLCHAIN_HAS_GLIBCXX=y TOOLCHAIN_HAS_LIBCXX=n EDT_PICKLE=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/edt.pickle ZEPHYR_ACPICA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/acpica/Kconfig ZEPHYR_CMSIS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis/Kconfig ZEPHYR_CMSIS_DSP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-dsp/Kconfig ZEPHYR_CMSIS_NN_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-nn/Kconfig ZEPHYR_CMSIS_6_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/Kconfig ZEPHYR_DHARA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/dhara/Kconfig ZEPHYR_FATFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/fatfs/Kconfig ZEPHYR_HAL_AFBR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_afbr/Kconfig ZEPHYR_HAL_AMBIQ_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ambiq/Kconfig ZEPHYR_HAL_BOUFFALOLAB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_bouffalolab/Kconfig ZEPHYR_HAL_ESPRESSIF_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_espressif/Kconfig ZEPHYR_HAL_ETHOS_U_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ethos_u/Kconfig ZEPHYR_HAL_GIGADEVICE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_gigadevice/Kconfig ZEPHYR_HAL_INFINEON_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_infineon/Kconfig ZEPHYR_HAL_NORDIC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nordic/Kconfig ZEPHYR_HAL_NXP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nxp/Kconfig ZEPHYR_HAL_REALTEK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_realtek/Kconfig ZEPHYR_HAL_RPI_PICO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_rpi_pico/Kconfig ZEPHYR_HAL_SIFLI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_sifli/Kconfig ZEPHYR_HAL_SILABS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_silabs/Kconfig ZEPHYR_HAL_ST_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_st/Kconfig ZEPHYR_HAL_TDK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_tdk/Kconfig ZEPHYR_HAL_WCH_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_wch/Kconfig ZEPHYR_HOSTAP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hostap/Kconfig ZEPHYR_LIBLC3_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/liblc3/Kconfig ZEPHYR_LIBSBC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/libsbc/Kconfig ZEPHYR_LITTLEFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/littlefs/Kconfig ZEPHYR_LORA_BASICS_MODEM_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lora-basics-modem/Kconfig ZEPHYR_LORAMAC_NODE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/loramac-node/Kconfig ZEPHYR_LVGL_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lvgl/Kconfig ZEPHYR_MBEDTLS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/mbedtls/Kconfig ZEPHYR_NANOPB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nanopb/Kconfig ZEPHYR_NRF_WIFI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nrf_wifi/Kconfig ZEPHYR_OPENTHREAD_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/openthread/Kconfig ZEPHYR_PERCEPIO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/percepio/Kconfig ZEPHYR_SEGGER_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/segger/Kconfig ZEPHYR_TRUSTED_FIRMWARE_A_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-a/Kconfig ZEPHYR_TRUSTED_FIRMWARE_M_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-m/Kconfig ZEPHYR_UOSCORE_UEDHOC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/uoscore-uedhoc/Kconfig ZEPHYR_ZCBOR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/zcbor/Kconfig ARCH=* ARCH_DIR=/home/jeremy/utat-dev/zephyrproject/zephyr/arch SHIELD_AS_LIST='' DTS_POST_CPP=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre DTS_ROOT_BINDINGS=/home/jeremy/utat-dev/zephyrproject/zephyr/dts/bindings /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/kconfig/guiconfig.py /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig + pool = console + + +############################################# +# Custom command for CMakeFiles/hardenconfig + +build CMakeFiles/hardenconfig | ${cmake_ninja_workdir}CMakeFiles/hardenconfig: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kconfig && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E env ZEPHYR_BASE=/home/jeremy/utat-dev/zephyrproject/zephyr PYTHON_EXECUTABLE=/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 srctree=/home/jeremy/utat-dev/zephyrproject/zephyr ZEPHYR_ACPICA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica ZEPHYR_CMSIS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis ZEPHYR_CMSIS_DSP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp ZEPHYR_CMSIS_NN_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn ZEPHYR_CMSIS_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6 ZEPHYR_DHARA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara ZEPHYR_FATFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs ZEPHYR_ADI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/adi ZEPHYR_HAL_AFBR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr ZEPHYR_HAL_AMBIQ_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq ZEPHYR_ATMEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel ZEPHYR_HAL_BOUFFALOLAB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab ZEPHYR_HAL_ESPRESSIF_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif ZEPHYR_HAL_ETHOS_U_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u ZEPHYR_HAL_GIGADEVICE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice ZEPHYR_HAL_INFINEON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon ZEPHYR_HAL_INTEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/intel ZEPHYR_MICROCHIP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip ZEPHYR_HAL_NORDIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic ZEPHYR_NUVOTON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton ZEPHYR_HAL_NXP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp ZEPHYR_OPENISA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa ZEPHYR_QUICKLOGIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic ZEPHYR_HAL_REALTEK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek ZEPHYR_HAL_RENESAS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas ZEPHYR_HAL_RPI_PICO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico ZEPHYR_HAL_SIFLI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli ZEPHYR_HAL_SILABS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs ZEPHYR_HAL_ST_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/st ZEPHYR_HAL_STM32_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32 ZEPHYR_HAL_TDK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk ZEPHYR_HAL_TELINK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/telink ZEPHYR_TI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ti ZEPHYR_HAL_WCH_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wch ZEPHYR_HAL_WURTHELEKTRONIK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik ZEPHYR_XTENSA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa ZEPHYR_HOSTAP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap ZEPHYR_LIBLC3_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3 ZEPHYR_LIBMCTP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp ZEPHYR_LIBMETAL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal ZEPHYR_LIBSBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc ZEPHYR_LITTLEFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs ZEPHYR_LORA_BASICS_MODEM_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem ZEPHYR_LORAMAC_NODE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node ZEPHYR_LVGL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl ZEPHYR_MBEDTLS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls ZEPHYR_MBEDTLS_3_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6 ZEPHYR_MCUBOOT_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot ZEPHYR_MIPI_SYS_T_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t ZEPHYR_MLDSA_NATIVE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native ZEPHYR_NANOPB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb ZEPHYR_NRF_WIFI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi ZEPHYR_OPEN_AMP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp ZEPHYR_OPENTHREAD_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread ZEPHYR_PERCEPIO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio ZEPHYR_PICOLIBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc ZEPHYR_PSA_ARCH_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests ZEPHYR_SEGGER_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/segger ZEPHYR_TF_M_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests ZEPHYR_TF_PSA_CRYPTO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto ZEPHYR_TRUSTED_FIRMWARE_A_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a ZEPHYR_TRUSTED_FIRMWARE_M_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m ZEPHYR_UOSCORE_UEDHOC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc ZEPHYR_ZCBOR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor ZEPHYR_NRF_HW_MODELS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models KERNELVERSION=0x4046300 APPVERSION=2.4.0 APP_VERSION_EXTENDED_STRING=2.4.0+0 APP_VERSION_TWEAK_STRING=2.4.0+0 APP_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr CONFIG_=CONFIG_ KCONFIG_CONFIG=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/.config KCONFIG_BOARD_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards BOARD=nucleo_g431rb BOARD_REVISION= BOARD_QUALIFIERS=stm32g431xx HWM_SCHEME=v2 KCONFIG_BINARY_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig APPLICATION_SOURCE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr ZEPHYR_TOOLCHAIN_VARIANT=zephyr TOOLCHAIN_VARIANT_COMPILER=gnu TOOLCHAIN_KCONFIG_DIR=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/cmake/zephyr TOOLCHAIN_HAS_NEWLIB=n TOOLCHAIN_HAS_PICOLIBC=y TOOLCHAIN_HAS_GLIBCXX=y TOOLCHAIN_HAS_LIBCXX=n EDT_PICKLE=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/edt.pickle ZEPHYR_ACPICA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/acpica/Kconfig ZEPHYR_CMSIS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis/Kconfig ZEPHYR_CMSIS_DSP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-dsp/Kconfig ZEPHYR_CMSIS_NN_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-nn/Kconfig ZEPHYR_CMSIS_6_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/Kconfig ZEPHYR_DHARA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/dhara/Kconfig ZEPHYR_FATFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/fatfs/Kconfig ZEPHYR_HAL_AFBR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_afbr/Kconfig ZEPHYR_HAL_AMBIQ_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ambiq/Kconfig ZEPHYR_HAL_BOUFFALOLAB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_bouffalolab/Kconfig ZEPHYR_HAL_ESPRESSIF_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_espressif/Kconfig ZEPHYR_HAL_ETHOS_U_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ethos_u/Kconfig ZEPHYR_HAL_GIGADEVICE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_gigadevice/Kconfig ZEPHYR_HAL_INFINEON_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_infineon/Kconfig ZEPHYR_HAL_NORDIC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nordic/Kconfig ZEPHYR_HAL_NXP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nxp/Kconfig ZEPHYR_HAL_REALTEK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_realtek/Kconfig ZEPHYR_HAL_RPI_PICO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_rpi_pico/Kconfig ZEPHYR_HAL_SIFLI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_sifli/Kconfig ZEPHYR_HAL_SILABS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_silabs/Kconfig ZEPHYR_HAL_ST_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_st/Kconfig ZEPHYR_HAL_TDK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_tdk/Kconfig ZEPHYR_HAL_WCH_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_wch/Kconfig ZEPHYR_HOSTAP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hostap/Kconfig ZEPHYR_LIBLC3_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/liblc3/Kconfig ZEPHYR_LIBSBC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/libsbc/Kconfig ZEPHYR_LITTLEFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/littlefs/Kconfig ZEPHYR_LORA_BASICS_MODEM_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lora-basics-modem/Kconfig ZEPHYR_LORAMAC_NODE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/loramac-node/Kconfig ZEPHYR_LVGL_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lvgl/Kconfig ZEPHYR_MBEDTLS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/mbedtls/Kconfig ZEPHYR_NANOPB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nanopb/Kconfig ZEPHYR_NRF_WIFI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nrf_wifi/Kconfig ZEPHYR_OPENTHREAD_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/openthread/Kconfig ZEPHYR_PERCEPIO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/percepio/Kconfig ZEPHYR_SEGGER_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/segger/Kconfig ZEPHYR_TRUSTED_FIRMWARE_A_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-a/Kconfig ZEPHYR_TRUSTED_FIRMWARE_M_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-m/Kconfig ZEPHYR_UOSCORE_UEDHOC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/uoscore-uedhoc/Kconfig ZEPHYR_ZCBOR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/zcbor/Kconfig ARCH=* ARCH_DIR=/home/jeremy/utat-dev/zephyrproject/zephyr/arch SHIELD_AS_LIST='' DTS_POST_CPP=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre DTS_ROOT_BINDINGS=/home/jeremy/utat-dev/zephyrproject/zephyr/dts/bindings /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/kconfig/hardenconfig.py /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig + pool = console + + +############################################# +# Custom command for CMakeFiles/traceconfig + +build CMakeFiles/traceconfig | ${cmake_ninja_workdir}CMakeFiles/traceconfig: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kconfig && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E env ZEPHYR_BASE=/home/jeremy/utat-dev/zephyrproject/zephyr PYTHON_EXECUTABLE=/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 srctree=/home/jeremy/utat-dev/zephyrproject/zephyr ZEPHYR_ACPICA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica ZEPHYR_CMSIS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis ZEPHYR_CMSIS_DSP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp ZEPHYR_CMSIS_NN_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn ZEPHYR_CMSIS_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6 ZEPHYR_DHARA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara ZEPHYR_FATFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs ZEPHYR_ADI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/adi ZEPHYR_HAL_AFBR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr ZEPHYR_HAL_AMBIQ_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq ZEPHYR_ATMEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel ZEPHYR_HAL_BOUFFALOLAB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab ZEPHYR_HAL_ESPRESSIF_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif ZEPHYR_HAL_ETHOS_U_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u ZEPHYR_HAL_GIGADEVICE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice ZEPHYR_HAL_INFINEON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon ZEPHYR_HAL_INTEL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/intel ZEPHYR_MICROCHIP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip ZEPHYR_HAL_NORDIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic ZEPHYR_NUVOTON_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton ZEPHYR_HAL_NXP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp ZEPHYR_OPENISA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa ZEPHYR_QUICKLOGIC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic ZEPHYR_HAL_REALTEK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek ZEPHYR_HAL_RENESAS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas ZEPHYR_HAL_RPI_PICO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico ZEPHYR_HAL_SIFLI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli ZEPHYR_HAL_SILABS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs ZEPHYR_HAL_ST_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/st ZEPHYR_HAL_STM32_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32 ZEPHYR_HAL_TDK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk ZEPHYR_HAL_TELINK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/telink ZEPHYR_TI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/ti ZEPHYR_HAL_WCH_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wch ZEPHYR_HAL_WURTHELEKTRONIK_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik ZEPHYR_XTENSA_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa ZEPHYR_HOSTAP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap ZEPHYR_LIBLC3_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3 ZEPHYR_LIBMCTP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp ZEPHYR_LIBMETAL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal ZEPHYR_LIBSBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc ZEPHYR_LITTLEFS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs ZEPHYR_LORA_BASICS_MODEM_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem ZEPHYR_LORAMAC_NODE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node ZEPHYR_LVGL_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl ZEPHYR_MBEDTLS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls ZEPHYR_MBEDTLS_3_6_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6 ZEPHYR_MCUBOOT_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot ZEPHYR_MIPI_SYS_T_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t ZEPHYR_MLDSA_NATIVE_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native ZEPHYR_NANOPB_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb ZEPHYR_NRF_WIFI_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi ZEPHYR_OPEN_AMP_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp ZEPHYR_OPENTHREAD_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread ZEPHYR_PERCEPIO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio ZEPHYR_PICOLIBC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc ZEPHYR_PSA_ARCH_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests ZEPHYR_SEGGER_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/debug/segger ZEPHYR_TF_M_TESTS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests ZEPHYR_TF_PSA_CRYPTO_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto ZEPHYR_TRUSTED_FIRMWARE_A_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a ZEPHYR_TRUSTED_FIRMWARE_M_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m ZEPHYR_UOSCORE_UEDHOC_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc ZEPHYR_ZCBOR_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor ZEPHYR_NRF_HW_MODELS_MODULE_DIR=/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models KERNELVERSION=0x4046300 APPVERSION=2.4.0 APP_VERSION_EXTENDED_STRING=2.4.0+0 APP_VERSION_TWEAK_STRING=2.4.0+0 APP_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr CONFIG_=CONFIG_ KCONFIG_CONFIG=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/.config KCONFIG_BOARD_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards BOARD=nucleo_g431rb BOARD_REVISION= BOARD_QUALIFIERS=stm32g431xx HWM_SCHEME=v2 KCONFIG_BINARY_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig APPLICATION_SOURCE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr ZEPHYR_TOOLCHAIN_VARIANT=zephyr TOOLCHAIN_VARIANT_COMPILER=gnu TOOLCHAIN_KCONFIG_DIR=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/cmake/zephyr TOOLCHAIN_HAS_NEWLIB=n TOOLCHAIN_HAS_PICOLIBC=y TOOLCHAIN_HAS_GLIBCXX=y TOOLCHAIN_HAS_LIBCXX=n EDT_PICKLE=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/edt.pickle ZEPHYR_ACPICA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/acpica/Kconfig ZEPHYR_CMSIS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis/Kconfig ZEPHYR_CMSIS_DSP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-dsp/Kconfig ZEPHYR_CMSIS_NN_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis-nn/Kconfig ZEPHYR_CMSIS_6_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/Kconfig ZEPHYR_DHARA_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/dhara/Kconfig ZEPHYR_FATFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/fatfs/Kconfig ZEPHYR_HAL_AFBR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_afbr/Kconfig ZEPHYR_HAL_AMBIQ_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ambiq/Kconfig ZEPHYR_HAL_BOUFFALOLAB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_bouffalolab/Kconfig ZEPHYR_HAL_ESPRESSIF_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_espressif/Kconfig ZEPHYR_HAL_ETHOS_U_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ethos_u/Kconfig ZEPHYR_HAL_GIGADEVICE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_gigadevice/Kconfig ZEPHYR_HAL_INFINEON_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_infineon/Kconfig ZEPHYR_HAL_NORDIC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nordic/Kconfig ZEPHYR_HAL_NXP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nxp/Kconfig ZEPHYR_HAL_REALTEK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_realtek/Kconfig ZEPHYR_HAL_RPI_PICO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_rpi_pico/Kconfig ZEPHYR_HAL_SIFLI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_sifli/Kconfig ZEPHYR_HAL_SILABS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_silabs/Kconfig ZEPHYR_HAL_ST_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_st/Kconfig ZEPHYR_HAL_TDK_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_tdk/Kconfig ZEPHYR_HAL_WCH_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_wch/Kconfig ZEPHYR_HOSTAP_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/hostap/Kconfig ZEPHYR_LIBLC3_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/liblc3/Kconfig ZEPHYR_LIBSBC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/libsbc/Kconfig ZEPHYR_LITTLEFS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/littlefs/Kconfig ZEPHYR_LORA_BASICS_MODEM_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lora-basics-modem/Kconfig ZEPHYR_LORAMAC_NODE_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/loramac-node/Kconfig ZEPHYR_LVGL_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/lvgl/Kconfig ZEPHYR_MBEDTLS_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/mbedtls/Kconfig ZEPHYR_NANOPB_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nanopb/Kconfig ZEPHYR_NRF_WIFI_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/nrf_wifi/Kconfig ZEPHYR_OPENTHREAD_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/openthread/Kconfig ZEPHYR_PERCEPIO_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/percepio/Kconfig ZEPHYR_SEGGER_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/segger/Kconfig ZEPHYR_TRUSTED_FIRMWARE_A_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-a/Kconfig ZEPHYR_TRUSTED_FIRMWARE_M_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/trusted-firmware-m/Kconfig ZEPHYR_UOSCORE_UEDHOC_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/uoscore-uedhoc/Kconfig ZEPHYR_ZCBOR_KCONFIG=/home/jeremy/utat-dev/zephyrproject/zephyr/modules/zcbor/Kconfig ARCH=* ARCH_DIR=/home/jeremy/utat-dev/zephyrproject/zephyr/arch SHIELD_AS_LIST='' DTS_POST_CPP=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre DTS_ROOT_BINDINGS=/home/jeremy/utat-dev/zephyrproject/zephyr/dts/bindings /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/kconfig/traceconfig.py /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/.config /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kconfig-trace.md /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig + pool = console + + +############################################# +# Phony custom command for CMakeFiles/config-twister + +build CMakeFiles/config-twister | ${cmake_ninja_workdir}CMakeFiles/config-twister: phony zephyr/.config + + +############################################# +# Custom command for CMakeFiles/pristine + +build CMakeFiles/pristine | ${cmake_ninja_workdir}CMakeFiles/pristine: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -DBINARY_DIR=/home/jeremy/utat-dev/zephyrproject/build/mcuboot -DSOURCE_DIR=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -P /home/jeremy/utat-dev/zephyrproject/zephyr/cmake/pristine.cmake + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/cmake/modules/kernel.cmake +# ============================================================================= + +# ============================================================================= +# Object build statements for STATIC_LIBRARY target zephyr + + +############################################# +# Order-only phony target for zephyr + +build cmake_object_order_depends_target_zephyr: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build zephyr/CMakeFiles/zephyr.dir/lib/libc/validate_libc.c.obj: C_COMPILER__zephyr_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/validate_libc.c || cmake_object_order_depends_target_zephyr + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR__=1 + DEP_FILE = zephyr/CMakeFiles/zephyr.dir/lib/libc/validate_libc.c.obj.d + FLAGS = -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/arm-zephyr-eabi -imacros /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr=CMAKE_SOURCE_DIR -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections -specs=picolibc.specs -std=c17 + INCLUDES = -I/home/jeremy/utat-dev/zephyrproject/zephyr/kernel/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arm/include 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zephyr/misc/generated/syscalls_links/include_zephyr_cleanup zephyr/misc/generated/syscalls_links/include_zephyr_console zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq zephyr/misc/generated/syscalls_links/include_zephyr_crypto zephyr/misc/generated/syscalls_links/include_zephyr_dap zephyr/misc/generated/syscalls_links/include_zephyr_data zephyr/misc/generated/syscalls_links/include_zephyr_debug zephyr/misc/generated/syscalls_links/include_zephyr_devicetree zephyr/misc/generated/syscalls_links/include_zephyr_dfu zephyr/misc/generated/syscalls_links/include_zephyr_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers zephyr/misc/generated/syscalls_links/include_zephyr_dsp zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings zephyr/misc/generated/syscalls_links/include_zephyr_fs zephyr/misc/generated/syscalls_links/include_zephyr_gnss zephyr/misc/generated/syscalls_links/include_zephyr_input zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation zephyr/misc/generated/syscalls_links/include_zephyr_internal zephyr/misc/generated/syscalls_links/include_zephyr_ipc zephyr/misc/generated/syscalls_links/include_zephyr_kernel zephyr/misc/generated/syscalls_links/include_zephyr_kvss zephyr/misc/generated/syscalls_links/include_zephyr_linker zephyr/misc/generated/syscalls_links/include_zephyr_llext zephyr/misc/generated/syscalls_links/include_zephyr_logging zephyr/misc/generated/syscalls_links/include_zephyr_lorawan zephyr/misc/generated/syscalls_links/include_zephyr_math zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_misc zephyr/misc/generated/syscalls_links/include_zephyr_modbus zephyr/misc/generated/syscalls_links/include_zephyr_modem zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap zephyr/misc/generated/syscalls_links/include_zephyr_net zephyr/misc/generated/syscalls_links/include_zephyr_platform zephyr/misc/generated/syscalls_links/include_zephyr_pm zephyr/misc/generated/syscalls_links/include_zephyr_pmci zephyr/misc/generated/syscalls_links/include_zephyr_portability zephyr/misc/generated/syscalls_links/include_zephyr_posix zephyr/misc/generated/syscalls_links/include_zephyr_psa zephyr/misc/generated/syscalls_links/include_zephyr_random zephyr/misc/generated/syscalls_links/include_zephyr_retention zephyr/misc/generated/syscalls_links/include_zephyr_rtio zephyr/misc/generated/syscalls_links/include_zephyr_sd zephyr/misc/generated/syscalls_links/include_zephyr_sensing zephyr/misc/generated/syscalls_links/include_zephyr_settings zephyr/misc/generated/syscalls_links/include_zephyr_shell zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_stats zephyr/misc/generated/syscalls_links/include_zephyr_storage zephyr/misc/generated/syscalls_links/include_zephyr_sys zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt zephyr/misc/generated/syscalls_links/include_zephyr_timing zephyr/misc/generated/syscalls_links/include_zephyr_toolchain zephyr/misc/generated/syscalls_links/include_zephyr_tracing zephyr/misc/generated/syscalls_links/include_zephyr_usb zephyr/misc/generated/syscalls_links/include_zephyr_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_video zephyr/misc/generated/syscalls_links/include_zephyr_xen zephyr/misc/generated/syscalls_links/include_zephyr_zbus zephyr/misc/generated/syscalls_links/include_zephyr_zvfs zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk zephyr/misc/generated/syscalls_links/include_zephyr_drivers_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma zephyr/misc/generated/syscalls_links/include_zephyr_drivers_edac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_modem_at zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if zephyr/misc/generated/syscalls_links/include_zephyr_net_http zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa zephyr/misc/generated/syscalls_links/include_zephyr_posix_net zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar zephyr/misc/generated/syscalls_links/include_zephyr_usb_class zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 zephyr/misc/generated/syscalls_links/include_zephyr_xen_public zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent + + +############################################# +# Utility command for driver_validation_h_target + +build zephyr/driver_validation_h_target: phony zephyr/CMakeFiles/driver_validation_h_target zephyr/include/generated/zephyr/driver-validation.h zephyr/misc/generated/syscalls.json zephyr/misc/generated/struct_tags.json zephyr/misc/generated/syscalls_subdirs.trigger zephyr/misc/generated/syscalls_links/include zephyr/misc/generated/syscalls_links/include_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_acpi zephyr/misc/generated/syscalls_links/include_zephyr_app_memory zephyr/misc/generated/syscalls_links/include_zephyr_arch zephyr/misc/generated/syscalls_links/include_zephyr_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_canbus zephyr/misc/generated/syscalls_links/include_zephyr_cleanup zephyr/misc/generated/syscalls_links/include_zephyr_console zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq zephyr/misc/generated/syscalls_links/include_zephyr_crypto zephyr/misc/generated/syscalls_links/include_zephyr_dap zephyr/misc/generated/syscalls_links/include_zephyr_data zephyr/misc/generated/syscalls_links/include_zephyr_debug zephyr/misc/generated/syscalls_links/include_zephyr_devicetree zephyr/misc/generated/syscalls_links/include_zephyr_dfu zephyr/misc/generated/syscalls_links/include_zephyr_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers zephyr/misc/generated/syscalls_links/include_zephyr_dsp zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings zephyr/misc/generated/syscalls_links/include_zephyr_fs zephyr/misc/generated/syscalls_links/include_zephyr_gnss zephyr/misc/generated/syscalls_links/include_zephyr_input zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation zephyr/misc/generated/syscalls_links/include_zephyr_internal zephyr/misc/generated/syscalls_links/include_zephyr_ipc zephyr/misc/generated/syscalls_links/include_zephyr_kernel zephyr/misc/generated/syscalls_links/include_zephyr_kvss zephyr/misc/generated/syscalls_links/include_zephyr_linker zephyr/misc/generated/syscalls_links/include_zephyr_llext zephyr/misc/generated/syscalls_links/include_zephyr_logging zephyr/misc/generated/syscalls_links/include_zephyr_lorawan zephyr/misc/generated/syscalls_links/include_zephyr_math zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_misc zephyr/misc/generated/syscalls_links/include_zephyr_modbus zephyr/misc/generated/syscalls_links/include_zephyr_modem zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap zephyr/misc/generated/syscalls_links/include_zephyr_net zephyr/misc/generated/syscalls_links/include_zephyr_platform zephyr/misc/generated/syscalls_links/include_zephyr_pm zephyr/misc/generated/syscalls_links/include_zephyr_pmci zephyr/misc/generated/syscalls_links/include_zephyr_portability zephyr/misc/generated/syscalls_links/include_zephyr_posix zephyr/misc/generated/syscalls_links/include_zephyr_psa zephyr/misc/generated/syscalls_links/include_zephyr_random zephyr/misc/generated/syscalls_links/include_zephyr_retention zephyr/misc/generated/syscalls_links/include_zephyr_rtio zephyr/misc/generated/syscalls_links/include_zephyr_sd zephyr/misc/generated/syscalls_links/include_zephyr_sensing zephyr/misc/generated/syscalls_links/include_zephyr_settings zephyr/misc/generated/syscalls_links/include_zephyr_shell zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_stats zephyr/misc/generated/syscalls_links/include_zephyr_storage zephyr/misc/generated/syscalls_links/include_zephyr_sys zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt zephyr/misc/generated/syscalls_links/include_zephyr_timing zephyr/misc/generated/syscalls_links/include_zephyr_toolchain zephyr/misc/generated/syscalls_links/include_zephyr_tracing zephyr/misc/generated/syscalls_links/include_zephyr_usb zephyr/misc/generated/syscalls_links/include_zephyr_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_video zephyr/misc/generated/syscalls_links/include_zephyr_xen zephyr/misc/generated/syscalls_links/include_zephyr_zbus zephyr/misc/generated/syscalls_links/include_zephyr_zvfs zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk zephyr/misc/generated/syscalls_links/include_zephyr_drivers_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma zephyr/misc/generated/syscalls_links/include_zephyr_drivers_edac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_modem_at zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if zephyr/misc/generated/syscalls_links/include_zephyr_net_http zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa zephyr/misc/generated/syscalls_links/include_zephyr_posix_net zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar zephyr/misc/generated/syscalls_links/include_zephyr_usb_class zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 zephyr/misc/generated/syscalls_links/include_zephyr_xen_public zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent + + +############################################# +# Utility command for kobj_types_h_target + +build zephyr/kobj_types_h_target: phony zephyr/CMakeFiles/kobj_types_h_target zephyr/include/generated/zephyr/kobj-types-enum.h zephyr/include/generated/zephyr/otype-to-str.h zephyr/include/generated/zephyr/otype-to-size.h zephyr/misc/generated/syscalls.json zephyr/misc/generated/struct_tags.json zephyr/misc/generated/syscalls_subdirs.trigger zephyr/misc/generated/syscalls_links/include zephyr/misc/generated/syscalls_links/include_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_acpi zephyr/misc/generated/syscalls_links/include_zephyr_app_memory zephyr/misc/generated/syscalls_links/include_zephyr_arch zephyr/misc/generated/syscalls_links/include_zephyr_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_canbus zephyr/misc/generated/syscalls_links/include_zephyr_cleanup zephyr/misc/generated/syscalls_links/include_zephyr_console zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq zephyr/misc/generated/syscalls_links/include_zephyr_crypto zephyr/misc/generated/syscalls_links/include_zephyr_dap zephyr/misc/generated/syscalls_links/include_zephyr_data zephyr/misc/generated/syscalls_links/include_zephyr_debug zephyr/misc/generated/syscalls_links/include_zephyr_devicetree zephyr/misc/generated/syscalls_links/include_zephyr_dfu zephyr/misc/generated/syscalls_links/include_zephyr_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers zephyr/misc/generated/syscalls_links/include_zephyr_dsp zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings zephyr/misc/generated/syscalls_links/include_zephyr_fs zephyr/misc/generated/syscalls_links/include_zephyr_gnss zephyr/misc/generated/syscalls_links/include_zephyr_input zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation zephyr/misc/generated/syscalls_links/include_zephyr_internal zephyr/misc/generated/syscalls_links/include_zephyr_ipc zephyr/misc/generated/syscalls_links/include_zephyr_kernel zephyr/misc/generated/syscalls_links/include_zephyr_kvss zephyr/misc/generated/syscalls_links/include_zephyr_linker zephyr/misc/generated/syscalls_links/include_zephyr_llext zephyr/misc/generated/syscalls_links/include_zephyr_logging zephyr/misc/generated/syscalls_links/include_zephyr_lorawan zephyr/misc/generated/syscalls_links/include_zephyr_math zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_misc zephyr/misc/generated/syscalls_links/include_zephyr_modbus zephyr/misc/generated/syscalls_links/include_zephyr_modem zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap zephyr/misc/generated/syscalls_links/include_zephyr_net zephyr/misc/generated/syscalls_links/include_zephyr_platform zephyr/misc/generated/syscalls_links/include_zephyr_pm zephyr/misc/generated/syscalls_links/include_zephyr_pmci zephyr/misc/generated/syscalls_links/include_zephyr_portability zephyr/misc/generated/syscalls_links/include_zephyr_posix zephyr/misc/generated/syscalls_links/include_zephyr_psa zephyr/misc/generated/syscalls_links/include_zephyr_random zephyr/misc/generated/syscalls_links/include_zephyr_retention zephyr/misc/generated/syscalls_links/include_zephyr_rtio zephyr/misc/generated/syscalls_links/include_zephyr_sd zephyr/misc/generated/syscalls_links/include_zephyr_sensing zephyr/misc/generated/syscalls_links/include_zephyr_settings zephyr/misc/generated/syscalls_links/include_zephyr_shell zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_stats zephyr/misc/generated/syscalls_links/include_zephyr_storage zephyr/misc/generated/syscalls_links/include_zephyr_sys zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt zephyr/misc/generated/syscalls_links/include_zephyr_timing zephyr/misc/generated/syscalls_links/include_zephyr_toolchain zephyr/misc/generated/syscalls_links/include_zephyr_tracing zephyr/misc/generated/syscalls_links/include_zephyr_usb zephyr/misc/generated/syscalls_links/include_zephyr_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_video zephyr/misc/generated/syscalls_links/include_zephyr_xen zephyr/misc/generated/syscalls_links/include_zephyr_zbus zephyr/misc/generated/syscalls_links/include_zephyr_zvfs zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk zephyr/misc/generated/syscalls_links/include_zephyr_drivers_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma zephyr/misc/generated/syscalls_links/include_zephyr_drivers_edac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_modem_at zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if zephyr/misc/generated/syscalls_links/include_zephyr_net_http zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa zephyr/misc/generated/syscalls_links/include_zephyr_posix_net zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar zephyr/misc/generated/syscalls_links/include_zephyr_usb_class zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 zephyr/misc/generated/syscalls_links/include_zephyr_xen_public zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent + + +############################################# +# Utility command for device_api_ld_target + +build zephyr/device_api_ld_target: phony zephyr/CMakeFiles/device_api_ld_target zephyr/include/generated/device-api-sections.ld zephyr/include/generated/device-api-sections.cmake zephyr/misc/generated/syscalls.json zephyr/misc/generated/struct_tags.json zephyr/misc/generated/syscalls_subdirs.trigger zephyr/misc/generated/syscalls_links/include zephyr/misc/generated/syscalls_links/include_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_acpi zephyr/misc/generated/syscalls_links/include_zephyr_app_memory zephyr/misc/generated/syscalls_links/include_zephyr_arch zephyr/misc/generated/syscalls_links/include_zephyr_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_canbus zephyr/misc/generated/syscalls_links/include_zephyr_cleanup zephyr/misc/generated/syscalls_links/include_zephyr_console zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq zephyr/misc/generated/syscalls_links/include_zephyr_crypto zephyr/misc/generated/syscalls_links/include_zephyr_dap zephyr/misc/generated/syscalls_links/include_zephyr_data zephyr/misc/generated/syscalls_links/include_zephyr_debug zephyr/misc/generated/syscalls_links/include_zephyr_devicetree zephyr/misc/generated/syscalls_links/include_zephyr_dfu zephyr/misc/generated/syscalls_links/include_zephyr_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers zephyr/misc/generated/syscalls_links/include_zephyr_dsp zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings zephyr/misc/generated/syscalls_links/include_zephyr_fs zephyr/misc/generated/syscalls_links/include_zephyr_gnss zephyr/misc/generated/syscalls_links/include_zephyr_input zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation zephyr/misc/generated/syscalls_links/include_zephyr_internal zephyr/misc/generated/syscalls_links/include_zephyr_ipc zephyr/misc/generated/syscalls_links/include_zephyr_kernel zephyr/misc/generated/syscalls_links/include_zephyr_kvss zephyr/misc/generated/syscalls_links/include_zephyr_linker zephyr/misc/generated/syscalls_links/include_zephyr_llext zephyr/misc/generated/syscalls_links/include_zephyr_logging zephyr/misc/generated/syscalls_links/include_zephyr_lorawan zephyr/misc/generated/syscalls_links/include_zephyr_math zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_misc zephyr/misc/generated/syscalls_links/include_zephyr_modbus zephyr/misc/generated/syscalls_links/include_zephyr_modem zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap zephyr/misc/generated/syscalls_links/include_zephyr_net zephyr/misc/generated/syscalls_links/include_zephyr_platform zephyr/misc/generated/syscalls_links/include_zephyr_pm zephyr/misc/generated/syscalls_links/include_zephyr_pmci zephyr/misc/generated/syscalls_links/include_zephyr_portability zephyr/misc/generated/syscalls_links/include_zephyr_posix zephyr/misc/generated/syscalls_links/include_zephyr_psa zephyr/misc/generated/syscalls_links/include_zephyr_random zephyr/misc/generated/syscalls_links/include_zephyr_retention zephyr/misc/generated/syscalls_links/include_zephyr_rtio zephyr/misc/generated/syscalls_links/include_zephyr_sd zephyr/misc/generated/syscalls_links/include_zephyr_sensing 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zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar zephyr/misc/generated/syscalls_links/include_zephyr_usb_class zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 zephyr/misc/generated/syscalls_links/include_zephyr_xen_public zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent + +# ============================================================================= +# Object build statements for OBJECT_LIBRARY target offsets + + +############################################# +# Order-only phony target for offsets + +build cmake_object_order_depends_target_offsets: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/syscall_list_h_target + +build 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/home/jeremy/utat-dev/zephyrproject/zephyr/.git/index + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -DZEPHYR_BASE=/home/jeremy/utat-dev/zephyrproject/zephyr -DOUT_FILE=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/app_version.h -DVERSION_TYPE=APP -DVERSION_FILE=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/VERSION -DAPP_VERSION_CUSTOMIZATION="" -P /home/jeremy/utat-dev/zephyrproject/zephyr/cmake/gen_version_h.cmake + DESC = Generating include/generated/zephyr/app_version.h + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/syscall_list_h_target + +build zephyr/CMakeFiles/syscall_list_h_target | ${cmake_ninja_workdir}zephyr/CMakeFiles/syscall_list_h_target: phony zephyr/include/generated/zephyr/syscall_list.h + + +############################################# +# Custom command for zephyr/include/generated/zephyr/syscall_dispatch.c + +build zephyr/include/generated/zephyr/syscall_dispatch.c zephyr/include/generated/zephyr/syscall_exports_llext.c zephyr/syscall_weakdefs_llext.c zephyr/include/generated/zephyr/syscall_list.h | ${cmake_ninja_workdir}zephyr/include/generated/zephyr/syscall_dispatch.c ${cmake_ninja_workdir}zephyr/include/generated/zephyr/syscall_exports_llext.c ${cmake_ninja_workdir}zephyr/syscall_weakdefs_llext.c ${cmake_ninja_workdir}zephyr/include/generated/zephyr/syscall_list.h: CUSTOM_COMMAND zephyr/misc/generated/syscalls.json + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_syscalls.py --json-file /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls.json --base-output include/generated/zephyr/syscalls --syscall-dispatch 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/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/usb_c/usbc.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/video/video.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/console.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/dmop.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/dom0/domctl.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/dom0/sysctl.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/events.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/generic.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/gnttab.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/hvm.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/memory.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/arch-arm.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/domctl.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/event_channel.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/grant_table.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/hvm/dm_op.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/hvm/hvm_op.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/hvm/ioreq.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/hvm/params.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/io/console.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/memory.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/sched.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/sysctl.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/version.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/public/xen.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/regions.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/xen/version.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/zbus/proxy_agent/zbus_proxy_agent.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/zbus/proxy_agent/zbus_proxy_agent_ipc.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/zbus/zbus.h /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/zvfs/eventfd.h zephyr/misc/generated/syscalls_file_list.txt + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/parse_syscalls.py --scan /home/jeremy/utat-dev/zephyrproject/zephyr/include --scan /home/jeremy/utat-dev/zephyrproject/zephyr/drivers --scan /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/net --json-file /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls.json --tag-struct-file /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json --file-list /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt + DESC = Generating misc/generated/syscalls.json, misc/generated/struct_tags.json + restat = 1 + + +############################################# +# Custom command for zephyr/misc/generated/syscalls_subdirs.trigger + +build zephyr/misc/generated/syscalls_subdirs.trigger | ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_subdirs.trigger: CUSTOM_COMMAND zephyr/misc/generated/syscalls_links/include zephyr/misc/generated/syscalls_links/include_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_acpi zephyr/misc/generated/syscalls_links/include_zephyr_app_memory zephyr/misc/generated/syscalls_links/include_zephyr_arch zephyr/misc/generated/syscalls_links/include_zephyr_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_canbus zephyr/misc/generated/syscalls_links/include_zephyr_cleanup zephyr/misc/generated/syscalls_links/include_zephyr_console zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq zephyr/misc/generated/syscalls_links/include_zephyr_crypto zephyr/misc/generated/syscalls_links/include_zephyr_dap zephyr/misc/generated/syscalls_links/include_zephyr_data zephyr/misc/generated/syscalls_links/include_zephyr_debug zephyr/misc/generated/syscalls_links/include_zephyr_devicetree zephyr/misc/generated/syscalls_links/include_zephyr_dfu zephyr/misc/generated/syscalls_links/include_zephyr_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers zephyr/misc/generated/syscalls_links/include_zephyr_dsp zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings zephyr/misc/generated/syscalls_links/include_zephyr_fs zephyr/misc/generated/syscalls_links/include_zephyr_gnss zephyr/misc/generated/syscalls_links/include_zephyr_input zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation zephyr/misc/generated/syscalls_links/include_zephyr_internal zephyr/misc/generated/syscalls_links/include_zephyr_ipc zephyr/misc/generated/syscalls_links/include_zephyr_kernel zephyr/misc/generated/syscalls_links/include_zephyr_kvss zephyr/misc/generated/syscalls_links/include_zephyr_linker zephyr/misc/generated/syscalls_links/include_zephyr_llext zephyr/misc/generated/syscalls_links/include_zephyr_logging zephyr/misc/generated/syscalls_links/include_zephyr_lorawan zephyr/misc/generated/syscalls_links/include_zephyr_math zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_misc zephyr/misc/generated/syscalls_links/include_zephyr_modbus zephyr/misc/generated/syscalls_links/include_zephyr_modem zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap zephyr/misc/generated/syscalls_links/include_zephyr_net zephyr/misc/generated/syscalls_links/include_zephyr_platform zephyr/misc/generated/syscalls_links/include_zephyr_pm zephyr/misc/generated/syscalls_links/include_zephyr_pmci zephyr/misc/generated/syscalls_links/include_zephyr_portability zephyr/misc/generated/syscalls_links/include_zephyr_posix zephyr/misc/generated/syscalls_links/include_zephyr_psa zephyr/misc/generated/syscalls_links/include_zephyr_random zephyr/misc/generated/syscalls_links/include_zephyr_retention zephyr/misc/generated/syscalls_links/include_zephyr_rtio zephyr/misc/generated/syscalls_links/include_zephyr_sd zephyr/misc/generated/syscalls_links/include_zephyr_sensing zephyr/misc/generated/syscalls_links/include_zephyr_settings zephyr/misc/generated/syscalls_links/include_zephyr_shell zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_stats zephyr/misc/generated/syscalls_links/include_zephyr_storage zephyr/misc/generated/syscalls_links/include_zephyr_sys zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt zephyr/misc/generated/syscalls_links/include_zephyr_timing zephyr/misc/generated/syscalls_links/include_zephyr_toolchain zephyr/misc/generated/syscalls_links/include_zephyr_tracing zephyr/misc/generated/syscalls_links/include_zephyr_usb zephyr/misc/generated/syscalls_links/include_zephyr_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_video zephyr/misc/generated/syscalls_links/include_zephyr_xen zephyr/misc/generated/syscalls_links/include_zephyr_zbus zephyr/misc/generated/syscalls_links/include_zephyr_zvfs zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk zephyr/misc/generated/syscalls_links/include_zephyr_drivers_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma zephyr/misc/generated/syscalls_links/include_zephyr_drivers_edac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_modem_at zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if zephyr/misc/generated/syscalls_links/include_zephyr_net_http zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa zephyr/misc/generated/syscalls_links/include_zephyr_posix_net zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar zephyr/misc/generated/syscalls_links/include_zephyr_usb_class zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 zephyr/misc/generated/syscalls_links/include_zephyr_xen_public zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/subfolder_list.py --directory /home/jeremy/utat-dev/zephyrproject/zephyr/include --out-file /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.txt --trigger-file /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.trigger --create-links /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links + DESC = Generating misc/generated/syscalls_subdirs.trigger + restat = 1 + + +############################################# +# Custom command for zephyr/misc/generated/syscalls_links/include + +build zephyr/misc/generated/syscalls_links/include zephyr/misc/generated/syscalls_links/include_zephyr zephyr/misc/generated/syscalls_links/include_zephyr_acpi zephyr/misc/generated/syscalls_links/include_zephyr_app_memory zephyr/misc/generated/syscalls_links/include_zephyr_arch zephyr/misc/generated/syscalls_links/include_zephyr_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_canbus zephyr/misc/generated/syscalls_links/include_zephyr_cleanup zephyr/misc/generated/syscalls_links/include_zephyr_console zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq zephyr/misc/generated/syscalls_links/include_zephyr_crypto zephyr/misc/generated/syscalls_links/include_zephyr_dap zephyr/misc/generated/syscalls_links/include_zephyr_data zephyr/misc/generated/syscalls_links/include_zephyr_debug zephyr/misc/generated/syscalls_links/include_zephyr_devicetree zephyr/misc/generated/syscalls_links/include_zephyr_dfu zephyr/misc/generated/syscalls_links/include_zephyr_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers zephyr/misc/generated/syscalls_links/include_zephyr_dsp zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings zephyr/misc/generated/syscalls_links/include_zephyr_fs zephyr/misc/generated/syscalls_links/include_zephyr_gnss zephyr/misc/generated/syscalls_links/include_zephyr_input zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation zephyr/misc/generated/syscalls_links/include_zephyr_internal zephyr/misc/generated/syscalls_links/include_zephyr_ipc zephyr/misc/generated/syscalls_links/include_zephyr_kernel zephyr/misc/generated/syscalls_links/include_zephyr_kvss zephyr/misc/generated/syscalls_links/include_zephyr_linker zephyr/misc/generated/syscalls_links/include_zephyr_llext zephyr/misc/generated/syscalls_links/include_zephyr_logging zephyr/misc/generated/syscalls_links/include_zephyr_lorawan zephyr/misc/generated/syscalls_links/include_zephyr_math zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_mgmt zephyr/misc/generated/syscalls_links/include_zephyr_misc zephyr/misc/generated/syscalls_links/include_zephyr_modbus zephyr/misc/generated/syscalls_links/include_zephyr_modem zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap zephyr/misc/generated/syscalls_links/include_zephyr_net zephyr/misc/generated/syscalls_links/include_zephyr_platform zephyr/misc/generated/syscalls_links/include_zephyr_pm zephyr/misc/generated/syscalls_links/include_zephyr_pmci zephyr/misc/generated/syscalls_links/include_zephyr_portability zephyr/misc/generated/syscalls_links/include_zephyr_posix zephyr/misc/generated/syscalls_links/include_zephyr_psa zephyr/misc/generated/syscalls_links/include_zephyr_random zephyr/misc/generated/syscalls_links/include_zephyr_retention zephyr/misc/generated/syscalls_links/include_zephyr_rtio zephyr/misc/generated/syscalls_links/include_zephyr_sd zephyr/misc/generated/syscalls_links/include_zephyr_sensing zephyr/misc/generated/syscalls_links/include_zephyr_settings zephyr/misc/generated/syscalls_links/include_zephyr_shell zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_stats zephyr/misc/generated/syscalls_links/include_zephyr_storage zephyr/misc/generated/syscalls_links/include_zephyr_sys zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt zephyr/misc/generated/syscalls_links/include_zephyr_timing zephyr/misc/generated/syscalls_links/include_zephyr_toolchain zephyr/misc/generated/syscalls_links/include_zephyr_tracing zephyr/misc/generated/syscalls_links/include_zephyr_usb zephyr/misc/generated/syscalls_links/include_zephyr_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_video zephyr/misc/generated/syscalls_links/include_zephyr_xen zephyr/misc/generated/syscalls_links/include_zephyr_zbus zephyr/misc/generated/syscalls_links/include_zephyr_zvfs zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk zephyr/misc/generated/syscalls_links/include_zephyr_drivers_display zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma zephyr/misc/generated/syscalls_links/include_zephyr_drivers_edac zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi 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${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_modem_at ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_net_http ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_posix_net ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_usb_class ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_xen_public ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io ${cmake_ninja_workdir}zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo + DESC = Preparing syscall dependency handling + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/driver_validation_h_target + +build zephyr/CMakeFiles/driver_validation_h_target | ${cmake_ninja_workdir}zephyr/CMakeFiles/driver_validation_h_target: phony zephyr/include/generated/zephyr/driver-validation.h + + +############################################# +# Custom command for zephyr/include/generated/zephyr/driver-validation.h + +build zephyr/include/generated/zephyr/driver-validation.h | ${cmake_ninja_workdir}zephyr/include/generated/zephyr/driver-validation.h: CUSTOM_COMMAND zephyr/misc/generated/struct_tags.json /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_kobject_list.py + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_kobject_list.py --validation-output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/driver-validation.h --include-subsystem-list /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json + DESC = Generating include/generated/zephyr/driver-validation.h + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/kobj_types_h_target + +build zephyr/CMakeFiles/kobj_types_h_target | ${cmake_ninja_workdir}zephyr/CMakeFiles/kobj_types_h_target: phony zephyr/include/generated/zephyr/kobj-types-enum.h zephyr/include/generated/zephyr/otype-to-str.h zephyr/include/generated/zephyr/otype-to-size.h + + +############################################# +# Custom command for zephyr/include/generated/zephyr/kobj-types-enum.h + +build zephyr/include/generated/zephyr/kobj-types-enum.h zephyr/include/generated/zephyr/otype-to-str.h zephyr/include/generated/zephyr/otype-to-size.h | ${cmake_ninja_workdir}zephyr/include/generated/zephyr/kobj-types-enum.h ${cmake_ninja_workdir}zephyr/include/generated/zephyr/otype-to-str.h ${cmake_ninja_workdir}zephyr/include/generated/zephyr/otype-to-size.h: CUSTOM_COMMAND zephyr/misc/generated/struct_tags.json /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_kobject_list.py + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_kobject_list.py --kobj-types-output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/kobj-types-enum.h --kobj-otype-output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-str.h --kobj-size-output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-size.h --include-subsystem-list /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json + DESC = Generating include/generated/zephyr/kobj-types-enum.h, include/generated/zephyr/otype-to-str.h, include/generated/zephyr/otype-to-size.h + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/device_api_ld_target + +build zephyr/CMakeFiles/device_api_ld_target | ${cmake_ninja_workdir}zephyr/CMakeFiles/device_api_ld_target: phony zephyr/include/generated/device-api-sections.ld zephyr/include/generated/device-api-sections.cmake + + +############################################# +# Custom command for zephyr/include/generated/device-api-sections.ld + +build zephyr/include/generated/device-api-sections.ld zephyr/include/generated/device-api-sections.cmake | ${cmake_ninja_workdir}zephyr/include/generated/device-api-sections.ld ${cmake_ninja_workdir}zephyr/include/generated/device-api-sections.cmake: CUSTOM_COMMAND /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_iter_sections.py zephyr/misc/generated/struct_tags.json + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_iter_sections.py --alignment 4 --input /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json --tag __subsystem --ld-output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.ld --cmake-output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.cmake + DESC = Generating include/generated/device-api-sections.ld, include/generated/device-api-sections.cmake + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/offsets_h + +build zephyr/CMakeFiles/offsets_h | ${cmake_ninja_workdir}zephyr/CMakeFiles/offsets_h: phony zephyr/include/generated/zephyr/offsets.h || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/offsets zephyr/syscall_list_h_target + + +############################################# +# Custom command for zephyr/include/generated/zephyr/offsets.h + +build zephyr/include/generated/zephyr/offsets.h | ${cmake_ninja_workdir}zephyr/include/generated/zephyr/offsets.h: CUSTOM_COMMAND zephyr/CMakeFiles/offsets.dir/arch/arm/core/offsets/offsets.c.obj || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/offsets zephyr/syscall_list_h_target + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_offset_header.py -i /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/CMakeFiles/offsets.dir/./arch/arm/core/offsets/offsets.c.obj -o /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/offsets.h + DESC = Generating include/generated/zephyr/offsets.h + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/linker_zephyr_prebuilt_script_target + +build zephyr/CMakeFiles/linker_zephyr_prebuilt_script_target | ${cmake_ninja_workdir}zephyr/CMakeFiles/linker_zephyr_prebuilt_script_target: phony zephyr/linker_zephyr_pre0.cmd || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/offsets zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + + +############################################# +# Custom command for zephyr/linker_zephyr_pre0.cmd + +build zephyr/linker_zephyr_pre0.cmd | ${cmake_ninja_workdir}zephyr/linker_zephyr_pre0.cmd: CUSTOM_COMMAND /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld zephyr/include/generated/zephyr/autoconf.h || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/offsets zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc -x assembler-with-cpp -undef -MD -MF linker_zephyr_pre0.cmd.dep -MT linker_zephyr_pre0.cmd -D_LINKER -D_ASMLANGUAGE -D__GCC_LINKER_CMD__ -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts -DLINKER_ZEPHYR_PREBUILT -E /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld -P -o linker_zephyr_pre0.cmd && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E cmake_transform_depfile Ninja gccdepfile /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr /home/jeremy/utat-dev/zephyrproject/zephyr /home/jeremy/utat-dev/zephyrproject/build/mcuboot /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep /home/jeremy/utat-dev/zephyrproject/build/mcuboot/CMakeFiles/d/f65fa96482619e64145ff7cccdcd4ad647c3e312367665810e55f59c9b90a745.d + DESC = Generating linker_zephyr_pre0.cmd + depfile = CMakeFiles/d/f65fa96482619e64145ff7cccdcd4ad647c3e312367665810e55f59c9b90a745.d + deps = gcc + restat = 1 + + +############################################# +# Phony custom command for zephyr/CMakeFiles/linker_zephyr_final_script_target + +build zephyr/CMakeFiles/linker_zephyr_final_script_target | ${cmake_ninja_workdir}zephyr/CMakeFiles/linker_zephyr_final_script_target: phony zephyr/linker.cmd || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr_pre0.elf + + +############################################# +# Custom command for zephyr/linker.cmd + +build zephyr/linker.cmd | ${cmake_ninja_workdir}zephyr/linker.cmd: CUSTOM_COMMAND /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld zephyr/include/generated/zephyr/autoconf.h zephyr/zephyr_pre0.elf || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc -x assembler-with-cpp -undef -MD -MF linker.cmd.dep -MT linker.cmd -D_LINKER -D_ASMLANGUAGE -D__GCC_LINKER_CMD__ -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts -DLINKER_ZEPHYR_FINAL -E /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld -P -o linker.cmd && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E cmake_transform_depfile Ninja gccdepfile /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr /home/jeremy/utat-dev/zephyrproject/zephyr /home/jeremy/utat-dev/zephyrproject/build/mcuboot /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/linker.cmd.dep /home/jeremy/utat-dev/zephyrproject/build/mcuboot/CMakeFiles/d/fd2111bd4db3733de3b68686c0d4daaf2637cd7693bcd745941303250ff3eb1e.d + DESC = Generating linker.cmd + depfile = CMakeFiles/d/fd2111bd4db3733de3b68686c0d4daaf2637cd7693bcd745941303250ff3eb1e.d + deps = gcc + restat = 1 + + +############################################# +# Custom command for zephyr/isr_tables.c + +build zephyr/isr_tables.c zephyr/isr_tables_vt.ld zephyr/isr_tables_swi.ld | ${cmake_ninja_workdir}zephyr/isr_tables.c ${cmake_ninja_workdir}zephyr/isr_tables_vt.ld ${cmake_ninja_workdir}zephyr/isr_tables_swi.ld: CUSTOM_COMMAND zephyr/zephyr_pre0.elf || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/gen_isr_tables.py --output-source isr_tables.c --linker-output-files isr_tables_vt.ld isr_tables_swi.ld --kernel /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr_pre0.elf --intlist-section .intList --intlist-section intList --sw-isr-table --vector-table + DESC = Generating isr_tables.c, isr_tables_vt.ld, isr_tables_swi.ld + restat = 1 + + +############################################# +# Custom command for zephyr/CMakeFiles/initlevels + +build zephyr/CMakeFiles/initlevels | ${cmake_ninja_workdir}zephyr/CMakeFiles/initlevels: CUSTOM_COMMAND zephyr/zephyr.elf || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/build/check_init_priorities.py --elf-file=/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.elf --initlevels + pool = console + + +############################################# +# Custom command for zephyr/CMakeFiles/run + +build zephyr/CMakeFiles/run | ${cmake_ninja_workdir}zephyr/CMakeFiles/run: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo =================================================== Emulation/Simulation\ not\ supported\ with\ this\ board. =================================================== + + +############################################# +# Phony custom command for zephyr/CMakeFiles/build_info_yaml_saved + +build zephyr/CMakeFiles/build_info_yaml_saved | ${cmake_ninja_workdir}zephyr/CMakeFiles/build_info_yaml_saved: phony build_info.yml + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/arch/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/arch/edit_cache: phony zephyr/arch/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/arch/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/arch/rebuild_cache: phony zephyr/arch/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/arch/CMakeLists.txt +# ============================================================================= + +# ============================================================================= +# Object build statements for STATIC_LIBRARY target arch__common + + +############################################# +# Order-only phony target for arch__common + +build cmake_object_order_depends_target_arch__common: phony || cmake_object_order_depends_target_isr_tables zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build zephyr/arch/common/CMakeFiles/arch__common.dir/sw_isr_common.c.obj: C_COMPILER__arch__common_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/arch/common/sw_isr_common.c || cmake_object_order_depends_target_arch__common + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR_SUPERVISOR__ -D__ZEPHYR__=1 + DEP_FILE = zephyr/arch/common/CMakeFiles/arch__common.dir/sw_isr_common.c.obj.d + FLAGS = -Wshadow -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/arm-zephyr-eabi -imacros /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 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-S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/lib/libc/common/rebuild_cache: phony zephyr/lib/libc/common/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/lib/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/lib/hash/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/hash && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat 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+# ============================================================================= +# Object build statements for OBJECT_LIBRARY target heap_constants + + +############################################# +# Order-only phony target for heap_constants + +build cmake_object_order_depends_target_heap_constants: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/syscall_list_h_target + +build zephyr/lib/heap/CMakeFiles/heap_constants.dir/heap_constants.c.obj: C_COMPILER__heap_constants_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/lib/heap/heap_constants.c || cmake_object_order_depends_target_heap_constants + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx 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-I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/lib/heap/CMakeFiles/heap_constants.dir + OBJECT_FILE_DIR = zephyr/lib/heap/CMakeFiles/heap_constants.dir + TARGET_COMPILE_PDB = zephyr/lib/heap/CMakeFiles/heap_constants.dir/ + TARGET_PDB = "" + + + +############################################# +# Object library heap_constants + +build zephyr/lib/heap/heap_constants: phony zephyr/lib/heap/CMakeFiles/heap_constants.dir/heap_constants.c.obj + + +############################################# +# Utility command for heap_constants_h + +build zephyr/lib/heap/heap_constants_h: phony zephyr/lib/heap/CMakeFiles/heap_constants_h zephyr/include/generated/zephyr/heap_constants.h zephyr/lib/heap/heap_constants + + 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system... + pool = console + restat = 1 + +build zephyr/lib/heap/rebuild_cache: phony zephyr/lib/heap/CMakeFiles/rebuild_cache.util + + +############################################# +# Phony custom command for zephyr/lib/heap/CMakeFiles/heap_constants_h + +build zephyr/lib/heap/CMakeFiles/heap_constants_h | ${cmake_ninja_workdir}zephyr/lib/heap/CMakeFiles/heap_constants_h: phony zephyr/include/generated/zephyr/heap_constants.h || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/syscall_list_h_target + + +############################################# +# Custom command for zephyr/include/generated/zephyr/heap_constants.h + +build zephyr/include/generated/zephyr/heap_constants.h | ${cmake_ninja_workdir}zephyr/include/generated/zephyr/heap_constants.h: CUSTOM_COMMAND zephyr/lib/heap/CMakeFiles/heap_constants.dir/heap_constants.c.obj || zephyr/app_version_h zephyr/device_api_ld_target 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Utility command for edit_cache + +build zephyr/lib/mem_blocks/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/mem_blocks && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/lib/mem_blocks/edit_cache: phony zephyr/lib/mem_blocks/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/lib/mem_blocks/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/mem_blocks && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool 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declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/soc/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/soc/edit_cache: phony zephyr/soc/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/soc/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/soc/rebuild_cache: phony zephyr/soc/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/soc/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/soc/common/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/soc/common/edit_cache: phony zephyr/soc/common/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/soc/common/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/soc/common/rebuild_cache: phony zephyr/soc/common/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/soc/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/soc/soc/stm32g431xx/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/soc/soc/stm32g431xx/edit_cache: phony zephyr/soc/soc/stm32g431xx/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/soc/soc/stm32g431xx/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/soc/soc/stm32g431xx/rebuild_cache: phony zephyr/soc/soc/stm32g431xx/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/soc/soc/stm32g431xx/common/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/soc/soc/stm32g431xx/common/edit_cache: phony zephyr/soc/soc/stm32g431xx/common/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/soc/soc/stm32g431xx/common/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/soc/soc/stm32g431xx/common/rebuild_cache: phony zephyr/soc/soc/stm32g431xx/common/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/soc/soc/stm32g431xx/stm32g4x/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/soc/soc/stm32g431xx/stm32g4x/edit_cache: phony zephyr/soc/soc/stm32g431xx/stm32g4x/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/soc/soc/stm32g431xx/stm32g4x/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/soc/soc/stm32g431xx/stm32g4x/rebuild_cache: phony zephyr/soc/soc/stm32g431xx/stm32g4x/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/boards/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/boards/edit_cache: phony zephyr/boards/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/boards/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/boards/rebuild_cache: phony zephyr/boards/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/boards/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/boards/shields/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/shields && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/boards/shields/edit_cache: phony zephyr/boards/shields/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/boards/shields/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/shields && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/boards/shields/rebuild_cache: phony zephyr/boards/shields/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/edit_cache: phony zephyr/subsys/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/rebuild_cache: phony zephyr/subsys/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/canbus/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/canbus && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/canbus/edit_cache: phony zephyr/subsys/canbus/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/canbus/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/canbus && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/canbus/rebuild_cache: phony zephyr/subsys/canbus/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/debug/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/debug && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/debug/edit_cache: phony zephyr/subsys/debug/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/debug/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/debug && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/debug/rebuild_cache: phony zephyr/subsys/debug/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/fs/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/fs && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/fs/edit_cache: phony zephyr/subsys/fs/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/fs/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/fs && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/fs/rebuild_cache: phony zephyr/subsys/fs/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/gnss/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/gnss && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/gnss/edit_cache: phony zephyr/subsys/gnss/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/gnss/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/gnss && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/gnss/rebuild_cache: phony zephyr/subsys/gnss/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/instrumentation/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/instrumentation/edit_cache: phony zephyr/subsys/instrumentation/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/instrumentation/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/instrumentation/rebuild_cache: phony zephyr/subsys/instrumentation/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/ipc/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/ipc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/ipc/edit_cache: phony zephyr/subsys/ipc/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/ipc/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/ipc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/ipc/rebuild_cache: phony zephyr/subsys/ipc/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/kvss/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/kvss && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/kvss/edit_cache: phony zephyr/subsys/kvss/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/kvss/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/kvss && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/kvss/rebuild_cache: phony zephyr/subsys/kvss/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/logging/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/logging && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/logging/edit_cache: phony zephyr/subsys/logging/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/logging/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/logging && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/logging/rebuild_cache: phony zephyr/subsys/logging/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/mem_mgmt/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/mem_mgmt/edit_cache: phony zephyr/subsys/mem_mgmt/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/mem_mgmt/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/mem_mgmt/rebuild_cache: phony zephyr/subsys/mem_mgmt/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/mgmt/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mgmt && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... 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-I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir + OBJECT_FILE_DIR = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir + TARGET_COMPILE_PDB = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir/subsys__portability__posix__c_lib_ext.pdb + TARGET_PDB = zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.pdb + +build zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir/getopt_shim.c.obj: C_COMPILER__subsys__portability__posix__c_lib_ext_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt_shim.c || cmake_object_order_depends_target_subsys__portability__posix__c_lib_ext + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR__=1 + DEP_FILE = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir/getopt_shim.c.obj.d + FLAGS = -Wshadow -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft 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-I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir + OBJECT_FILE_DIR = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir + TARGET_COMPILE_PDB = zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir/subsys__portability__posix__c_lib_ext.pdb + TARGET_PDB = zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.pdb + + +# ============================================================================= +# Link build statements for STATIC_LIBRARY target subsys__portability__posix__c_lib_ext + + +############################################# +# Link the static library zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a + +build zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a: C_STATIC_LIBRARY_LINKER__subsys__portability__posix__c_lib_ext_ zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir/fnmatch.c.obj zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/subsys__portability__posix__c_lib_ext.dir/getentropy.c.obj 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CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lib_ext && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/portability/posix/c_lib_ext/edit_cache: phony zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lib_ext && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/portability/posix/c_lib_ext/rebuild_cache: phony zephyr/subsys/portability/posix/c_lib_ext/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/random/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/random && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/random/edit_cache: phony zephyr/subsys/random/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/random/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/random && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/random/rebuild_cache: phony zephyr/subsys/random/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/sd/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/sd && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/sd/edit_cache: phony zephyr/subsys/sd/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/sd/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/sd && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/sd/rebuild_cache: phony zephyr/subsys/sd/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/stats/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/stats && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/stats/edit_cache: phony zephyr/subsys/stats/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/stats/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/stats && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/stats/rebuild_cache: phony zephyr/subsys/stats/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/storage/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = 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zephyr/subsys/storage/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/storage/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/storage/flash_map/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/storage/flash_map/edit_cache: phony zephyr/subsys/storage/flash_map/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/storage/flash_map/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/storage/flash_map/rebuild_cache: phony zephyr/subsys/storage/flash_map/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/testsuite/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/testsuite && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/testsuite/edit_cache: phony zephyr/subsys/testsuite/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/testsuite/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/testsuite && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/testsuite/rebuild_cache: phony zephyr/subsys/testsuite/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/tracing/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/tracing && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/tracing/edit_cache: phony zephyr/subsys/tracing/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/tracing/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/tracing && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/tracing/rebuild_cache: phony zephyr/subsys/tracing/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/usb/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/usb/edit_cache: phony zephyr/subsys/usb/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/usb/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/usb/rebuild_cache: phony zephyr/subsys/usb/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/usb/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/subsys/usb/common/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/subsys/usb/common/edit_cache: phony zephyr/subsys/usb/common/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/subsys/usb/common/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/subsys/usb/common/rebuild_cache: phony zephyr/subsys/usb/common/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/edit_cache: phony zephyr/drivers/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/rebuild_cache: phony zephyr/drivers/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/firmware/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/firmware && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/firmware/edit_cache: phony zephyr/drivers/firmware/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/firmware/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/firmware && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/firmware/rebuild_cache: phony zephyr/drivers/firmware/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + +# ============================================================================= +# Object build statements for STATIC_LIBRARY target drivers__interrupt_controller + + +############################################# +# Order-only phony target for drivers__interrupt_controller + +build cmake_object_order_depends_target_drivers__interrupt_controller: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/intc_exti_stm32.c.obj: C_COMPILER__drivers__interrupt_controller_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/interrupt_controller/intc_exti_stm32.c || cmake_object_order_depends_target_drivers__interrupt_controller + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR_SUPERVISOR__ -D__ZEPHYR__=1 + DEP_FILE = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/intc_exti_stm32.c.obj.d + FLAGS = -Wshadow -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/arm-zephyr-eabi -imacros /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr=CMAKE_SOURCE_DIR -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections -specs=picolibc.specs -std=c17 + INCLUDES = -I/home/jeremy/utat-dev/zephyrproject/zephyr/arch/common/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir + OBJECT_FILE_DIR = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir + TARGET_COMPILE_PDB = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/drivers__interrupt_controller.pdb + TARGET_PDB = zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.pdb + +build zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/intc_gpio_stm32.c.obj: C_COMPILER__drivers__interrupt_controller_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/interrupt_controller/intc_gpio_stm32.c || cmake_object_order_depends_target_drivers__interrupt_controller + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR_SUPERVISOR__ -D__ZEPHYR__=1 + DEP_FILE = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/intc_gpio_stm32.c.obj.d + FLAGS = -Wshadow -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/arm-zephyr-eabi -imacros /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr=CMAKE_SOURCE_DIR -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections -specs=picolibc.specs -std=c17 + INCLUDES = -I/home/jeremy/utat-dev/zephyrproject/zephyr/arch/common/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir + OBJECT_FILE_DIR = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir + TARGET_COMPILE_PDB = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/drivers__interrupt_controller.pdb + TARGET_PDB = zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.pdb + + +# ============================================================================= +# Link build statements for STATIC_LIBRARY target drivers__interrupt_controller + + +############################################# +# Link the static library zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a + +build zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a: C_STATIC_LIBRARY_LINKER__drivers__interrupt_controller_ zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/intc_exti_stm32.c.obj zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/intc_gpio_stm32.c.obj || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + OBJECT_DIR = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir + POST_BUILD = : + PRE_LINK = : + TARGET_COMPILE_PDB = zephyr/drivers/interrupt_controller/CMakeFiles/drivers__interrupt_controller.dir/drivers__interrupt_controller.pdb + TARGET_FILE = zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a + TARGET_PDB = zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.pdb + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/interrupt_controller/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/interrupt_controller/edit_cache: phony zephyr/drivers/interrupt_controller/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/interrupt_controller/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/interrupt_controller/rebuild_cache: phony zephyr/drivers/interrupt_controller/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/misc/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/misc/edit_cache: phony zephyr/drivers/misc/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/misc/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/misc/rebuild_cache: phony zephyr/drivers/misc/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/misc/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/misc/interconn/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc/interconn && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/misc/interconn/edit_cache: phony zephyr/drivers/misc/interconn/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/misc/interconn/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc/interconn && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/misc/interconn/rebuild_cache: phony zephyr/drivers/misc/interconn/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/pcie/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/pcie && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/pcie/edit_cache: phony zephyr/drivers/pcie/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/pcie/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/pcie && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/pcie/rebuild_cache: phony zephyr/drivers/pcie/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/usb/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/usb/edit_cache: phony zephyr/drivers/usb/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/usb/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/usb/rebuild_cache: phony zephyr/drivers/usb/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/usb/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/usb/common/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/usb/common/edit_cache: phony zephyr/drivers/usb/common/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/usb/common/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/usb/common/rebuild_cache: phony zephyr/drivers/usb/common/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/usb/common/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/usb/common/buf/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/buf && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/usb/common/buf/edit_cache: phony zephyr/drivers/usb/common/buf/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/usb/common/buf/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/buf && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/usb/common/buf/rebuild_cache: phony zephyr/drivers/usb/common/buf/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/usb/common/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/usb/common/stm32/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/stm32 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/usb/common/stm32/edit_cache: phony zephyr/drivers/usb/common/stm32/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/usb/common/stm32/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/stm32 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/usb/common/stm32/rebuild_cache: phony zephyr/drivers/usb/common/stm32/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/usb_c/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb_c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/usb_c/edit_cache: phony zephyr/drivers/usb_c/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/drivers/usb_c/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb_c && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/drivers/usb_c/rebuild_cache: phony zephyr/drivers/usb_c/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/CMakeLists.txt +# ============================================================================= + +# ============================================================================= +# Object build statements for STATIC_LIBRARY target drivers__clock_control + + +############################################# +# Order-only phony target for drivers__clock_control + +build cmake_object_order_depends_target_drivers__clock_control: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/clock_stm32_ll_common.c.obj: C_COMPILER__drivers__clock_control_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/clock_control/clock_stm32_ll_common.c || cmake_object_order_depends_target_drivers__clock_control + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR_SUPERVISOR__ -D__ZEPHYR__=1 + DEP_FILE = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/clock_stm32_ll_common.c.obj.d + FLAGS = -Wshadow -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/arm-zephyr-eabi -imacros /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr=CMAKE_SOURCE_DIR -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections -specs=picolibc.specs -std=c17 + INCLUDES = -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir + OBJECT_FILE_DIR = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir + TARGET_COMPILE_PDB = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/drivers__clock_control.pdb + TARGET_PDB = zephyr/drivers/clock_control/libdrivers__clock_control.pdb + +build zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/clock_stm32g4.c.obj: C_COMPILER__drivers__clock_control_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/clock_control/clock_stm32g4.c || cmake_object_order_depends_target_drivers__clock_control + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT1_EXPECTED_WRITE_SIZE=8 -DMIN_SECTOR_COUNT=24 -DPICOLIBC_MINIMAL_PRINTF_SCANF -DSTM32G431xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D_POSIX_THREAD_SAFE_FUNCTIONS=200809L -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR_SUPERVISOR__ -D__ZEPHYR__=1 + DEP_FILE = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/clock_stm32g4.c.obj.d + FLAGS = -Wshadow -fno-strict-aliasing -Os -imacros /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot=/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/arm-zephyr-eabi -imacros /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr=CMAKE_SOURCE_DIR -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections -specs=picolibc.specs -std=c17 + INCLUDES = -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir + OBJECT_FILE_DIR = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir + TARGET_COMPILE_PDB = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/drivers__clock_control.pdb + TARGET_PDB = zephyr/drivers/clock_control/libdrivers__clock_control.pdb + + +# ============================================================================= +# Link build statements for STATIC_LIBRARY target drivers__clock_control + + +############################################# +# Link the static library zephyr/drivers/clock_control/libdrivers__clock_control.a + +build zephyr/drivers/clock_control/libdrivers__clock_control.a: C_STATIC_LIBRARY_LINKER__drivers__clock_control_ zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/clock_stm32_ll_common.c.obj zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/clock_stm32g4.c.obj || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + OBJECT_DIR = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir + POST_BUILD = : + PRE_LINK = : + TARGET_COMPILE_PDB = zephyr/drivers/clock_control/CMakeFiles/drivers__clock_control.dir/drivers__clock_control.pdb + TARGET_FILE = zephyr/drivers/clock_control/libdrivers__clock_control.a + TARGET_PDB = zephyr/drivers/clock_control/libdrivers__clock_control.pdb + + +############################################# +# Utility command for edit_cache + +build zephyr/drivers/clock_control/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/clock_control && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/drivers/clock_control/edit_cache: phony zephyr/drivers/clock_control/CMakeFiles/edit_cache.util + + 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============================================================================= +# Object build statements for STATIC_LIBRARY target drivers__flash + + +############################################# +# Order-only phony target for drivers__flash + +build cmake_object_order_depends_target_drivers__flash: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build zephyr/drivers/flash/CMakeFiles/drivers__flash.dir/flash_page_layout.c.obj: C_COMPILER__drivers__flash_unscanned_ /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/flash/flash_page_layout.c || cmake_object_order_depends_target_drivers__flash + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DMCUBOOT_SLOT0_EXPECTED_ERASE_SIZE=2048 -DMCUBOOT_SLOT0_EXPECTED_WRITE_SIZE=8 -DMCUBOOT_SLOT1_EXPECTED_ERASE_SIZE=2048 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/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_afbr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_afbr/edit_cache: phony modules/hal_afbr/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_afbr/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_afbr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_afbr/rebuild_cache: phony modules/hal_afbr/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_ambiq/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ambiq && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_ambiq/edit_cache: phony modules/hal_ambiq/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_ambiq/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ambiq && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_ambiq/rebuild_cache: phony modules/hal_ambiq/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/atmel/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/atmel/edit_cache: phony modules/atmel/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/atmel/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/atmel/rebuild_cache: phony modules/atmel/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/atmel/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/atmel/asf/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/atmel/asf/edit_cache: phony modules/atmel/asf/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/atmel/asf/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/atmel/asf/rebuild_cache: phony modules/atmel/asf/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/atmel/asf/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/atmel/asf/common/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/atmel/asf/common/edit_cache: phony modules/atmel/asf/common/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/atmel/asf/common/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/atmel/asf/common/rebuild_cache: phony modules/atmel/asf/common/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/atmel/asf/common/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/atmel/asf/common/components/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/components && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/atmel/asf/common/components/edit_cache: phony modules/atmel/asf/common/components/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/atmel/asf/common/components/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/components && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/atmel/asf/common/components/rebuild_cache: phony modules/atmel/asf/common/components/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/atmel/asf/common/components/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/atmel/asf/common/components/wifi/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/components/wifi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/atmel/asf/common/components/wifi/edit_cache: phony modules/atmel/asf/common/components/wifi/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/atmel/asf/common/components/wifi/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/components/wifi && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/atmel/asf/common/components/wifi/rebuild_cache: phony modules/atmel/asf/common/components/wifi/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_bouffalolab/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_bouffalolab && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_bouffalolab/edit_cache: phony modules/hal_bouffalolab/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_bouffalolab/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_bouffalolab && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_bouffalolab/rebuild_cache: phony modules/hal_bouffalolab/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_espressif/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_espressif && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_espressif/edit_cache: phony modules/hal_espressif/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_espressif/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_espressif && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_espressif/rebuild_cache: phony modules/hal_espressif/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_ethos_u/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ethos_u && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_ethos_u/edit_cache: phony modules/hal_ethos_u/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_ethos_u/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ethos_u && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_ethos_u/rebuild_cache: phony modules/hal_ethos_u/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_gigadevice/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_gigadevice && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_gigadevice/edit_cache: phony modules/hal_gigadevice/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_gigadevice/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_gigadevice && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_gigadevice/rebuild_cache: phony modules/hal_gigadevice/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_infineon/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_infineon && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_infineon/edit_cache: phony modules/hal_infineon/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_infineon/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_infineon && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_infineon/rebuild_cache: phony modules/hal_infineon/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_intel/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_intel && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_intel/edit_cache: phony modules/hal_intel/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_intel/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_intel && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_intel/rebuild_cache: phony modules/hal_intel/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/microchip/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/microchip && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/microchip/edit_cache: phony modules/microchip/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/microchip/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/microchip && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/microchip/rebuild_cache: phony modules/microchip/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_nordic/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nordic && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_nordic/edit_cache: phony modules/hal_nordic/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_nordic/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nordic && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_nordic/rebuild_cache: phony modules/hal_nordic/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/nuvoton/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nuvoton && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/nuvoton/edit_cache: phony modules/nuvoton/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/nuvoton/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nuvoton && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/nuvoton/rebuild_cache: phony modules/nuvoton/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_nxp/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_nxp/edit_cache: phony modules/hal_nxp/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_nxp/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_nxp/rebuild_cache: phony modules/hal_nxp/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nxp/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_nxp/hal_nxp/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_nxp/hal_nxp/edit_cache: phony modules/hal_nxp/hal_nxp/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_nxp/hal_nxp/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_nxp/hal_nxp/rebuild_cache: phony modules/hal_nxp/hal_nxp/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/openisa/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/openisa && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/openisa/edit_cache: phony modules/openisa/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/openisa/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/openisa && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/openisa/rebuild_cache: phony modules/openisa/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/quicklogic/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/quicklogic && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/quicklogic/edit_cache: phony modules/quicklogic/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/quicklogic/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/quicklogic && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/quicklogic/rebuild_cache: phony modules/quicklogic/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_realtek/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_realtek/edit_cache: phony modules/hal_realtek/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_realtek/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_realtek/rebuild_cache: phony modules/hal_realtek/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_realtek/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_realtek/hal_realtek/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_realtek/hal_realtek/edit_cache: phony modules/hal_realtek/hal_realtek/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_realtek/hal_realtek/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_realtek/hal_realtek/rebuild_cache: phony modules/hal_realtek/hal_realtek/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_renesas/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_renesas/edit_cache: phony modules/hal_renesas/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_renesas/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_renesas/rebuild_cache: phony modules/hal_renesas/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/renesas/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_renesas/zephyr/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_renesas/zephyr/edit_cache: phony modules/hal_renesas/zephyr/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_renesas/zephyr/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_renesas/zephyr/rebuild_cache: phony modules/hal_renesas/zephyr/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/renesas/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_renesas/drivers/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/drivers && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_renesas/drivers/edit_cache: phony modules/hal_renesas/drivers/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_renesas/drivers/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/drivers && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_renesas/drivers/rebuild_cache: phony modules/hal_renesas/drivers/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_rpi_pico/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_rpi_pico && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_rpi_pico/edit_cache: phony modules/hal_rpi_pico/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_rpi_pico/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_rpi_pico && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_rpi_pico/rebuild_cache: phony modules/hal_rpi_pico/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_sifli/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_sifli && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_sifli/edit_cache: phony modules/hal_sifli/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_sifli/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_sifli && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_sifli/rebuild_cache: phony modules/hal_sifli/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_silabs/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_silabs && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_silabs/edit_cache: phony modules/hal_silabs/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_silabs/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_silabs && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_silabs/rebuild_cache: phony modules/hal_silabs/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_st/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_st && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_st/edit_cache: phony modules/hal_st/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_st/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_st && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_st/rebuild_cache: phony modules/hal_st/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_stm32/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_stm32/edit_cache: phony modules/hal_stm32/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_stm32/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_stm32/rebuild_cache: phony modules/hal_stm32/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/CMakeLists.txt +# ============================================================================= + +# ============================================================================= +# Object build statements for STATIC_LIBRARY target ..__modules__hal__stm32__stm32cube + + +############################################# +# Order-only phony target for ..__modules__hal__stm32__stm32cube + +build cmake_object_order_depends_target_..__modules__hal__stm32__stm32cube: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build modules/hal_stm32/stm32cube/CMakeFiles/..__modules__hal__stm32__stm32cube.dir/stm32g4xx/soc/system_stm32g4xx.c.obj: C_COMPILER__.2e.2e__modules__hal__stm32__stm32cube_unscanned_ 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-S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_stm32/stm32cube/stm32g4xx/rebuild_cache: phony modules/hal_stm32/stm32cube/stm32g4xx/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_tdk/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_tdk && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake 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============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_telink/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_telink && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_telink/edit_cache: phony modules/hal_telink/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_telink/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_telink && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_telink/rebuild_cache: phony modules/hal_telink/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/ti/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/ti/edit_cache: phony modules/ti/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/ti/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/ti/rebuild_cache: phony modules/ti/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/ti/CMakeLists.txt +# ============================================================================= + + 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Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/ti/simplelink/rebuild_cache: phony modules/ti/simplelink/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/ti/simplelink/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/ti/simplelink/source/ti/devices/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink/source/ti/devices && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/ti/simplelink/source/ti/devices/edit_cache: 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-S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/ti/simplelink_lpf3/rebuild_cache: phony modules/ti/simplelink_lpf3/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/ti/simplelink_lpf3/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/ti/simplelink_lpf3/source/ti/devices/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3/source/ti/devices && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/ti/simplelink_lpf3/source/ti/devices/edit_cache: phony modules/ti/simplelink_lpf3/source/ti/devices/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/ti/simplelink_lpf3/source/ti/devices/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3/source/ti/devices && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/ti/simplelink_lpf3/source/ti/devices/rebuild_cache: phony modules/ti/simplelink_lpf3/source/ti/devices/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/ti/simplelink_lpf3/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/ti/simplelink_lpf3/source/ti/boards/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3/source/ti/boards && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/ti/simplelink_lpf3/source/ti/boards/edit_cache: phony modules/ti/simplelink_lpf3/source/ti/boards/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/ti/simplelink_lpf3/source/ti/boards/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3/source/ti/boards && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/ti/simplelink_lpf3/source/ti/boards/rebuild_cache: phony modules/ti/simplelink_lpf3/source/ti/boards/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/modules/hal/ti/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/ti/mspm0/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/mspm0 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/ti/mspm0/edit_cache: phony modules/ti/mspm0/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/ti/mspm0/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/mspm0 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/ti/mspm0/rebuild_cache: phony modules/ti/mspm0/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_wch/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_wch && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_wch/edit_cache: phony modules/hal_wch/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_wch/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_wch && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_wch/rebuild_cache: phony modules/hal_wch/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hal_wurthelektronik/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_wurthelektronik && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hal_wurthelektronik/edit_cache: phony modules/hal_wurthelektronik/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hal_wurthelektronik/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_wurthelektronik && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hal_wurthelektronik/rebuild_cache: phony modules/hal_wurthelektronik/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/xtensa/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/xtensa && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/xtensa/edit_cache: phony modules/xtensa/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/xtensa/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/xtensa && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/xtensa/rebuild_cache: phony modules/xtensa/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/hostap/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hostap && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/hostap/edit_cache: phony modules/hostap/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/hostap/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hostap && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/hostap/rebuild_cache: phony modules/hostap/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/liblc3/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/liblc3 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/liblc3/edit_cache: phony modules/liblc3/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/liblc3/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/liblc3 && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/liblc3/rebuild_cache: phony modules/liblc3/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/libmctp/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libmctp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/libmctp/edit_cache: phony modules/libmctp/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/libmctp/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libmctp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/libmctp/rebuild_cache: phony modules/libmctp/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/libmetal/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libmetal && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/libmetal/edit_cache: phony modules/libmetal/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/libmetal/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libmetal && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/libmetal/rebuild_cache: phony modules/libmetal/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/libsbc/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libsbc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/libsbc/edit_cache: phony modules/libsbc/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/libsbc/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libsbc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/libsbc/rebuild_cache: phony modules/libsbc/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/littlefs/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/littlefs && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/littlefs/edit_cache: phony modules/littlefs/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/littlefs/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/littlefs && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/littlefs/rebuild_cache: phony modules/littlefs/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/lora-basics-modem/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/lora-basics-modem && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/lora-basics-modem/edit_cache: phony modules/lora-basics-modem/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/lora-basics-modem/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/lora-basics-modem && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/lora-basics-modem/rebuild_cache: phony modules/lora-basics-modem/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/loramac-node/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/loramac-node && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/loramac-node/edit_cache: phony modules/loramac-node/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/loramac-node/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/loramac-node && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/loramac-node/rebuild_cache: phony modules/loramac-node/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/lvgl/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/lvgl && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/lvgl/edit_cache: phony modules/lvgl/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/lvgl/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/lvgl && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/lvgl/rebuild_cache: phony modules/lvgl/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/mbedtls/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mbedtls && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/mbedtls/edit_cache: phony modules/mbedtls/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/mbedtls/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mbedtls && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/mbedtls/rebuild_cache: phony modules/mbedtls/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + +# ============================================================================= +# Object build statements for STATIC_LIBRARY target mcuboot_util + + +############################################# +# Order-only phony target for mcuboot_util + +build cmake_object_order_depends_target_mcuboot_util: phony || zephyr/app_version_h zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants_h zephyr/offsets_h zephyr/syscall_list_h_target zephyr/version_h + +build modules/mcuboot/CMakeFiles/mcuboot_util.dir/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/src/bootutil_public.c.obj: C_COMPILER__mcuboot_util_unscanned_ /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/src/bootutil_public.c || cmake_object_order_depends_target_mcuboot_util + DEFINES = -DCORE_CM4 -DHSE_VALUE=24000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 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-Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr=CMAKE_SOURCE_DIR -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map=/home/jeremy/utat-dev/zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections -specs=picolibc.specs -std=c17 + INCLUDES = -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr -I/home/jeremy/utat-dev/zephyrproject/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 -I/home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/picolibc/include -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/drivers -I/home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x/. -I/home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability/posix/c_lib_ext/getopt -I/home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6/. -I/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6/CMSIS/Core/Include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/soc -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/stm32g4xx/drivers/include -I/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/ext/tinycrypt/lib/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/.. -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../zephyr/include -I/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr/../../../ext/tinycrypt/lib/include -isystem /home/jeremy/utat-dev/zephyrproject/zephyr/lib/libc/common/include + OBJECT_DIR = modules/mcuboot/CMakeFiles/mcuboot_util.dir + OBJECT_FILE_DIR = modules/mcuboot/CMakeFiles/mcuboot_util.dir/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/src + TARGET_COMPILE_PDB = modules/mcuboot/CMakeFiles/mcuboot_util.dir/mcuboot_util.pdb + TARGET_PDB = modules/mcuboot/libmcuboot_util.pdb + + +# ============================================================================= +# Link build statements for STATIC_LIBRARY target mcuboot_util + + +############################################# +# Link the static library modules/mcuboot/libmcuboot_util.a + +build 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-E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/mcuboot/edit_cache: phony modules/mcuboot/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/mcuboot/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mcuboot && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/mcuboot/rebuild_cache: phony modules/mcuboot/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/mipi-sys-t/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mipi-sys-t && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/mipi-sys-t/edit_cache: phony modules/mipi-sys-t/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/mipi-sys-t/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mipi-sys-t && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/mipi-sys-t/rebuild_cache: phony modules/mipi-sys-t/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/nanopb/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nanopb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/nanopb/edit_cache: phony modules/nanopb/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/nanopb/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nanopb && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/nanopb/rebuild_cache: phony modules/nanopb/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + 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build system... + pool = console + restat = 1 + +build modules/nrf_wifi/rebuild_cache: phony modules/nrf_wifi/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/open-amp/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/open-amp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/open-amp/edit_cache: phony modules/open-amp/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/open-amp/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/open-amp && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/open-amp/rebuild_cache: phony modules/open-amp/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/openthread/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/openthread && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/openthread/edit_cache: phony modules/openthread/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/openthread/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/openthread && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/openthread/rebuild_cache: phony modules/openthread/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/percepio/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/percepio && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/percepio/edit_cache: phony modules/percepio/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/percepio/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd 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/nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/picolibc/edit_cache: phony modules/picolibc/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/picolibc/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/picolibc && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/picolibc/rebuild_cache: phony modules/picolibc/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/segger/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/segger && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/segger/edit_cache: phony modules/segger/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/segger/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/segger && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/segger/rebuild_cache: phony modules/segger/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/trusted-firmware-a/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/trusted-firmware-a && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/trusted-firmware-a/edit_cache: phony modules/trusted-firmware-a/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/trusted-firmware-a/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/trusted-firmware-a && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build modules/trusted-firmware-a/rebuild_cache: phony modules/trusted-firmware-a/CMakeFiles/rebuild_cache.util + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for edit_cache + +build modules/trusted-firmware-m/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/trusted-firmware-m && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build modules/trusted-firmware-m/edit_cache: phony modules/trusted-firmware-m/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build modules/trusted-firmware-m/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/trusted-firmware-m && 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/nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 -m west rtt + DESC = RTT nucleo_g431rb + pool = console + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for usage + +build zephyr/cmake/usage/usage: phony zephyr/cmake/usage/CMakeFiles/usage + + +############################################# +# Utility command for edit_cache + +build zephyr/cmake/usage/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/usage && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/cmake/usage/edit_cache: phony zephyr/cmake/usage/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/cmake/usage/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/usage && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/cmake/usage/rebuild_cache: phony zephyr/cmake/usage/CMakeFiles/rebuild_cache.util + + +############################################# +# Custom command for zephyr/cmake/usage/CMakeFiles/usage + +build zephyr/cmake/usage/CMakeFiles/usage | ${cmake_ninja_workdir}zephyr/cmake/usage/CMakeFiles/usage: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/usage && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -DZEPHYR_BASE=/home/jeremy/utat-dev/zephyrproject/zephyr -DCMAKE_MAKE_PROGRAM=/nix/store/fx65xy1jiapn94i0gkq62k4vbvvbqyx1-ninja-1.13.1/bin/ninja -P /home/jeremy/utat-dev/zephyrproject/zephyr/cmake/usage/usage.cmake + +# ============================================================================= +# Write statements declared in CMakeLists.txt: +# /home/jeremy/utat-dev/zephyrproject/zephyr/CMakeLists.txt +# ============================================================================= + + +############################################# +# Utility command for ram_report + +build zephyr/cmake/reports/ram_report: phony zephyr/cmake/reports/CMakeFiles/ram_report zephyr/zephyr.elf + + +############################################# +# Utility command for ram_plot + +build zephyr/cmake/reports/ram_plot: phony zephyr/cmake/reports/CMakeFiles/ram_plot zephyr/cmake/reports/ram_report + + +############################################# +# Utility command for rom_report + +build zephyr/cmake/reports/rom_report: phony zephyr/cmake/reports/CMakeFiles/rom_report zephyr/zephyr.elf + + +############################################# +# Utility command for rom_plot + +build zephyr/cmake/reports/rom_plot: phony zephyr/cmake/reports/CMakeFiles/rom_plot zephyr/cmake/reports/rom_report + + +############################################# +# Utility command for footprint + +build zephyr/cmake/reports/footprint: phony zephyr/cmake/reports/CMakeFiles/footprint zephyr/cmake/reports/ram_report zephyr/cmake/reports/rom_report + + +############################################# +# Utility command for dashboard + +build zephyr/cmake/reports/dashboard: phony zephyr/cmake/reports/CMakeFiles/dashboard zephyr/zephyr.elf + + +############################################# +# Utility command for edit_cache + +build zephyr/cmake/reports/CMakeFiles/edit_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/reports && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake -E echo No\ interactive\ CMake\ dialog\ available. + DESC = No interactive CMake dialog available... + restat = 1 + +build zephyr/cmake/reports/edit_cache: phony zephyr/cmake/reports/CMakeFiles/edit_cache.util + + +############################################# +# Utility command for rebuild_cache + +build zephyr/cmake/reports/CMakeFiles/rebuild_cache.util: CUSTOM_COMMAND + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/reports && /nix/store/2xyd9pnqzg74a9xlayi54d2bcy1844n5-cmake-4.1.2/bin/cmake --regenerate-during-build -S/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr -B/home/jeremy/utat-dev/zephyrproject/build/mcuboot + DESC = Running CMake to regenerate build system... + pool = console + restat = 1 + +build zephyr/cmake/reports/rebuild_cache: phony zephyr/cmake/reports/CMakeFiles/rebuild_cache.util + + +############################################# +# Custom command for zephyr/cmake/reports/CMakeFiles/ram_report + +build zephyr/cmake/reports/CMakeFiles/ram_report | ${cmake_ninja_workdir}zephyr/cmake/reports/CMakeFiles/ram_report: CUSTOM_COMMAND zephyr/zephyr.elf || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/footprint/size_report -k /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.elf -z /home/jeremy/utat-dev/zephyrproject/zephyr -o /home/jeremy/utat-dev/zephyrproject/build/mcuboot --workspace=/home/jeremy/utat-dev/zephyrproject -d 99 --json ram.json ram + pool = console + + +############################################# +# Custom command for zephyr/cmake/reports/CMakeFiles/ram_plot + +build zephyr/cmake/reports/CMakeFiles/ram_plot | ${cmake_ninja_workdir}zephyr/cmake/reports/CMakeFiles/ram_plot: CUSTOM_COMMAND || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/cmake/reports/ram_report zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/footprint/plot.py ram.json + pool = console + + +############################################# +# Custom command for zephyr/cmake/reports/CMakeFiles/rom_report + +build zephyr/cmake/reports/CMakeFiles/rom_report | ${cmake_ninja_workdir}zephyr/cmake/reports/CMakeFiles/rom_report: CUSTOM_COMMAND zephyr/zephyr.elf || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/footprint/size_report -k /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.elf -z /home/jeremy/utat-dev/zephyrproject/zephyr -o /home/jeremy/utat-dev/zephyrproject/build/mcuboot --workspace=/home/jeremy/utat-dev/zephyrproject -d 99 --json rom.json rom + pool = console + + +############################################# +# Custom command for zephyr/cmake/reports/CMakeFiles/rom_plot + +build zephyr/cmake/reports/CMakeFiles/rom_plot | ${cmake_ninja_workdir}zephyr/cmake/reports/CMakeFiles/rom_plot: CUSTOM_COMMAND || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/cmake/reports/rom_report zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/footprint/plot.py rom.json + pool = console + + +############################################# +# Phony custom command for zephyr/cmake/reports/CMakeFiles/footprint + +build zephyr/cmake/reports/CMakeFiles/footprint | ${cmake_ninja_workdir}zephyr/cmake/reports/CMakeFiles/footprint: phony || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/cmake/reports/ram_report zephyr/cmake/reports/rom_report zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + + +############################################# +# Custom command for zephyr/cmake/reports/CMakeFiles/dashboard + +build zephyr/cmake/reports/CMakeFiles/dashboard | ${cmake_ninja_workdir}zephyr/cmake/reports/CMakeFiles/dashboard: CUSTOM_COMMAND zephyr/zephyr.elf || app/libapp.a modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/mcuboot/libmcuboot_util.a zephyr/app_version_h zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a zephyr/device_api_ld_target zephyr/driver_validation_h_target zephyr/drivers/clock_control/libdrivers__clock_control.a zephyr/drivers/flash/libdrivers__flash.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/timer/libdrivers__timer.a zephyr/kernel/libkernel.a zephyr/kobj_types_h_target zephyr/lib/heap/heap_constants zephyr/lib/heap/heap_constants_h zephyr/lib/libc/common/liblib__libc__common.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/libzephyr.a zephyr/linker_zephyr_final_script_target zephyr/linker_zephyr_prebuilt_script_target zephyr/offsets zephyr/offsets_h zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a zephyr/syscall_list_h_target zephyr/version_h zephyr/zephyr.elf zephyr/zephyr_pre0.elf + COMMAND = cd /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/reports && /nix/store/ibzxfw7gxwzqz2x8dyh3a2h32r1v87wn-python3-3.13.12-env/bin/python3.13 /home/jeremy/utat-dev/zephyrproject/zephyr/scripts/dashboard/dashboard.py --output /home/jeremy/utat-dev/zephyrproject/build/mcuboot/dashboard --zephyr-base /home/jeremy/utat-dev/zephyrproject/zephyr --kernel-bin-name zephyr --open /home/jeremy/utat-dev/zephyrproject/build/mcuboot + pool = console + +# ============================================================================= +# Target aliases. + +build ..__modules__hal__stm32__stm32cube: phony modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a + +build app: phony app/libapp.a + +build app_version_h: phony zephyr/app_version_h + +build arch__arm__core: phony zephyr/arch/arch/arm/core/libarch__arm__core.a + +build arch__arm__core__cortex_m: phony zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a + +build arch__arm__core__mpu: phony zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a + +build arch__common: phony zephyr/arch/common/libarch__common.a + +build attach: phony zephyr/cmake/flash/attach + +build build_info_yaml_saved: phony zephyr/build_info_yaml_saved + +build dashboard: phony zephyr/cmake/reports/dashboard + +build debug: phony zephyr/cmake/flash/debug + +build debugserver: phony zephyr/cmake/flash/debugserver + +build device_api_ld_target: phony zephyr/device_api_ld_target + +build driver_validation_h_target: phony zephyr/driver_validation_h_target + +build drivers__clock_control: phony zephyr/drivers/clock_control/libdrivers__clock_control.a + +build drivers__flash: phony zephyr/drivers/flash/libdrivers__flash.a + +build drivers__interrupt_controller: phony zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a + +build drivers__timer: phony zephyr/drivers/timer/libdrivers__timer.a + +build flash: phony zephyr/cmake/flash/flash + +build footprint: phony zephyr/cmake/reports/footprint + +build heap_constants: phony zephyr/lib/heap/heap_constants + +build heap_constants_h: phony zephyr/lib/heap/heap_constants_h + +build initlevels: phony zephyr/initlevels + +build isr_tables: phony zephyr/arch/common/libisr_tables.a + +build kernel: phony zephyr/kernel/libkernel.a + +build kobj_types_h_target: phony zephyr/kobj_types_h_target + +build lib..__modules__hal__stm32__stm32cube.a: phony modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a + +build lib__libc__common: phony zephyr/lib/libc/common/liblib__libc__common.a + +build lib__libc__picolibc: phony zephyr/lib/libc/picolibc/liblib__libc__picolibc.a + +build libapp.a: phony app/libapp.a + +build libarch__arm__core.a: phony zephyr/arch/arch/arm/core/libarch__arm__core.a + +build libarch__arm__core__cortex_m.a: phony zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a + +build libarch__arm__core__mpu.a: phony zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a + +build libarch__common.a: phony zephyr/arch/common/libarch__common.a + +build libdrivers__clock_control.a: phony zephyr/drivers/clock_control/libdrivers__clock_control.a + +build libdrivers__flash.a: phony zephyr/drivers/flash/libdrivers__flash.a + +build libdrivers__interrupt_controller.a: phony zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a + +build libdrivers__timer.a: phony zephyr/drivers/timer/libdrivers__timer.a + +build libisr_tables.a: phony zephyr/arch/common/libisr_tables.a + +build libkernel.a: phony zephyr/kernel/libkernel.a + +build liblib__libc__common.a: phony zephyr/lib/libc/common/liblib__libc__common.a + +build liblib__libc__picolibc.a: phony zephyr/lib/libc/picolibc/liblib__libc__picolibc.a + +build libmcuboot_util.a: phony modules/mcuboot/libmcuboot_util.a + +build libsubsys__portability__posix__c_lib_ext.a: phony zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a + +build libzephyr.a: phony zephyr/libzephyr.a + +build linker_zephyr_final_script_target: phony zephyr/linker_zephyr_final_script_target + +build linker_zephyr_prebuilt_script_target: phony zephyr/linker_zephyr_prebuilt_script_target + +build mcuboot_util: phony modules/mcuboot/libmcuboot_util.a + +build offsets: phony zephyr/offsets + +build offsets_h: phony zephyr/offsets_h + +build ram_plot: phony zephyr/cmake/reports/ram_plot + +build ram_report: phony zephyr/cmake/reports/ram_report + +build rom_plot: phony zephyr/cmake/reports/rom_plot + +build rom_report: phony zephyr/cmake/reports/rom_report + +build rtt: phony zephyr/cmake/flash/rtt + +build run: phony zephyr/run + +build subsys__portability__posix__c_lib_ext: phony zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a + +build syscall_list_h_target: phony zephyr/syscall_list_h_target + +build usage: phony zephyr/cmake/usage/usage + +build version_h: phony zephyr/version_h + +build zephyr: phony zephyr/libzephyr.a + +build zephyr.elf: phony zephyr/zephyr.elf + +build zephyr_final: phony zephyr/zephyr.elf + +build zephyr_pre0: phony zephyr/zephyr_pre0.elf + +build zephyr_pre0.elf: phony zephyr/zephyr_pre0.elf + +# ============================================================================= +# Folder targets. + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot + +build all: phony app/libapp.a zephyr/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/acpica + +build modules/acpica/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/adi + +build modules/adi/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel + +build modules/atmel/all: phony modules/atmel/asf/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf + +build modules/atmel/asf/all: phony modules/atmel/asf/common/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common + +build modules/atmel/asf/common/all: phony modules/atmel/asf/common/components/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/components + +build modules/atmel/asf/common/components/all: phony modules/atmel/asf/common/components/wifi/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/components/wifi + +build modules/atmel/asf/common/components/wifi/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis + +build modules/cmsis/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis-dsp + +build modules/cmsis-dsp/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis-nn + +build modules/cmsis-nn/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis_6 + +build modules/cmsis_6/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/dhara + +build modules/dhara/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/fatfs + +build modules/fatfs/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_afbr + +build modules/hal_afbr/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ambiq + +build modules/hal_ambiq/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_bouffalolab + +build modules/hal_bouffalolab/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_espressif + +build modules/hal_espressif/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ethos_u + +build modules/hal_ethos_u/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_gigadevice + +build modules/hal_gigadevice/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_infineon + +build modules/hal_infineon/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_intel + +build modules/hal_intel/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nordic + +build modules/hal_nordic/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp + +build modules/hal_nxp/all: phony modules/hal_nxp/hal_nxp/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp + +build modules/hal_nxp/hal_nxp/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek + +build modules/hal_realtek/all: phony modules/hal_realtek/hal_realtek/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek + +build modules/hal_realtek/hal_realtek/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas + +build modules/hal_renesas/all: phony modules/hal_renesas/zephyr/all modules/hal_renesas/drivers/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/drivers + +build modules/hal_renesas/drivers/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr + +build modules/hal_renesas/zephyr/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_rpi_pico + +build modules/hal_rpi_pico/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_sifli + +build modules/hal_sifli/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_silabs + +build modules/hal_silabs/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_st + +build modules/hal_st/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32 + +build modules/hal_stm32/all: phony modules/hal_stm32/stm32cube/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32/stm32cube + +build modules/hal_stm32/stm32cube/all: phony modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a modules/hal_stm32/stm32cube/stm32g4xx/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32/stm32cube/stm32g4xx + +build modules/hal_stm32/stm32cube/stm32g4xx/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_tdk + +build modules/hal_tdk/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_telink + +build modules/hal_telink/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_wch + +build modules/hal_wch/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_wurthelektronik + +build modules/hal_wurthelektronik/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hostap + +build modules/hostap/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/liblc3 + +build modules/liblc3/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libmctp + +build modules/libmctp/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libmetal + +build modules/libmetal/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/libsbc + +build modules/libsbc/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/littlefs + +build modules/littlefs/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/lora-basics-modem + +build modules/lora-basics-modem/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/loramac-node + +build modules/loramac-node/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/lvgl + +build modules/lvgl/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mbedtls + +build modules/mbedtls/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mcuboot + +build modules/mcuboot/all: phony modules/mcuboot/libmcuboot_util.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/microchip + +build modules/microchip/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/mipi-sys-t + +build modules/mipi-sys-t/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nanopb + +build modules/nanopb/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nrf_hw_models + +build modules/nrf_hw_models/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nrf_wifi + +build modules/nrf_wifi/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/nuvoton + +build modules/nuvoton/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/open-amp + +build modules/open-amp/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/openisa + +build modules/openisa/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/openthread + +build modules/openthread/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/percepio + +build modules/percepio/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/picolibc + +build modules/picolibc/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/quicklogic + +build modules/quicklogic/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/segger + +build modules/segger/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti + +build modules/ti/all: phony modules/ti/simplelink/all modules/ti/simplelink_lpf3/all modules/ti/mspm0/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/mspm0 + +build modules/ti/mspm0/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink + +build modules/ti/simplelink/all: phony modules/ti/simplelink/source/ti/devices/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink/source/ti/devices + +build modules/ti/simplelink/source/ti/devices/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3 + +build modules/ti/simplelink_lpf3/all: phony modules/ti/simplelink_lpf3/source/ti/devices/all modules/ti/simplelink_lpf3/source/ti/boards/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3/source/ti/boards + +build modules/ti/simplelink_lpf3/source/ti/boards/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/ti/simplelink_lpf3/source/ti/devices + +build modules/ti/simplelink_lpf3/source/ti/devices/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/trusted-firmware-a + +build modules/trusted-firmware-a/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/trusted-firmware-m + +build modules/trusted-firmware-m/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/uoscore-uedhoc + +build modules/uoscore-uedhoc/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/xtensa + +build modules/xtensa/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/zcbor + +build modules/zcbor/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr + +build zephyr/all: phony zephyr/libzephyr.a zephyr/offsets zephyr/zephyr_pre0.elf zephyr/zephyr.elf zephyr/build_info_yaml_saved zephyr/arch/all zephyr/lib/all zephyr/soc/all zephyr/boards/all zephyr/subsys/all zephyr/drivers/all modules/acpica/all modules/cmsis/all modules/cmsis-dsp/all modules/cmsis-nn/all modules/cmsis_6/all modules/dhara/all modules/fatfs/all modules/adi/all modules/hal_afbr/all modules/hal_ambiq/all modules/atmel/all modules/hal_bouffalolab/all modules/hal_espressif/all modules/hal_ethos_u/all modules/hal_gigadevice/all modules/hal_infineon/all modules/hal_intel/all modules/microchip/all modules/hal_nordic/all modules/nuvoton/all modules/hal_nxp/all modules/openisa/all modules/quicklogic/all modules/hal_realtek/all modules/hal_renesas/all modules/hal_rpi_pico/all modules/hal_sifli/all modules/hal_silabs/all modules/hal_st/all modules/hal_stm32/all modules/hal_tdk/all modules/hal_telink/all modules/ti/all modules/hal_wch/all modules/hal_wurthelektronik/all modules/xtensa/all modules/hostap/all modules/liblc3/all modules/libmctp/all modules/libmetal/all modules/libsbc/all modules/littlefs/all modules/lora-basics-modem/all modules/loramac-node/all modules/lvgl/all modules/mbedtls/all modules/mcuboot/all modules/mipi-sys-t/all modules/nanopb/all modules/nrf_wifi/all modules/open-amp/all modules/openthread/all modules/percepio/all modules/picolibc/all modules/segger/all modules/trusted-firmware-a/all modules/trusted-firmware-m/all modules/uoscore-uedhoc/all modules/zcbor/all modules/nrf_hw_models/all zephyr/kernel/all zephyr/cmake/flash/all zephyr/cmake/usage/all zephyr/cmake/reports/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch + +build zephyr/arch/all: phony zephyr/arch/common/all zephyr/arch/arch/arm/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm + +build zephyr/arch/arch/arm/all: phony zephyr/arch/arch/arm/core/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/core + +build zephyr/arch/arch/arm/core/all: phony zephyr/arch/arch/arm/core/libarch__arm__core.a zephyr/arch/arch/arm/core/cortex_m/all zephyr/arch/arch/arm/core/mpu/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/core/cortex_m + +build zephyr/arch/arch/arm/core/cortex_m/all: phony zephyr/arch/arch/arm/core/cortex_m/libarch__arm__core__cortex_m.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/core/mpu + +build zephyr/arch/arch/arm/core/mpu/all: phony zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/common + +build zephyr/arch/common/all: phony zephyr/arch/common/libarch__common.a zephyr/arch/common/libisr_tables.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards + +build zephyr/boards/all: phony zephyr/boards/shields/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/shields + +build zephyr/boards/shields/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/flash + +build zephyr/cmake/flash/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/reports + +build zephyr/cmake/reports/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake/usage + +build zephyr/cmake/usage/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers + +build zephyr/drivers/all: phony zephyr/drivers/firmware/all zephyr/drivers/interrupt_controller/all zephyr/drivers/misc/all zephyr/drivers/pcie/all zephyr/drivers/usb/all zephyr/drivers/usb_c/all zephyr/drivers/clock_control/all zephyr/drivers/flash/all zephyr/drivers/timer/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/clock_control + +build zephyr/drivers/clock_control/all: phony zephyr/drivers/clock_control/libdrivers__clock_control.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/firmware + +build zephyr/drivers/firmware/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/flash + +build zephyr/drivers/flash/all: phony zephyr/drivers/flash/libdrivers__flash.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller + +build zephyr/drivers/interrupt_controller/all: phony zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc + +build zephyr/drivers/misc/all: phony zephyr/drivers/misc/interconn/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc/interconn + +build zephyr/drivers/misc/interconn/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/pcie + +build zephyr/drivers/pcie/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/timer + +build zephyr/drivers/timer/all: phony zephyr/drivers/timer/libdrivers__timer.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb + +build zephyr/drivers/usb/all: phony zephyr/drivers/usb/common/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common + +build zephyr/drivers/usb/common/all: phony zephyr/drivers/usb/common/buf/all zephyr/drivers/usb/common/stm32/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/buf + +build zephyr/drivers/usb/common/buf/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/stm32 + +build zephyr/drivers/usb/common/stm32/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb_c + +build zephyr/drivers/usb_c/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kernel + +build zephyr/kernel/all: phony zephyr/kernel/libkernel.a zephyr/kernel/sys/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/kernel/sys + +build zephyr/kernel/sys/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib + +build zephyr/lib/all: phony zephyr/lib/libc/all zephyr/lib/hash/all zephyr/lib/heap/all zephyr/lib/mem_blocks/all zephyr/lib/midi2/all zephyr/lib/os/all zephyr/lib/utils/all zephyr/lib/uuid/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/hash + +build zephyr/lib/hash/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/heap + +build zephyr/lib/heap/all: phony zephyr/lib/heap/heap_constants + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/libc + +build zephyr/lib/libc/all: phony zephyr/lib/libc/picolibc/all zephyr/lib/libc/common/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/libc/common + +build zephyr/lib/libc/common/all: phony zephyr/lib/libc/common/liblib__libc__common.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/libc/picolibc + +build zephyr/lib/libc/picolibc/all: phony zephyr/lib/libc/picolibc/liblib__libc__picolibc.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/mem_blocks + +build zephyr/lib/mem_blocks/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/midi2 + +build zephyr/lib/midi2/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/os + +build zephyr/lib/os/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/utils + +build zephyr/lib/utils/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/uuid + +build zephyr/lib/uuid/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc + +build zephyr/soc/all: phony zephyr/soc/common/all zephyr/soc/soc/stm32g431xx/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/common + +build zephyr/soc/common/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx + +build zephyr/soc/soc/stm32g431xx/all: phony zephyr/soc/soc/stm32g431xx/common/all zephyr/soc/soc/stm32g431xx/stm32g4x/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common + +build zephyr/soc/soc/stm32g431xx/common/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x + +build zephyr/soc/soc/stm32g431xx/stm32g4x/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys + +build zephyr/subsys/all: phony zephyr/subsys/canbus/all zephyr/subsys/debug/all zephyr/subsys/fs/all zephyr/subsys/gnss/all zephyr/subsys/instrumentation/all zephyr/subsys/ipc/all zephyr/subsys/kvss/all zephyr/subsys/logging/all zephyr/subsys/mem_mgmt/all zephyr/subsys/mgmt/all zephyr/subsys/pm/all zephyr/subsys/pmci/all zephyr/subsys/portability/all zephyr/subsys/random/all zephyr/subsys/sd/all zephyr/subsys/stats/all zephyr/subsys/storage/all zephyr/subsys/testsuite/all zephyr/subsys/tracing/all zephyr/subsys/usb/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/canbus + +build zephyr/subsys/canbus/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/debug + +build zephyr/subsys/debug/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/fs + +build zephyr/subsys/fs/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/gnss + +build zephyr/subsys/gnss/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation + +build zephyr/subsys/instrumentation/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/ipc + +build zephyr/subsys/ipc/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/kvss + +build zephyr/subsys/kvss/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/logging + +build zephyr/subsys/logging/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt + +build zephyr/subsys/mem_mgmt/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mgmt + +build zephyr/subsys/mgmt/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm + +build zephyr/subsys/pm/all: phony zephyr/subsys/pm/policy/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy + +build zephyr/subsys/pm/policy/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pmci + +build zephyr/subsys/pmci/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability + +build zephyr/subsys/portability/all: phony zephyr/subsys/portability/posix/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix + +build zephyr/subsys/portability/posix/all: phony zephyr/subsys/portability/posix/c_lang_support_r/all zephyr/subsys/portability/posix/c_lib_ext/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lang_support_r + +build zephyr/subsys/portability/posix/c_lang_support_r/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lib_ext + +build zephyr/subsys/portability/posix/c_lib_ext/all: phony zephyr/subsys/portability/posix/c_lib_ext/libsubsys__portability__posix__c_lib_ext.a + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/random + +build zephyr/subsys/random/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/sd + +build zephyr/subsys/sd/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/stats + +build zephyr/subsys/stats/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage + +build zephyr/subsys/storage/all: phony zephyr/subsys/storage/flash_map/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map + +build zephyr/subsys/storage/flash_map/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/testsuite + +build zephyr/subsys/testsuite/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/tracing + +build zephyr/subsys/tracing/all: phony + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb + +build zephyr/subsys/usb/all: phony zephyr/subsys/usb/common/all + +# ============================================================================= + +############################################# +# Folder: /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/common + +build zephyr/subsys/usb/common/all: phony + +# ============================================================================= +# Built-in targets + + +############################################# +# Re-run CMake if any of its inputs changed. + +build build.ninja /home/jeremy/utat-dev/zephyrproject/build/mcuboot/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/common/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/core/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/core/cortex_m/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/arch/arch/arm/core/mpu/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/libc/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/libc/picolibc/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/libc/common/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/hash/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/heap/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/mem_blocks/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/midi2/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/os/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/utils/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/lib/uuid/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/common/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/shields/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/gnss/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/kvss/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pmci/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lang_support_r/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lib_ext/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/random/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/common/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/firmware/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/misc/interconn/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/pcie/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/buf/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb/common/stm32/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/usb_c/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/clock_control/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/flash/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/timer/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/acpica/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis-dsp/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis-nn/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis_6/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/dhara/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/fatfs/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/adi/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_afbr/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ambiq/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/cmake_install.cmake /home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/atmel/asf/common/cmake_install.cmake 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+ +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis-nn/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/cmsis/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/cmsis/cmake_install.cmake new file mode 100644 index 0000000..e1a66d2 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/cmsis/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/cmsis_6/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/cmsis_6/cmake_install.cmake new file mode 100644 index 0000000..13bb1df --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/cmsis_6/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/cmsis_6 + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/cmsis_6/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/dhara/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/dhara/cmake_install.cmake new file mode 100644 index 0000000..31ec855 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/dhara/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/dhara + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/dhara/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/fatfs/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/fatfs/cmake_install.cmake new file mode 100644 index 0000000..943799a --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/fatfs/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/fatfs + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/fatfs/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_afbr/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_afbr/cmake_install.cmake new file mode 100644 index 0000000..44a217f --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_afbr/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_afbr + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_afbr/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_ambiq/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_ambiq/cmake_install.cmake new file mode 100644 index 0000000..20e4751 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_ambiq/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ambiq/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_bouffalolab/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_bouffalolab/cmake_install.cmake new file mode 100644 index 0000000..05ec35e --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_bouffalolab/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_bouffalolab + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_bouffalolab/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_espressif/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_espressif/cmake_install.cmake new file mode 100644 index 0000000..9c03ba4 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_espressif/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/zephyr + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_espressif/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_ethos_u/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_ethos_u/cmake_install.cmake new file mode 100644 index 0000000..657e510 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_ethos_u/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_ethos_u + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_ethos_u/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_gigadevice/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_gigadevice/cmake_install.cmake new file mode 100644 index 0000000..d8e5a77 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_gigadevice/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_gigadevice + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_gigadevice/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_infineon/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_infineon/cmake_install.cmake new file mode 100644 index 0000000..6b42af8 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_infineon/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_infineon + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_infineon/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_intel/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_intel/cmake_install.cmake new file mode 100644 index 0000000..06e627a --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_intel/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/intel/zephyr + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_intel/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_nordic/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_nordic/cmake_install.cmake new file mode 100644 index 0000000..da67090 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_nordic/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nordic + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nordic/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_nxp/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_nxp/cmake_install.cmake new file mode 100644 index 0000000..a7a719e --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_nxp/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_nxp + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp/cmake_install.cmake new file mode 100644 index 0000000..54a8570 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/nxp/zephyr/src + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_nxp/hal_nxp/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_realtek/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_realtek/cmake_install.cmake new file mode 100644 index 0000000..2fee310 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_realtek/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_realtek + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek/cmake_install.cmake new file mode 100644 index 0000000..5eb83e4 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/realtek + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_realtek/hal_realtek/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_renesas/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_renesas/cmake_install.cmake new file mode 100644 index 0000000..a916c7f --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_renesas/cmake_install.cmake @@ -0,0 +1,52 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/renesas + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/drivers/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_renesas/drivers/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_renesas/drivers/cmake_install.cmake new file mode 100644 index 0000000..a81ddcd --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_renesas/drivers/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/renesas/drivers + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/drivers/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr/cmake_install.cmake new file mode 100644 index 0000000..b98bbed --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/renesas/zephyr + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_renesas/zephyr/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_rpi_pico/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_rpi_pico/cmake_install.cmake new file mode 100644 index 0000000..5a27414 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_rpi_pico/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_rpi_pico + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_rpi_pico/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_sifli/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_sifli/cmake_install.cmake new file mode 100644 index 0000000..a3b89b9 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_sifli/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_sifli + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_sifli/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_silabs/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_silabs/cmake_install.cmake new file mode 100644 index 0000000..527984f --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_silabs/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/modules/hal_silabs + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_silabs/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_st/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_st/cmake_install.cmake new file mode 100644 index 0000000..2d6caec --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_st/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/st + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_st/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_stm32/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_stm32/cmake_install.cmake new file mode 100644 index 0000000..927a78e --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_stm32/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/stm32 + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32/stm32cube/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/modules/hal_stm32/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/modules/hal_stm32/stm32cube/cmake_install.cmake b/zephyrproject/build/mcuboot/modules/hal_stm32/stm32cube/cmake_install.cmake new file mode 100644 index 0000000..71b80b4 --- /dev/null +++ b/zephyrproject/build/mcuboot/modules/hal_stm32/stm32cube/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/stm32cube + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + 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a/zephyrproject/build/mcuboot/zephyr/boards/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/boards/cmake_install.cmake new file mode 100644 index 0000000..5a3072c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/boards/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/boards + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/shields/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/boards/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git 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--git a/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller/cmake_install.cmake new file mode 100644 index 0000000..d4e0d46 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/drivers/interrupt_controller + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/drivers/interrupt_controller/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git 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k@_Oa;6=I!b1~$(-6%lOXZgKi}ok^2J{W4u5(%kBQ14d>S#{d8T literal 0 HcmV?d00001 diff --git a/zephyrproject/build/mcuboot/zephyr/kernel/sys/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/kernel/sys/cmake_install.cmake new file mode 100644 index 0000000..dc720bc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/kernel/sys/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/kernel/sys + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the 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b/zephyrproject/build/mcuboot/zephyr/lib/cmake_install.cmake new file mode 100644 index 0000000..eba7171 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/lib/cmake_install.cmake @@ -0,0 +1,58 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/lib + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + 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ze=U4VSb!nKbjJv>r)%yy;bB6)yh6HTg-yb4;aS2@3a=GjFZ`Eb3bzU`5?(Ik=V$X!r?<&{ z4-tDS_Y1en|0&^*iJ^7U6lqON3VmZxr4o33s(z|7q$pb6`m)&M0l0(M&Vt; z2ZT=upB4UxaJTR+VLndjn6Gjn^#ag6T{vI3M7TzHf^dVdM|igIV&N6SF9~lGep~pc z@Hyd2LcXled>k(Pu<%^r?ZSJ7{EiOk$6{ecoFqJ6c#-fk!aIb!g>MOG0u8eUs}#@WJpfof>EsM>i7P7p6P$ot|?7S}5LG*#!?<0>tm@zL` z5dzpJE`oOj@OWZ|?N2)2G{904AoRo7U(jv6Mfj&VXEuJYwt#rc(S5;J-~BkSdMAU| zrG8?8ud>-v^=cJ1cdiNOTynbKEE^J5#+Z6 z{Mg6I4@3U-H$^amxJFYFn)aFhg}Dc zAV2SLS3c$sOP374J78y=S@@?pV5;X`%>u|UjQ{rveY$Ved0rBJzVYcEg9q)tc^-6> z9ll{b(>#p-VE$srAM1tr!_=S2-!rh|k+vJ)3^L&7fgXNZ#6b7(W`QUPPfTOBr@?f~ d@Xs{CFJl_e|7tU?EI%xZa_B0Nznw$S{ST>JuD<{P literal 0 HcmV?d00001 diff --git a/zephyrproject/build/mcuboot/zephyr/linker.cmd b/zephyrproject/build/mcuboot/zephyr/linker.cmd new file mode 100644 index 0000000..3a3ad53 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/linker.cmd @@ -0,0 +1,525 @@ + OUTPUT_FORMAT("elf32-littlearm") +_region_min_align = 32; +MEMORY + { + FLASH (rx) : ORIGIN = ((134217728)), LENGTH = ((34816) - 0x0) + RAM (wx) : ORIGIN = (536870912), LENGTH = (32768) + SRAM0 ( rw ) : ORIGIN = (536870912), LENGTH = (32768) + IDT_LIST (wx) : ORIGIN = 0xFFFF7FFF, LENGTH = 32K + } +ENTRY("__start") +SECTIONS + { + .rel.plt : + { + *(.rel.plt) + PROVIDE_HIDDEN (__rel_iplt_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__rel_iplt_end = .); + } + .rela.plt : + { + *(.rela.plt) + PROVIDE_HIDDEN (__rela_iplt_start = .); + *(.rela.iplt) + PROVIDE_HIDDEN (__rela_iplt_end = .); + } + .rel.dyn : + { + *(.rel.*) + } + .rela.dyn : + { + *(.rela.*) + } + /DISCARD/ : + { + *(.plt) + } + /DISCARD/ : + { + *(.iplt) + } + + __rom_region_start = ((134217728)); + rom_start : + { +HIDDEN(__rom_start_address = .); +FILL(0x00); +. += 0x0 - (. - __rom_start_address); +. = ALIGN(4); +. = ALIGN( 1 << LOG2CEIL(4 * 32) ); +. = ALIGN( 1 << LOG2CEIL(4 * (16 + 92)) ); +_vector_start = .; +KEEP(*(.exc_vector_table)) +KEEP(*(".exc_vector_table.*")) +KEEP(*(.vectors)) +_vector_end = .; +. = ALIGN(4); +KEEP(*(.gnu.linkonce.irq_vector_table*)) + _vector_end = .; + } > FLASH + text : + { + __text_region_start = .; + *(.text) + *(".text.*") + *(.gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > FLASH + __text_region_end = .; + .ARM.exidx : + { + __exidx_start = .; + *(.ARM.exidx* gnu.linkonce.armexidx.*) + __exidx_end = .; + } > FLASH + __rodata_region_start = .; + initlevel : + { + __init_start = .; + __init_EARLY_start = .; KEEP(*(SORT(.z_init_EARLY_P_?_*))); KEEP(*(SORT(.z_init_EARLY_P_??_*))); KEEP(*(SORT(.z_init_EARLY_P_???_*))); + __init_PRE_KERNEL_1_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_1_P_?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_1_P_??_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_1_P_???_*))); + __init_PRE_KERNEL_2_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_2_P_?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_2_P_??_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_2_P_???_*))); + __init_POST_KERNEL_start = .; KEEP(*(SORT(.z_init_POST_KERNEL_P_?_*))); KEEP(*(SORT(.z_init_POST_KERNEL_P_??_*))); KEEP(*(SORT(.z_init_POST_KERNEL_P_???_*))); + __init_APPLICATION_start = .; KEEP(*(SORT(.z_init_APPLICATION_P_?_*))); KEEP(*(SORT(.z_init_APPLICATION_P_??_*))); KEEP(*(SORT(.z_init_APPLICATION_P_???_*))); + __init_SMP_start = .; KEEP(*(SORT(.z_init_SMP_P_?_*))); KEEP(*(SORT(.z_init_SMP_P_??_*))); KEEP(*(SORT(.z_init_SMP_P_???_*))); + __init_end = .; + } > FLASH + device_area : { _device_list_start = .; KEEP(*(SORT(._device.static.*_?_*))); KEEP(*(SORT(._device.static.*_??_*))); KEEP(*(SORT(._device.static.*_???_*))); KEEP(*(SORT(._device.static.*_????_*))); KEEP(*(SORT(._device.static.*_?????_*))); _device_list_end = .;; } > FLASH + sw_isr_table : + { + . = ALIGN(4); + *(.gnu.linkonce.sw_isr_table*) + } > FLASH + initlevel_error : + { + KEEP(*(SORT(.z_init_*))) + } + ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.") + app_shmem_regions : ALIGN_WITH_INPUT + { + __app_shmem_regions_start = .; + KEEP(*(SORT(.app_regions.*))); + __app_shmem_regions_end = .; + } > FLASH + k_p4wq_initparam_area : { _k_p4wq_initparam_list_start = .; KEEP(*(SORT_BY_NAME(._k_p4wq_initparam.static.*))); _k_p4wq_initparam_list_end = .;; } > FLASH + _static_thread_data_area : { __static_thread_data_list_start = .; KEEP(*(SORT_BY_NAME(.__static_thread_data.static.*))); __static_thread_data_list_end = .;; } > FLASH + device_deps : ALIGN_WITH_INPUT + { +__device_deps_start = .; +KEEP(*(SORT(.__device_deps_pass2*))); +__device_deps_end = .; + } > FLASH +device_api_area : SUBALIGN(4) +{ + _flash_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._flash_driver_api.static.*))); _flash_driver_api_list_end = .;; + _flash_driver_api_ext_end = .; + _shared_irq_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._shared_irq_driver_api.static.*))); _shared_irq_driver_api_list_end = .;; + _shared_irq_driver_api_ext_end = .; + _dmic_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dmic_driver_api.static.*))); _dmic_driver_api_list_end = .;; + _dmic_driver_api_ext_end = .; + _crypto_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._crypto_driver_api.static.*))); _crypto_driver_api_list_end = .;; + _crypto_driver_api_ext_end = .; + _adc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._adc_driver_api.static.*))); _adc_driver_api_list_end = .;; + _adc_driver_api_ext_end = .; + _auxdisplay_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._auxdisplay_driver_api.static.*))); _auxdisplay_driver_api_list_end = .;; + _auxdisplay_driver_api_ext_end = .; + _bbram_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bbram_driver_api.static.*))); _bbram_driver_api_list_end = .;; + _bbram_driver_api_ext_end = .; + _biometric_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._biometric_driver_api.static.*))); _biometric_driver_api_list_end = .;; + _biometric_driver_api_ext_end = .; + _bt_hci_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bt_hci_driver_api.static.*))); _bt_hci_driver_api_list_end = .;; + _bt_hci_driver_api_ext_end = .; + _can_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._can_driver_api.static.*))); _can_driver_api_list_end = .;; + _can_driver_api_ext_end = .; + _cellular_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._cellular_driver_api.static.*))); _cellular_driver_api_list_end = .;; + _cellular_driver_api_ext_end = .; + _charger_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._charger_driver_api.static.*))); _charger_driver_api_list_end = .;; + _charger_driver_api_ext_end = .; + _clock_control_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._clock_control_driver_api.static.*))); _clock_control_driver_api_list_end = .;; + _nrf_clock_control_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._nrf_clock_control_driver_api.static.*))); _nrf_clock_control_driver_api_list_end = .;; + _nrf_clock_control_driver_api_ext_end = .; + _clock_control_driver_api_ext_end = .; + _comparator_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._comparator_driver_api.static.*))); _comparator_driver_api_list_end = .;; + _comparator_driver_api_ext_end = .; + _coredump_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._coredump_driver_api.static.*))); _coredump_driver_api_list_end = .;; + _coredump_driver_api_ext_end = .; + _counter_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._counter_driver_api.static.*))); _counter_driver_api_list_end = .;; + _counter_driver_api_ext_end = .; + _crc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._crc_driver_api.static.*))); _crc_driver_api_list_end = .;; + _crc_driver_api_ext_end = .; + _dac_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dac_driver_api.static.*))); _dac_driver_api_list_end = .;; + _dac_driver_api_ext_end = .; + _dai_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dai_driver_api.static.*))); _dai_driver_api_list_end = .;; + _dai_driver_api_ext_end = .; + _display_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._display_driver_api.static.*))); _display_driver_api_list_end = .;; + _display_driver_api_ext_end = .; + _dma_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dma_driver_api.static.*))); _dma_driver_api_list_end = .;; + _dma_driver_api_ext_end = .; + _edac_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._edac_driver_api.static.*))); _edac_driver_api_list_end = .;; + _edac_driver_api_ext_end = .; + _eeprom_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._eeprom_driver_api.static.*))); _eeprom_driver_api_list_end = .;; + _eeprom_driver_api_ext_end = .; + _emul_bbram_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._emul_bbram_driver_api.static.*))); _emul_bbram_driver_api_list_end = .;; + _emul_bbram_driver_api_ext_end = .; + _fuel_gauge_emul_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._fuel_gauge_emul_driver_api.static.*))); _fuel_gauge_emul_driver_api_list_end = .;; + _fuel_gauge_emul_driver_api_ext_end = .; + _emul_sensor_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._emul_sensor_driver_api.static.*))); _emul_sensor_driver_api_list_end = .;; + _emul_sensor_driver_api_ext_end = .; + _entropy_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._entropy_driver_api.static.*))); _entropy_driver_api_list_end = .;; + _entropy_driver_api_ext_end = .; + _espi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._espi_driver_api.static.*))); _espi_driver_api_list_end = .;; + _espi_driver_api_ext_end = .; + _espi_saf_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._espi_saf_driver_api.static.*))); _espi_saf_driver_api_list_end = .;; + _espi_saf_driver_api_ext_end = .; + _fpga_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._fpga_driver_api.static.*))); _fpga_driver_api_list_end = .;; + _fpga_driver_api_ext_end = .; + _fuel_gauge_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._fuel_gauge_driver_api.static.*))); _fuel_gauge_driver_api_list_end = .;; + _fuel_gauge_driver_api_ext_end = .; + _gnss_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._gnss_driver_api.static.*))); _gnss_driver_api_list_end = .;; + _gnss_driver_api_ext_end = .; + _gpio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._gpio_driver_api.static.*))); _gpio_driver_api_list_end = .;; + _gpio_driver_api_ext_end = .; + _haptics_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._haptics_driver_api.static.*))); _haptics_driver_api_list_end = .;; + _haptics_driver_api_ext_end = .; + _hwspinlock_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._hwspinlock_driver_api.static.*))); _hwspinlock_driver_api_list_end = .;; + _hwspinlock_driver_api_ext_end = .; + _i2c_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i2c_driver_api.static.*))); _i2c_driver_api_list_end = .;; + _i3c_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i3c_driver_api.static.*))); _i3c_driver_api_list_end = .;; + _i3c_driver_api_ext_end = .; + _i2c_driver_api_ext_end = .; + _i2c_target_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i2c_target_driver_api.static.*))); _i2c_target_driver_api_list_end = .;; + _i2c_target_driver_api_ext_end = .; + _i2s_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i2s_driver_api.static.*))); _i2s_driver_api_list_end = .;; + _i2s_driver_api_ext_end = .; + _ipm_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ipm_driver_api.static.*))); _ipm_driver_api_list_end = .;; + _ipm_driver_api_ext_end = .; + _led_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._led_driver_api.static.*))); _led_driver_api_list_end = .;; + _led_driver_api_ext_end = .; + _led_strip_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._led_strip_driver_api.static.*))); _led_strip_driver_api_list_end = .;; + _led_strip_driver_api_ext_end = .; + _lora_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._lora_driver_api.static.*))); _lora_driver_api_list_end = .;; + _lora_driver_api_ext_end = .; + _mbox_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mbox_driver_api.static.*))); _mbox_driver_api_list_end = .;; + _mbox_driver_api_ext_end = .; + _mdio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mdio_driver_api.static.*))); _mdio_driver_api_list_end = .;; + _mdio_driver_api_ext_end = .; + _mipi_dbi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mipi_dbi_driver_api.static.*))); _mipi_dbi_driver_api_list_end = .;; + _mipi_dbi_driver_api_ext_end = .; + _mipi_dsi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mipi_dsi_driver_api.static.*))); _mipi_dsi_driver_api_list_end = .;; + _mipi_dsi_driver_api_ext_end = .; + _mspi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mspi_driver_api.static.*))); _mspi_driver_api_list_end = .;; + _mspi_driver_api_ext_end = .; + _opamp_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._opamp_driver_api.static.*))); _opamp_driver_api_list_end = .;; + _opamp_driver_api_ext_end = .; + _otp_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._otp_driver_api.static.*))); _otp_driver_api_list_end = .;; + _otp_driver_api_ext_end = .; + _peci_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._peci_driver_api.static.*))); _peci_driver_api_list_end = .;; + _peci_driver_api_ext_end = .; + _ps2_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ps2_driver_api.static.*))); _ps2_driver_api_list_end = .;; + _ps2_driver_api_ext_end = .; + _ptp_clock_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ptp_clock_driver_api.static.*))); _ptp_clock_driver_api_list_end = .;; + _ptp_clock_driver_api_ext_end = .; + _pwm_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._pwm_driver_api.static.*))); _pwm_driver_api_list_end = .;; + _pwm_driver_api_ext_end = .; + _regulator_parent_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._regulator_parent_driver_api.static.*))); _regulator_parent_driver_api_list_end = .;; + _regulator_parent_driver_api_ext_end = .; + _regulator_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._regulator_driver_api.static.*))); _regulator_driver_api_list_end = .;; + _regulator_driver_api_ext_end = .; + _reset_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._reset_driver_api.static.*))); _reset_driver_api_list_end = .;; + _reset_driver_api_ext_end = .; + _retained_mem_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._retained_mem_driver_api.static.*))); _retained_mem_driver_api_list_end = .;; + _retained_mem_driver_api_ext_end = .; + _rtc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._rtc_driver_api.static.*))); _rtc_driver_api_list_end = .;; + _rtc_driver_api_ext_end = .; + _sdhc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._sdhc_driver_api.static.*))); _sdhc_driver_api_list_end = .;; + _sdhc_driver_api_ext_end = .; + _sensor_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._sensor_driver_api.static.*))); _sensor_driver_api_list_end = .;; + _sensor_driver_api_ext_end = .; + _smbus_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._smbus_driver_api.static.*))); _smbus_driver_api_list_end = .;; + _smbus_driver_api_ext_end = .; + _spi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._spi_driver_api.static.*))); _spi_driver_api_list_end = .;; + _spi_driver_api_ext_end = .; + _syscon_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._syscon_driver_api.static.*))); _syscon_driver_api_list_end = .;; + _syscon_driver_api_ext_end = .; + _tee_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._tee_driver_api.static.*))); _tee_driver_api_list_end = .;; + _tee_driver_api_ext_end = .; + _tgpio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._tgpio_driver_api.static.*))); _tgpio_driver_api_list_end = .;; + _tgpio_driver_api_ext_end = .; + _uaol_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._uaol_driver_api.static.*))); _uaol_driver_api_list_end = .;; + _uaol_driver_api_ext_end = .; + _video_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._video_driver_api.static.*))); _video_driver_api_list_end = .;; + _video_driver_api_ext_end = .; + _virtio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._virtio_driver_api.static.*))); _virtio_driver_api_list_end = .;; + _virtio_driver_api_ext_end = .; + _w1_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._w1_driver_api.static.*))); _w1_driver_api_list_end = .;; + _w1_driver_api_ext_end = .; + _wdt_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._wdt_driver_api.static.*))); _wdt_driver_api_list_end = .;; + _wdt_driver_api_ext_end = .; + _wuc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._wuc_driver_api.static.*))); _wuc_driver_api_list_end = .;; + _wuc_driver_api_ext_end = .; + _can_transceiver_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._can_transceiver_driver_api.static.*))); _can_transceiver_driver_api_list_end = .;; + _can_transceiver_driver_api_ext_end = .; + _i3c_target_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i3c_target_driver_api.static.*))); _i3c_target_driver_api_list_end = .;; + _i3c_target_driver_api_ext_end = .; + _its_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._its_driver_api.static.*))); _its_driver_api_list_end = .;; + _its_driver_api_ext_end = .; + _vtd_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._vtd_driver_api.static.*))); _vtd_driver_api_list_end = .;; + _vtd_driver_api_ext_end = .; + _renesas_elc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._renesas_elc_driver_api.static.*))); _renesas_elc_driver_api_list_end = .;; + _renesas_elc_driver_api_ext_end = .; + _pcie_ctrl_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._pcie_ctrl_driver_api.static.*))); _pcie_ctrl_driver_api_list_end = .;; + _pcie_ctrl_driver_api_ext_end = .; + _pcie_ep_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._pcie_ep_driver_api.static.*))); _pcie_ep_driver_api_list_end = .;; + _pcie_ep_driver_api_ext_end = .; + _psi5_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._psi5_driver_api.static.*))); _psi5_driver_api_list_end = .;; + _psi5_driver_api_ext_end = .; + _sent_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._sent_driver_api.static.*))); _sent_driver_api_list_end = .;; + _sent_driver_api_ext_end = .; + _svc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._svc_driver_api.static.*))); _svc_driver_api_list_end = .;; + _svc_driver_api_ext_end = .; + _stepper_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._stepper_driver_api.static.*))); _stepper_driver_api_list_end = .;; + _stepper_driver_api_ext_end = .; + _stepper_ctrl_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._stepper_ctrl_driver_api.static.*))); _stepper_ctrl_driver_api_list_end = .;; + _stepper_ctrl_driver_api_ext_end = .; + _uart_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._uart_driver_api.static.*))); _uart_driver_api_list_end = .;; + _uart_driver_api_ext_end = .; + _bc12_emul_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bc12_emul_driver_api.static.*))); _bc12_emul_driver_api_list_end = .;; + _bc12_emul_driver_api_ext_end = .; + _bc12_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bc12_driver_api.static.*))); _bc12_driver_api_list_end = .;; + _bc12_driver_api_ext_end = .; + _usbc_ppc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._usbc_ppc_driver_api.static.*))); _usbc_ppc_driver_api_list_end = .;; + _usbc_ppc_driver_api_ext_end = .; + _tcpc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._tcpc_driver_api.static.*))); _tcpc_driver_api_list_end = .;; + _tcpc_driver_api_ext_end = .; + _usbc_vbus_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._usbc_vbus_driver_api.static.*))); _usbc_vbus_driver_api_list_end = .;; + _usbc_vbus_driver_api_ext_end = .; + _ivshmem_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ivshmem_driver_api.static.*))); _ivshmem_driver_api_list_end = .;; + _ivshmem_driver_api_ext_end = .; + _ethphy_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ethphy_driver_api.static.*))); _ethphy_driver_api_list_end = .;; + _ethphy_driver_api_ext_end = .; +} > FLASH +ztest : +{ + _ztest_expected_result_entry_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_expected_result_entry.static.*))); _ztest_expected_result_entry_list_end = .;; + _ztest_suite_node_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_suite_node.static.*))); _ztest_suite_node_list_end = .;; + _ztest_unit_test_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_unit_test.static.*))); _ztest_unit_test_list_end = .;; + _ztest_test_rule_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_test_rule.static.*))); _ztest_test_rule_list_end = .;; +} > FLASH + init_array : + { + __zephyr_init_array_start = .; + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) + SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array .ctors)) + __zephyr_init_array_end = .; + } > FLASH + ASSERT(__zephyr_init_array_start == __zephyr_init_array_end, + "GNU-style constructors required but STATIC_INIT_GNU not enabled") + bt_l2cap_fixed_chan_area : { _bt_l2cap_fixed_chan_list_start = .; KEEP(*(SORT_BY_NAME(._bt_l2cap_fixed_chan.static.*))); _bt_l2cap_fixed_chan_list_end = .;; } > FLASH + bt_gatt_service_static_area : { _bt_gatt_service_static_list_start = .; KEEP(*(SORT_BY_NAME(._bt_gatt_service_static.static.*))); _bt_gatt_service_static_list_end = .;; } > FLASH + log_strings_area : { _log_strings_list_start = .; KEEP(*(SORT_BY_NAME(._log_strings.static.*))); _log_strings_list_end = .;; } > FLASH + log_stmesp_ptr_area : { _log_stmesp_ptr_list_start = .; KEEP(*(SORT_BY_NAME(._log_stmesp_ptr.static.*))); _log_stmesp_ptr_list_end = .;; } > FLASH + log_stmesp_str_area : { _log_stmesp_str_list_start = .; KEEP(*(SORT_BY_NAME(._log_stmesp_str.static.*))); _log_stmesp_str_list_end = .;; } > FLASH + log_const_area : { _log_const_list_start = .; KEEP(*(SORT_BY_NAME(._log_const.static.*))); _log_const_list_end = .;; } > FLASH + log_backend_area : { _log_backend_list_start = .; KEEP(*(SORT_BY_NAME(._log_backend.static.*))); _log_backend_list_end = .;; } > FLASH + log_link_area : { _log_link_list_start = .; KEEP(*(SORT_BY_NAME(._log_link.static.*))); _log_link_list_end = .;; } > FLASH + tracing_backend_area : { _tracing_backend_list_start = .; KEEP(*(SORT_BY_NAME(._tracing_backend.static.*))); _tracing_backend_list_end = .;; } > FLASH + zephyr_dbg_info : ALIGN_WITH_INPUT + { + KEEP(*(".dbg_thread_info")); + } > FLASH + intc_table_area : { _intc_table_list_start = .; KEEP(*(SORT_BY_NAME(._intc_table.static.*))); _intc_table_list_end = .;; } > FLASH + symbol_to_keep : ALIGN_WITH_INPUT + { + __symbol_to_keep_start = .; + KEEP(*(SORT(.symbol_to_keep*))); + __symbol_to_keep_end = .; + } > FLASH + shell_area : { _shell_list_start = .; KEEP(*(SORT_BY_NAME(._shell.static.*))); _shell_list_end = .;; } > FLASH + shell_root_cmds_area : { _shell_root_cmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_root_cmds.static.*))); _shell_root_cmds_list_end = .;; } > FLASH + shell_subcmds_area : { _shell_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_subcmds.static.*))); _shell_subcmds_list_end = .;; } > FLASH + shell_dynamic_subcmds_area : { _shell_dynamic_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_dynamic_subcmds.static.*))); _shell_dynamic_subcmds_list_end = .;; } > FLASH + shell_remote_area : { _shell_remote_list_start = .; KEEP(*(SORT_BY_NAME(._shell_remote.static.*))); _shell_remote_list_end = .;; } > FLASH + cfb_font_area : { _cfb_font_list_start = .; KEEP(*(SORT_BY_NAME(._cfb_font.static.*))); _cfb_font_list_end = .;; } > FLASH + tdata : ALIGN_WITH_INPUT + { + *(.tdata .tdata.* .gnu.linkonce.td.*); + } > FLASH + tbss (NOLOAD) : ALIGN_WITH_INPUT + { + *(.tbss .tbss.* .gnu.linkonce.tb.* .tcommon); + } > FLASH + PROVIDE(__tdata_start = LOADADDR(tdata)); + PROVIDE(__tdata_align = ALIGNOF(tdata)); + PROVIDE(__tdata_size = (SIZEOF(tdata) + __tdata_align - 1) & ~(__tdata_align - 1)); + PROVIDE(__tdata_end = __tdata_start + __tdata_size); + PROVIDE(__tbss_align = ALIGNOF(tbss)); + PROVIDE(__tbss_start = ADDR(tbss)); + PROVIDE(__tbss_size = (SIZEOF(tbss) + __tbss_align - 1) & ~(__tbss_align - 1)); + PROVIDE(__tbss_end = __tbss_start + __tbss_size); + PROVIDE(__tls_start = __tdata_start); + PROVIDE(__tls_size = __tbss_end - __tdata_start); + PROVIDE(__tls_end = __tbss_end); + rodata : + { + *(.rodata) + *(".rodata.*") + *(.gnu.linkonce.r.*) + . = ALIGN(4); + } > FLASH + PROVIDE(__eh_frame_start = 0); + PROVIDE(__eh_frame_end = 0); + PROVIDE(__eh_frame_hdr_start = 0); + PROVIDE(__eh_frame_hdr_end = 0); + /DISCARD/ : { *(.eh_frame) } + __rodata_region_end = .; + . = ALIGN(_region_min_align); . = ALIGN( 1 << LOG2CEIL(__rodata_region_end - ADDR(rom_start))); + __rom_region_end = __rom_region_start + . - ADDR(rom_start); + __rom_region_size = __rom_region_end - __rom_region_start; + + /DISCARD/ : { + *(.got.plt) + *(.igot.plt) + *(.got) + *(.igot) + } + + . = (536870912); + . = ALIGN(_region_min_align); + _image_ram_start = .; +.ramfunc : ALIGN_WITH_INPUT +{ + __ramfunc_region_start = .; + . = ALIGN(_region_min_align); . = ALIGN( 1 << LOG2CEIL(__ramfunc_size)); + __ramfunc_start = .; + *(.ramfunc) + *(".ramfunc.*") + . = ALIGN(_region_min_align); . = ALIGN( 1 << LOG2CEIL(__ramfunc_size)); + __ramfunc_end = .; +} > RAM AT > FLASH +__ramfunc_size = __ramfunc_end - __ramfunc_start; +__ramfunc_load_start = LOADADDR(.ramfunc); + + datas : ALIGN_WITH_INPUT + { + __data_region_start = .; + __data_start = .; + *(.data) + *(".data.*") + *(".kernel.*") + __data_end = .; + } > RAM AT > FLASH + __data_size = __data_end - __data_start; + __data_load_start = LOADADDR(datas); + __data_region_load_start = LOADADDR(datas); + device_states : ALIGN_WITH_INPUT + { + . = ALIGN(4); + __device_states_start = .; + KEEP(*(".z_devstate")); + KEEP(*(".z_devstate.*")); + __device_states_end = .; + . = ALIGN(4); + } > RAM AT > FLASH + log_mpsc_pbuf_area : ALIGN_WITH_INPUT { _log_mpsc_pbuf_list_start = .; *(SORT_BY_NAME(._log_mpsc_pbuf.static.*)); _log_mpsc_pbuf_list_end = .;; } > RAM AT > FLASH + log_msg_ptr_area : ALIGN_WITH_INPUT { _log_msg_ptr_list_start = .; KEEP(*(SORT_BY_NAME(._log_msg_ptr.static.*))); _log_msg_ptr_list_end = .;; } > RAM AT > FLASH + log_dynamic_area : ALIGN_WITH_INPUT { _log_dynamic_list_start = .; KEEP(*(SORT_BY_NAME(._log_dynamic.static.*))); _log_dynamic_list_end = .;; } > RAM AT > FLASH + k_timer_area : ALIGN_WITH_INPUT { _k_timer_list_start = .; *(SORT_BY_NAME(._k_timer.static.*)); _k_timer_list_end = .;; } > RAM AT > FLASH + k_mem_slab_area : ALIGN_WITH_INPUT { _k_mem_slab_list_start = .; *(SORT_BY_NAME(._k_mem_slab.static.*)); _k_mem_slab_list_end = .;; } > RAM AT > FLASH + k_heap_area : ALIGN_WITH_INPUT { _k_heap_list_start = .; *(SORT_BY_NAME(._k_heap.static.*)); _k_heap_list_end = .;; } > RAM AT > FLASH + k_mutex_area : ALIGN_WITH_INPUT { _k_mutex_list_start = .; *(SORT_BY_NAME(._k_mutex.static.*)); _k_mutex_list_end = .;; } > RAM AT > FLASH + k_stack_area : ALIGN_WITH_INPUT { _k_stack_list_start = .; *(SORT_BY_NAME(._k_stack.static.*)); _k_stack_list_end = .;; } > RAM AT > FLASH + k_msgq_area : ALIGN_WITH_INPUT { _k_msgq_list_start = .; *(SORT_BY_NAME(._k_msgq.static.*)); _k_msgq_list_end = .;; } > RAM AT > FLASH + k_mbox_area : ALIGN_WITH_INPUT { _k_mbox_list_start = .; *(SORT_BY_NAME(._k_mbox.static.*)); _k_mbox_list_end = .;; } > RAM AT > FLASH + k_pipe_area : ALIGN_WITH_INPUT { _k_pipe_list_start = .; *(SORT_BY_NAME(._k_pipe.static.*)); _k_pipe_list_end = .;; } > RAM AT > FLASH + k_sem_area : ALIGN_WITH_INPUT { _k_sem_list_start = .; *(SORT_BY_NAME(._k_sem.static.*)); _k_sem_list_end = .;; } > RAM AT > FLASH + k_event_area : ALIGN_WITH_INPUT { _k_event_list_start = .; *(SORT_BY_NAME(._k_event.static.*)); _k_event_list_end = .;; } > RAM AT > FLASH + k_queue_area : ALIGN_WITH_INPUT { _k_queue_list_start = .; *(SORT_BY_NAME(._k_queue.static.*)); _k_queue_list_end = .;; } > RAM AT > FLASH + k_fifo_area : ALIGN_WITH_INPUT { _k_fifo_list_start = .; *(SORT_BY_NAME(._k_fifo.static.*)); _k_fifo_list_end = .;; } > RAM AT > FLASH + k_lifo_area : ALIGN_WITH_INPUT { _k_lifo_list_start = .; *(SORT_BY_NAME(._k_lifo.static.*)); _k_lifo_list_end = .;; } > RAM AT > FLASH + k_condvar_area : ALIGN_WITH_INPUT { _k_condvar_list_start = .; *(SORT_BY_NAME(._k_condvar.static.*)); _k_condvar_list_end = .;; } > RAM AT > FLASH + sys_mem_blocks_ptr_area : ALIGN_WITH_INPUT { _sys_mem_blocks_ptr_list_start = .; *(SORT_BY_NAME(._sys_mem_blocks_ptr.static.*)); _sys_mem_blocks_ptr_list_end = .;; } > RAM AT > FLASH + net_buf_pool_area : ALIGN_WITH_INPUT { _net_buf_pool_list_start = .; KEEP(*(SORT_BY_NAME(._net_buf_pool.static.*))); _net_buf_pool_list_end = .;; } > RAM AT > FLASH + __data_region_end = .; +/DISCARD/ : +{ + KEEP(*(.irq_info*)) + KEEP(*(.intList*)) +} + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .gnu.build.attributes 0 : { *(.gnu.build.attributes .gnu.build.attributes.*) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .debug_addr 0 : { *(.debug_addr) } + .debug_line_str 0 : { *(.debug_line_str) } + .debug_loclists 0 : { *(.debug_loclists) } + .debug_macro 0 : { *(.debug_macro) } + .debug_names 0 : { *(.debug_names) } + .debug_rnglists 0 : { *(.debug_rnglists) } + .debug_str_offsets 0 : { *(.debug_str_offsets) } + .debug_sup 0 : { *(.debug_sup) } + /DISCARD/ : { *(.note.GNU-stack) } + .ARM.attributes 0 : + { + KEEP(*(.ARM.attributes)) + KEEP(*(.gnu.attributes)) + } + SRAM0 (NOLOAD) : { __SRAM0_start = .; KEEP(*(SRAM0)) KEEP(*(SRAM0.*)) __SRAM0_end = .; } > SRAM0 __SRAM0_size = __SRAM0_end - __SRAM0_start; __SRAM0_load_start = LOADADDR(SRAM0); +.last_section : +{ + KEEP(*(.last_section)) +} > FLASH +_flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start; + bss (NOLOAD) : ALIGN_WITH_INPUT + { + . = ALIGN(4); + __bss_start = .; + __kernel_ram_start = .; + *(.bss) + *(".bss.*") + *(COMMON) + *(".kernel_bss.*") + __bss_end = ALIGN(4); + } > RAM AT > RAM +noinit (NOLOAD) : +{ + *(.noinit) + *(".noinit.*") +} > RAM AT > RAM + __kernel_ram_end = (536870912) + (32768); + __kernel_ram_size = __kernel_ram_end - __kernel_ram_start; + .last_ram_section (NOLOAD) : + { + _image_ram_end = .; + _image_ram_size = _image_ram_end - _image_ram_start; + _end = .; + z_mapped_end = .; + } > RAM AT > RAM + + } diff --git a/zephyrproject/build/mcuboot/zephyr/linker.cmd.dep b/zephyrproject/build/mcuboot/zephyr/linker.cmd.dep new file mode 100644 index 0000000..9c4d471 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/linker.cmd.dep @@ -0,0 +1,93 @@ +linker.cmd: \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/sections.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/section_tags.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/gcc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree.h \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/devicetree_generated.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/irq_multilevel.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_listify.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_is_eq.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_inc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_dec.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_x2.h \ + /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/lib/gcc/arm-zephyr-eabi/14.3.0/include/stdbool.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/io-channels.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/clocks.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/gpio.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/spi.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/dma.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/pwms.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/fixed-partitions.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/ordinals.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/pinctrl.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/can.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/reset.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/mbox.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/port-endpoint.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/display.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/hwspinlock.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/map.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/wuc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/mapped-partition.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/partitions.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/sram.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/devicetree_regions.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-defs.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/common.h \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/offsets.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-tool.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-tool-gcc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel/mm.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel/internal/mm.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-devnull.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/rel-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/llext-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/rom_start_address.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/fill_with_zeros.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/rom_start_offset.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/arm/core/vector_table.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/irq-vector-table-section.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/arm/core/cortex_m/vector_table_pad.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-text.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-kernel-devices.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/iterable_sections.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/device-deps.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-ztest.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-init.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-net.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-bt.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-logging.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-debug.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-interrupt-controllers.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-misc.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/thread-local-storage.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rodata.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/arm/core/swi_tables.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-rom.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/cplusplus-rom.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/ramfunc.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-ram.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-data.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/cplusplus-ram.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/intlist.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/debug-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-noinit.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-noinit.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-priv-stacks.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/ram-end.ld diff --git a/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd b/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd new file mode 100644 index 0000000..ee4e867 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd @@ -0,0 +1,525 @@ + OUTPUT_FORMAT("elf32-littlearm") +_region_min_align = 32; +MEMORY + { + FLASH (rx) : ORIGIN = ((134217728)), LENGTH = ((34816) - 0x0) + RAM (wx) : ORIGIN = (536870912), LENGTH = (32768) + SRAM0 ( rw ) : ORIGIN = (536870912), LENGTH = (32768) + IDT_LIST (wx) : ORIGIN = 0xFFFF7FFF, LENGTH = 32K + } +ENTRY("__start") +SECTIONS + { + .rel.plt : + { + *(.rel.plt) + PROVIDE_HIDDEN (__rel_iplt_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__rel_iplt_end = .); + } + .rela.plt : + { + *(.rela.plt) + PROVIDE_HIDDEN (__rela_iplt_start = .); + *(.rela.iplt) + PROVIDE_HIDDEN (__rela_iplt_end = .); + } + .rel.dyn : + { + *(.rel.*) + } + .rela.dyn : + { + *(.rela.*) + } + /DISCARD/ : + { + *(.plt) + } + /DISCARD/ : + { + *(.iplt) + } + + __rom_region_start = ((134217728)); + rom_start : + { +HIDDEN(__rom_start_address = .); +FILL(0x00); +. += 0x0 - (. - __rom_start_address); +. = ALIGN(4); +. = ALIGN( 1 << LOG2CEIL(4 * 32) ); +. = ALIGN( 1 << LOG2CEIL(4 * (16 + 92)) ); +_vector_start = .; +KEEP(*(.exc_vector_table)) +KEEP(*(".exc_vector_table.*")) +KEEP(*(.vectors)) +_vector_end = .; +. = ALIGN(4); +KEEP(*(.gnu.linkonce.irq_vector_table*)) + _vector_end = .; + } > FLASH + text : + { + __text_region_start = .; + *(.text) + *(".text.*") + *(.gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > FLASH + __text_region_end = .; + .ARM.exidx : + { + __exidx_start = .; + *(.ARM.exidx* gnu.linkonce.armexidx.*) + __exidx_end = .; + } > FLASH + __rodata_region_start = .; + initlevel : + { + __init_start = .; + __init_EARLY_start = .; KEEP(*(SORT(.z_init_EARLY_P_?_*))); KEEP(*(SORT(.z_init_EARLY_P_??_*))); KEEP(*(SORT(.z_init_EARLY_P_???_*))); + __init_PRE_KERNEL_1_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_1_P_?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_1_P_??_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_1_P_???_*))); + __init_PRE_KERNEL_2_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_2_P_?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_2_P_??_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_2_P_???_*))); + __init_POST_KERNEL_start = .; KEEP(*(SORT(.z_init_POST_KERNEL_P_?_*))); KEEP(*(SORT(.z_init_POST_KERNEL_P_??_*))); KEEP(*(SORT(.z_init_POST_KERNEL_P_???_*))); + __init_APPLICATION_start = .; KEEP(*(SORT(.z_init_APPLICATION_P_?_*))); KEEP(*(SORT(.z_init_APPLICATION_P_??_*))); KEEP(*(SORT(.z_init_APPLICATION_P_???_*))); + __init_SMP_start = .; KEEP(*(SORT(.z_init_SMP_P_?_*))); KEEP(*(SORT(.z_init_SMP_P_??_*))); KEEP(*(SORT(.z_init_SMP_P_???_*))); + __init_end = .; + } > FLASH + device_area : { _device_list_start = .; KEEP(*(SORT(._device.static.*_?_*))); KEEP(*(SORT(._device.static.*_??_*))); KEEP(*(SORT(._device.static.*_???_*))); KEEP(*(SORT(._device.static.*_????_*))); KEEP(*(SORT(._device.static.*_?????_*))); _device_list_end = .;; } > FLASH + sw_isr_table : + { + . = ALIGN(4); + *(.gnu.linkonce.sw_isr_table*) + } > FLASH + initlevel_error : + { + KEEP(*(SORT(.z_init_*))) + } + ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.") + app_shmem_regions : ALIGN_WITH_INPUT + { + __app_shmem_regions_start = .; + KEEP(*(SORT(.app_regions.*))); + __app_shmem_regions_end = .; + } > FLASH + k_p4wq_initparam_area : { _k_p4wq_initparam_list_start = .; KEEP(*(SORT_BY_NAME(._k_p4wq_initparam.static.*))); _k_p4wq_initparam_list_end = .;; } > FLASH + _static_thread_data_area : { __static_thread_data_list_start = .; KEEP(*(SORT_BY_NAME(.__static_thread_data.static.*))); __static_thread_data_list_end = .;; } > FLASH + device_deps : ALIGN_WITH_INPUT + { +__device_deps_start = .; +KEEP(*(SORT(.__device_deps_pass2*))); +__device_deps_end = .; + } > FLASH +device_api_area : SUBALIGN(4) +{ + _flash_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._flash_driver_api.static.*))); _flash_driver_api_list_end = .;; + _flash_driver_api_ext_end = .; + _shared_irq_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._shared_irq_driver_api.static.*))); _shared_irq_driver_api_list_end = .;; + _shared_irq_driver_api_ext_end = .; + _dmic_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dmic_driver_api.static.*))); _dmic_driver_api_list_end = .;; + _dmic_driver_api_ext_end = .; + _crypto_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._crypto_driver_api.static.*))); _crypto_driver_api_list_end = .;; + _crypto_driver_api_ext_end = .; + _adc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._adc_driver_api.static.*))); _adc_driver_api_list_end = .;; + _adc_driver_api_ext_end = .; + _auxdisplay_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._auxdisplay_driver_api.static.*))); _auxdisplay_driver_api_list_end = .;; + _auxdisplay_driver_api_ext_end = .; + _bbram_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bbram_driver_api.static.*))); _bbram_driver_api_list_end = .;; + _bbram_driver_api_ext_end = .; + _biometric_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._biometric_driver_api.static.*))); _biometric_driver_api_list_end = .;; + _biometric_driver_api_ext_end = .; + _bt_hci_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bt_hci_driver_api.static.*))); _bt_hci_driver_api_list_end = .;; + _bt_hci_driver_api_ext_end = .; + _can_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._can_driver_api.static.*))); _can_driver_api_list_end = .;; + _can_driver_api_ext_end = .; + _cellular_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._cellular_driver_api.static.*))); _cellular_driver_api_list_end = .;; + _cellular_driver_api_ext_end = .; + _charger_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._charger_driver_api.static.*))); _charger_driver_api_list_end = .;; + _charger_driver_api_ext_end = .; + _clock_control_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._clock_control_driver_api.static.*))); _clock_control_driver_api_list_end = .;; + _nrf_clock_control_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._nrf_clock_control_driver_api.static.*))); _nrf_clock_control_driver_api_list_end = .;; + _nrf_clock_control_driver_api_ext_end = .; + _clock_control_driver_api_ext_end = .; + _comparator_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._comparator_driver_api.static.*))); _comparator_driver_api_list_end = .;; + _comparator_driver_api_ext_end = .; + _coredump_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._coredump_driver_api.static.*))); _coredump_driver_api_list_end = .;; + _coredump_driver_api_ext_end = .; + _counter_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._counter_driver_api.static.*))); _counter_driver_api_list_end = .;; + _counter_driver_api_ext_end = .; + _crc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._crc_driver_api.static.*))); _crc_driver_api_list_end = .;; + _crc_driver_api_ext_end = .; + _dac_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dac_driver_api.static.*))); _dac_driver_api_list_end = .;; + _dac_driver_api_ext_end = .; + _dai_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dai_driver_api.static.*))); _dai_driver_api_list_end = .;; + _dai_driver_api_ext_end = .; + _display_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._display_driver_api.static.*))); _display_driver_api_list_end = .;; + _display_driver_api_ext_end = .; + _dma_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._dma_driver_api.static.*))); _dma_driver_api_list_end = .;; + _dma_driver_api_ext_end = .; + _edac_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._edac_driver_api.static.*))); _edac_driver_api_list_end = .;; + _edac_driver_api_ext_end = .; + _eeprom_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._eeprom_driver_api.static.*))); _eeprom_driver_api_list_end = .;; + _eeprom_driver_api_ext_end = .; + _emul_bbram_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._emul_bbram_driver_api.static.*))); _emul_bbram_driver_api_list_end = .;; + _emul_bbram_driver_api_ext_end = .; + _fuel_gauge_emul_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._fuel_gauge_emul_driver_api.static.*))); _fuel_gauge_emul_driver_api_list_end = .;; + _fuel_gauge_emul_driver_api_ext_end = .; + _emul_sensor_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._emul_sensor_driver_api.static.*))); _emul_sensor_driver_api_list_end = .;; + _emul_sensor_driver_api_ext_end = .; + _entropy_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._entropy_driver_api.static.*))); _entropy_driver_api_list_end = .;; + _entropy_driver_api_ext_end = .; + _espi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._espi_driver_api.static.*))); _espi_driver_api_list_end = .;; + _espi_driver_api_ext_end = .; + _espi_saf_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._espi_saf_driver_api.static.*))); _espi_saf_driver_api_list_end = .;; + _espi_saf_driver_api_ext_end = .; + _fpga_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._fpga_driver_api.static.*))); _fpga_driver_api_list_end = .;; + _fpga_driver_api_ext_end = .; + _fuel_gauge_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._fuel_gauge_driver_api.static.*))); _fuel_gauge_driver_api_list_end = .;; + _fuel_gauge_driver_api_ext_end = .; + _gnss_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._gnss_driver_api.static.*))); _gnss_driver_api_list_end = .;; + _gnss_driver_api_ext_end = .; + _gpio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._gpio_driver_api.static.*))); _gpio_driver_api_list_end = .;; + _gpio_driver_api_ext_end = .; + _haptics_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._haptics_driver_api.static.*))); _haptics_driver_api_list_end = .;; + _haptics_driver_api_ext_end = .; + _hwspinlock_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._hwspinlock_driver_api.static.*))); _hwspinlock_driver_api_list_end = .;; + _hwspinlock_driver_api_ext_end = .; + _i2c_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i2c_driver_api.static.*))); _i2c_driver_api_list_end = .;; + _i3c_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i3c_driver_api.static.*))); _i3c_driver_api_list_end = .;; + _i3c_driver_api_ext_end = .; + _i2c_driver_api_ext_end = .; + _i2c_target_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i2c_target_driver_api.static.*))); _i2c_target_driver_api_list_end = .;; + _i2c_target_driver_api_ext_end = .; + _i2s_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i2s_driver_api.static.*))); _i2s_driver_api_list_end = .;; + _i2s_driver_api_ext_end = .; + _ipm_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ipm_driver_api.static.*))); _ipm_driver_api_list_end = .;; + _ipm_driver_api_ext_end = .; + _led_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._led_driver_api.static.*))); _led_driver_api_list_end = .;; + _led_driver_api_ext_end = .; + _led_strip_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._led_strip_driver_api.static.*))); _led_strip_driver_api_list_end = .;; + _led_strip_driver_api_ext_end = .; + _lora_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._lora_driver_api.static.*))); _lora_driver_api_list_end = .;; + _lora_driver_api_ext_end = .; + _mbox_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mbox_driver_api.static.*))); _mbox_driver_api_list_end = .;; + _mbox_driver_api_ext_end = .; + _mdio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mdio_driver_api.static.*))); _mdio_driver_api_list_end = .;; + _mdio_driver_api_ext_end = .; + _mipi_dbi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mipi_dbi_driver_api.static.*))); _mipi_dbi_driver_api_list_end = .;; + _mipi_dbi_driver_api_ext_end = .; + _mipi_dsi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mipi_dsi_driver_api.static.*))); _mipi_dsi_driver_api_list_end = .;; + _mipi_dsi_driver_api_ext_end = .; + _mspi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._mspi_driver_api.static.*))); _mspi_driver_api_list_end = .;; + _mspi_driver_api_ext_end = .; + _opamp_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._opamp_driver_api.static.*))); _opamp_driver_api_list_end = .;; + _opamp_driver_api_ext_end = .; + _otp_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._otp_driver_api.static.*))); _otp_driver_api_list_end = .;; + _otp_driver_api_ext_end = .; + _peci_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._peci_driver_api.static.*))); _peci_driver_api_list_end = .;; + _peci_driver_api_ext_end = .; + _ps2_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ps2_driver_api.static.*))); _ps2_driver_api_list_end = .;; + _ps2_driver_api_ext_end = .; + _ptp_clock_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ptp_clock_driver_api.static.*))); _ptp_clock_driver_api_list_end = .;; + _ptp_clock_driver_api_ext_end = .; + _pwm_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._pwm_driver_api.static.*))); _pwm_driver_api_list_end = .;; + _pwm_driver_api_ext_end = .; + _regulator_parent_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._regulator_parent_driver_api.static.*))); _regulator_parent_driver_api_list_end = .;; + _regulator_parent_driver_api_ext_end = .; + _regulator_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._regulator_driver_api.static.*))); _regulator_driver_api_list_end = .;; + _regulator_driver_api_ext_end = .; + _reset_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._reset_driver_api.static.*))); _reset_driver_api_list_end = .;; + _reset_driver_api_ext_end = .; + _retained_mem_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._retained_mem_driver_api.static.*))); _retained_mem_driver_api_list_end = .;; + _retained_mem_driver_api_ext_end = .; + _rtc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._rtc_driver_api.static.*))); _rtc_driver_api_list_end = .;; + _rtc_driver_api_ext_end = .; + _sdhc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._sdhc_driver_api.static.*))); _sdhc_driver_api_list_end = .;; + _sdhc_driver_api_ext_end = .; + _sensor_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._sensor_driver_api.static.*))); _sensor_driver_api_list_end = .;; + _sensor_driver_api_ext_end = .; + _smbus_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._smbus_driver_api.static.*))); _smbus_driver_api_list_end = .;; + _smbus_driver_api_ext_end = .; + _spi_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._spi_driver_api.static.*))); _spi_driver_api_list_end = .;; + _spi_driver_api_ext_end = .; + _syscon_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._syscon_driver_api.static.*))); _syscon_driver_api_list_end = .;; + _syscon_driver_api_ext_end = .; + _tee_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._tee_driver_api.static.*))); _tee_driver_api_list_end = .;; + _tee_driver_api_ext_end = .; + _tgpio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._tgpio_driver_api.static.*))); _tgpio_driver_api_list_end = .;; + _tgpio_driver_api_ext_end = .; + _uaol_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._uaol_driver_api.static.*))); _uaol_driver_api_list_end = .;; + _uaol_driver_api_ext_end = .; + _video_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._video_driver_api.static.*))); _video_driver_api_list_end = .;; + _video_driver_api_ext_end = .; + _virtio_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._virtio_driver_api.static.*))); _virtio_driver_api_list_end = .;; + _virtio_driver_api_ext_end = .; + _w1_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._w1_driver_api.static.*))); _w1_driver_api_list_end = .;; + _w1_driver_api_ext_end = .; + _wdt_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._wdt_driver_api.static.*))); _wdt_driver_api_list_end = .;; + _wdt_driver_api_ext_end = .; + _wuc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._wuc_driver_api.static.*))); _wuc_driver_api_list_end = .;; + _wuc_driver_api_ext_end = .; + _can_transceiver_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._can_transceiver_driver_api.static.*))); _can_transceiver_driver_api_list_end = .;; + _can_transceiver_driver_api_ext_end = .; + _i3c_target_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._i3c_target_driver_api.static.*))); _i3c_target_driver_api_list_end = .;; + _i3c_target_driver_api_ext_end = .; + _its_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._its_driver_api.static.*))); _its_driver_api_list_end = .;; + _its_driver_api_ext_end = .; + _vtd_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._vtd_driver_api.static.*))); _vtd_driver_api_list_end = .;; + _vtd_driver_api_ext_end = .; + _renesas_elc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._renesas_elc_driver_api.static.*))); _renesas_elc_driver_api_list_end = .;; + _renesas_elc_driver_api_ext_end = .; + _pcie_ctrl_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._pcie_ctrl_driver_api.static.*))); _pcie_ctrl_driver_api_list_end = .;; + _pcie_ctrl_driver_api_ext_end = .; + _pcie_ep_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._pcie_ep_driver_api.static.*))); _pcie_ep_driver_api_list_end = .;; + _pcie_ep_driver_api_ext_end = .; + _psi5_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._psi5_driver_api.static.*))); _psi5_driver_api_list_end = .;; + _psi5_driver_api_ext_end = .; + _sent_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._sent_driver_api.static.*))); _sent_driver_api_list_end = .;; + _sent_driver_api_ext_end = .; + _svc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._svc_driver_api.static.*))); _svc_driver_api_list_end = .;; + _svc_driver_api_ext_end = .; + _stepper_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._stepper_driver_api.static.*))); _stepper_driver_api_list_end = .;; + _stepper_driver_api_ext_end = .; + _stepper_ctrl_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._stepper_ctrl_driver_api.static.*))); _stepper_ctrl_driver_api_list_end = .;; + _stepper_ctrl_driver_api_ext_end = .; + _uart_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._uart_driver_api.static.*))); _uart_driver_api_list_end = .;; + _uart_driver_api_ext_end = .; + _bc12_emul_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bc12_emul_driver_api.static.*))); _bc12_emul_driver_api_list_end = .;; + _bc12_emul_driver_api_ext_end = .; + _bc12_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._bc12_driver_api.static.*))); _bc12_driver_api_list_end = .;; + _bc12_driver_api_ext_end = .; + _usbc_ppc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._usbc_ppc_driver_api.static.*))); _usbc_ppc_driver_api_list_end = .;; + _usbc_ppc_driver_api_ext_end = .; + _tcpc_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._tcpc_driver_api.static.*))); _tcpc_driver_api_list_end = .;; + _tcpc_driver_api_ext_end = .; + _usbc_vbus_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._usbc_vbus_driver_api.static.*))); _usbc_vbus_driver_api_list_end = .;; + _usbc_vbus_driver_api_ext_end = .; + _ivshmem_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ivshmem_driver_api.static.*))); _ivshmem_driver_api_list_end = .;; + _ivshmem_driver_api_ext_end = .; + _ethphy_driver_api_list_start = .; KEEP(*(SORT_BY_NAME(._ethphy_driver_api.static.*))); _ethphy_driver_api_list_end = .;; + _ethphy_driver_api_ext_end = .; +} > FLASH +ztest : +{ + _ztest_expected_result_entry_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_expected_result_entry.static.*))); _ztest_expected_result_entry_list_end = .;; + _ztest_suite_node_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_suite_node.static.*))); _ztest_suite_node_list_end = .;; + _ztest_unit_test_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_unit_test.static.*))); _ztest_unit_test_list_end = .;; + _ztest_test_rule_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_test_rule.static.*))); _ztest_test_rule_list_end = .;; +} > FLASH + init_array : + { + __zephyr_init_array_start = .; + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) + SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array .ctors)) + __zephyr_init_array_end = .; + } > FLASH + ASSERT(__zephyr_init_array_start == __zephyr_init_array_end, + "GNU-style constructors required but STATIC_INIT_GNU not enabled") + bt_l2cap_fixed_chan_area : { _bt_l2cap_fixed_chan_list_start = .; KEEP(*(SORT_BY_NAME(._bt_l2cap_fixed_chan.static.*))); _bt_l2cap_fixed_chan_list_end = .;; } > FLASH + bt_gatt_service_static_area : { _bt_gatt_service_static_list_start = .; KEEP(*(SORT_BY_NAME(._bt_gatt_service_static.static.*))); _bt_gatt_service_static_list_end = .;; } > FLASH + log_strings_area : { _log_strings_list_start = .; KEEP(*(SORT_BY_NAME(._log_strings.static.*))); _log_strings_list_end = .;; } > FLASH + log_stmesp_ptr_area : { _log_stmesp_ptr_list_start = .; KEEP(*(SORT_BY_NAME(._log_stmesp_ptr.static.*))); _log_stmesp_ptr_list_end = .;; } > FLASH + log_stmesp_str_area : { _log_stmesp_str_list_start = .; KEEP(*(SORT_BY_NAME(._log_stmesp_str.static.*))); _log_stmesp_str_list_end = .;; } > FLASH + log_const_area : { _log_const_list_start = .; KEEP(*(SORT_BY_NAME(._log_const.static.*))); _log_const_list_end = .;; } > FLASH + log_backend_area : { _log_backend_list_start = .; KEEP(*(SORT_BY_NAME(._log_backend.static.*))); _log_backend_list_end = .;; } > FLASH + log_link_area : { _log_link_list_start = .; KEEP(*(SORT_BY_NAME(._log_link.static.*))); _log_link_list_end = .;; } > FLASH + tracing_backend_area : { _tracing_backend_list_start = .; KEEP(*(SORT_BY_NAME(._tracing_backend.static.*))); _tracing_backend_list_end = .;; } > FLASH + zephyr_dbg_info : ALIGN_WITH_INPUT + { + KEEP(*(".dbg_thread_info")); + } > FLASH + intc_table_area : { _intc_table_list_start = .; KEEP(*(SORT_BY_NAME(._intc_table.static.*))); _intc_table_list_end = .;; } > FLASH + symbol_to_keep : ALIGN_WITH_INPUT + { + __symbol_to_keep_start = .; + KEEP(*(SORT(.symbol_to_keep*))); + __symbol_to_keep_end = .; + } > FLASH + shell_area : { _shell_list_start = .; KEEP(*(SORT_BY_NAME(._shell.static.*))); _shell_list_end = .;; } > FLASH + shell_root_cmds_area : { _shell_root_cmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_root_cmds.static.*))); _shell_root_cmds_list_end = .;; } > FLASH + shell_subcmds_area : { _shell_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_subcmds.static.*))); _shell_subcmds_list_end = .;; } > FLASH + shell_dynamic_subcmds_area : { _shell_dynamic_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_dynamic_subcmds.static.*))); _shell_dynamic_subcmds_list_end = .;; } > FLASH + shell_remote_area : { _shell_remote_list_start = .; KEEP(*(SORT_BY_NAME(._shell_remote.static.*))); _shell_remote_list_end = .;; } > FLASH + cfb_font_area : { _cfb_font_list_start = .; KEEP(*(SORT_BY_NAME(._cfb_font.static.*))); _cfb_font_list_end = .;; } > FLASH + tdata : ALIGN_WITH_INPUT + { + *(.tdata .tdata.* .gnu.linkonce.td.*); + } > FLASH + tbss (NOLOAD) : ALIGN_WITH_INPUT + { + *(.tbss .tbss.* .gnu.linkonce.tb.* .tcommon); + } > FLASH + PROVIDE(__tdata_start = LOADADDR(tdata)); + PROVIDE(__tdata_align = ALIGNOF(tdata)); + PROVIDE(__tdata_size = (SIZEOF(tdata) + __tdata_align - 1) & ~(__tdata_align - 1)); + PROVIDE(__tdata_end = __tdata_start + __tdata_size); + PROVIDE(__tbss_align = ALIGNOF(tbss)); + PROVIDE(__tbss_start = ADDR(tbss)); + PROVIDE(__tbss_size = (SIZEOF(tbss) + __tbss_align - 1) & ~(__tbss_align - 1)); + PROVIDE(__tbss_end = __tbss_start + __tbss_size); + PROVIDE(__tls_start = __tdata_start); + PROVIDE(__tls_size = __tbss_end - __tdata_start); + PROVIDE(__tls_end = __tbss_end); + rodata : + { + *(.rodata) + *(".rodata.*") + *(.gnu.linkonce.r.*) + . = ALIGN(4); + } > FLASH + PROVIDE(__eh_frame_start = 0); + PROVIDE(__eh_frame_end = 0); + PROVIDE(__eh_frame_hdr_start = 0); + PROVIDE(__eh_frame_hdr_end = 0); + /DISCARD/ : { *(.eh_frame) } + __rodata_region_end = .; + . = ALIGN(_region_min_align); . = ALIGN( 1 << LOG2CEIL(__rodata_region_end - ADDR(rom_start))); + __rom_region_end = __rom_region_start + . - ADDR(rom_start); + __rom_region_size = __rom_region_end - __rom_region_start; + + /DISCARD/ : { + *(.got.plt) + *(.igot.plt) + *(.got) + *(.igot) + } + + . = (536870912); + . = ALIGN(_region_min_align); + _image_ram_start = .; +.ramfunc : ALIGN_WITH_INPUT +{ + __ramfunc_region_start = .; + . = ALIGN(_region_min_align); . = ALIGN( 1 << LOG2CEIL(__ramfunc_size)); + __ramfunc_start = .; + *(.ramfunc) + *(".ramfunc.*") + . = ALIGN(_region_min_align); . = ALIGN( 1 << LOG2CEIL(__ramfunc_size)); + __ramfunc_end = .; +} > RAM AT > FLASH +__ramfunc_size = __ramfunc_end - __ramfunc_start; +__ramfunc_load_start = LOADADDR(.ramfunc); + + datas : ALIGN_WITH_INPUT + { + __data_region_start = .; + __data_start = .; + *(.data) + *(".data.*") + *(".kernel.*") + __data_end = .; + } > RAM AT > FLASH + __data_size = __data_end - __data_start; + __data_load_start = LOADADDR(datas); + __data_region_load_start = LOADADDR(datas); + device_states : ALIGN_WITH_INPUT + { + . = ALIGN(4); + __device_states_start = .; + KEEP(*(".z_devstate")); + KEEP(*(".z_devstate.*")); + __device_states_end = .; + . = ALIGN(4); + } > RAM AT > FLASH + log_mpsc_pbuf_area : ALIGN_WITH_INPUT { _log_mpsc_pbuf_list_start = .; *(SORT_BY_NAME(._log_mpsc_pbuf.static.*)); _log_mpsc_pbuf_list_end = .;; } > RAM AT > FLASH + log_msg_ptr_area : ALIGN_WITH_INPUT { _log_msg_ptr_list_start = .; KEEP(*(SORT_BY_NAME(._log_msg_ptr.static.*))); _log_msg_ptr_list_end = .;; } > RAM AT > FLASH + log_dynamic_area : ALIGN_WITH_INPUT { _log_dynamic_list_start = .; KEEP(*(SORT_BY_NAME(._log_dynamic.static.*))); _log_dynamic_list_end = .;; } > RAM AT > FLASH + k_timer_area : ALIGN_WITH_INPUT { _k_timer_list_start = .; *(SORT_BY_NAME(._k_timer.static.*)); _k_timer_list_end = .;; } > RAM AT > FLASH + k_mem_slab_area : ALIGN_WITH_INPUT { _k_mem_slab_list_start = .; *(SORT_BY_NAME(._k_mem_slab.static.*)); _k_mem_slab_list_end = .;; } > RAM AT > FLASH + k_heap_area : ALIGN_WITH_INPUT { _k_heap_list_start = .; *(SORT_BY_NAME(._k_heap.static.*)); _k_heap_list_end = .;; } > RAM AT > FLASH + k_mutex_area : ALIGN_WITH_INPUT { _k_mutex_list_start = .; *(SORT_BY_NAME(._k_mutex.static.*)); _k_mutex_list_end = .;; } > RAM AT > FLASH + k_stack_area : ALIGN_WITH_INPUT { _k_stack_list_start = .; *(SORT_BY_NAME(._k_stack.static.*)); _k_stack_list_end = .;; } > RAM AT > FLASH + k_msgq_area : ALIGN_WITH_INPUT { _k_msgq_list_start = .; *(SORT_BY_NAME(._k_msgq.static.*)); _k_msgq_list_end = .;; } > RAM AT > FLASH + k_mbox_area : ALIGN_WITH_INPUT { _k_mbox_list_start = .; *(SORT_BY_NAME(._k_mbox.static.*)); _k_mbox_list_end = .;; } > RAM AT > FLASH + k_pipe_area : ALIGN_WITH_INPUT { _k_pipe_list_start = .; *(SORT_BY_NAME(._k_pipe.static.*)); _k_pipe_list_end = .;; } > RAM AT > FLASH + k_sem_area : ALIGN_WITH_INPUT { _k_sem_list_start = .; *(SORT_BY_NAME(._k_sem.static.*)); _k_sem_list_end = .;; } > RAM AT > FLASH + k_event_area : ALIGN_WITH_INPUT { _k_event_list_start = .; *(SORT_BY_NAME(._k_event.static.*)); _k_event_list_end = .;; } > RAM AT > FLASH + k_queue_area : ALIGN_WITH_INPUT { _k_queue_list_start = .; *(SORT_BY_NAME(._k_queue.static.*)); _k_queue_list_end = .;; } > RAM AT > FLASH + k_fifo_area : ALIGN_WITH_INPUT { _k_fifo_list_start = .; *(SORT_BY_NAME(._k_fifo.static.*)); _k_fifo_list_end = .;; } > RAM AT > FLASH + k_lifo_area : ALIGN_WITH_INPUT { _k_lifo_list_start = .; *(SORT_BY_NAME(._k_lifo.static.*)); _k_lifo_list_end = .;; } > RAM AT > FLASH + k_condvar_area : ALIGN_WITH_INPUT { _k_condvar_list_start = .; *(SORT_BY_NAME(._k_condvar.static.*)); _k_condvar_list_end = .;; } > RAM AT > FLASH + sys_mem_blocks_ptr_area : ALIGN_WITH_INPUT { _sys_mem_blocks_ptr_list_start = .; *(SORT_BY_NAME(._sys_mem_blocks_ptr.static.*)); _sys_mem_blocks_ptr_list_end = .;; } > RAM AT > FLASH + net_buf_pool_area : ALIGN_WITH_INPUT { _net_buf_pool_list_start = .; KEEP(*(SORT_BY_NAME(._net_buf_pool.static.*))); _net_buf_pool_list_end = .;; } > RAM AT > FLASH + __data_region_end = .; +.intList : +{ + KEEP(*(.irq_info*)) + KEEP(*(.intList*)) +} > IDT_LIST + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .gnu.build.attributes 0 : { *(.gnu.build.attributes .gnu.build.attributes.*) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .debug_addr 0 : { *(.debug_addr) } + .debug_line_str 0 : { *(.debug_line_str) } + .debug_loclists 0 : { *(.debug_loclists) } + .debug_macro 0 : { *(.debug_macro) } + .debug_names 0 : { *(.debug_names) } + .debug_rnglists 0 : { *(.debug_rnglists) } + .debug_str_offsets 0 : { *(.debug_str_offsets) } + .debug_sup 0 : { *(.debug_sup) } + /DISCARD/ : { *(.note.GNU-stack) } + .ARM.attributes 0 : + { + KEEP(*(.ARM.attributes)) + KEEP(*(.gnu.attributes)) + } + SRAM0 (NOLOAD) : { __SRAM0_start = .; KEEP(*(SRAM0)) KEEP(*(SRAM0.*)) __SRAM0_end = .; } > SRAM0 __SRAM0_size = __SRAM0_end - __SRAM0_start; __SRAM0_load_start = LOADADDR(SRAM0); +.last_section : +{ + KEEP(*(.last_section)) +} > FLASH +_flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start; + bss (NOLOAD) : ALIGN_WITH_INPUT + { + . = ALIGN(4); + __bss_start = .; + __kernel_ram_start = .; + *(.bss) + *(".bss.*") + *(COMMON) + *(".kernel_bss.*") + __bss_end = ALIGN(4); + } > RAM AT > RAM +noinit (NOLOAD) : +{ + *(.noinit) + *(".noinit.*") +} > RAM AT > RAM + __kernel_ram_end = (536870912) + (32768); + __kernel_ram_size = __kernel_ram_end - __kernel_ram_start; + .last_ram_section (NOLOAD) : + { + _image_ram_end = .; + _image_ram_size = _image_ram_end - _image_ram_start; + _end = .; + z_mapped_end = .; + } > RAM AT > RAM + + } diff --git a/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep b/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep new file mode 100644 index 0000000..e11b903 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep @@ -0,0 +1,93 @@ +linker_zephyr_pre0.cmd: \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/sections.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/section_tags.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/gcc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree.h \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/devicetree_generated.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/irq_multilevel.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_listify.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_is_eq.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_inc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_dec.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_x2.h \ + /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/lib/gcc/arm-zephyr-eabi/14.3.0/include/stdbool.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/io-channels.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/clocks.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/gpio.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/spi.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/dma.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/pwms.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/fixed-partitions.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/ordinals.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/pinctrl.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/can.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/reset.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/mbox.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/port-endpoint.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/display.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/hwspinlock.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/map.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/wuc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/mapped-partition.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/partitions.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree/sram.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/devicetree_regions.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-defs.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/common.h \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/offsets.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-tool.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-tool-gcc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel/mm.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel/internal/mm.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/linker-devnull.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/rel-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/llext-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/rom_start_address.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/fill_with_zeros.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/rom_start_offset.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/arm/core/vector_table.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/irq-vector-table-section.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/arm/core/cortex_m/vector_table_pad.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-text.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-kernel-devices.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/iterable_sections.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/device-deps.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-ztest.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-init.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-net.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-bt.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-logging.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-debug.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-interrupt-controllers.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom/common-rom-misc.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/thread-local-storage.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rodata.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/arm/core/swi_tables.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-rom.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/cplusplus-rom.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/../arch/common/ramfunc.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-ram.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-data.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/cplusplus-ram.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/intlist.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/debug-sections.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-noinit.ld \ + /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-noinit.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/kobject-priv-stacks.ld \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/ram-end.ld diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/configs.c b/zephyrproject/build/mcuboot/zephyr/misc/generated/configs.c new file mode 100644 index 0000000..f6fb64e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/configs.c @@ -0,0 +1,440 @@ +/* file is auto-generated, do not modify ! */ + +#include + +GEN_ABS_SYM_BEGIN (_ConfigAbsSyms) + +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_USE_TINYCRYPT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SOMETHING_USES_SHA256, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_IMG_HASH_ALG_SHA256_ALLOW, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_IMG_HASH_ALG_SHA256, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SIGNATURE_TYPE_NONE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_CLEANUP_ARM_CORE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MBEDTLS_CONFIG_FILE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_VALIDATE_SLOT0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_PREFER_SWAP_OFFSET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SWAP_USING_MOVE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_MAX_IMG_SECTORS_AUTO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SHARE_BACKEND_DISABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_FIH_PROFILE_OFF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_LOG_LEVEL_INF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_LOG_LEVEL, 3); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE, 768); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_USB_DFU_NO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UPDATEABLE_IMAGE_NUMBER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_BOOT_BANNER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_BANNER_STRING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_USE_TLV_ALLOW_LIST, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_STORAGE_WITH_ERASE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_DEVICE_SETTINGS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MULTITHREADING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USB_DEVICE_PRODUCT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_BOOTUTIL_LIB_OWN_LOG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARDUINO_HEADER_R3_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_CORTEX_M4F_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_V7M_NVIC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_FIXED_CLOCK_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_FIXED_LAYOUT_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_GPIO_KEYS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_GPIO_LEDS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_MMIO_SRAM_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_PWM_LEDS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_DAC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_EXTI_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_FLASH_CONTROLLER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_GPIO_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_HSE_CLOCK_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_I2C_V2_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_LPTIM_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_LPUART_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_LSE_CLOCK_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_NV_FLASH_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_NVM_OTP_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_PINCTRL_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_PWM_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_RCC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_RCC_RCTL_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_RNG_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_RTC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_SPI_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_SPI_FIFO_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_TIMERS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_UART_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_USART_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32_WATCHDOG_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32G4_FLASH_CONTROLLER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_STM32G4_PLL_CLOCK_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_MORPHO_HEADER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_USB_NOP_XCEIV_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ZEPHYR_MAPPED_PARTITION_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ZEPHYR_MEMORY_REGION_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ZEPHYR_POWER_STATE_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MAIN_STACK_SIZE, 10240); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE, 1024); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_IRQS, 92); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, 170000000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_SIZE, 128); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_BASE_ADDRESS, 0x8000000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MP_MAX_NUM_CPUS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DCACHE_LINE_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ICACHE_LINE_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_IDLE_STACK_SIZE, 320); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ISR_STACK_SIZE, 2048); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_TICKS_PER_SEC, 10000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_BIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ROM_START_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_ENTRY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_XIP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_FLASH_LOAD_OFFSET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_ARM_MPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STM32_FLASH_PREFETCH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TICKLESS_KERNEL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CORTEX_M_SYSTICK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_INIT_PRIORITY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USE_DT_CODE_PARTITION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STM32_BACKUP_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_METAIRQ_PRIORITIES, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_PREEMPT_PRIORITIES, 15); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_HEX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_IRQ_VECTOR_TABLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_ISR_TABLES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMESLICE_SIZE, 20); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_EXISTS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_FILL_BUFFER_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HW_STACK_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SW_ISR_TABLE_ALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_DOMAIN_NAME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_EARLY_INIT_HOOK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_SW_ISR_TABLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_INIT_PRIORITY, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_IRQ_START_VECTOR, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ISR_TABLES_LOCAL_DECLARATION_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_MEM_POOL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_USE_RELAX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_ACPICA_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_CMSIS_CORE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_DSP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_NN_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_6_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_CMSIS_CORE_M, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_DHARA_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_FATFS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_ADI_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_AFBR_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_AMBIQ_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_ATMEL_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_BOUFFALOLAB_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_ESPRESSIF_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_ETHOS_U_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_GIGADEVICE_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_INFINEON_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_INTEL_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MICROCHIP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_NORDIC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NUVOTON_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_NXP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_OPENISA_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_QUICKLOGIC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_REALTEK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_REALTEK_BEE_NVIC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_REALTEK_BEE_COMMON_DRIVER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WRAP_REALTEK_BEE_NVIC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_RENESAS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_RPI_PICO_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_SIFLI_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_SILABS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_ST_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_STM32_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_TDK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_TELINK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TI_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_WCH_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_WURTHELEKTRONIK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_XTENSA_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HOSTAP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LIBLC3_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LIBMCTP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LIBMETAL_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LIBSBC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LITTLEFS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LORA_BASICS_MODEM_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LORAMAC_NODE_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LVGL_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MBEDTLS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MBEDTLS_PROMPTLESS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MBEDTLS_VERSION_4_x, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MBEDTLS_3_6_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MCUBOOT_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MIPI_SYS_T_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MLDSA_NATIVE_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NANOPB_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NRF_WIFI_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_OPEN_AMP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_OPENTHREAD_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_PERCEPIO_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_PICOLIBC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_PSA_ARCH_TESTS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_SEGGER_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_SEGGER_RTT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TF_M_TESTS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TF_PSA_CRYPTO_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TRUSTED_FIRMWARE_A_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_ZCBOR_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NRF_HW_MODELS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_STM32CUBE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USE_STM32_LL_UTILS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_BOOTUTIL_LIB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_UTIL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_UTIL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_BOOT_MAX_ALIGN, 8); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_REVISION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_TARGET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_NUCLEO_G431RB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_NUCLEO_G431RB_STM32G431XX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_QUALIFIERS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_SERIES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FAMILY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FAMILY_STM32, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_SERIES_STM32G4X, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_STM32G431XX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SWJ_ANALOG_PRIORITY, 49); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STM32_IOCELL_PRIORITY, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_STM32_FLASH_PREFETCH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPU_ALLOW_FLASH_WRITE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ISA_THUMB2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ASSEMBLER_ISA_THUMB2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_ISA_THUMB2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STACK_ALIGN_DOUBLE_WORD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FAULT_DUMP, 2); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM_STACK_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FP16, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FP16_IEEE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M4, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_SYSTICK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_DWT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_BASEPRI, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_VTOR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV7_M_ARMV8_M_MAINLINE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV7_M_ARMV8_M_FP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPU_STACK_GUARD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_SWO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_LLEXT_VENEERS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_IS_SET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_ROM_OFFSET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM_MPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LITTLE_ENDIAN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_BASE_ADDRESS, 0x20000000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_PRIV_STACKS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_DEVICE_STATE_ALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_SW_ISR_TABLE_ARRAY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_EXCEPTION_DEBUG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_TIMING_FUNCTIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_STACK_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_USERSPACE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_EXECUTABLE_PAGE_BIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_VECTOR_TABLE_RELOCATION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_COREDUMP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_COREDUMP_THREADS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_COREDUMP_STACK_PTR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_ROM_START, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_SUSPEND_TO_RAM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_THREAD_ABORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_CODE_DATA_RELOCATION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_FPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_MPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPU_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPU_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_REGION_PERMISSIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_COOP_PRIORITIES, 16); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MAIN_THREAD_PRIORITY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COOP_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PREEMPT_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PRIORITY_CEILING, -128); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_THREAD_STACK_INFO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SCHED_SIMPLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WAITQ_SIMPLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CURRENT_THREAD_USE_TLS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_WORKQUEUE_PRIORITY, -1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_WORKQUEUE_WORK_TIMEOUT_MS, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BARRIER_OPERATIONS_ARCH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMESLICING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMESLICE_PRIORITY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_MBOX_ASYNC_MSGS, 10); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HEAP_MEM_POOL_SIZE, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SWAP_NONATOMIC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMEOUT_64BIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS, 365); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USE_SWITCH_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_STATIC_INIT_GNU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_OBJECTS, 30); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_LIBC, 35); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, 40); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_DEVICE, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_APPLICATION_INIT_PRIORITY, 90); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_STM32_CUBE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_STM32_HSE_CLOCK, 24000000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_TISCI_PRIORITY, 40); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_HAS_DRIVER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_HAS_EXPLICIT_ERASE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_HAS_PAGE_LAYOUT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_PAGE_LAYOUT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FLASH_STM32, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INTC_INIT_PRIORITY, 40); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INTC_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INTC_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_EXTI_STM32, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO_INTC_STM32, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_CLOCK_INIT_PRIORITY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TICKLESS_CAPABLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CORTEX_M_SYSTICK_INSTALL_ISR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_TIMER_HAS_LPM_COMPANION_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_TIMER_LPM_COMPANION_NONE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STM32_USB_COMMON_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STM32_USB_COMMON_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FULL_LIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PICOLIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PICOLIBC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_ABORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_TIME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_MALLOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_CALLOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_REALLOCARRAY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LIBC_ERRNO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ERRNO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PICOLIBC_USE_TOOLCHAIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PICOLIBC_IO_MINIMAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NEED_LIBC_MEM_PARTITION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_ALLOC_LOOPS, 3); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_ARRAY_SIZE, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_HARDENING_BASIC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_HARDENING_LEVEL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_SMALL_ONLY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_BANNER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_DELAY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ATOMIC_OPERATIONS_BUILTIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_NANO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_FULL_INTEGRAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_CONVERT_CHECK_PTR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_LOAD_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_LOAD_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LIBGCC_RTLIB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_RING_BUFFER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GETOPT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMEUTIL_APPLY_SKEW, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PRINTK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_EARLY_CONSOLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ASSERT_VERBOSE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_LOAD_LOG_PERIODICALLY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OPENAMP_VRING_ALIGNMENT, 16); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_CORE_INIT_PRIORITY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_MODE_MINIMAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_DEFAULT_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_OVERRIDE_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_MAX_LEVEL, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_USE_VLA, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_SIMPLE_MSG_OPTIMIZE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_RATELIMIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_RATELIMIT_INTERVAL_MS, 5000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MEM_ATTR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_PM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_AEP_CHOICE_ZEPHYR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TC_PROVIDES_POSIX_C_LANG_SUPPORT_R, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_C_LANG_SUPPORT_R, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_C_LIB_EXT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMER_RANDOM_INITIAL_STATE, 123456789); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ENTROPY_NODE_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_MAP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COVERAGE_DUMP_PATH_EXCLUDE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_ZEPHYR_1_0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_GNU_EXTENSIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PICOLIBC_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_ORPHAN_SECTION_WARN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_USES_MAPPED_PARTITION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ROM_END_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LD_LINKER_SCRIPT_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LD_LINKER_TEMPLATE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_SORT_BY_ALIGNMENT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_LAST_SECTION_ID, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_LAST_SECTION_ID_PATTERN, 0xE015E015); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_ITERABLE_SUBALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_DEVNULL_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STD_C17, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SIZE_OPTIMIZATIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_TRACK_MACRO_EXPANSION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_COLOR_DIAGNOSTICS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FORTIFY_SOURCE_COMPILE_TIME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_OPT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_VLA_IN_STATEMENTS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_VARIABLE_CLEANUP_ATTRIBUTE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_CODEGEN_VLIW_AUTO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_RUNTIME_ERROR_CHECKS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_BIN_NAME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OUTPUT_STAT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OUTPUT_PRINT_MEMORY_USAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_GAP_FILL_PATTERN, 0xFF); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_STRIP_PATHS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CHECK_INIT_PRIORITIES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WARN_DEPRECATED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ENFORCE_ZEPHYR_STDINT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_IS_BOOTLOADER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LEGACY_GENERATED_INCLUDE_PATH, 1); + +GEN_ABS_SYM_END diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json b/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json new file mode 100644 index 0000000..9f44c3b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/struct_tags.json @@ -0,0 +1,114 @@ +{ + "__net_socket": [ + "modem_socket", + "net_context", + "quic_stream", + "quic_context", + "dispatcher_context", + "spair", + "net_mgmt_socket", + "tls_context", + "websocket_context" + ], + "__subsystem": [ + "flash_driver_api", + "shared_irq_driver_api", + "dmic_driver_api", + "crypto_driver_api", + "adc_driver_api", + "auxdisplay_driver_api", + "bbram_driver_api", + "biometric_driver_api", + "bt_hci_driver_api", + "can_driver_api", + "cellular_driver_api", + "charger_driver_api", + "clock_control_driver_api", + "comparator_driver_api", + "coredump_driver_api", + "counter_driver_api", + "crc_driver_api", + "dac_driver_api", + "dai_driver_api", + "display_driver_api", + "dma_driver_api", + "edac_driver_api", + "eeprom_driver_api", + "emul_bbram_driver_api", + "fuel_gauge_emul_driver_api", + "emul_sensor_driver_api", + "entropy_driver_api", + "espi_driver_api", + "espi_saf_driver_api", + "fpga_driver_api", + "fuel_gauge_driver_api", + "gnss_driver_api", + "gpio_driver_api", + "haptics_driver_api", + "hwspinlock_driver_api", + "i2c_driver_api", + "i2c_target_driver_api", + "i2s_driver_api", + { + "extends": "i2c_driver_api", + "name": "i3c_driver_api" + }, + "ipm_driver_api", + "led_driver_api", + "led_strip_driver_api", + "lora_driver_api", + "mbox_driver_api", + "mdio_driver_api", + "mipi_dbi_driver_api", + "mipi_dsi_driver_api", + "mspi_driver_api", + "opamp_driver_api", + "otp_driver_api", + "peci_driver_api", + "ps2_driver_api", + "ptp_clock_driver_api", + "pwm_driver_api", + "regulator_parent_driver_api", + "regulator_driver_api", + "reset_driver_api", + "retained_mem_driver_api", + "rtc_driver_api", + "sdhc_driver_api", + "sensor_driver_api", + "smbus_driver_api", + "spi_driver_api", + "syscon_driver_api", + "tee_driver_api", + "tgpio_driver_api", + "uaol_driver_api", + "video_driver_api", + "virtio_driver_api", + "w1_driver_api", + "wdt_driver_api", + "wuc_driver_api", + "can_transceiver_driver_api", + { + "extends": "clock_control_driver_api", + "name": "nrf_clock_control_driver_api" + }, + "i3c_target_driver_api", + "its_driver_api", + "vtd_driver_api", + "renesas_elc_driver_api", + "pcie_ctrl_driver_api", + "pcie_ep_driver_api", + "psi5_driver_api", + "sent_driver_api", + "svc_driver_api", + "stepper_driver_api", + "stepper_ctrl_driver_api", + "uart_driver_api", + "bc12_emul_driver_api", + "bc12_driver_api", + "usbc_ppc_driver_api", + "tcpc_driver_api", + "usbc_vbus_driver_api", + "ivshmem_driver_api", + "ethphy_driver_api" + ] +} \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls.json b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls.json new file mode 100644 index 0000000..1c393c9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls.json @@ -0,0 +1,5154 @@ +[ + [ + [ + "int zephyr_read_stdin", + "char *buf, int nbytes" + ], + "libc-hooks.h", + true + ], + [ + [ + "int zephyr_write_stdout", + "const void *buf, int nbytes" + ], + "libc-hooks.h", + true + ], + [ + [ + "int zephyr_fputc", + "int c, FILE * stream" + ], + "libc-hooks.h", + true + ], + [ + [ + "size_t zephyr_fwrite", + "const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream" + ], + "libc-hooks.h", + true + ], + [ + [ + "void sys_clock_getrtoffset", + "struct timespec *tp" + ], + "clock.h", + true + ], + [ + [ + "int sys_clock_settime", + "int clock_id, const struct timespec *tp" + ], + "clock.h", + true + ], + [ + [ + "int sys_clock_nanosleep", + "int clock_id, int flags, const struct timespec *rqtp, struct timespec *rmtp" + ], + "clock.h", + true + ], + [ + [ + "int z_sys_mutex_kernel_lock", + "struct sys_mutex *mutex, k_timeout_t timeout" + ], + "mutex.h", + true + ], + [ + [ + "int z_sys_mutex_kernel_unlock", + "struct sys_mutex *mutex" + ], + "mutex.h", + true + ], + [ + [ + "void z_log_msg_simple_create_0", + "const void *source, uint32_t level, const char *fmt" + ], + "log_msg.h", + true + ], + [ + [ + "void z_log_msg_simple_create_1", + "const void *source, uint32_t level, const char *fmt, uint32_t arg" + ], + "log_msg.h", + true + ], + [ + [ + "void z_log_msg_simple_create_2", + "const void *source, uint32_t level, const char *fmt, uint32_t arg0, uint32_t arg1" + ], + "log_msg.h", + true + ], + [ + [ + "void z_log_msg_static_create", + "const void *source, const struct log_msg_desc desc, uint8_t *package, const void *data" + ], + "log_msg.h", + true + ], + [ + [ + "void log_panic", + "void" + ], + "log_ctrl.h", + true + ], + [ + [ + "bool log_process", + "void" + ], + "log_ctrl.h", + true + ], + [ + [ + "uint32_t log_buffered_cnt", + "void" + ], + "log_ctrl.h", + true + ], + [ + [ + "uint32_t log_filter_set", + "struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level" + ], + "log_ctrl.h", + true + ], + [ + [ + "uint32_t log_frontend_filter_set", + "int16_t source_id, uint32_t level" + ], + "log_ctrl.h", + true + ], + [ + [ + "int flash_read", + "const struct device *dev, off_t offset, void *data, size_t len" + ], + "flash.h", + true + ], + [ + [ + "int flash_write", + "const struct device *dev, off_t offset, const void *data, size_t len" + ], + "flash.h", + true + ], + [ + [ + "int flash_erase", + "const struct device *dev, off_t offset, size_t size" + ], + "flash.h", + true + ], + [ + [ + "int flash_get_size", + "const struct device *dev, uint64_t *size" + ], + "flash.h", + true + ], + [ + [ + "int flash_fill", + "const struct device *dev, uint8_t val, off_t offset, size_t size" + ], + "flash.h", + true + ], + [ + [ + "int flash_flatten", + "const struct device *dev, off_t offset, size_t size" + ], + "flash.h", + true + ], + [ + [ + "int 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], + [ + [ + "int biometric_attr_get", + "const struct device *dev, enum biometric_attribute attr, int32_t *val" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_enroll_start", + "const struct device *dev, uint16_t template_id" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_enroll_capture", + "const struct device *dev, k_timeout_t timeout, struct biometric_capture_result *result" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_enroll_finalize", + "const struct device *dev" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_enroll_abort", + "const struct device *dev" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_template_store", + "const struct device *dev, uint16_t id, const uint8_t *data, size_t size" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_template_read", + "const struct device *dev, uint16_t id, uint8_t *data, size_t size" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_template_delete", + "const struct device *dev, uint16_t id" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_template_delete_all", + "const struct device *dev" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_template_list", + "const struct device *dev, uint16_t *ids, size_t max_count, size_t *actual_count" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_match", + "const struct device *dev, enum biometric_match_mode mode, uint16_t template_id, k_timeout_t timeout, struct biometric_match_result *result" + ], + "biometrics.h", + false + ], + [ + [ + "int biometric_led_control", + "const struct device *dev, enum biometric_led_state state" + ], + "biometrics.h", + false + ], + [ + [ + "int can_get_core_clock", + "const struct device *dev, uint32_t *rate" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_get_bitrate_min", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_get_bitrate_max", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_min", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_max", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_calc_timing", + "const struct device *dev, struct can_timing *res, uint32_t bitrate, uint16_t sample_pnt" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_data_min", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_data_max", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_calc_timing_data", + "const struct device *dev, struct can_timing *res, uint32_t bitrate, uint16_t sample_pnt" + ], + "can.h", + false + ], + [ + [ + "int can_set_timing_data", + "const struct device *dev, const struct can_timing *timing_data" + ], + "can.h", + false + ], + [ + [ + "int can_set_bitrate_data", + "const struct device *dev, uint32_t bitrate_data" + ], + "can.h", + false + ], + [ + [ + "int can_set_timing", + "const struct device *dev, const struct can_timing *timing" + ], + "can.h", + false + ], + [ + [ + "int can_get_capabilities", + "const struct device *dev, can_mode_t *cap" + ], + "can.h", + false + ], + [ + [ + "const struct device *can_get_transceiver", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_start", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_stop", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_set_mode", + "const struct device *dev, can_mode_t mode" + ], + "can.h", + false + ], + [ + [ + "can_mode_t can_get_mode", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_set_bitrate", + "const struct device *dev, uint32_t bitrate" + ], + "can.h", + false + ], + [ + [ + "int can_send", + "const struct device *dev, const struct can_frame *frame, k_timeout_t timeout, can_tx_callback_t callback, void *user_data" + ], + "can.h", + false + ], + [ + [ + "int can_add_rx_filter_msgq", + "const struct device *dev, struct k_msgq *msgq, const struct can_filter *filter" + ], + "can.h", + false + ], + [ + [ + "void can_remove_rx_filter", + "const struct device *dev, int filter_id" + ], + "can.h", + false + ], + [ + [ + "int can_get_max_filters", + "const struct device *dev, bool ide" + ], + "can.h", + false + ], + [ + [ + "int can_get_state", + "const struct device *dev, enum can_state *state, struct can_bus_err_cnt *err_cnt" + ], + "can.h", + false + ], + [ + [ + "int can_recover", + "const struct device *dev, k_timeout_t timeout" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_bit_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_bit0_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_bit1_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_stuff_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_crc_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_form_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_ack_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_rx_overruns", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int charger_get_prop", + "const struct device *dev, const charger_prop_t prop, union charger_propval *val" + ], + "charger.h", + false + ], + [ + [ + "int charger_set_prop", + "const struct device *dev, const charger_prop_t prop, const union charger_propval *val" + ], + "charger.h", + false + ], + [ + [ + "int charger_charge_enable", + "const struct device *dev, const bool enable" + ], + "charger.h", + false + ], + [ + [ + "int comparator_get_output", + "const struct device *dev" + ], + "comparator.h", + false + ], + [ + [ + "int comparator_set_trigger", + "const struct device *dev, enum comparator_trigger trigger" + ], + "comparator.h", + false + ], + [ + [ + "int comparator_trigger_is_pending", + "const struct device *dev" + ], + "comparator.h", + false + ], + [ + [ + "bool counter_is_counting_up", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint8_t counter_get_num_of_channels", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_frequency", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_get_frequency_64", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_us_to_ticks", + "const struct device *dev, uint64_t us" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_us_to_ticks_64", + "const struct device *dev, uint64_t us" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_ticks_to_us", + "const struct device *dev, uint32_t ticks" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_ticks_to_us_64", + "const struct device *dev, uint64_t ticks" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_ns_to_ticks", + "const struct device *dev, uint64_t ns" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_ns_to_ticks_64", + "const struct device *dev, uint64_t ns" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_ticks_to_ns", + "const struct device *dev, uint32_t ticks" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_ticks_to_ns_64", + "const struct device *dev, uint64_t ticks" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_max_top_value", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_start", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_stop", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_get_value", + "const struct device *dev, uint32_t *ticks" + ], + "counter.h", + false + ], + [ + [ + "int counter_reset", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_value", + "const struct device *dev, uint32_t ticks" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_channel_alarm", + "const struct device *dev, uint8_t chan_id, const struct counter_alarm_cfg *alarm_cfg" + ], + "counter.h", + false + ], + [ + [ + "int counter_cancel_channel_alarm", + "const struct device *dev, uint8_t chan_id" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_top_value", + "const struct device *dev, const struct counter_top_cfg *cfg" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_pending_int", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_top_value", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_guard_period", + "const struct device *dev, uint32_t ticks, uint32_t flags" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_guard_period", + "const struct device *dev, uint32_t flags" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_get_max_top_value_64", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_top_value_64", + "const struct device *dev, const struct counter_top_cfg_64 *cfg" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_channel_alarm_64", + "const struct device *dev, uint8_t chan_id, const struct counter_alarm_cfg_64 *alarm_cfg" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_get_top_value_64", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_guard_period_64", + "const struct device *dev, uint64_t ticks, uint32_t flags" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_get_guard_period_64", + "const struct device *dev, uint32_t flags" + ], + "counter.h", + false + ], + [ + [ + "int counter_get_value_64", + "const struct device *dev, uint64_t *ticks" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_value_64", + "const struct device *dev, uint64_t ticks" + ], + "counter.h", + false + ], + [ + [ + "int counter_enable_capture", + "const struct device *dev, uint8_t chan_id" + ], + "counter.h", + false + ], + [ + [ + "int counter_disable_capture", + "const struct device *dev, uint8_t chan_id" + ], + "counter.h", + false + ], + [ + [ + "int crc_begin", + "const struct device *dev, struct crc_ctx *ctx" + ], + "crc.h", + false + ], + [ + [ + "int crc_update", + "const struct device *dev, struct crc_ctx *ctx, const void *buffer, size_t bufsize" + ], + "crc.h", + false + ], + [ + [ + "int crc_finish", + "const struct device *dev, struct crc_ctx *ctx" + ], + "crc.h", + false + ], + [ + [ + "int dac_channel_setup", + "const struct device *dev, const struct dac_channel_cfg *channel_cfg" + ], + "dac.h", + false + ], + [ + [ + "int dac_write_value", + "const struct device *dev, uint8_t channel, uint32_t value" + ], + "dac.h", + false + ], + [ + [ + "int dai_probe", + "const struct device *dev" + ], + "dai.h", + false + ], + [ + [ + "int dai_remove", + "const struct device *dev" + ], + "dai.h", + false + ], + [ + [ + "int dai_config_set", + "const struct device *dev, const struct dai_config *cfg, const void *bespoke_cfg, size_t size" + ], + "dai.h", + false + ], + [ + [ + "int dai_config_get", + "const struct device *dev, struct dai_config *cfg, enum dai_dir dir" + ], + "dai.h", + false + ], + [ + [ + "int dai_get_properties_copy", + "const struct device *dev, enum dai_dir dir, int stream_id, struct dai_properties *dst" + ], + "dai.h", + false + ], + [ + [ + "int dai_trigger", + "const struct device *dev, enum dai_dir dir, enum dai_trigger_cmd cmd" + ], + "dai.h", + false + ], + [ + [ + "int dai_ts_config", + "const struct device *dev, struct dai_ts_cfg *cfg" + ], + "dai.h", + false + ], + [ + [ + "int dai_ts_start", + "const struct device *dev, struct dai_ts_cfg *cfg" + ], + "dai.h", + false + ], + [ + [ + "int dai_ts_stop", + "const struct device *dev, struct dai_ts_cfg *cfg" + ], + "dai.h", + false + ], + [ + [ + "int dai_ts_get", + "const struct device *dev, struct dai_ts_cfg *cfg, struct dai_ts_data *tsd" + ], + "dai.h", + false + ], + [ + [ + "int dai_config_update", + "const struct device *dev, const void *bespoke_cfg, size_t size" + ], + "dai.h", + false + ], + [ + [ + "int eeprom_read", + "const struct device *dev, off_t offset, void *data, size_t len" + ], + "eeprom.h", + false + ], + [ + [ + "int eeprom_write", + "const struct device *dev, off_t offset, const void *data, size_t len" + ], + "eeprom.h", + false + ], + [ + [ + "size_t eeprom_get_size", + "const struct device *dev" + ], + "eeprom.h", + false + ], + [ + [ + "int emul_fuel_gauge_set_battery_charging", + "const struct emul *target, uint32_t uV, int uA" + ], + "emul_fuel_gauge.h", + false + ], + [ + [ + "int emul_fuel_gauge_is_battery_cutoff", + "const struct emul *target, bool *cutoff" + ], + "emul_fuel_gauge.h", + false + ], + [ + [ + "int entropy_get_entropy", + "const struct device *dev, uint8_t *buffer, uint16_t length" + ], + "entropy.h", + false + ], + [ + [ + "int espi_config", + "const struct device *dev, struct espi_cfg *cfg" + ], + "espi.h", + false + ], + [ + [ + "bool espi_get_channel_status", + "const struct device *dev, enum espi_channel ch" + ], + "espi.h", + false + ], + [ + [ + "int espi_read_request", + "const struct device *dev, struct espi_request_packet *req" + ], + "espi.h", + false + ], + [ + [ + "int espi_write_request", + "const struct device *dev, struct espi_request_packet *req" + ], + "espi.h", + false + ], + [ + [ + "int espi_read_lpc_request", + "const struct device *dev, enum lpc_peripheral_opcode op, uint32_t *data" + ], + "espi.h", + false + ], + [ + [ + "int espi_write_lpc_request", + "const struct device *dev, enum lpc_peripheral_opcode op, uint32_t *data" + ], + "espi.h", + false + ], + [ + [ + "int espi_send_vwire", + "const struct device *dev, enum espi_vwire_signal signal, uint8_t level" + ], + "espi.h", + false + ], + [ + [ + "int espi_receive_vwire", + "const struct device *dev, enum espi_vwire_signal signal, uint8_t *level" + ], + "espi.h", + false + ], + [ + [ + "int espi_send_oob", + "const struct device *dev, struct espi_oob_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_receive_oob", + "const struct device *dev, struct espi_oob_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_read_flash", + "const struct device *dev, struct espi_flash_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_write_flash", + "const struct device *dev, struct espi_flash_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_flash_erase", + "const struct device *dev, struct espi_flash_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_saf_config", + "const struct device *dev, const struct espi_saf_cfg *cfg" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_set_protection_regions", + " const struct device *dev, const struct espi_saf_protection *pr" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_activate", + "const struct device *dev" + ], + "espi_saf.h", + false + ], + [ + [ + "bool espi_saf_get_channel_status", + "const struct device *dev" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_read", + "const struct device *dev, struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_write", + "const struct device *dev, struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_erase", + "const struct device *dev, struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_unsuccess", + "const struct device *dev, struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int fuel_gauge_get_prop", + "const struct device *dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val *val" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_get_props", + "const struct device *dev, const fuel_gauge_prop_t *props, union fuel_gauge_prop_val *vals, size_t len" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_set_prop", + "const struct device *dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_set_props", + "const struct device *dev, const fuel_gauge_prop_t *props, const union fuel_gauge_prop_val *vals, size_t len" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_get_buffer_prop", + "const struct device *dev, fuel_gauge_prop_t prop_type, void *dst, size_t dst_len" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_battery_cutoff", + "const struct device *dev" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int gnss_set_fix_rate", + "const struct device *dev, uint32_t fix_interval_ms" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_fix_rate", + "const struct device *dev, uint32_t *fix_interval_ms" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_set_navigation_mode", + "const struct device *dev, enum gnss_navigation_mode mode" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_navigation_mode", + "const struct device *dev, enum gnss_navigation_mode *mode" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_set_enabled_systems", + "const struct device *dev, gnss_systems_t systems" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_enabled_systems", + "const struct device *dev, gnss_systems_t *systems" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_supported_systems", + "const struct device *dev, gnss_systems_t *systems" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_latest_timepulse", + "const struct device *dev, k_ticks_t *timestamp" + ], + "gnss.h", + false + ], + [ + [ + "int gpio_pin_interrupt_configure", + "const struct device *port, gpio_pin_t pin, gpio_flags_t flags" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_pin_configure", + "const struct device *port, gpio_pin_t pin, gpio_flags_t flags" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_port_get_direction", + "const struct device *port, gpio_port_pins_t map, gpio_port_pins_t *inputs, gpio_port_pins_t *outputs" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_pin_get_config", + "const struct device *port, gpio_pin_t pin, gpio_flags_t *flags" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_port_get_raw", + "const struct device *port, gpio_port_value_t *value" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_port_set_masked_raw", + "const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_port_set_bits_raw", + "const struct device *port, gpio_port_pins_t pins" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_port_clear_bits_raw", + "const struct device *port, gpio_port_pins_t pins" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_port_toggle_bits", + "const struct device *port, gpio_port_pins_t pins" + ], + "gpio.h", + false + ], + [ + [ + "int gpio_get_pending_int", + "const struct device *dev" + ], + "gpio.h", + false + ], + [ + [ + "int haptics_start_output", + "const struct device *dev" + ], + "haptics.h", + false + ], + [ + [ + "int haptics_stop_output", + "const struct device *dev" + ], + "haptics.h", + false + ], + [ + [ + "ssize_t hwinfo_get_device_id", + "uint8_t *buffer, size_t length" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_get_device_eui64", + "uint8_t *buffer" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_get_reset_cause", + "uint32_t *cause" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_clear_reset_cause", + "void" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_get_supported_reset_cause", + "uint32_t *supported" + ], + "hwinfo.h", + false + ], + [ + [ + "int i2c_configure", + "const struct device *dev, uint32_t dev_config" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_get_config", + "const struct device *dev, uint32_t *dev_config" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_transfer", + "const struct device *dev, struct i2c_msg *msgs, uint8_t num_msgs, uint16_t addr" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_recover_bus", + "const struct device *dev" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_target_driver_register", + "const struct device *dev" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_target_driver_unregister", + "const struct device *dev" + ], + "i2c.h", + false + ], + [ + [ + "int i2s_configure", + "const struct device *dev, enum i2s_dir dir, const struct i2s_config *cfg" + ], + "i2s.h", + false + ], + [ + [ + "int i2s_buf_read", + "const struct device *dev, void *buf, size_t *size" + ], + "i2s.h", + false + ], + [ + [ + "int i2s_buf_write", + "const struct device *dev, void *buf, size_t size" + ], + "i2s.h", + false + ], + [ + [ + "int i2s_trigger", + "const struct device *dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd" + ], + "i2s.h", + false + ], + [ + [ + "int i3c_do_ccc", + "const struct device *dev, struct i3c_ccc_payload *payload" + ], + "i3c.h", + false + ], + [ + [ + "int i3c_do_ccc_cb", + "const struct device *dev, struct i3c_ccc_payload *payload, i3c_callback_t cb, void *userdata" + ], + "i3c.h", + false + ], + [ + [ + "int i3c_transfer", + "struct i3c_device_desc *target, struct i3c_msg *msgs, uint8_t num_msgs" + ], + "i3c.h", + false + ], + [ + [ + "int i3c_transfer_cb", + "struct i3c_device_desc *target, struct i3c_msg *msgs, uint8_t num_msgs, i3c_callback_t cb, void *userdata" + ], + "i3c.h", + false + ], + [ + [ + "int ipm_send", + "const struct device *ipmdev, int wait, uint32_t id, const void *data, int size" + ], + "ipm.h", + false + ], + [ + [ + "int ipm_max_data_size_get", + "const struct device *ipmdev" + ], + "ipm.h", + false + ], + [ + [ + "uint32_t ipm_max_id_val_get", + "const struct device *ipmdev" + ], + "ipm.h", + false + ], + [ + [ + "int ipm_set_enabled", + "const struct device *ipmdev, int enable" + ], + "ipm.h", + false + ], + [ + [ + "void ipm_complete", + "const struct device *ipmdev" + ], + "ipm.h", + false + ], + [ + [ + "int led_blink", + "const struct device *dev, uint32_t led, uint32_t delay_on, uint32_t delay_off" + ], + "led.h", + false + ], + [ + [ + "int led_get_info", + "const struct device *dev, uint32_t led, const struct led_info **info" + ], + "led.h", + false + ], + [ + [ + "int led_set_brightness", + "const struct device *dev, uint32_t led, uint8_t value" + ], + "led.h", + false + ], + [ + [ + "int led_write_channels", + "const struct device *dev, uint32_t start_channel, uint32_t num_channels, const uint8_t *buf" + ], + "led.h", + false + ], + [ + [ + "int led_set_channel", + "const struct device *dev, uint32_t channel, uint8_t value" + ], + "led.h", + false + ], + [ + [ + "int led_set_color", + "const struct device *dev, uint32_t led, uint8_t num_colors, const uint8_t *color" + ], + "led.h", + false + ], + [ + [ + "int led_on", + "const struct device *dev, uint32_t led" + ], + "led.h", + false + ], + [ + [ + "int led_off", + "const struct device *dev, uint32_t led" + ], + "led.h", + false + ], + [ + [ + "int mbox_send", + "const struct device *dev, mbox_channel_id_t channel_id, const struct mbox_msg *msg" + ], + "mbox.h", + false + ], + [ + [ + "int mbox_mtu_get", + "const struct device *dev" + ], + "mbox.h", + false + ], + [ + [ + "int mbox_set_enabled", + "const struct device *dev, mbox_channel_id_t channel_id, bool enabled" + ], + "mbox.h", + false + ], + [ + [ + "uint32_t mbox_max_channels_get", + "const struct device *dev" + ], + "mbox.h", + false + ], + [ + [ + "int mdio_read", + "const struct device *dev, uint8_t prtad, uint8_t regad, uint16_t *data" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_write", + "const struct device *dev, uint8_t prtad, uint8_t regad, uint16_t data" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_read_c45", + "const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t *data" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_write_c45", + "const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data" + ], + "mdio.h", + false + ], + [ + [ + "int mspi_config", + "const struct mspi_dt_spec *spec" + ], + "mspi.h", + false + ], + [ + [ + "int mspi_dev_config", + "const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg" + ], + "mspi.h", + false + ], + [ + [ + "int mspi_get_channel_status", + "const struct device *controller, uint8_t ch" + ], + "mspi.h", + false + ], + [ + [ + "int mspi_transceive", + "const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xfer *req" + ], + "mspi.h", + false + ], + [ + [ + "int mspi_xip_config", + "const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xip_cfg *cfg" + ], + "mspi.h", + false + ], + [ + [ + "int mspi_scramble_config", + "const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_scramble_cfg *cfg" + ], + "mspi.h", + false + ], + [ + [ + "int mspi_timing_config", + "const struct device *controller, const struct mspi_dev_id *dev_id, const uint32_t param_mask, void *cfg" + ], + "mspi.h", + false + ], + [ + [ + "int opamp_set_gain", + "const struct device *dev, enum opamp_gain gain" + ], + "opamp.h", + false + ], + [ + [ + "int otp_read", + "const struct device *dev, off_t offset, void *data, size_t len" + ], + "otp.h", + false + ], + [ + [ + "int otp_program", + "const struct device *dev, off_t offset, const void *data, size_t len" + ], + "otp.h", + false + ], + [ + [ + "int peci_config", + "const struct device *dev, uint32_t bitrate" + ], + "peci.h", + false + ], + [ + [ + "int peci_enable", + "const struct device *dev" + ], + "peci.h", + false + ], + [ + [ + "int peci_disable", + "const struct device *dev" + ], + "peci.h", + false + ], + [ + [ + "int peci_transfer", + "const struct device *dev, struct peci_msg *msg" + ], + "peci.h", + false + ], + [ + [ + "int ps2_config", + "const struct device *dev, ps2_callback_t callback_isr" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_write", + "const struct device *dev, uint8_t value" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_read", + "const struct device *dev, uint8_t *value" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_enable_callback", + "const struct device *dev" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_disable_callback", + "const struct device *dev" + ], + "ps2.h", + false + ], + [ + [ + "int ptp_clock_get", + "const struct device *dev, struct net_ptp_time *tm" + ], + "ptp_clock.h", + false + ], + [ + [ + "int pwm_set_cycles", + "const struct device *dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_get_cycles_per_sec", + "const struct device *dev, uint32_t channel, uint64_t *cycles" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_enable_capture", + "const struct device *dev, uint32_t channel" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_disable_capture", + "const struct device *dev, uint32_t channel" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_capture_cycles", + "const struct device *dev, uint32_t channel, pwm_flags_t flags, uint32_t *period, uint32_t *pulse, k_timeout_t timeout" + ], + "pwm.h", + false + ], + [ + [ + "int reset_status", + "const struct device *dev, uint32_t id, uint8_t *status" + ], + "reset.h", + false + ], + [ + [ + "int reset_line_assert", + "const struct device *dev, uint32_t id" + ], + "reset.h", + false + ], + [ + [ + "int reset_line_deassert", + "const struct device *dev, uint32_t id" + ], + "reset.h", + false + ], + [ + [ + "int reset_line_toggle", + "const struct device *dev, uint32_t id" + ], + "reset.h", + false + ], + [ + [ + "ssize_t retained_mem_size", + "const struct device *dev" + ], + "retained_mem.h", + false + ], + [ + [ + "int retained_mem_read", + "const struct device *dev, off_t offset, uint8_t *buffer, size_t size" + ], + "retained_mem.h", + false + ], + [ + [ + "int retained_mem_write", + "const struct device *dev, off_t offset, const uint8_t *buffer, size_t size" + ], + "retained_mem.h", + false + ], + [ + [ + "int retained_mem_clear", + "const struct device *dev" + ], + "retained_mem.h", + false + ], + [ + [ + "int rtc_set_time", + "const struct device *dev, const struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_get_time", + "const struct device *dev, struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_get_supported_fields", + "const struct device *dev, uint16_t id, uint16_t *mask" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_set_time", + "const struct device *dev, uint16_t id, uint16_t mask, const struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_get_time", + "const struct device *dev, uint16_t id, uint16_t *mask, struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_is_pending", + "const struct device *dev, uint16_t id" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_set_calibration", + "const struct device *dev, int32_t calibration" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_get_calibration", + "const struct device *dev, int32_t *calibration" + ], + "rtc.h", + false + ], + [ + [ + "int sdhc_hw_reset", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_request", + "const struct device *dev, struct sdhc_command *cmd, struct sdhc_data *data" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_set_io", + "const struct device *dev, struct sdhc_io *io" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_card_present", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_execute_tuning", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_card_busy", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_get_host_props", + "const struct device *dev, struct sdhc_host_props *props" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_enable_interrupt", + "const struct device *dev, sdhc_interrupt_cb_t callback, int sources, void *user_data" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_disable_interrupt", + "const struct device *dev, int sources" + ], + "sdhc.h", + false + ], + [ + [ + "int sensor_attr_set", + "const struct device *dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value *val" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_attr_get", + "const struct device *dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value *val" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_sample_fetch", + "const struct device *dev" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_sample_fetch_chan", + "const struct device *dev, enum sensor_channel type" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_channel_get", + "const struct device *dev, enum sensor_channel chan, struct sensor_value *val" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_get_decoder", + "const struct device *dev, const struct sensor_decoder_api **decoder" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_reconfigure_read_iodev", + "const struct rtio_iodev *iodev, const struct device *sensor, const struct sensor_chan_spec *channels, size_t num_channels" + ], + "sensor.h", + false + ], + [ + [ + "int smbus_configure", + "const struct device *dev, uint32_t dev_config" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_get_config", + "const struct device *dev, uint32_t *dev_config" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_smbalert_remove_cb", + "const struct device *dev, struct smbus_callback *cb" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_host_notify_remove_cb", + "const struct device *dev, struct smbus_callback *cb" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_quick", + "const struct device *dev, uint16_t addr, enum smbus_direction direction" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_write", + "const struct device *dev, uint16_t addr, uint8_t byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_read", + "const struct device *dev, uint16_t addr, uint8_t *byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_data_write", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint8_t byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_data_read", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint8_t *byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_word_data_write", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint16_t word" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_word_data_read", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint16_t *word" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_pcall", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t *recv_word" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_block_write", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t *buf" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_block_read", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint8_t *count, uint8_t *buf" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_block_pcall", + "const struct device *dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t *snd_buf, uint8_t *rcv_count, uint8_t *rcv_buf" + ], + "smbus.h", + false + ], + [ + [ + "int spi_transceive", + "const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs" + ], + "spi.h", + false + ], + [ + [ + "int spi_release", + "const struct device *dev, const struct spi_config *config" + ], + "spi.h", + false + ], + [ + [ + "int swdp_output_sequence", + "const struct device *dev, const uint32_t count, const uint8_t *const data" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_input_sequence", + "const struct device *dev, const uint32_t count, uint8_t *const buf" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_transfer", + "const struct device *dev, const uint8_t request, uint32_t *const data, const uint8_t idle_cycles, uint8_t *const response" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_set_pins", + "const struct device *dev, const uint8_t pins, const uint8_t value" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_get_pins", + "const struct device *dev, uint8_t *const state" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_set_clock", + "const struct device *dev, const uint32_t clock" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_port_on", + "const struct device *dev" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_port_off", + "const struct device *dev" + ], + "swdp.h", + false + ], + [ + [ + "int swdp_configure", + "const struct device *dev, const uint8_t turnaround, const bool data_phase" + ], + "swdp.h", + false + ], + [ + [ + "int syscon_get_base", + "const struct device *dev, uintptr_t *addr" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_read_reg", + "const struct device *dev, uint32_t reg, uint32_t *val" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_write_reg", + "const struct device *dev, uint32_t reg, uint32_t val" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_update_bits", + "const struct device *dev, uint32_t reg, uint32_t mask, uint32_t val" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_get_size", + "const struct device *dev, size_t *size" + ], + "syscon.h", + false + ], + [ + [ + "int tee_get_version", + "const struct device *dev, struct tee_version_info *info" + ], + "tee.h", + false + ], + [ + [ + "int tee_open_session", + "const struct device *dev, struct tee_open_session_arg *arg, unsigned int num_param, struct tee_param *param, uint32_t *session_id" + ], + "tee.h", + false + ], + [ + [ + "int tee_close_session", + "const struct device *dev, uint32_t session_id" + ], + "tee.h", + false + ], + [ + [ + "int tee_cancel", + "const struct device *dev, uint32_t session_id, uint32_t cancel_id" + ], + "tee.h", + false + ], + [ + [ + "int tee_invoke_func", + "const struct device *dev, struct tee_invoke_func_arg *arg, unsigned int num_param, struct tee_param *param" + ], + "tee.h", + false + ], + [ + [ + "int tee_shm_register", + "const struct device *dev, void *addr, size_t size, uint32_t flags, struct tee_shm **shm" + ], + "tee.h", + false + ], + [ + [ + "int tee_shm_unregister", + "const struct device *dev, struct tee_shm *shm" + ], + "tee.h", + false + ], + [ + [ + "int tee_shm_alloc", + "const struct device *dev, size_t size, uint32_t flags, struct tee_shm **shm" + ], + "tee.h", + false + ], + [ + [ + "int tee_shm_free", + "const struct device *dev, struct tee_shm *shm" + ], + "tee.h", + false + ], + [ + [ + "int tee_suppl_recv", + "const struct device *dev, uint32_t *func, unsigned int *num_params, struct tee_param *param" + ], + "tee.h", + false + ], + [ + [ + "int tee_suppl_send", + "const struct device *dev, unsigned int ret, unsigned int num_params, struct tee_param *param" + ], + "tee.h", + false + ], + [ + [ + "int tgpio_port_get_time", + "const struct device *dev, uint64_t *current_time" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_port_get_cycles_per_second", + "const struct device *dev, uint32_t *cycles" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_disable", + "const struct device *dev, uint32_t pin" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_config_ext_timestamp", + "const struct device *dev, uint32_t pin, uint32_t event_polarity" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_periodic_output", + "const struct device *dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_read_ts_ec", + "const struct device *dev, uint32_t pin, uint64_t *timestamp, uint64_t *event_count" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int uart_err_check", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "int uart_poll_in", + "const struct device *dev, unsigned char *p_char" + ], + "uart.h", + false + ], + [ + [ + "int uart_poll_in_u16", + "const struct device *dev, uint16_t *p_u16" + ], + "uart.h", + false + ], + [ + [ + "void uart_poll_out", + "const struct device *dev, unsigned char out_char" + ], + "uart.h", + false + ], + [ + [ + "void uart_poll_out_u16", + "const struct device *dev, uint16_t out_u16" + ], + "uart.h", + false + ], + [ + [ + "int uart_configure", + "const struct device *dev, const struct uart_config *cfg" + ], + "uart.h", + false + ], + [ + [ + "int uart_config_get", + "const struct device *dev, struct uart_config *cfg" + ], + "uart.h", + false + ], + [ + [ + "void uart_irq_tx_enable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "void uart_irq_tx_disable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "void uart_irq_rx_enable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "void uart_irq_rx_disable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "void uart_irq_err_enable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "void uart_irq_err_disable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "int uart_irq_is_pending", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "int uart_irq_update", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "int uart_tx", + "const struct device *dev, const uint8_t *buf, size_t len, int32_t timeout" + ], + "uart.h", + false + ], + [ + [ + "int uart_tx_u16", + "const struct device *dev, const uint16_t *buf, size_t len, int32_t timeout" + ], + "uart.h", + false + ], + [ + [ + "int uart_tx_abort", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "int uart_rx_enable", + "const struct device *dev, uint8_t *buf, size_t len, int32_t timeout" + ], + "uart.h", + false + ], + [ + [ + "int uart_rx_enable_u16", + "const struct device *dev, uint16_t *buf, size_t len, int32_t timeout" + ], + "uart.h", + false + ], + [ + [ + "int uart_rx_disable", + "const struct device *dev" + ], + "uart.h", + false + ], + [ + [ + "int uart_line_ctrl_set", + "const struct device *dev, uint32_t ctrl, uint32_t val" + ], + "uart.h", + false + ], + [ + [ + "int uart_line_ctrl_get", + "const struct device *dev, uint32_t ctrl, uint32_t *val" + ], + "uart.h", + false + ], + [ + [ + "int uart_drv_cmd", + "const struct device *dev, uint32_t cmd, uint32_t p" + ], + "uart.h", + false + ], + [ + [ + "int w1_change_bus_lock", + "const struct device *dev, bool lock" + ], + "w1.h", + false + ], + [ + [ + "int w1_reset_bus", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_read_bit", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_write_bit", + "const struct device *dev, const bool bit" + ], + "w1.h", + false + ], + [ + [ + "int w1_read_byte", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_write_byte", + "const struct device *dev, uint8_t byte" + ], + "w1.h", + false + ], + [ + [ + "int w1_read_block", + "const struct device *dev, uint8_t *buffer, size_t len" + ], + "w1.h", + false + ], + [ + [ + "int w1_write_block", + "const struct device *dev, const uint8_t *buffer, size_t len" + ], + "w1.h", + false + ], + [ + [ + "size_t w1_get_slave_count", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_configure", + "const struct device *dev, enum w1_settings_type type, uint32_t value" + ], + "w1.h", + false + ], + [ + [ + "int w1_search_bus", + "const struct device *dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void *user_data" + ], + "w1.h", + false + ], + [ + [ + "int wdt_setup", + "const struct device *dev, uint8_t options" + ], + "watchdog.h", + false + ], + [ + [ + "int wdt_disable", + "const struct device *dev" + ], + "watchdog.h", + false + ], + [ + [ + "int wdt_feed", + "const struct device *dev, int channel_id" + ], + "watchdog.h", + false + ], + [ + [ + "const struct flash_simulator_params *flash_simulator_get_params", + "const struct device *dev" + ], + "flash_simulator.h", + false + ], + [ + [ + "void flash_simulator_set_callbacks", + "const struct device *dev, const struct flash_simulator_cb *cb" + ], + "flash_simulator.h", + false + ], + [ + [ + "void *flash_simulator_get_memory", + "const struct device *dev, size_t *mock_size" + ], + "flash_simulator.h", + false + ], + [ + [ + "void nrf_qspi_nor_xip_enable", + "const struct device *dev, bool enable" + ], + "nrf_qspi_nor.h", + false + ], + [ + [ + "int devmux_select_get", + "const struct device *dev" + ], + "devmux.h", + false + ], + [ + [ + "int devmux_select_set", + "struct device *dev, size_t index" + ], + "devmux.h", + false + ], + [ + [ + "int renesas_elc_software_event_generate", + "const struct device *dev, uint32_t event" + ], + "renesas_elc.h", + false + ], + [ + [ + "int renesas_elc_link_set", + "const struct device *dev, uint32_t peripheral, uint32_t event" + ], + "renesas_elc.h", + false + ], + [ + [ + "int renesas_elc_link_break", + "const struct device *dev, uint32_t peripheral" + ], + "renesas_elc.h", + false + ], + [ + [ + "int renesas_elc_enable", + "const struct device *dev" + ], + "renesas_elc.h", + false + ], + [ + [ + "int renesas_elc_disable", + "const struct device *dev" + ], + "renesas_elc.h", + false + ], + [ + [ + "int psi5_start_sync", + "const struct device *dev, uint8_t channel" + ], + "psi5.h", + false + ], + [ + [ + "int psi5_stop_sync", + "const struct device *dev, uint8_t channel" + ], + "psi5.h", + false + ], + [ + [ + "int psi5_send", + "const struct device *dev, uint8_t channel, const uint64_t data, k_timeout_t timeout, psi5_tx_callback_t callback, void *user_data" + ], + "psi5.h", + false + ], + [ + [ + "int psi5_register_callback", + "const struct device *dev, uint8_t channel, struct psi5_rx_callback_configs callback_configs" + ], + "psi5.h", + false + ], + [ + [ + "int maxim_ds3231_req_syncpoint", + "const struct device *dev, struct k_poll_signal *signal" + ], + "maxim_ds3231.h", + false + ], + [ + [ + "int maxim_ds3231_get_syncpoint", + "const struct device *dev, struct maxim_ds3231_syncpoint *syncpoint" + ], + "maxim_ds3231.h", + false + ], + [ + [ + "int sent_start_listening", + "const struct device *dev, uint8_t channel" + ], + "sent.h", + false + ], + [ + [ + "int sent_stop_listening", + "const struct device *dev, uint8_t channel" + ], + "sent.h", + false + ], + [ + [ + "int sent_register_callback", + "const struct device *dev, uint8_t channel, struct sent_rx_callback_configs callback_configs" + ], + "sent.h", + false + ], + [ + [ + "void sip_supervisory_call", + "const struct device *dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res *res" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "bool sip_svc_plat_func_id_valid", + "const struct device *dev, uint32_t command, uint32_t func_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "uint32_t sip_svc_plat_format_trans_id", + "const struct device *dev, uint32_t client_idx, uint32_t trans_idx" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "uint32_t sip_svc_plat_get_trans_idx", + "const struct device *dev, uint32_t trans_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "void sip_svc_plat_update_trans_id", + "const struct device *dev, struct sip_svc_request *request, uint32_t trans_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "uint32_t sip_svc_plat_get_error_code", + "const struct device *dev, struct arm_smccc_res *res" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "int sip_svc_plat_async_res_req", + "const struct device *dev, unsigned long *a0, unsigned long *a1, unsigned long *a2, unsigned long *a3, unsigned long *a4, unsigned long *a5, unsigned long *a6, unsigned long *a7, char *buf, size_t size" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "int sip_svc_plat_async_res_res", + "const struct device *dev, struct arm_smccc_res *res, char *buf, size_t *size, uint32_t *trans_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "void sip_svc_plat_free_async_memory", + "const struct device *dev, struct sip_svc_request *request" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "int stepper_enable", + "const struct device *dev" + ], + "stepper.h", + false + ], + [ + [ + "int stepper_disable", + "const struct device *dev" + ], + "stepper.h", + false + ], + [ + [ + "int stepper_set_micro_step_res", + "const struct device *dev, enum stepper_micro_step_resolution res" + ], + "stepper.h", + false + ], + [ + [ + "int stepper_get_micro_step_res", + "const struct device *dev, enum stepper_micro_step_resolution *res" + ], + "stepper.h", + false + ], + [ + [ + "int stepper_set_event_cb", + "const struct device *dev, stepper_event_cb_t callback, void *user_data" + ], + "stepper.h", + false + ], + [ + [ + "int stepper_ctrl_set_reference_position", + "const struct device *dev, const int32_t value" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_get_actual_position", + "const struct device *dev, int32_t *value" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_set_event_cb", + "const struct device *dev, stepper_ctrl_event_callback_t callback, void *user_data" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_set_microstep_interval", + "const struct device *dev, const uint64_t microstep_interval_ns" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_configure_ramp", + "const struct device *dev, const struct stepper_ctrl_ramp *ramp" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_move_by", + "const struct device *dev, const int32_t micro_steps" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_move_to", + "const struct device *dev, const int32_t micro_steps" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_run", + "const struct device *dev, const enum stepper_ctrl_direction direction" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_stop", + "const struct device *dev" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int stepper_ctrl_is_moving", + "const struct device *dev, bool *is_moving" + ], + "stepper_ctrl.h", + false + ], + [ + [ + "int bc12_set_role", + "const struct device *dev, enum bc12_role role" + ], + "usb_bc12.h", + false + ], + [ + [ + "int bc12_set_result_cb", + "const struct device *dev, bc12_callback_t cb, void *user_data" + ], + "usb_bc12.h", + false + ], + [ + [ + "size_t ivshmem_get_mem", + "const struct device *dev, uintptr_t *memmap" + ], + "ivshmem.h", + false + ], + [ + [ + "uint32_t ivshmem_get_id", + "const struct device *dev" + ], + "ivshmem.h", + false + ], + [ + [ + "uint16_t ivshmem_get_vectors", + "const struct device *dev" + ], + "ivshmem.h", + false + ], + [ + [ + "int ivshmem_int_peer", + "const struct device *dev, uint32_t peer_id, uint16_t vector" + ], + "ivshmem.h", + false + ], + [ + [ + "int ivshmem_register_handler", + "const struct device *dev, struct k_poll_signal *signal, uint16_t vector" + ], + "ivshmem.h", + false + ], + [ + [ + "size_t ivshmem_get_rw_mem_section", + "const struct device *dev, uintptr_t *memmap" + ], + "ivshmem.h", + false + ], + [ + [ + "size_t ivshmem_get_output_mem_section", + "const struct device *dev, uint32_t peer_id, uintptr_t *memmap" + ], + "ivshmem.h", + false + ], + [ + [ + "uint32_t ivshmem_get_state", + "const struct device *dev, uint32_t peer_id" + ], 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*thread, struct k_mem_paging_stats_t *stats" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_histogram_eviction_get", + " struct k_mem_paging_histogram_t *hist" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_histogram_backing_store_page_in_get", + " struct k_mem_paging_histogram_t *hist" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_histogram_backing_store_page_out_get", + " struct k_mem_paging_histogram_t *hist" + ], + "demand_paging.h", + false + ], + [ + [ + "ssize_t llext_get_fn_table", + "struct llext *ext, bool is_init, void *buf, size_t size" + ], + "llext.h", + false + ], + [ + [ + "void updatehub_autohandler", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "enum updatehub_response updatehub_probe", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "enum updatehub_response updatehub_update", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "int updatehub_confirm", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "int updatehub_reboot", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "int updatehub_report_error", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "const struct device *net_eth_get_ptp_clock_by_index", + "int index" + ], + "ethernet.h", + false + ], + [ + [ + "int net_if_ipv6_addr_lookup_by_index", + "const struct net_in6_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv6_addr_add_by_index", + "int index, const struct net_in6_addr *addr, enum net_addr_type addr_type, uint32_t vlifetime" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv6_addr_rm_by_index", + "int index, const struct net_in6_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "int net_if_ipv4_addr_lookup_by_index", + "const struct net_in_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv4_addr_add_by_index", + "int index, const struct net_in_addr *addr, enum net_addr_type addr_type, uint32_t vlifetime" + ], + "net_if.h", + false + ], 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[ + [ + "ssize_t zsock_recvfrom", + "int sock, void *buf, size_t max_len, int flags, struct net_sockaddr *src_addr, net_socklen_t *addrlen" + ], + "socket.h", + false + ], + [ + [ + "ssize_t zsock_recvmsg", + "int sock, struct net_msghdr *msg, int flags" + ], + "socket.h", + false + ], + [ + [ + "int zsock_fcntl_impl", + "int sock, int cmd, int flags" + ], + "socket.h", + false + ], + [ + [ + "int zsock_ioctl_impl", + "int sock, unsigned long request, va_list ap" + ], + "socket.h", + false + ], + [ + [ + "int zsock_getsockopt", + "int sock, int level, int optname, void *optval, net_socklen_t *optlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_setsockopt", + "int sock, int level, int optname, const void *optval, net_socklen_t optlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_getpeername", + "int sock, struct net_sockaddr *addr, net_socklen_t *addrlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_getsockname", + "int sock, struct net_sockaddr *addr, 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"atomic_c.h", + false + ], + [ + [ + "bool atomic_ptr_cas", + "atomic_ptr_t *target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_add", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_sub", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_set", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_ptr_val_t atomic_ptr_set", + "atomic_ptr_t *target, atomic_ptr_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_or", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_xor", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_and", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_nand", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "int *z_errno", + "void" + ], + "errno_private.h", + false + ], + [ + [ + "int zvfs_poll", + "struct zvfs_pollfd *fds, int nfds, int poll_timeout" + ], + "fdtable.h", + false + ], + [ + [ + "int zvfs_select", + "int nfds, struct zvfs_fd_set *ZRESTRICT readfds, struct zvfs_fd_set *ZRESTRICT writefds, struct zvfs_fd_set *ZRESTRICT errorfds, const struct timespec *ZRESTRICT timeout, const void *ZRESTRICT sigmask" + ], + "fdtable.h", + false + ] +] \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt new file mode 100644 index 0000000..a68832c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt @@ -0,0 +1 @@ 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b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr new file mode 120000 index 0000000..c7232a5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_acpi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_acpi new file mode 120000 index 0000000..c67ecf5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_acpi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/acpi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory new file mode 120000 index 0000000..ba885b6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/app_memory \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch new file mode 120000 index 0000000..db999b0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc new file mode 120000 index 0000000..4c74a01 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat new file mode 120000 index 0000000..81de20e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arc/asm-compat \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 new file mode 120000 index 0000000..ef5f52c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arc/v2 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp new file mode 120000 index 0000000..378bba0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arc/v2/dsp \ No newline at end of file diff --git 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--git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx new file mode 120000 index 0000000..88182f0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arc/v2/vpx \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm new file mode 120000 index 0000000..2bfe764 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 new file mode 120000 index 0000000..56183dc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm64 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r new file mode 120000 index 0000000..4536b91 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm64/cortex_r \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts new file mode 120000 index 0000000..ad6f969 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm64/scripts \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r new file mode 120000 index 0000000..59482d0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_a_r \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts new file mode 120000 index 0000000..9d79467 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_a_r/scripts \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m new file mode 120000 index 0000000..1f7fc82 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts new file mode 120000 index 0000000..31b4c66 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_m/scripts \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r new file mode 120000 index 0000000..ed1f279 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_r \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts new file mode 120000 index 0000000..c3dffe1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/cortex_r/scripts \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu new file mode 120000 index 0000000..cfc2281 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/mmu \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu new file mode 120000 index 0000000..3f6e9b6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/arm/mpu \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_common b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_common new file mode 120000 index 0000000..7f61aa5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_common @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/common \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips new file mode 120000 index 0000000..8f2364e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/mips \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc new file mode 120000 index 0000000..91819f1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_openrisc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/openrisc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix new file mode 120000 index 0000000..2390183 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/posix \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv new file mode 120000 index 0000000..d73241b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/riscv \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common new file mode 120000 index 0000000..3daecc7 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/riscv/common \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged new file mode 120000 index 0000000..0400a72 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/riscv/riscv-privileged \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx new file mode 120000 index 0000000..04ba834 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_rx @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/rx \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc new file mode 120000 index 0000000..3e36b09 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/sparc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 new file mode 120000 index 0000000..7e5059b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/x86 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 new file mode 120000 index 0000000..35616cd --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/x86/ia32 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts new file mode 120000 index 0000000..d96269a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/x86/ia32/scripts \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 new file mode 120000 index 0000000..c870af1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/x86/intel64 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa new file mode 120000 index 0000000..b2ec38a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/arch/xtensa \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_audio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_audio new file mode 120000 index 0000000..41b4b0f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_audio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/audio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth new file mode 120000 index 0000000..aa10371 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/bluetooth \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio new file mode 120000 index 0000000..7977361 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/bluetooth/audio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic new file mode 120000 index 0000000..0bdaaaa --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/bluetooth/classic \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh new file mode 120000 index 0000000..7fd6ca9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/bluetooth/mesh \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services new file mode 120000 index 0000000..720a396 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/bluetooth/services \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus new file mode 120000 index 0000000..c333e50 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/bluetooth/services/nus \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_canbus b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_canbus new file mode 120000 index 0000000..5061343 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_canbus @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/canbus \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_cleanup b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_cleanup new file mode 120000 index 0000000..6a17a21 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_cleanup @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/cleanup \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_console b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_console new file mode 120000 index 0000000..25b8d10 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_console @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/console \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq new file mode 120000 index 0000000..ff1bcca --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_cpu_freq @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/cpu_freq \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_crypto b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_crypto new file mode 120000 index 0000000..ee995e5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_crypto @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/crypto \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dap b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dap new file mode 120000 index 0000000..927d75e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dap @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dap \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_data b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_data new file mode 120000 index 0000000..be02d17 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_data @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/data \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug new file mode 120000 index 0000000..a2a2d6c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/debug \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight new file mode 120000 index 0000000..71d4905 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/debug/coresight \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree new file mode 120000 index 0000000..473713f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/devicetree \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dfu b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dfu new file mode 120000 index 0000000..432f7de --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dfu @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dfu \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_display b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_display new file mode 120000 index 0000000..e2ddb83 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_display @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/display \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers new file mode 120000 index 0000000..411b666 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc new file mode 120000 index 0000000..033b7d1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/adc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics new file mode 120000 index 0000000..08f5323 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_biometrics @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/biometrics \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth new file mode 120000 index 0000000..df75af9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/bluetooth \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can new file mode 120000 index 0000000..edc9883 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/can \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger new file mode 120000 index 0000000..df642c3 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_charger @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/charger \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control new file mode 120000 index 0000000..78a754d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/clock_control \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator new file mode 120000 index 0000000..48bb5e3 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/comparator \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console new file mode 120000 index 0000000..f71bfdc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/console \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter new file mode 120000 index 0000000..2e20255 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_counter @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/counter \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac new file mode 120000 index 0000000..0c99852 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dac @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/dac \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug new file mode 120000 index 0000000..26bc61c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_debug @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/debug \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk new file mode 120000 index 0000000..0610767 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_disk @@ -0,0 +1 @@ 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+/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/eeprom \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet new file mode 120000 index 0000000..9bcda19 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/ethernet \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware new file mode 120000 index 0000000..5c35b18 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/firmware \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg new file mode 120000 index 0000000..a631d7b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_qemu_fwcfg @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/firmware/qemu_fwcfg \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi new file mode 120000 index 0000000..c4bce4b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/firmware/scmi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp new file mode 120000 index 0000000..8102016 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi_nxp @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/firmware/scmi/nxp \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci new file mode 120000 index 0000000..d650f8c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_tisci @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/firmware/tisci \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash new file mode 120000 index 0000000..e0d61c2 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/flash \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss new file mode 120000 index 0000000..839db4f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/gnss \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio new file mode 120000 index 0000000..676973a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/gpio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics new file mode 120000 index 0000000..939b534 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/haptics \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c new file mode 120000 index 0000000..764e659 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/i2c \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target new file mode 120000 index 0000000..1aa3b82 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/i2c/target \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c new file mode 120000 index 0000000..f19b30c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/i3c \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 new file mode 120000 index 0000000..48f593d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/ieee802154 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller new file mode 120000 index 0000000..2c12aa1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/interrupt_controller \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led new file mode 120000 index 0000000..e5c4f6b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/led \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip new file mode 120000 index 0000000..8148304 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/led_strip \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc new file mode 120000 index 0000000..45bdc8b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_memc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/memc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd new file mode 120000 index 0000000..3d9aa44 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/mfd \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy new file mode 120000 index 0000000..56841d4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/mic_privacy \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel new file mode 120000 index 0000000..9bc3991 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/mic_privacy/intel \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi new file mode 120000 index 0000000..dd91905 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/mipi_dsi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc new file mode 120000 index 0000000..19ef794 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux new file mode 120000 index 0000000..0d54559 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/devmux \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram new file mode 120000 index 0000000..e4d407e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_flexram @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/flexram \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx new file mode 120000 index 0000000..dd305ba --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/ft8xx \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd new file mode 120000 index 0000000..51e4c13 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/grove_lcd \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn new file mode 120000 index 0000000..22ed9b6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/interconn \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc new file mode 120000 index 0000000..eace2a0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_interconn_renesas_elc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/interconn/renesas_elc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x new file mode 120000 index 0000000..7e8d60f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_max2221x @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/max2221x \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio new file mode 120000 index 0000000..22bfc00 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/nxp_flexio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl new file mode 120000 index 0000000..1a5ab2b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_rtxxx_dsp_ctrl @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/nxp_rtxxx_dsp_ctrl \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico new file mode 120000 index 0000000..1248366 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/pio_rpi_pico \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt new file mode 120000 index 0000000..99dab5a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/renesas_ra_external_interrupt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc new file mode 120000 index 0000000..19c07bc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_dtc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/renesas_rx_dtc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt new file mode 120000 index 0000000..0ed2c0a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_rx_external_interrupt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/renesas_rx_external_interrupt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins new file mode 120000 index 0000000..602638a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/misc/stm32_wkup_pins \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm new file mode 120000 index 0000000..6831c7f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/mm \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem new file mode 120000 index 0000000..2aae0b6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/modem \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi new file mode 120000 index 0000000..22afef9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/mspi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie new file mode 120000 index 0000000..c869a2c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/pcie \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint new file mode 120000 index 0000000..6699e51 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/pcie/endpoint \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl new file mode 120000 index 0000000..f343554 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/pinctrl \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops new file mode 120000 index 0000000..993d331 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/pm_cpu_ops \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power new file mode 120000 index 0000000..c2bd8e7 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/power \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 new file mode 120000 index 0000000..d72e67b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_psi5 @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/psi5 \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm new file mode 120000 index 0000000..5e5767e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/pwm \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator new file mode 120000 index 0000000..40a45f4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/regulator \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset new file mode 120000 index 0000000..0784959 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_reset @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/reset \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem new file mode 120000 index 0000000..7a36f9d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/retained_mem \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc new file mode 120000 index 0000000..cf45bcc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/rtc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor new file mode 120000 index 0000000..99c7988 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/sensor \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent new file mode 120000 index 0000000..79dfbad --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sent @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/sent \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial new file mode 120000 index 0000000..e2f501b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/serial \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc new file mode 120000 index 0000000..5520d68 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/sip_svc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper new file mode 120000 index 0000000..9edd7e3 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/stepper \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer new file mode 120000 index 0000000..73df1a2 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/timer \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart new file mode 120000 index 0000000..f9bc170 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/uart \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb new file mode 120000 index 0000000..353e76e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/usb \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c new file mode 120000 index 0000000..d6d8e49 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/usb_c \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video new file mode 120000 index 0000000..e1ebb00 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_video @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/video \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio new file mode 120000 index 0000000..5fd0679 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/virtio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization new file mode 120000 index 0000000..2607916 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/virtualization \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi new file mode 120000 index 0000000..7a51fa9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/wifi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi new file mode 120000 index 0000000..15b34d5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/wifi/nrf_wifi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus new file mode 120000 index 0000000..e7594c9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/wifi/nrf_wifi/bus \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx new file mode 120000 index 0000000..9e09a44 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/drivers/wifi/nrf_wifi/off_raw_tx \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dsp b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dsp new file mode 120000 index 0000000..bbb7b6e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dsp @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dsp \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings new file mode 120000 index 0000000..c4eb858 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi new file mode 120000 index 0000000..d793834 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/acpi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc new file mode 120000 index 0000000..acb9759 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery new file mode 120000 index 0000000..ae459ff --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/battery \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock new file mode 120000 index 0000000..1c2deca --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs new file mode 120000 index 0000000..5707bea --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/silabs \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator new file mode 120000 index 0000000..a38f056 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/comparator \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac new file mode 120000 index 0000000..6243be2 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dac \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai new file mode 120000 index 0000000..c62deec --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dai \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display new file mode 120000 index 0000000..f9a6c33 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/display \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma new file mode 120000 index 0000000..96ab0b4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dma \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs new file mode 120000 index 0000000..50b1c4a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dma/silabs \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi new file mode 120000 index 0000000..cffa83d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/espi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet new file mode 120000 index 0000000..c8a7fd8 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/ethernet \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller new file mode 120000 index 0000000..23a2069 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/flash_controller \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio new file mode 120000 index 0000000..dcff83f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c new file mode 120000 index 0000000..e6515e4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/i2c \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input new file mode 120000 index 0000000..2e61e76 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/input \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux new file mode 120000 index 0000000..f9c132f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/inputmux \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller new file mode 120000 index 0000000..e363ec9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/interrupt-controller \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service new file mode 120000 index 0000000..8bd47ba --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/ipc_service \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led new file mode 120000 index 0000000..caff502 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/led \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora new file mode 120000 index 0000000..942533a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/lora \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl new file mode 120000 index 0000000..50dbbc8 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/lvgl \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr new file mode 120000 index 0000000..51ea55f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/memory-attr \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller new file mode 120000 index 0000000..d573933 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/memory-controller \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd new file mode 120000 index 0000000..29ff26b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mfd @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/mfd \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi new file mode 120000 index 0000000..5fb06f1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/mipi_dbi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi new file mode 120000 index 0000000..cf22786 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/mipi_dsi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc new file mode 120000 index 0000000..96e3abf --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/misc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas new file mode 120000 index 0000000..e940a10 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/misc/renesas \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc new file mode 120000 index 0000000..fdfccec --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc_renesas_ra-elc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/misc/renesas/ra-elc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie new file mode 120000 index 0000000..948ba2e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pcie \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl new file mode 120000 index 0000000..e366366 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas new file mode 120000 index 0000000..f3ac7f0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/renesas \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs new file mode 120000 index 0000000..f93231d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/silabs \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power new file mode 120000 index 0000000..57be415 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/power \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm new file mode 120000 index 0000000..0fefca6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi new file mode 120000 index 0000000..4dcaea1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi @@ -0,0 +1 @@ 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b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor new file mode 120000 index 0000000..c8b290f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/sensor \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent new file mode 120000 index 0000000..e5ca659 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sent @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/sent \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi new file mode 120000 index 0000000..1aaa12a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/spi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer new file mode 120000 index 0000000..4c43825 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/timer \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb new file mode 120000 index 0000000..f698ec1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/usb \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c new file mode 120000 index 0000000..91a0754 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/usb-c \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video new file mode 120000 index 0000000..0600a63 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/video \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc new file mode 120000 index 0000000..e981392 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_wuc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/wuc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi new file mode 120000 index 0000000..0b937f4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_xspi @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/xspi \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_fs b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_fs new file mode 120000 index 0000000..a42c3e9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_fs @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/fs \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss new file mode 120000 index 0000000..b126c2f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/gnss \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk new file mode 120000 index 0000000..0b36591 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/gnss/rtk \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_input b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_input new file mode 120000 index 0000000..e737c59 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_input @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/input \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation new file mode 120000 index 0000000..4c339eb --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_instrumentation @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/instrumentation \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_internal b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_internal new file mode 120000 index 0000000..b2b8ef7 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_internal @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/internal \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc new file mode 120000 index 0000000..d5155a1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/ipc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends new file mode 120000 index 0000000..a08e733 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/ipc/backends \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel new file mode 120000 index 0000000..1126375 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal new file mode 120000 index 0000000..05fb5ae --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel/internal \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm new file mode 120000 index 0000000..1824dc3 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kernel/mm \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kvss b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kvss new file mode 120000 index 0000000..890463c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kvss @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/kvss \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker new file mode 120000 index 0000000..761fd27 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom new file mode 120000 index 0000000..d7eb247 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/linker/common-rom \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_llext b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_llext new file mode 120000 index 0000000..0112a93 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_llext @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/llext \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_logging b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_logging new file mode 120000 index 0000000..835180c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_logging @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/logging \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan new file mode 120000 index 0000000..bab56de --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/lorawan \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_math b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_math new file 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b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd new file mode 120000 index 0000000..4171794 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/ec_host_cmd \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit new file mode 120000 index 0000000..8064f57 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/hawkbit \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr new file mode 120000 index 0000000..1204be9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp new file mode 120000 index 0000000..9d1492e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt new file mode 120000 index 0000000..48c7d04 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/enum_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt new file mode 120000 index 0000000..8b4be52 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/fs_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt new file mode 120000 index 0000000..cd4dc32 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/img_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt new file mode 120000 index 0000000..72691cc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/os_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt new file mode 120000 index 0000000..5af3c33 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/settings_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt new file mode 120000 index 0000000..be8fc1c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/shell_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt new file mode 120000 index 0000000..3a17a51 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/stat_mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr new file mode 120000 index 0000000..1ce5b04 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/grp/zephyr \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt new file mode 120000 index 0000000..7ca7aae --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/mgmt \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp new file mode 120000 index 0000000..e78747a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/smp \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport new file mode 120000 index 0000000..67ab894 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/mgmt/mcumgr/transport \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_misc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_misc new file mode 120000 index 0000000..723cfa2 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_misc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/misc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modbus b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modbus new file mode 120000 index 0000000..95dc9ba --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modbus @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/modbus \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem new file mode 120000 index 0000000..1981849 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/modem \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_at b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_at new file mode 120000 index 0000000..8b51105 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_at @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/modem/at \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend new file mode 120000 index 0000000..91fe815 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/modem/backend \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx new file mode 120000 index 0000000..578c05a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/modem/ubx \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap new file mode 120000 index 0000000..101be6f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/multi_heap \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net new file mode 120000 index 0000000..6a253b4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/net \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr new file mode 120000 index 0000000..d059d7a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/net/conn_mgr \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if new file mode 120000 index 0000000..2ac0e97 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/net/hdlc_rcp_if \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http new file mode 120000 index 0000000..4b02e4a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/net/http \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus new file mode 120000 index 0000000..69cbfa1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/net/prometheus \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh new file mode 120000 index 0000000..70ecb8a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/net/ssh \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_platform b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_platform new file mode 120000 index 0000000..40e7ec6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_platform @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/platform \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pm b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pm new file mode 120000 index 0000000..24d91a6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pm @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/pm \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci new file mode 120000 index 0000000..effb8bd --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/pmci \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp new file mode 120000 index 0000000..f90f794 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/pmci/mctp \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_portability b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_portability new file mode 120000 index 0000000..eaaa792 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_portability @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/portability \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix new file mode 120000 index 0000000..e30c398 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/posix \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa new file mode 120000 index 0000000..210282e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/posix/arpa \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net new file mode 120000 index 0000000..5ec0539 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/posix/net \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet new file mode 120000 index 0000000..91b12a4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/posix/netinet \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys new file mode 120000 index 0000000..b6c6611 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/posix/sys \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_psa b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_psa new file mode 120000 index 0000000..4e1f70d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_psa @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/psa \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_random b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_random new file mode 120000 index 0000000..61056ab --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_random @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/random \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_retention b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_retention new file mode 120000 index 0000000..1efb479 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_retention @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/retention \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_rtio b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_rtio new file mode 120000 index 0000000..58c25e9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_rtio @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/rtio \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sd b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sd new file mode 120000 index 0000000..cd8e0ef --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sd @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sd \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sensing b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sensing new file mode 120000 index 0000000..cf47caa --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sensing @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sensing \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_settings b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_settings new file mode 120000 index 0000000..8bf6671 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_settings @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/settings \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_shell b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_shell new file mode 120000 index 0000000..fd7122c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_shell @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/shell \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc new file mode 120000 index 0000000..cedda27 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sip_svc \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_stats b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_stats new file mode 120000 index 0000000..1c00a4a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_stats @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/stats \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_storage b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_storage new file mode 120000 index 0000000..83769a3 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_storage @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/storage \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys new file mode 120000 index 0000000..ec9e94f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal new file mode 120000 index 0000000..00d23fc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal @@ -0,0 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end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain new file mode 120000 index 0000000..ff3e180 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain \ No newline at end of file diff --git a/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar new file mode 120000 index 0000000..beb9559 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar @@ -0,0 +1 @@ +/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/toolchain/iar \ No newline at end of file diff --git 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+/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_gnss_rtk +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_ipc_backends +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_at +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_ubx +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_ssh +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pmci_mctp +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_usb_class +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_zbus_proxy_agent diff --git a/zephyrproject/build/mcuboot/zephyr/runners.yaml b/zephyrproject/build/mcuboot/zephyr/runners.yaml new file mode 100644 index 0000000..7299eab --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/runners.yaml @@ -0,0 +1,44 @@ +# Available runners configured by board.cmake. +runners: +- stm32cubeprogrammer +- pyocd +- openocd +- jlink + +# Default flash runner if --runner is not given. +flash-runner: stm32cubeprogrammer + +# Default debug runner if --runner is not given. +debug-runner: pyocd + +# Common runner configuration values. +config: + board_dir: /home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb + # Build outputs: + elf_file: zephyr.elf + hex_file: zephyr.hex + bin_file: zephyr.bin + # Host tools: + gdb: /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-gdb-py + openocd: /nix/store/nszfwxgy1r73svjq0ywnr3gf9xyyp1hs-zephyr-sdk-hosttools-1.0.1/bin/openocd + openocd_search: + - /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/hosttools/sysroots/x86_64-pokysdk-linux/usr/share/openocd/scripts + +# Runner specific arguments +args: + stm32cubeprogrammer: + - --port=swd + - --reset-mode=hw + pyocd: + - --dt-flash=y + - --target=stm32g431rbtx + openocd: + - --cmd-load + - flash write_image erase + - --cmd-verify + - verify_image + - --cmd-erase=stm32l4x mass_erase 0 + jlink: + - --dt-flash=y + - --device=STM32G431RB + - --speed=4000 diff --git a/zephyrproject/build/mcuboot/zephyr/snippets_generated.cmake b/zephyrproject/build/mcuboot/zephyr/snippets_generated.cmake new file mode 100644 index 0000000..84dd4d9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/snippets_generated.cmake @@ -0,0 +1,18 @@ +# WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! +# +# This file contains build system settings derived from your snippets. +# Its contents are an implementation detail that should not be used outside +# of Zephyr's snippets CMake module. +# +# See the Snippets guide in the Zephyr documentation for more information. +############################################################################### +# Global information about all snippets. + +# The name of every snippet that was discovered. +set(SNIPPET_NAMES "bt-ll-sw-split" "cdc-acm-console" "espressif-flash-128M" "espressif-flash-16M" "espressif-flash-2M" "espressif-flash-32M" "espressif-flash-4M" "espressif-flash-64M" "espressif-flash-8M" "espressif-psram-2M" "espressif-psram-4M" "espressif-psram-8M" "espressif-psram-reloc" "espressif-psram-wifi" "hci-uart-native-sim" "nordic-flpr" "nordic-flpr-xip" "nordic-log-stm" "nordic-log-stm-dict" "nordic-log-stm-tpiu-dict" "nordic-ppr" "nordic-ppr-xip" "nus-console" "ram-console" "ram-tracing" "rp2-boot-mode-retention" "rtt-console" "rtt-tracing" "semihost-tracing" "serial-console" "silabs-pti" "slot1-partition" "socketcan-native-sim" "usbip-native-sim" "video-sw-generator" "wifi-credentials" "wifi-enterprise" "wifi-ip" "wifi-ipv4" "wifi-ipv6" "xen_dom0" "xiao-serial-console") +# The paths to all the snippet.yml files. One snippet +# can have multiple snippet.yml files. +set(SNIPPET_PATHS "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/bt-ll-sw-split/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/cdc-acm-console/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-128M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-16M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-2M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-32M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-4M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-64M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/flash-8M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/psram-2M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/psram-4M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/psram-8M/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/psram-reloc/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/espressif/psram-wifi/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/hci-uart-native-sim/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-flpr-xip/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-flpr/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-log-stm-dict/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-log-stm-tpiu-dict/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-log-stm/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-ppr-xip/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nordic/nordic-ppr/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/nus-console/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/ram-console/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/ram-tracing/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/rp2-boot-mode-retention/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/rtt-console/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/rtt-tracing/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/semihost-tracing/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/serial-console/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/silabs-pti/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/slot1-partition/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/socketcan-native-sim/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/usbip-native-sim/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/video-sw-generator/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/wifi/wifi-credentials/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/wifi/wifi-enterprise/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/wifi/wifi-ip/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/wifi/wifi-ipv4/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/wifi/wifi-ipv6/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/xen_dom0/snippet.yml" "/home/jeremy/utat-dev/zephyrproject/zephyr/snippets/xiao-serial-console/snippet.yml") + +# Create variable scope for snippets build variables +zephyr_create_scope(snippets) diff --git a/zephyrproject/build/mcuboot/zephyr/soc/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/soc/cmake_install.cmake new file mode 100644 index 0000000..0587526 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/soc/cmake_install.cmake @@ -0,0 +1,52 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/soc + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/common/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/soc/common/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/soc/common/cmake_install.cmake new file mode 100644 index 0000000..93fcb52 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/soc/common/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/soc/common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/common/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/cmake_install.cmake new file mode 100644 index 0000000..0603276 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/cmake_install.cmake @@ -0,0 +1,52 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32 + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common/cmake_install.cmake new file mode 100644 index 0000000..776867a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/common/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x/cmake_install.cmake new file mode 100644 index 0000000..11f8628 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/soc/st/stm32/stm32g4x + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/soc/soc/stm32g431xx/stm32g4x/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake new file mode 100644 index 0000000..9e3c74b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/canbus + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/canbus/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/cmake_install.cmake new file mode 100644 index 0000000..e71e8dc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/cmake_install.cmake @@ -0,0 +1,70 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/gnss/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/kvss/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pmci/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/random/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake new file mode 100644 index 0000000..fbe7120 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/debug + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/debug/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake new file mode 100644 index 0000000..cd9cf29 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/fs + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/fs/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/gnss/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/gnss/cmake_install.cmake new file mode 100644 index 0000000..69c1f09 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/gnss/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/gnss + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/gnss/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation/cmake_install.cmake new file mode 100644 index 0000000..41e5070 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/instrumentation + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/instrumentation/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake new file mode 100644 index 0000000..f786907 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/ipc + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/ipc/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/kvss/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/kvss/cmake_install.cmake new file mode 100644 index 0000000..d4c483a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/kvss/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/kvss + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/kvss/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake new file mode 100644 index 0000000..92a5d70 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/logging + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/logging/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake new file mode 100644 index 0000000..9de8d0e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/mem_mgmt + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mem_mgmt/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake new file mode 100644 index 0000000..061925e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/mgmt + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/mgmt/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake new file mode 100644 index 0000000..6f4aa33 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/pm + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy/cmake_install.cmake new file mode 100644 index 0000000..bc3bb8d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/pm/policy + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX 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"\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pm/policy/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/pmci/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/pmci/cmake_install.cmake new file mode 100644 index 0000000..e991afa --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/pmci/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/pmci + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/pmci/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake new file mode 100644 index 0000000..6f07730 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/portability + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + 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if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lang_support_r/cmake_install.cmake") + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/c_lib_ext/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/portability/posix/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/random/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/random/cmake_install.cmake new file mode 100644 index 0000000..ccff896 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/random/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/random + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/random/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake new file mode 100644 index 0000000..517322d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/sd + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/sd/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake new file mode 100644 index 0000000..e81b63a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/stats + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/stats/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake new file mode 100644 index 0000000..82679ca --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/storage + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake new file mode 100644 index 0000000..ee962d5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/storage/flash_map + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/storage/flash_map/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake new file mode 100644 index 0000000..627ef52 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/testsuite + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/testsuite/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake new file mode 100644 index 0000000..9a6620a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/tracing + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/tracing/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake new file mode 100644 index 0000000..66d3ba4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake @@ -0,0 +1,51 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/usb + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/common/cmake_install.cmake") + +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/subsys/usb/common/cmake_install.cmake b/zephyrproject/build/mcuboot/zephyr/subsys/usb/common/cmake_install.cmake new file mode 100644 index 0000000..612f505 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/subsys/usb/common/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/jeremy/utat-dev/zephyrproject/zephyr/subsys/usb/common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set path to fallback-tool for dependency-resolution. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +if(CMAKE_INSTALL_LOCAL_ONLY) + file(WRITE "/home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/subsys/usb/common/install_local_manifest.txt" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") +endif() diff --git a/zephyrproject/build/mcuboot/zephyr/syscall_weakdefs_llext.c b/zephyrproject/build/mcuboot/zephyr/syscall_weakdefs_llext.c new file mode 100644 index 0000000..96fe85b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/syscall_weakdefs_llext.c @@ -0,0 +1,155 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#include +#include + +/* + * This symbol is placed at address 0 by llext-sections.ld. Its value and + * type is not important, we are only interested in its location. + */ +static void * const no_syscall_impl Z_GENERIC_SECTION(llext_no_syscall_impl); + +/* + * Weak references to all syscall implementations. Those not found by the + * linker outside this file will be exported as NULL and simply fail when + * an extension requiring them is loaded. + */ +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_device_deinit; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_device_get_binding; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_device_get_by_dt_nodelabel; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_device_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_device_is_ready; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_copy; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_erase; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_ex_op; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_fill; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_flatten; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_get_page_count; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_get_page_info_by_idx; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_get_page_info_by_offs; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_get_parameters; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_get_size; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_get_write_block_size; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_read; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_read_jedec_id; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_sfdp_read; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_flash_write; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_busy_wait; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_condvar_broadcast; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_condvar_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_condvar_signal; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_condvar_wait; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_clear; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_post; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_set_masked; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_wait; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_wait_all; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_wait_all_safe; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_event_wait_safe; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_float_disable; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_float_enable; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_futex_wait; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_futex_wake; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_is_preempt_thread; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_alloc_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_get_attrs; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_num_free_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_num_used_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_peek; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_peek_at; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_purge; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_put; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_msgq_put_front; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_mutex_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_mutex_lock; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_mutex_unlock; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_object_access_check; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_object_access_grant; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_object_alloc; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_object_alloc_size; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_object_release; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_pipe_close; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_pipe_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_pipe_read; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_pipe_reset; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_pipe_write; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_poll; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_poll_signal_check; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_poll_signal_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_poll_signal_raise; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_poll_signal_reset; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_alloc_append; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_alloc_prepend; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_cancel_wait; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_is_empty; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_peek_head; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_queue_peek_tail; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_reschedule; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sched_current_thread_query; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sem_count_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sem_give; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sem_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sem_reset; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sem_take; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_sleep; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_stack_alloc_init; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_stack_pop; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_stack_push; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_str_out; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_abort; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_absolute_deadline_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_create; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_custom_data_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_custom_data_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_deadline_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_join; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_name_copy; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_name_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_priority_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_priority_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_resume; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_runtime_stack_unused_threshold_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_runtime_stack_unused_threshold_pct_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_runtime_stack_unused_threshold_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_stack_alloc; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_stack_free; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_stack_space_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_suspend; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_timeout_expires_ticks; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_thread_timeout_remaining_ticks; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_expires_ticks; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_remaining_ticks; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_start; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_status_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_status_sync; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_stop; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_user_data_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_timer_user_data_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_uptime_ticks; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_usleep; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_wakeup; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_k_yield; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_log_buffered_cnt; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_log_filter_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_log_frontend_filter_set; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_log_panic; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_log_process; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_sys_clock_getrtoffset; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_sys_clock_hw_cycles_per_sec_runtime_get; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_sys_clock_nanosleep; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_sys_clock_settime; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_z_log_msg_simple_create_0; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_z_log_msg_simple_create_1; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_z_log_msg_simple_create_2; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_z_log_msg_static_create; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_z_sys_mutex_kernel_lock; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_z_sys_mutex_kernel_unlock; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_zephyr_fputc; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_zephyr_fwrite; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_zephyr_read_stdin; +extern __weak ALIAS_OF(no_syscall_impl) void * const z_impl_zephyr_write_stdout; diff --git a/zephyrproject/build/mcuboot/zephyr/zephyr.bin b/zephyrproject/build/mcuboot/zephyr/zephyr.bin new file mode 100755 index 0000000000000000000000000000000000000000..66fbd72b91b116ba50382dcd955fdae05172030b GIT binary patch literal 21336 zcmeHvdwf$>w(#EPoFpf0Y10RqmI9|utD&tJC~A4AAq}UGAO(tw;EV~Sa8jTRZP9Ya zxdaLdK4ySAW1%pEqIUpioCd5z#hMC^qod9wJe)#Bs_2Baj-Jp$PM_yn`y>_g-rw(j z_n+_g{eIt9-8tv%$J%SJz4qE`ueCPqvk|Ag6|t&&5qs^HA13spKL^w!bx1Z&Mr=_U zVmHF`|EK?RG%&S1-As#%2WWB8KxSc48ZG`5-irq4LrDDHaJp@RP;X&;X@&EkWYNHA zK(%+WQp+|#@0nO=`+3yQKYRx5BJC^#DN4zG1N$W%q7EZ5S7LbN84XZ-RZU3`BwFdc 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z$twoMz%c{jeL=q_`;iQPV6Qh9Dvij`kNzOO{{zS(u_z>w`ZxcL)gIq9zUzMhgaiEl literal 0 HcmV?d00001 diff --git a/zephyrproject/build/mcuboot/zephyr/zephyr.dts b/zephyrproject/build/mcuboot/zephyr/zephyr.dts new file mode 100644 index 0000000..4b165a6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/zephyr.dts @@ -0,0 +1,1487 @@ +/dts-v1/; + +/* node '/' defined in zephyr/dts/common/skeleton.dtsi:9 */ +/ { + #address-cells = < 0x1 >; /* in zephyr/dts/common/skeleton.dtsi:10 */ + #size-cells = < 0x1 >; /* in zephyr/dts/common/skeleton.dtsi:11 */ + model = "STMicroelectronics STM32G431RB-NUCLEO board"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:15 */ + compatible = "st,stm32g431rb-nucleo"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:16 */ + + /* node '/chosen' defined in zephyr/dts/common/skeleton.dtsi:13 */ + chosen { + zephyr,crc = &crc; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:26 */ + zephyr,entropy = &rng; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:27 */ + zephyr,flash-controller = &flash; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:28 */ + zephyr,console = &lpuart1; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:19 */ + zephyr,shell-uart = &lpuart1; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:20 */ + zephyr,sram = &sram0; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:21 */ + zephyr,flash = &flash0; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:22 */ + zephyr,code-partition = &boot_partition; /* in bootloader/mcuboot/boot/zephyr/app.overlay:3 */ + }; + + /* node '/aliases' defined in zephyr/dts/common/skeleton.dtsi:15 */ + aliases { + led0 = &green_led; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:54 */ + mcuboot-led0 = &green_led; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:55 */ + pwm-led0 = &green_pwm_led; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:56 */ + sw0 = &user_button; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:57 */ + watchdog0 = &iwdg; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:58 */ + }; + + /* node '/soc' defined in zephyr/dts/arm/armv7-m.dtsi:6 */ + soc { + #address-cells = < 0x1 >; /* in zephyr/dts/arm/armv7-m.dtsi:7 */ + #size-cells = < 0x1 >; /* in zephyr/dts/arm/armv7-m.dtsi:8 */ + interrupt-parent = < &nvic >; /* in zephyr/dts/arm/armv7-m.dtsi:10 */ + ranges; /* in zephyr/dts/arm/armv7-m.dtsi:11 */ + compatible = "st,stm32g431", + "st,stm32g4", + "simple-bus"; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:11 */ + + /* node '/soc/interrupt-controller@e000e100' defined in zephyr/dts/arm/armv7-m.dtsi:13 */ + nvic: interrupt-controller@e000e100 { + #address-cells = < 0x1 >; /* in zephyr/dts/arm/armv7-m.dtsi:14 */ + compatible = "arm,v7m-nvic"; /* in zephyr/dts/arm/armv7-m.dtsi:15 */ + reg = < 0xe000e100 0xc00 >; /* in zephyr/dts/arm/armv7-m.dtsi:16 */ + interrupt-controller; /* in zephyr/dts/arm/armv7-m.dtsi:17 */ + #interrupt-cells = < 0x2 >; /* in zephyr/dts/arm/armv7-m.dtsi:18 */ + arm,num-irq-priority-bits = < 0x4 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:927 */ + phandle = < 0x1 >; /* in zephyr/dts/arm/armv7-m.dtsi:10 */ + }; + + /* node '/soc/timer@e000e010' defined in zephyr/dts/arm/armv7-m.dtsi:21 */ + systick: timer@e000e010 { + compatible = "arm,armv7m-systick"; /* in zephyr/dts/arm/armv7-m.dtsi:22 */ + reg = < 0xe000e010 0x10 >; /* in zephyr/dts/arm/armv7-m.dtsi:23 */ + }; + + /* node '/soc/adc@50000000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:111 */ + adc1: adc@50000000 { + compatible = "st,stm32-adc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:112 */ + reg = < 0x50000000 0x100 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:113 */ + clocks = < &rcc 0x4c 0x2000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:114 */ + clock-names = "adcx"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:115 */ + interrupts = < 0x12 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:116 */ + #io-channel-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:117 */ + st,adc-resolutions = < 0xc 0xa 0x8 0x6 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:118 */ + sampling-times = < 0x3 0x7 0xd 0x19 0x30 0x5d 0xf8 0x281 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:119 */ + st,adc-sequencer = "programmable"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:120 */ + st,adc-oversampler = "minimal"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:121 */ + st,adc-internal-regulator = "startup-sw-delay"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:122 */ + st,adc-has-deep-powerdown; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:123 */ + st,adc-has-differential-support; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:124 */ + st,adc-has-injected-support; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:125 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:126 */ + phandle = < 0x20 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:877 */ + }; + + /* node '/soc/adc@50000100' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:129 */ + adc2: adc@50000100 { + compatible = "st,stm32-adc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:130 */ + reg = < 0x50000100 0x100 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:131 */ + clocks = < &rcc 0x4c 0x2000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:132 */ + clock-names = "adcx"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:133 */ + interrupts = < 0x12 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:134 */ + #io-channel-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:135 */ + st,adc-resolutions = < 0xc 0xa 0x8 0x6 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:136 */ + sampling-times = < 0x3 0x7 0xd 0x19 0x30 0x5d 0xf8 0x281 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:137 */ + st,adc-sequencer = "programmable"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:138 */ + st,adc-oversampler = "minimal"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:139 */ + st,adc-internal-regulator = "startup-sw-delay"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:140 */ + st,adc-has-deep-powerdown; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:141 */ + st,adc-has-differential-support; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:142 */ + st,adc-has-injected-support; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:143 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:144 */ + }; + + /* node '/soc/dac@50000800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:147 */ + dac1: dac@50000800 { + compatible = "st,stm32-dac"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:148 */ + reg = < 0x50000800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:149 */ + clocks = < &rcc 0x4c 0x10000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:150 */ + #io-channel-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:152 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:205 */ + pinctrl-0 = < &dac1_out1_pa4 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:206 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:207 */ + }; + + /* node '/soc/dac@50001000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:155 */ + dac3: dac@50001000 { + compatible = "st,stm32-dac"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:156 */ + reg = < 0x50001000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:157 */ + clocks = < &rcc 0x4c 0x40000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:158 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:159 */ + #io-channel-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:160 */ + }; + + /* node '/soc/flash-controller@40022000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:163 */ + flash: flash-controller@40022000 { + compatible = "st,stm32-flash-controller", + "st,stm32g4-flash-controller"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:164 */ + reg = < 0x40022000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:165 */ + interrupts = < 0x3 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:166 */ + clocks = < &rcc 0x48 0x100 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:167 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:169 */ + #size-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:170 */ + ranges; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:171 */ + + /* node '/soc/flash-controller@40022000/flash@8000000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:173 */ + flash0: flash@8000000 { + compatible = "st,stm32-nv-flash", + "soc-nv-flash"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:174 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:175 */ + #size-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:176 */ + write-block-size = < 0x8 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:177 */ + erase-block-size = < 0x800 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:178 */ + max-erase-time = < 0x19 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:180 */ + reg = < 0x8000000 0x20000 >; /* in zephyr/dts/arm/st/g4/stm32g431Xb.dtsi:14 */ + ranges = < 0x0 0x8000000 0x20000 >; /* in zephyr/dts/arm/st/g4/stm32g431Xb.dtsi:15 */ + + /* node '/soc/flash-controller@40022000/flash@8000000/partitions' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:168 */ + partitions { + #address-cells = < 0x1 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:169 */ + #size-cells = < 0x1 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:170 */ + ranges; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:171 */ + + /* node '/soc/flash-controller@40022000/flash@8000000/partitions/partition@0' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:173 */ + boot_partition: partition@0 { + compatible = "zephyr,mapped-partition"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:174 */ + label = "mcuboot"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:175 */ + reg = < 0x0 0x8800 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:176 */ + }; + + /* node '/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:179 */ + slot0_partition: partition@8800 { + compatible = "zephyr,mapped-partition"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:180 */ + label = "image-0"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:181 */ + reg = < 0x8800 0xc000 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:182 */ + }; + + /* node '/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:185 */ + slot1_partition: partition@14800 { + compatible = "zephyr,mapped-partition"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:186 */ + label = "image-1"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:187 */ + reg = < 0x14800 0xa800 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:188 */ + }; + + /* node '/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:192 */ + storage_partition: partition@1f000 { + compatible = "zephyr,mapped-partition"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:193 */ + label = "storage"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:194 */ + reg = < 0x1f000 0x1000 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:195 */ + }; + }; + }; + + /* node '/soc/flash-controller@40022000/flash@1fff7000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:183 */ + st_nvm_user_otp: flash@1fff7000 { + compatible = "st,stm32-nvm-otp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:184 */ + reg = < 0x1fff7000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:185 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:186 */ + }; + + /* node '/soc/flash-controller@40022000/flash@1fff7500' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:190 */ + flash@1fff7500 { + compatible = "st,stm32-nvm-otp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:191 */ + reg = < 0x1fff7500 0x300 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:192 */ + + /* node '/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:194 */ + nvmem-layout { + compatible = "fixed-layout"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:195 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:196 */ + #size-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:197 */ + + /* node '/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:199 */ + ts_cal1_otp: ts-cal1@a8 { + reg = < 0xa8 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:200 */ + #nvmem-cell-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:201 */ + read-only; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:202 */ + phandle = < 0x1e >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:872 */ + }; + + /* node '/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:205 */ + vrefint_otp: vrefint@aa { + reg = < 0xaa 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:206 */ + #nvmem-cell-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:207 */ + read-only; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:208 */ + phandle = < 0x21 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:883 */ + }; + + /* node '/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:211 */ + ts_cal2_otp: ts-cal2@ca { + reg = < 0xca 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:212 */ + #nvmem-cell-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:213 */ + read-only; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:214 */ + phandle = < 0x1f >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:872 */ + }; + }; + }; + }; + + /* node '/soc/rcc@40021000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:220 */ + rcc: rcc@40021000 { + compatible = "st,stm32-rcc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:221 */ + #clock-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:222 */ + reg = < 0x40021000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:223 */ + undershoot-prevention; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:224 */ + clocks = < &pll >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:90 */ + clock-frequency = < 0xa21fe80 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:91 */ + ahb-prescaler = < 0x1 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:92 */ + apb1-prescaler = < 0x1 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:93 */ + apb2-prescaler = < 0x1 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:94 */ + phandle = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:114 */ + + /* node '/soc/rcc@40021000/reset-controller' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:226 */ + rctl: reset-controller { + compatible = "st,stm32-rcc-rctl"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:227 */ + #reset-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:228 */ + phandle = < 0x5 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:315 */ + }; + }; + + /* node '/soc/interrupt-controller@40010400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:232 */ + exti: interrupt-controller@40010400 { + compatible = "st,stm32-exti"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:233 */ + interrupt-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:234 */ + #interrupt-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:235 */ + #address-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:236 */ + reg = < 0x40010400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:237 */ + clocks = < &rcc 0x60 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:238 */ + num-lines = < 0x40 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:239 */ + interrupts = < 0x6 0x0 >, + < 0x7 0x0 >, + < 0x8 0x0 >, + < 0x9 0x0 >, + < 0xa 0x0 >, + < 0x17 0x0 >, + < 0x28 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:240 */ + interrupt-names = "line0", + "line1", + "line2-TSC", + "line3", + "line4", + "line5-9", + "line10-15"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:242 */ + line-ranges = < 0x0 0x1 >, + < 0x1 0x1 >, + < 0x2 0x1 >, + < 0x3 0x1 >, + < 0x4 0x1 >, + < 0x5 0x5 >, + < 0xa 0x6 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:244 */ + }; + + /* node '/soc/pin-controller@48000000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:248 */ + pinctrl: pin-controller@48000000 { + compatible = "st,stm32-pinctrl"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:249 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:250 */ + #size-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:251 */ + reg = < 0x48000000 0x2000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:252 */ + + /* node '/soc/pin-controller@48000000/gpio@48000000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:254 */ + gpioa: gpio@48000000 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:255 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:256 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:257 */ + reg = < 0x48000000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:258 */ + clocks = < &rcc 0x4c 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:259 */ + phandle = < 0x25 >; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:15 */ + }; + + /* node '/soc/pin-controller@48000000/gpio@48000400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:262 */ + gpiob: gpio@48000400 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:263 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:264 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:265 */ + reg = < 0x48000400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:266 */ + clocks = < &rcc 0x4c 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:267 */ + phandle = < 0xf >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:126 */ + }; + + /* node '/soc/pin-controller@48000000/gpio@48000800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:270 */ + gpioc: gpio@48000800 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:271 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:272 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:273 */ + reg = < 0x48000800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:274 */ + clocks = < &rcc 0x4c 0x4 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:275 */ + phandle = < 0x26 >; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:15 */ + }; + + /* node '/soc/pin-controller@48000000/gpio@48000c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:278 */ + gpiod: gpio@48000c00 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:279 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:280 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:281 */ + reg = < 0x48000c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:282 */ + clocks = < &rcc 0x4c 0x8 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:283 */ + phandle = < 0x27 >; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:15 */ + }; + + /* node '/soc/pin-controller@48000000/gpio@48001000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:286 */ + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:287 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:288 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:289 */ + reg = < 0x48001000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:290 */ + clocks = < &rcc 0x4c 0x10 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:291 */ + }; + + /* node '/soc/pin-controller@48000000/gpio@48001400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:294 */ + gpiof: gpio@48001400 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:295 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:296 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:297 */ + reg = < 0x48001400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:298 */ + clocks = < &rcc 0x4c 0x20 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:299 */ + phandle = < 0x28 >; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:15 */ + }; + + /* node '/soc/pin-controller@48000000/gpio@48001800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:302 */ + gpiog: gpio@48001800 { + compatible = "st,stm32-gpio"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:303 */ + gpio-controller; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:304 */ + #gpio-cells = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:305 */ + reg = < 0x48001800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:306 */ + clocks = < &rcc 0x4c 0x40 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:307 */ + }; + + /* node '/soc/pin-controller@48000000/dac1_out1_pa4' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:461 */ + dac1_out1_pa4: dac1_out1_pa4 { + pinmux = < 0x90 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:462 */ + phandle = < 0x3 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:206 */ + }; + + /* node '/soc/pin-controller@48000000/i2c1_scl_pb8' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:503 */ + i2c1_scl_pb8: i2c1_scl_pb8 { + pinmux = < 0x304 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:504 */ + bias-pull-up; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:505 */ + drive-open-drain; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:506 */ + phandle = < 0xa >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:118 */ + }; + + /* node '/soc/pin-controller@48000000/i2c1_sda_pb9' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:547 */ + i2c1_sda_pb9: i2c1_sda_pb9 { + pinmux = < 0x324 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:548 */ + bias-pull-up; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:549 */ + drive-open-drain; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:550 */ + phandle = < 0xb >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:118 */ + }; + + /* node '/soc/pin-controller@48000000/spi1_miso_pa6' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:932 */ + spi1_miso_pa6: spi1_miso_pa6 { + pinmux = < 0xc5 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:933 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:934 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:935 */ + phandle = < 0xd >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:124 */ + }; + + /* node '/soc/pin-controller@48000000/spi2_miso_pb14' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:950 */ + spi2_miso_pb14: spi2_miso_pb14 { + pinmux = < 0x3c5 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:951 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:952 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:953 */ + phandle = < 0x12 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:131 */ + }; + + /* node '/soc/pin-controller@48000000/spi3_miso_pc11' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:962 */ + spi3_miso_pc11: spi3_miso_pc11 { + pinmux = < 0x566 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:963 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:964 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:965 */ + phandle = < 0x16 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:139 */ + }; + + /* node '/soc/pin-controller@48000000/spi1_mosi_pa7' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:970 */ + spi1_mosi_pa7: spi1_mosi_pa7 { + pinmux = < 0xe5 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:971 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:972 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:973 */ + phandle = < 0xe >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:124 */ + }; + + /* node '/soc/pin-controller@48000000/spi2_mosi_pb15' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:988 */ + spi2_mosi_pb15: spi2_mosi_pb15 { + pinmux = < 0x3e5 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:989 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:990 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:991 */ + phandle = < 0x13 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:131 */ + }; + + /* node '/soc/pin-controller@48000000/spi3_mosi_pc12' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1000 */ + spi3_mosi_pc12: spi3_mosi_pc12 { + pinmux = < 0x586 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1001 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1002 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1003 */ + phandle = < 0x17 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:139 */ + }; + + /* node '/soc/pin-controller@48000000/spi2_nss_pb12' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1020 */ + spi2_nss_pb12: spi2_nss_pb12 { + pinmux = < 0x385 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1021 */ + bias-pull-up; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1022 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1023 */ + phandle = < 0x10 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:131 */ + }; + + /* node '/soc/pin-controller@48000000/spi3_nss_pa15' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1038 */ + spi3_nss_pa15: spi3_nss_pa15 { + pinmux = < 0x1e6 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1039 */ + bias-pull-up; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1040 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1041 */ + phandle = < 0x14 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:139 */ + }; + + /* node '/soc/pin-controller@48000000/spi1_sck_pa5' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1046 */ + spi1_sck_pa5: spi1_sck_pa5 { + pinmux = < 0xa5 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1047 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1048 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1049 */ + phandle = < 0xc >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:124 */ + }; + + /* node '/soc/pin-controller@48000000/spi2_sck_pb13' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1058 */ + spi2_sck_pb13: spi2_sck_pb13 { + pinmux = < 0x3a5 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1059 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1060 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1061 */ + phandle = < 0x11 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:131 */ + }; + + /* node '/soc/pin-controller@48000000/spi3_sck_pc10' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1076 */ + spi3_sck_pc10: spi3_sck_pc10 { + pinmux = < 0x546 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1077 */ + bias-pull-down; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1078 */ + slew-rate = "very-high-speed"; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1079 */ + phandle = < 0x15 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:139 */ + }; + + /* node '/soc/pin-controller@48000000/tim2_ch1_pa5' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1266 */ + tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = < 0xa1 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1267 */ + phandle = < 0x18 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:150 */ + }; + + /* node '/soc/pin-controller@48000000/lpuart1_rx_pa3' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1613 */ + lpuart1_rx_pa3: lpuart1_rx_pa3 { + pinmux = < 0x6c >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1614 */ + phandle = < 0x9 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:111 */ + }; + + /* node '/soc/pin-controller@48000000/usart1_rx_pc5' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1633 */ + usart1_rx_pc5: usart1_rx_pc5 { + pinmux = < 0x4a7 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1634 */ + phandle = < 0x7 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:104 */ + }; + + /* node '/soc/pin-controller@48000000/lpuart1_tx_pa2' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1667 */ + lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = < 0x4c >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1668 */ + bias-pull-up; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1669 */ + phandle = < 0x8 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:111 */ + }; + + /* node '/soc/pin-controller@48000000/usart1_tx_pc4' defined in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1692 */ + usart1_tx_pc4: usart1_tx_pc4 { + pinmux = < 0x487 >; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1693 */ + bias-pull-up; /* in modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi:1694 */ + phandle = < 0x6 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:104 */ + }; + }; + + /* node '/soc/serial@40013800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:311 */ + usart1: arduino_serial: serial@40013800 { + compatible = "st,stm32-usart", + "st,stm32-uart"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:312 */ + reg = < 0x40013800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:313 */ + clocks = < &rcc 0x60 0x4000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:314 */ + resets = < &rctl 0x80e >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:315 */ + interrupts = < 0x25 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:316 */ + pinctrl-0 = < &usart1_tx_pc4 &usart1_rx_pc5 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:104 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:105 */ + current-speed = < 0x1c200 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:106 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:107 */ + }; + + /* node '/soc/serial@40004400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:320 */ + usart2: serial@40004400 { + compatible = "st,stm32-usart", + "st,stm32-uart"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:321 */ + reg = < 0x40004400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:322 */ + clocks = < &rcc 0x58 0x20000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:323 */ + resets = < &rctl 0x711 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:324 */ + interrupts = < 0x26 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:325 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:326 */ + }; + + /* node '/soc/serial@40004800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:329 */ + usart3: serial@40004800 { + compatible = "st,stm32-usart", + "st,stm32-uart"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:330 */ + reg = < 0x40004800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:331 */ + clocks = < &rcc 0x58 0x40000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:332 */ + resets = < &rctl 0x712 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:333 */ + interrupts = < 0x27 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:334 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:335 */ + }; + + /* node '/soc/serial@40004c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:338 */ + uart4: serial@40004c00 { + compatible = "st,stm32-uart"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:339 */ + reg = < 0x40004c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:340 */ + clocks = < &rcc 0x58 0x80000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:341 */ + resets = < &rctl 0x713 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:342 */ + interrupts = < 0x34 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:343 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:344 */ + }; + + /* node '/soc/serial@40008000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:347 */ + lpuart1: serial@40008000 { + compatible = "st,stm32-lpuart", + "st,stm32-uart"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:348 */ + reg = < 0x40008000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:349 */ + clocks = < &rcc 0x5c 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:350 */ + resets = < &rctl 0x780 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:351 */ + interrupts = < 0x5b 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:352 */ + pinctrl-0 = < &lpuart1_tx_pa2 &lpuart1_rx_pa3 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:111 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:112 */ + current-speed = < 0x1c200 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:113 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:114 */ + }; + + /* node '/soc/watchdog@40003000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:356 */ + iwdg: watchdog@40003000 { + compatible = "st,stm32-watchdog"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:357 */ + reg = < 0x40003000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:358 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:201 */ + }; + + /* node '/soc/watchdog@40002c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:362 */ + wwdg: watchdog@40002c00 { + compatible = "st,stm32-window-watchdog"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:363 */ + reg = < 0x40002c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:364 */ + clocks = < &rcc 0x58 0x800 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:365 */ + interrupts = < 0x0 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:366 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:367 */ + }; + + /* node '/soc/i2c@40005400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:370 */ + i2c1: arduino_i2c: i2c@40005400 { + compatible = "st,stm32-i2c-v2"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:371 */ + clock-frequency = < 0x186a0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:372 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:373 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:374 */ + reg = < 0x40005400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:375 */ + clocks = < &rcc 0x58 0x200000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:376 */ + interrupts = < 0x1f 0x0 >, + < 0x20 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:377 */ + interrupt-names = "event", + "error"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:378 */ + pinctrl-0 = < &i2c1_scl_pb8 &i2c1_sda_pb9 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:118 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:119 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:120 */ + phandle = < 0x22 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:905 */ + }; + + /* node '/soc/i2c@40005800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:382 */ + i2c2: i2c@40005800 { + compatible = "st,stm32-i2c-v2"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:383 */ + clock-frequency = < 0x186a0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:384 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:385 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:386 */ + reg = < 0x40005800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:387 */ + clocks = < &rcc 0x58 0x400000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:388 */ + interrupts = < 0x21 0x0 >, + < 0x22 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:389 */ + interrupt-names = "event", + "error"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:390 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:391 */ + phandle = < 0x23 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:913 */ + }; + + /* node '/soc/i2c@40007800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:394 */ + i2c3: i2c@40007800 { + compatible = "st,stm32-i2c-v2"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:395 */ + clock-frequency = < 0x186a0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:396 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:397 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:398 */ + reg = < 0x40007800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:399 */ + clocks = < &rcc 0x58 0x40000000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:400 */ + interrupts = < 0x5c 0x0 >, + < 0x5d 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:401 */ + interrupt-names = "event", + "error"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:402 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:403 */ + phandle = < 0x24 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:921 */ + }; + + /* node '/soc/spi@40013000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:406 */ + spi1: arduino_spi: spi@40013000 { + compatible = "st,stm32-spi-fifo", + "st,stm32-spi"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:407 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:408 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:409 */ + reg = < 0x40013000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:410 */ + interrupts = < 0x23 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:411 */ + clocks = < &rcc 0x60 0x1000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:412 */ + st,spi-data-width = "full-4-to-16-bit"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:413 */ + pinctrl-0 = < &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:124 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:125 */ + cs-gpios = < &gpiob 0x6 0x11 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:126 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:127 */ + }; + + /* node '/soc/spi@40003800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:417 */ + spi2: spi@40003800 { + compatible = "st,stm32-spi-fifo", + "st,stm32-spi"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:418 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:419 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:420 */ + reg = < 0x40003800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:421 */ + clocks = < &rcc 0x58 0x4000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:422 */ + interrupts = < 0x24 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:423 */ + st,spi-data-width = "full-4-to-16-bit"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:424 */ + pinctrl-0 = < &spi2_nss_pb12 &spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:131 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:133 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:134 */ + }; + + /* node '/soc/spi@40003c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:428 */ + spi3: spi@40003c00 { + compatible = "st,stm32-spi-fifo", + "st,stm32-spi"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:429 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:430 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:431 */ + reg = < 0x40003c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:432 */ + clocks = < &rcc 0x58 0x8000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:433 */ + interrupts = < 0x33 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:434 */ + st,spi-data-width = "full-4-to-16-bit"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:435 */ + pinctrl-0 = < &spi3_nss_pa15 &spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:139 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:141 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:142 */ + }; + + /* node '/soc/can@40006400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:439 */ + fdcan1: can@40006400 { + compatible = "st,stm32-fdcan"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:440 */ + reg = < 0x40006400 0x400 >, + < 0x4000a400 0x350 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:441 */ + reg-names = "m_can", + "message_ram"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:442 */ + interrupts = < 0x15 0x0 >, + < 0x16 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:443 */ + interrupt-names = "int0", + "int1"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:444 */ + clocks = < &rcc 0x58 0x2000000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:445 */ + bosch,mram-cfg = < 0x0 0x1c 0x8 0x3 0x3 0x0 0x3 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:446 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:447 */ + }; + + /* node '/soc/timers@40007c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:450 */ + lptim1: stm32_lp_tick_source: timers@40007c00 { + compatible = "st,stm32-lptim"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:451 */ + resets = < &rctl 0x71f >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:453 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:454 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:455 */ + reg = < 0x40007c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:456 */ + interrupts = < 0x31 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:457 */ + interrupt-names = "wakeup"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:458 */ + clocks = < &rcc 0x58 0x80000000 >, + < &rcc 0x2 0x3320088 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:156 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:158 */ + }; + + /* node '/soc/timers@40012c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:462 */ + timers1: timers@40012c00 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:463 */ + reg = < 0x40012c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:464 */ + clocks = < &rcc 0x60 0x800 >, + < &rcc 0xa 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:465 */ + resets = < &rctl 0x80b >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:467 */ + interrupts = < 0x18 0x0 >, + < 0x19 0x0 >, + < 0x1a 0x0 >, + < 0x1b 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:468 */ + interrupt-names = "brk", + "up", + "trgcom", + "cc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:469 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:470 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:471 */ + + /* node '/soc/timers@40012c00/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:473 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:474 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:475 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:476 */ + }; + + /* node '/soc/timers@40012c00/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:479 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:480 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:481 */ + }; + + /* node '/soc/timers@40012c00/qdec' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:484 */ + qdec { + compatible = "st,stm32-qdec"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:485 */ + st,input-filter-level = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:486 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:487 */ + }; + }; + + /* node '/soc/timers@40000000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:491 */ + timers2: timers@40000000 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:492 */ + reg = < 0x40000000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:493 */ + clocks = < &rcc 0x58 0x1 >, + < &rcc 0x9 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:494 */ + resets = < &rctl 0x700 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:496 */ + interrupts = < 0x1c 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:497 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:498 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:499 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:146 */ + + /* node '/soc/timers@40000000/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:502 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:503 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:504 */ + }; + + /* node '/soc/timers@40000000/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:507 */ + pwm2: pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:508 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:510 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:149 */ + pinctrl-0 = < &tim2_ch1_pa5 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:150 */ + pinctrl-names = "default"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:151 */ + phandle = < 0x29 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:39 */ + }; + + /* node '/soc/timers@40000000/qdec' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:513 */ + qdec { + compatible = "st,stm32-qdec"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:514 */ + st,input-filter-level = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:515 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:516 */ + }; + }; + + /* node '/soc/timers@40000400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:520 */ + timers3: timers@40000400 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:521 */ + reg = < 0x40000400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:522 */ + clocks = < &rcc 0x58 0x2 >, + < &rcc 0x9 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:523 */ + resets = < &rctl 0x701 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:525 */ + interrupts = < 0x1d 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:526 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:527 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:528 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:529 */ + + /* node '/soc/timers@40000400/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:531 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:532 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:533 */ + }; + + /* node '/soc/timers@40000400/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:536 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:537 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:538 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:539 */ + }; + + /* node '/soc/timers@40000400/qdec' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:542 */ + qdec { + compatible = "st,stm32-qdec"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:543 */ + st,input-filter-level = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:544 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:545 */ + }; + }; + + /* node '/soc/timers@40000800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:549 */ + timers4: timers@40000800 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:550 */ + reg = < 0x40000800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:551 */ + clocks = < &rcc 0x58 0x4 >, + < &rcc 0x9 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:552 */ + resets = < &rctl 0x702 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:554 */ + interrupts = < 0x1e 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:555 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:556 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:557 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:558 */ + + /* node '/soc/timers@40000800/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:560 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:561 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:562 */ + }; + + /* node '/soc/timers@40000800/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:565 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:566 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:567 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:568 */ + }; + + /* node '/soc/timers@40000800/qdec' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:571 */ + qdec { + compatible = "st,stm32-qdec"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:572 */ + st,input-filter-level = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:573 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:574 */ + }; + }; + + /* node '/soc/timers@40001000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:578 */ + timers6: timers@40001000 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:579 */ + reg = < 0x40001000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:580 */ + clocks = < &rcc 0x58 0x10 >, + < &rcc 0x9 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:581 */ + resets = < &rctl 0x704 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:583 */ + interrupts = < 0x36 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:584 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:585 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:586 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:587 */ + + /* node '/soc/timers@40001000/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:589 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:590 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:591 */ + }; + }; + + /* node '/soc/timers@40001400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:595 */ + timers7: timers@40001400 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:596 */ + reg = < 0x40001400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:597 */ + clocks = < &rcc 0x58 0x20 >, + < &rcc 0x9 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:598 */ + resets = < &rctl 0x705 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:600 */ + interrupts = < 0x37 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:601 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:602 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:603 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:604 */ + + /* node '/soc/timers@40001400/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:606 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:607 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:608 */ + }; + }; + + /* node '/soc/timers@40013400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:612 */ + timers8: timers@40013400 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:613 */ + reg = < 0x40013400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:614 */ + clocks = < &rcc 0x60 0x2000 >, + < &rcc 0xa 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:615 */ + resets = < &rctl 0x80d >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:617 */ + interrupts = < 0x2b 0x0 >, + < 0x2c 0x0 >, + < 0x2d 0x0 >, + < 0x2e 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:618 */ + interrupt-names = "brk", + "up", + "trgcom", + "cc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:619 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:620 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:621 */ + + /* node '/soc/timers@40013400/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:623 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:624 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:625 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:626 */ + }; + + /* node '/soc/timers@40013400/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:629 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:630 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:631 */ + }; + + /* node '/soc/timers@40013400/qdec' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:634 */ + qdec { + compatible = "st,stm32-qdec"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:635 */ + st,input-filter-level = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:636 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:637 */ + }; + }; + + /* node '/soc/timers@40014000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:641 */ + timers15: timers@40014000 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:642 */ + reg = < 0x40014000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:643 */ + clocks = < &rcc 0x60 0x10000 >, + < &rcc 0xa 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:644 */ + resets = < &rctl 0x810 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:646 */ + interrupts = < 0x18 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:647 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:648 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:649 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:650 */ + + /* node '/soc/timers@40014000/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:652 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:653 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:654 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:655 */ + }; + + /* node '/soc/timers@40014000/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:658 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:659 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:660 */ + }; + }; + + /* node '/soc/timers@40014400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:664 */ + timers16: timers@40014400 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:665 */ + reg = < 0x40014400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:666 */ + clocks = < &rcc 0x60 0x20000 >, + < &rcc 0xa 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:667 */ + resets = < &rctl 0x811 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:669 */ + interrupts = < 0x19 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:670 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:671 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:672 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:673 */ + + /* node '/soc/timers@40014400/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:675 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:676 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:677 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:678 */ + }; + + /* node '/soc/timers@40014400/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:681 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:682 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:683 */ + }; + }; + + /* node '/soc/timers@40014800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:687 */ + timers17: timers@40014800 { + compatible = "st,stm32-timers"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:688 */ + reg = < 0x40014800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:689 */ + clocks = < &rcc 0x60 0x40000 >, + < &rcc 0xa 0xff >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:690 */ + resets = < &rctl 0x812 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:692 */ + interrupts = < 0x1a 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:693 */ + interrupt-names = "global"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:694 */ + st,prescaler = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:695 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:696 */ + + /* node '/soc/timers@40014800/pwm' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:698 */ + pwm { + compatible = "st,stm32-pwm"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:699 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:700 */ + #pwm-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:701 */ + }; + + /* node '/soc/timers@40014800/counter' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:704 */ + counter { + compatible = "st,stm32-counter"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:705 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:706 */ + }; + }; + + /* node '/soc/rtc@40002800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:710 */ + rtc: rtc@40002800 { + compatible = "st,stm32-rtc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:711 */ + reg = < 0x40002800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:712 */ + interrupts = < 0x29 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:713 */ + prescaler = < 0x8000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:715 */ + alarms-count = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:716 */ + alrm-exti-line = < 0x11 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:717 */ + clocks = < &rcc 0x58 0x400 >, + < &rcc 0x3 0x2280090 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:162 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:164 */ + }; + + /* node '/soc/rng@50060800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:721 */ + rng: rng@50060800 { + compatible = "st,stm32-rng"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:722 */ + reg = < 0x50060800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:723 */ + interrupts = < 0x5a 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:724 */ + clocks = < &rcc 0x4c 0x4000000 >, + < &rcc 0x5 0x3a0088 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:98 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:100 */ + }; + + /* node '/soc/usb@40005c00' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:729 */ + usb: usb@40005c00 { + compatible = "st,stm32-usb"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:730 */ + reg = < 0x40005c00 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:731 */ + interrupts = < 0x14 0x0 >, + < 0x13 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:732 */ + interrupt-names = "usb", + "usbhp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:733 */ + num-bidir-endpoints = < 0x8 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:734 */ + ram-size = < 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:735 */ + maximum-speed = "full-speed"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:736 */ + phys = < &usb_fs_phy >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:737 */ + clocks = < &rcc 0x58 0x800000 >, + < &rcc 0x5 0x3a0088 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:738 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:740 */ + }; + + /* node '/soc/dma@40020000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:743 */ + dma1: dma@40020000 { + compatible = "st,stm32-dma-v2"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:744 */ + #dma-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:745 */ + reg = < 0x40020000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:746 */ + clocks = < &rcc 0x48 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:747 */ + dma-offset = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:748 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:749 */ + interrupts = < 0xb 0x0 0xc 0x0 0xd 0x0 0xe 0x0 0xf 0x0 0x10 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:14 */ + dma-requests = < 0x6 >; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:15 */ + phandle = < 0x1a >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:785 */ + }; + + /* node '/soc/dma@40020400' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:752 */ + dma2: dma@40020400 { + compatible = "st,stm32-dma-v2"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:753 */ + #dma-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:754 */ + reg = < 0x40020400 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:755 */ + clocks = < &rcc 0x48 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:756 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:757 */ + interrupts = < 0x38 0x0 0x39 0x0 0x3a 0x0 0x3b 0x0 0x3c 0x0 0x61 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:19 */ + dma-requests = < 0x6 >; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:20 */ + dma-offset = < 0x6 >; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:21 */ + }; + + /* node '/soc/dmamux@40020800' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:760 */ + dmamux1: dmamux@40020800 { + compatible = "st,stm32-dmamux"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:761 */ + #dma-cells = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:762 */ + reg = < 0x40020800 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:763 */ + interrupts = < 0x5e 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:764 */ + clocks = < &rcc 0x48 0x4 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:765 */ + dma-generators = < 0x4 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:766 */ + dma-requests = < 0x6f >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:767 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:768 */ + dma-channels = < 0xc >; /* in zephyr/dts/arm/st/g4/stm32g431.dtsi:25 */ + }; + + /* node '/soc/ucpd@4000a000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:771 */ + ucpd1: ucpd@4000a000 { + compatible = "st,stm32-ucpd"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:772 */ + reg = < 0x4000a000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:773 */ + clocks = < &rcc 0x58 0x10 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:774 */ + interrupts = < 0x3f 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:775 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:776 */ + }; + + /* node '/soc/sai1@40015404' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:779 */ + sai1_a: sai1@40015404 { + compatible = "st,stm32-sai"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:780 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:781 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:782 */ + reg = < 0x40015404 0x20 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:783 */ + clocks = < &rcc 0x60 0x200000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:784 */ + dmas = < &dma1 0x1 0x6c 0x22800 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:785 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:787 */ + }; + + /* node '/soc/sai1@40015424' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:790 */ + sai1_b: sai1@40015424 { + compatible = "st,stm32-sai"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:791 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:792 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:793 */ + reg = < 0x40015424 0x20 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:794 */ + clocks = < &rcc 0x60 0x200000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:795 */ + dmas = < &dma1 0x2 0x6d 0x22800 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:796 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:798 */ + }; + + /* node '/soc/opamp1@40010300' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:801 */ + opamp1: opamp1@40010300 { + compatible = "st,stm32g4-opamp", + "st,stm32-opamp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:802 */ + reg = < 0x40010300 0x18 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:803 */ + clocks = < &rcc 0x60 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:804 */ + clock-names = "opampx"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:805 */ + programmable-gain = "OPAMP_GAIN_1", + "OPAMP_GAIN_2", + "OPAMP_GAIN_3", + "OPAMP_GAIN_4", + "OPAMP_GAIN_7", + "OPAMP_GAIN_8", + "OPAMP_GAIN_15", + "OPAMP_GAIN_16", + "OPAMP_GAIN_31", + "OPAMP_GAIN_32", + "OPAMP_GAIN_63", + "OPAMP_GAIN_64"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:806 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:812 */ + }; + + /* node '/soc/opamp2@40010304' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:815 */ + opamp2: opamp2@40010304 { + compatible = "st,stm32g4-opamp", + "st,stm32-opamp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:816 */ + reg = < 0x40010304 0x18 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:817 */ + clocks = < &rcc 0x60 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:818 */ + clock-names = "opampx"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:819 */ + programmable-gain = "OPAMP_GAIN_1", + "OPAMP_GAIN_2", + "OPAMP_GAIN_3", + "OPAMP_GAIN_4", + "OPAMP_GAIN_7", + "OPAMP_GAIN_8", + "OPAMP_GAIN_15", + "OPAMP_GAIN_16", + "OPAMP_GAIN_31", + "OPAMP_GAIN_32", + "OPAMP_GAIN_63", + "OPAMP_GAIN_64"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:820 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:826 */ + }; + + /* node '/soc/opamp3@40010308' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:829 */ + opamp3: opamp3@40010308 { + compatible = "st,stm32g4-opamp", + "st,stm32-opamp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:830 */ + reg = < 0x40010308 0x18 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:831 */ + clocks = < &rcc 0x60 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:832 */ + clock-names = "opampx"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:833 */ + programmable-gain = "OPAMP_GAIN_1", + "OPAMP_GAIN_2", + "OPAMP_GAIN_3", + "OPAMP_GAIN_4", + "OPAMP_GAIN_7", + "OPAMP_GAIN_8", + "OPAMP_GAIN_15", + "OPAMP_GAIN_16", + "OPAMP_GAIN_31", + "OPAMP_GAIN_32", + "OPAMP_GAIN_63", + "OPAMP_GAIN_64"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:834 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:840 */ + }; + + /* node '/soc/comparator@40010200' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:843 */ + comp1: comparator@40010200 { + compatible = "st,stm32g4-comp", + "st,stm32-comp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:844 */ + reg = < 0x40010200 0x4 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:845 */ + interrupts = < 0x40 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:846 */ + st,exti-line = < 0x15 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:847 */ + clocks = < &rcc 0x60 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:848 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:849 */ + }; + + /* node '/soc/comparator@40010204' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:852 */ + comp2: comparator@40010204 { + compatible = "st,stm32g4-comp", + "st,stm32-comp"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:853 */ + reg = < 0x40010204 0x4 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:854 */ + interrupts = < 0x40 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:855 */ + st,exti-line = < 0x16 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:856 */ + clocks = < &rcc 0x60 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:857 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:858 */ + }; + + /* node '/soc/crc@40023000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:861 */ + crc: crc@40023000 { + compatible = "st,stm32-crc"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:862 */ + reg = < 0x40023000 0x400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:863 */ + clocks = < &rcc 0x48 0x1000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:864 */ + resets = < &rctl 0x50c >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:865 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:866 */ + }; + }; + + /* node '/cpus' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:31 */ + cpus { + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:32 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:33 */ + + /* node '/cpus/cpu@0' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:35 */ + cpu0: cpu@0 { + device_type = "cpu"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:36 */ + compatible = "arm,cortex-m4f"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:37 */ + reg = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:38 */ + cpu-power-states = < &stop0 &stop1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:39 */ + }; + + /* node '/cpus/power-states' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:42 */ + power-states { + + /* node '/cpus/power-states/state0' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:43 */ + stop0: state0 { + compatible = "zephyr,power-state"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:44 */ + power-state-name = "suspend-to-idle"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:45 */ + substate-id = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:46 */ + min-residency-us = < 0x14 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:47 */ + phandle = < 0x1b >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:39 */ + }; + + /* node '/cpus/power-states/state1' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:50 */ + stop1: state1 { + compatible = "zephyr,power-state"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:51 */ + power-state-name = "suspend-to-idle"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:52 */ + substate-id = < 0x2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:53 */ + min-residency-us = < 0x64 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:54 */ + phandle = < 0x1c >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:39 */ + }; + }; + }; + + /* node '/memory@20000000' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:59 */ + sram0: memory@20000000 { + compatible = "zephyr,memory-region", + "mmio-sram"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:60 */ + zephyr,memory-region = "SRAM0"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:61 */ + reg = < 0x20000000 0x8000 >; /* in zephyr/dts/arm/st/g4/stm32g431Xb.dtsi:10 */ + }; + + /* node '/clocks' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:64 */ + clocks { + + /* node '/clocks/clk-hse' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:65 */ + clk_hse: clk-hse { + #clock-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:66 */ + compatible = "st,stm32-hse-clock"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:67 */ + clock-frequency = < 0x16e3600 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:75 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:76 */ + phandle = < 0x1d >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:85 */ + }; + + /* node '/clocks/clk-hsi' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:71 */ + clk_hsi: clk-hsi { + #clock-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:72 */ + compatible = "fixed-clock"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:73 */ + clock-frequency = < 0xf42400 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:74 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:75 */ + }; + + /* node '/clocks/clk-hsi48' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:78 */ + clk_hsi48: clk-hsi48 { + #clock-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:79 */ + compatible = "fixed-clock"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:80 */ + clock-frequency = < 0x2dc6c00 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:81 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:71 */ + }; + + /* node '/clocks/clk-lse' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:85 */ + clk_lse: clk-lse { + #clock-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:86 */ + compatible = "st,stm32-lse-clock"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:87 */ + clock-frequency = < 0x8000 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:88 */ + driving-capability = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:89 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:67 */ + }; + + /* node '/clocks/clk-lsi' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:93 */ + clk_lsi: clk-lsi { + #clock-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:94 */ + compatible = "fixed-clock"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:95 */ + clock-frequency = < 0x7d00 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:96 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:63 */ + }; + + /* node '/clocks/pll' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:100 */ + pll: pll { + #clock-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:101 */ + compatible = "st,stm32g4-pll-clock"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:102 */ + div-m = < 0x6 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:80 */ + mul-n = < 0x55 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:81 */ + div-p = < 0x7 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:82 */ + div-q = < 0x2 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:83 */ + div-r = < 0x2 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:84 */ + clocks = < &clk_hse >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:85 */ + status = "okay"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:86 */ + phandle = < 0x4 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:90 */ + }; + }; + + /* node '/dietemp' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:870 */ + die_temp: dietemp { + compatible = "st,stm32-temp-cal"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:871 */ + nvmem-cells = < &ts_cal1_otp >, + < &ts_cal2_otp >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:872 */ + nvmem-cell-names = "TS_CAL1", + "TS_CAL2"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:873 */ + ts-cal1-temp = < 0x1e >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:874 */ + ts-cal2-temp = < 0x82 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:875 */ + ts-cal-vrefanalog = < 0xbb8 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:876 */ + io-channels = < &adc1 0x10 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:877 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:878 */ + }; + + /* node '/vref' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:881 */ + vref: vref { + compatible = "st,stm32-vref"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:882 */ + nvmem-cells = < &vrefint_otp >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:883 */ + vrefint-cal-mv = < 0xbb8 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:884 */ + io-channels = < &adc1 0x12 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:885 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:886 */ + }; + + /* node '/vbat' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:889 */ + vbat: vbat { + compatible = "st,stm32-vbat"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:890 */ + ratio = < 0x3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:891 */ + io-channels = < &adc1 0x11 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:892 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:893 */ + }; + + /* node '/usbphy' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:896 */ + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:897 */ + #phy-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:898 */ + phandle = < 0x19 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:737 */ + }; + + /* node '/smbus1' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:901 */ + smbus1: smbus1 { + compatible = "st,stm32-smbus"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:902 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:903 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:904 */ + i2c = < &i2c1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:905 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:906 */ + }; + + /* node '/smbus2' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:909 */ + smbus2: smbus2 { + compatible = "st,stm32-smbus"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:910 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:911 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:912 */ + i2c = < &i2c2 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:913 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:914 */ + }; + + /* node '/smbus3' defined in zephyr/dts/arm/st/g4/stm32g4.dtsi:917 */ + smbus3: smbus3 { + compatible = "st,stm32-smbus"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:918 */ + #address-cells = < 0x1 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:919 */ + #size-cells = < 0x0 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:920 */ + i2c = < &i2c3 >; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:921 */ + status = "disabled"; /* in zephyr/dts/arm/st/g4/stm32g4.dtsi:922 */ + }; + + /* node '/connector' defined in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:10 */ + arduino_header: connector { + compatible = "arduino-header-r3"; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:11 */ + #gpio-cells = < 0x2 >; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:12 */ + gpio-map-mask = < 0xffffffff 0xffffffc0 >; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:13 */ + gpio-map-pass-thru = < 0x0 0x3f >; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:14 */ + gpio-map = < 0x0 0x0 &gpioa 0x0 0x0 >, + < 0x1 0x0 &gpioa 0x1 0x0 >, + < 0x2 0x0 &gpioa 0x4 0x0 >, + < 0x3 0x0 &gpiob 0x0 0x0 >, + < 0x4 0x0 &gpioc 0x1 0x0 >, + < 0x5 0x0 &gpioc 0x0 0x0 >, + < 0x6 0x0 &gpioc 0x5 0x0 >, + < 0x7 0x0 &gpioc 0x4 0x0 >, + < 0x8 0x0 &gpioa 0xa 0x0 >, + < 0x9 0x0 &gpiob 0x3 0x0 >, + < 0xa 0x0 &gpiob 0x5 0x0 >, + < 0xb 0x0 &gpiob 0x4 0x0 >, + < 0xc 0x0 &gpiob 0xa 0x0 >, + < 0xd 0x0 &gpioa 0x8 0x0 >, + < 0xe 0x0 &gpioa 0x9 0x0 >, + < 0xf 0x0 &gpioc 0x7 0x0 >, + < 0x10 0x0 &gpiob 0x6 0x0 >, + < 0x11 0x0 &gpioa 0x7 0x0 >, + < 0x12 0x0 &gpioa 0x6 0x0 >, + < 0x13 0x0 &gpioa 0x5 0x0 >, + < 0x14 0x0 &gpiob 0x9 0x0 >, + < 0x15 0x0 &gpiob 0x8 0x0 >; /* in zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi:15 */ + }; + + /* node '/st-morpho-header' defined in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:10 */ + st_morpho_header: st-morpho-header { + compatible = "st-morpho-header"; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:11 */ + #gpio-cells = < 0x2 >; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:12 */ + gpio-map-mask = < 0xff 0x0 >; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:13 */ + gpio-map-pass-thru = < 0x0 0x7f >; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:14 */ + gpio-map = < 0x0 0x0 &gpioc 0xa 0x0 >, + < 0x1 0x0 &gpioc 0xb 0x0 >, + < 0x2 0x0 &gpioc 0xc 0x0 >, + < 0x3 0x0 &gpiod 0x2 0x0 >, + < 0xc 0x0 &gpioa 0xd 0x0 >, + < 0xe 0x0 &gpioa 0xe 0x0 >, + < 0x10 0x0 &gpioa 0xf 0x0 >, + < 0x14 0x0 &gpiob 0x7 0x0 >, + < 0x16 0x0 &gpioc 0xd 0x0 >, + < 0x18 0x0 &gpioc 0xe 0x0 >, + < 0x1a 0x0 &gpioc 0xf 0x0 >, + < 0x1b 0x0 &gpioa 0x0 0x0 >, + < 0x1c 0x0 &gpiof 0x0 0x0 >, + < 0x1d 0x0 &gpioa 0x1 0x0 >, + < 0x1e 0x0 &gpiof 0x1 0x0 >, + < 0x1f 0x0 &gpioa 0x4 0x0 >, + < 0x21 0x0 &gpiob 0x0 0x0 >, + < 0x22 0x0 &gpioc 0x2 0x0 >, + < 0x23 0x0 &gpioc 0x1 0x0 >, + < 0x24 0x0 &gpioc 0x3 0x0 >, + < 0x25 0x0 &gpioc 0x0 0x0 >, + < 0x48 0x0 &gpioc 0x9 0x0 >, + < 0x49 0x0 &gpioc 0x8 0x0 >, + < 0x4a 0x0 &gpiob 0x8 0x0 >, + < 0x4b 0x0 &gpioc 0x6 0x0 >, + < 0x4c 0x0 &gpiob 0x9 0x0 >, + < 0x4d 0x0 &gpioc 0x5 0x0 >, + < 0x52 0x0 &gpiob 0xd 0x0 >, + < 0x53 0x0 &gpioa 0xc 0x0 >, + < 0x54 0x0 &gpiob 0xe 0x0 >, + < 0x55 0x0 &gpioa 0xb 0x0 >, + < 0x56 0x0 &gpiob 0xf 0x0 >, + < 0x57 0x0 &gpiob 0xc 0x0 >, + < 0x58 0x0 &gpiob 0x6 0x0 >, + < 0x59 0x0 &gpiob 0xb 0x0 >, + < 0x5a 0x0 &gpioc 0x7 0x0 >, + < 0x5c 0x0 &gpioa 0x9 0x0 >, + < 0x5d 0x0 &gpiob 0x2 0x0 >, + < 0x5e 0x0 &gpioa 0x8 0x0 >, + < 0x5f 0x0 &gpiob 0x1 0x0 >, + < 0x60 0x0 &gpiob 0xa 0x0 >, + < 0x61 0x0 &gpioa 0x7 0x0 >, + < 0x62 0x0 &gpiob 0x4 0x0 >, + < 0x63 0x0 &gpioa 0x6 0x0 >, + < 0x64 0x0 &gpiob 0x5 0x0 >, + < 0x65 0x0 &gpioa 0x5 0x0 >, + < 0x66 0x0 &gpiob 0x3 0x0 >, + < 0x68 0x0 &gpioa 0xa 0x0 >, + < 0x69 0x0 &gpioc 0x4 0x0 >, + < 0x6a 0x0 &gpioa 0x2 0x0 >, + < 0x6c 0x0 &gpioa 0x3 0x0 >; /* in zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi:15 */ + }; + + /* node '/leds' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:26 */ + leds: leds { + compatible = "gpio-leds"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:27 */ + + /* node '/leds/led_0' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:29 */ + green_led: led_0 { + gpios = < &gpioa 0x5 0x0 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:30 */ + label = "User LD2"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:31 */ + }; + }; + + /* node '/pwmleds' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:35 */ + pwmleds { + compatible = "pwm-leds"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:36 */ + + /* node '/pwmleds/green_pwm_led' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:38 */ + green_pwm_led: green_pwm_led { + pwms = < &pwm2 0x1 0x1312d00 0x0 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:39 */ + }; + }; + + /* node '/gpio_keys' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:43 */ + gpio_keys { + compatible = "gpio-keys"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:44 */ + + /* node '/gpio_keys/button' defined in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:46 */ + user_button: button { + label = "User"; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:47 */ + gpios = < &gpioc 0xd 0x0 >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:48 */ + zephyr,code = < 0xb >; /* in zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts:49 */ + }; + }; +}; diff --git a/zephyrproject/build/mcuboot/zephyr/zephyr.dts.d b/zephyrproject/build/mcuboot/zephyr/zephyr.dts.d new file mode 100644 index 0000000..085aa7e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/zephyr.dts.d @@ -0,0 +1,39 @@ +empty_file.o: \ + /home/jeremy/utat-dev/zephyrproject/zephyr/misc/empty_file.c \ + /home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431Xb.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/armv7-m.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/skeleton.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32_common_clocks.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/i2c/i2c.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/gpio.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm/pwm.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_listify.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_is_eq.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_inc.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_dec.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_x2.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm/stm32_pwm.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dma/stm32_dma.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32-common.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/sensor/qdec_stm32.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/freq.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/mem.h \ + /home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/arduino-header-r3.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/st-morpho-header.h \ + /home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/input/input-event-codes.h \ + /home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/app.overlay diff --git a/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre b/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre new file mode 100644 index 0000000..a912b0b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre @@ -0,0 +1,3143 @@ +# 0 "/home/jeremy/utat-dev/zephyrproject/zephyr/misc/empty_file.c" +# 0 "" +# 0 "" +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 1 + + + + + + +/dts-v1/; +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431Xb.dtsi" 1 3 4 + + + + + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431.dtsi" 1 3 4 + + + + + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 1 3 4 +# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/armv7-m.dtsi" 1 3 4 + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/skeleton.dtsi" 1 3 4 +# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/skeleton.dtsi" 3 4 +/ { + #address-cells = <1>; + #size-cells = <1>; + + chosen {}; + + aliases {}; +}; +# 4 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/armv7-m.dtsi" 2 3 4 + +/ { + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&nvic>; + ranges; + + nvic: interrupt-controller@e000e100 { + #address-cells = <1>; + compatible = "arm,v7m-nvic"; + reg = <0xe000e100 0xc00>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + systick: timer@e000e010 { + compatible = "arm,armv7m-systick"; + reg = <0xe000e010 0x10>; + }; + }; +}; +# 12 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h" 1 3 4 +# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32_common_clocks.h" 1 3 4 +# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/stm32g4_clock.h" 2 3 4 +# 13 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/i2c/i2c.h" 1 3 4 +# 14 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/gpio.h" 1 3 4 +# 15 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm/pwm.h" 1 3 4 +# 16 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 1 3 4 +# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 1 3 4 +# 19 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 1 3 4 +# 34 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 1 3 4 +# 18 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 1 3 4 +# 1465 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_listify.h" 1 3 4 +# 1466 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 2 3 4 +# 19 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4 +# 203 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_is_eq.h" 1 3 4 +# 204 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4 +# 234 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_inc.h" 1 3 4 +# 235 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4 + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_dec.h" 1 3 4 +# 238 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4 + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_x2.h" 1 3 4 +# 241 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4 +# 35 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 2 3 4 +# 20 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 2 3 4 +# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 2 3 4 +# 17 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pwm/stm32_pwm.h" 1 3 4 +# 18 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/dma/stm32_dma.h" 1 3 4 +# 19 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h" 1 3 4 +# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32-common.h" 1 3 4 +# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h" 2 3 4 +# 20 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/sensor/qdec_stm32.h" 1 3 4 +# 21 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/freq.h" 1 3 4 +# 22 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/common/mem.h" 1 3 4 +# 23 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g4.dtsi" 2 3 4 + +/ { + chosen { + zephyr,crc = &crc; + zephyr,entropy = &rng; + zephyr,flash-controller = &flash; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + cpu-power-states = <&stop0 &stop1>; + }; + + power-states { + stop0: state0 { + compatible = "zephyr,power-state"; + power-state-name = "suspend-to-idle"; + substate-id = <1>; + min-residency-us = <20>; + }; + + stop1: state1 { + compatible = "zephyr,power-state"; + power-state-name = "suspend-to-idle"; + substate-id = <2>; + min-residency-us = <100>; + }; + }; + }; + + sram0: memory@20000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; + }; + + clocks { + clk_hse: clk-hse { + #clock-cells = <0>; + compatible = "st,stm32-hse-clock"; + status = "disabled"; + }; + + clk_hsi: clk-hsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <(((16) * 1000) * 1000)>; + status = "disabled"; + }; + + clk_hsi48: clk-hsi48 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <(((48) * 1000) * 1000)>; + status = "disabled"; + }; + + clk_lse: clk-lse { + #clock-cells = <0>; + compatible = "st,stm32-lse-clock"; + clock-frequency = <32768>; + driving-capability = <0>; + status = "disabled"; + }; + + clk_lsi: clk-lsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <((32) * 1000)>; + status = "disabled"; + }; + + pll: pll { + #clock-cells = <0>; + compatible = "st,stm32g4-pll-clock"; + status = "disabled"; + }; + }; + + soc { + + + + adc1: adc@50000000 { + compatible = "st,stm32-adc"; + reg = <0x50000000 0x100>; + clocks = <&rcc (0x04c) (1 << 13)>; + clock-names = "adcx"; + interrupts = <18 0>; + #io-channel-cells = <1>; + st,adc-resolutions = <12 10 8 6>; + sampling-times = <3 7 13 25 48 93 248 641>; + st,adc-sequencer = "programmable"; + st,adc-oversampler = "minimal"; + st,adc-internal-regulator = "startup-sw-delay"; + st,adc-has-deep-powerdown; + st,adc-has-differential-support; + st,adc-has-injected-support; + status = "disabled"; + }; + + adc2: adc@50000100 { + compatible = "st,stm32-adc"; + reg = <0x50000100 0x100>; + clocks = <&rcc (0x04c) (1 << 13)>; + clock-names = "adcx"; + interrupts = <18 0>; + #io-channel-cells = <1>; + st,adc-resolutions = <12 10 8 6>; + sampling-times = <3 7 13 25 48 93 248 641>; + st,adc-sequencer = "programmable"; + st,adc-oversampler = "minimal"; + st,adc-internal-regulator = "startup-sw-delay"; + st,adc-has-deep-powerdown; + st,adc-has-differential-support; + st,adc-has-injected-support; + status = "disabled"; + }; + + dac1: dac@50000800 { + compatible = "st,stm32-dac"; + reg = <0x50000800 0x400>; + clocks = <&rcc (0x04c) (1 << 16)>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + dac3: dac@50001000 { + compatible = "st,stm32-dac"; + reg = <0x50001000 0x400>; + clocks = <&rcc (0x04c) (1 << 18)>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + flash: flash-controller@40022000 { + compatible = "st,stm32-flash-controller", "st,stm32g4-flash-controller"; + reg = <0x40022000 0x400>; + interrupts = <3 0>; + clocks = <&rcc (0x048) (1 << 8)>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + flash0: flash@8000000 { + compatible = "st,stm32-nv-flash", "soc-nv-flash"; + #address-cells = <1>; + #size-cells = <1>; + write-block-size = <8>; + erase-block-size = <2048>; + + max-erase-time = <25>; + }; + + st_nvm_user_otp: flash@1fff7000 { + compatible = "st,stm32-nvm-otp"; + reg = <0x1fff7000 ((1) * 1024)>; + status = "disabled"; + }; + + + flash@1fff7500 { + compatible = "st,stm32-nvm-otp"; + reg = <0x1fff7500 768>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + ts_cal1_otp: ts-cal1@a8 { + reg = <0xa8 0x2>; + #nvmem-cell-cells = <0>; + read-only; + }; + + vrefint_otp: vrefint@aa { + reg = <0xaa 0x2>; + #nvmem-cell-cells = <0>; + read-only; + }; + + ts_cal2_otp: ts-cal2@ca { + reg = <0xca 0x2>; + #nvmem-cell-cells = <0>; + read-only; + }; + }; + }; + }; + + rcc: rcc@40021000 { + compatible = "st,stm32-rcc"; + #clock-cells = <2>; + reg = <0x40021000 0x400>; + undershoot-prevention; + + rctl: reset-controller { + compatible = "st,stm32-rcc-rctl"; + #reset-cells = <1>; + }; + }; + + exti: interrupt-controller@40010400 { + compatible = "st,stm32-exti"; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <0>; + reg = <0x40010400 0x400>; + clocks = <&rcc (0x060) (1 << 0)>; + num-lines = <64>; + interrupts = <6 0>, <7 0>, <8 0>, <9 0>, + <10 0>, <23 0>, <40 0>; + interrupt-names = "line0", "line1", "line2-TSC", "line3", + "line4", "line5-9", "line10-15"; + line-ranges = <0 1>, <1 1>, <2 1>, <3 1>, + <4 1>, <5 5>, <10 6>; + }; + + pinctrl: pin-controller@48000000 { + compatible = "st,stm32-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x48000000 0x2000>; + + gpioa: gpio@48000000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000000 0x400>; + clocks = <&rcc (0x04c) (1 << 0)>; + }; + + gpiob: gpio@48000400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000400 0x400>; + clocks = <&rcc (0x04c) (1 << 1)>; + }; + + gpioc: gpio@48000800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000800 0x400>; + clocks = <&rcc (0x04c) (1 << 2)>; + }; + + gpiod: gpio@48000c00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000c00 0x400>; + clocks = <&rcc (0x04c) (1 << 3)>; + }; + + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc (0x04c) (1 << 4)>; + }; + + gpiof: gpio@48001400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001400 0x400>; + clocks = <&rcc (0x04c) (1 << 5)>; + }; + + gpiog: gpio@48001800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001800 0x400>; + clocks = <&rcc (0x04c) (1 << 6)>; + }; + }; + + usart1: serial@40013800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40013800 0x400>; + clocks = <&rcc (0x060) (1 << 14)>; + resets = <&rctl (((0x40) << 5U) | (14))>; + interrupts = <37 0>; + status = "disabled"; + }; + + usart2: serial@40004400 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004400 0x400>; + clocks = <&rcc (0x058) (1 << 17)>; + resets = <&rctl (((0x38) << 5U) | (17))>; + interrupts = <38 0>; + status = "disabled"; + }; + + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc (0x058) (1 << 18)>; + resets = <&rctl (((0x38) << 5U) | (18))>; + interrupts = <39 0>; + status = "disabled"; + }; + + uart4: serial@40004c00 { + compatible = "st,stm32-uart"; + reg = <0x40004c00 0x400>; + clocks = <&rcc (0x058) (1 << 19)>; + resets = <&rctl (((0x38) << 5U) | (19))>; + interrupts = <52 0>; + status = "disabled"; + }; + + lpuart1: serial@40008000 { + compatible = "st,stm32-lpuart", "st,stm32-uart"; + reg = <0x40008000 0x400>; + clocks = <&rcc (0x05c) (1 << 0)>; + resets = <&rctl (((0x3C) << 5U) | (0))>; + interrupts = <91 0>; + status = "disabled"; + }; + + iwdg: watchdog@40003000 { + compatible = "st,stm32-watchdog"; + reg = <0x40003000 0x400>; + status = "disabled"; + }; + + wwdg: watchdog@40002c00 { + compatible = "st,stm32-window-watchdog"; + reg = <0x40002c00 0x400>; + clocks = <&rcc (0x058) (1 << 11)>; + interrupts = <0 0>; + status = "disabled"; + }; + + i2c1: i2c@40005400 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005400 0x400>; + clocks = <&rcc (0x058) (1 << 21)>; + interrupts = <31 0>, <32 0>; + interrupt-names = "event", "error"; + status = "disabled"; + }; + + i2c2: i2c@40005800 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005800 0x400>; + clocks = <&rcc (0x058) (1 << 22)>; + interrupts = <33 0>, <34 0>; + interrupt-names = "event", "error"; + status = "disabled"; + }; + + i2c3: i2c@40007800 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40007800 0x400>; + clocks = <&rcc (0x058) (1 << 30)>; + interrupts = <92 0>, <93 0>; + interrupt-names = "event", "error"; + status = "disabled"; + }; + + spi1: spi@40013000 { + compatible = "st,stm32-spi-fifo", "st,stm32-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40013000 0x400>; + interrupts = <35 0>; + clocks = <&rcc (0x060) (1 << 12)>; + st,spi-data-width = "full-4-to-16-bit"; + status = "disabled"; + }; + + spi2: spi@40003800 { + compatible = "st,stm32-spi-fifo", "st,stm32-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003800 0x400>; + clocks = <&rcc (0x058) (1 << 14)>; + interrupts = <36 0>; + st,spi-data-width = "full-4-to-16-bit"; + status = "disabled"; + }; + + spi3: spi@40003c00 { + compatible = "st,stm32-spi-fifo", "st,stm32-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003c00 0x400>; + clocks = <&rcc (0x058) (1 << 15)>; + interrupts = <51 0>; + st,spi-data-width = "full-4-to-16-bit"; + status = "disabled"; + }; + + fdcan1: can@40006400 { + compatible = "st,stm32-fdcan"; + reg = <0x40006400 0x400>, <0x4000a400 0x350>; + reg-names = "m_can", "message_ram"; + interrupts = <21 0>, <22 0>; + interrupt-names = "int0", "int1"; + clocks = <&rcc (0x058) (1 << 25)>; + bosch,mram-cfg = <0x0 28 8 3 3 0 3 3>; + status = "disabled"; + }; + + lptim1: timers@40007c00 { + compatible = "st,stm32-lptim"; + clocks = <&rcc (0x058) (1 << 31)>; + resets = <&rctl (((0x38) << 5U) | (31))>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40007c00 0x400>; + interrupts = <49 0>; + interrupt-names = "wakeup"; + status = "disabled"; + }; + + timers1: timers@40012c00 { + compatible = "st,stm32-timers"; + reg = <0x40012c00 0x400>; + clocks = <&rcc (0x060) (1 << 11)>, + <&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x40) << 5U) | (11))>; + interrupts = <24 0>, <25 0>, <26 0>, <27 0>; + interrupt-names = "brk", "up", "trgcom", "cc"; + st,prescaler = <0>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + + qdec { + compatible = "st,stm32-qdec"; + st,input-filter-level = <0>; + status = "disabled"; + }; + }; + + timers2: timers@40000000 { + compatible = "st,stm32-timers"; + reg = <0x40000000 0x400>; + clocks = <&rcc (0x058) (1 << 0)>, + <&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x38) << 5U) | (0))>; + interrupts = <28 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + qdec { + compatible = "st,stm32-qdec"; + st,input-filter-level = <0>; + status = "disabled"; + }; + }; + + timers3: timers@40000400 { + compatible = "st,stm32-timers"; + reg = <0x40000400 0x400>; + clocks = <&rcc (0x058) (1 << 1)>, + <&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x38) << 5U) | (1))>; + interrupts = <29 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + qdec { + compatible = "st,stm32-qdec"; + st,input-filter-level = <0>; + status = "disabled"; + }; + }; + + timers4: timers@40000800 { + compatible = "st,stm32-timers"; + reg = <0x40000800 0x400>; + clocks = <&rcc (0x058) (1 << 2)>, + <&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x38) << 5U) | (2))>; + interrupts = <30 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + qdec { + compatible = "st,stm32-qdec"; + st,input-filter-level = <0>; + status = "disabled"; + }; + }; + + timers6: timers@40001000 { + compatible = "st,stm32-timers"; + reg = <0x40001000 0x400>; + clocks = <&rcc (0x058) (1 << 4)>, + <&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x38) << 5U) | (4))>; + interrupts = <54 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + }; + + timers7: timers@40001400 { + compatible = "st,stm32-timers"; + reg = <0x40001400 0x400>; + clocks = <&rcc (0x058) (1 << 5)>, + <&rcc ((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x38) << 5U) | (5))>; + interrupts = <55 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + }; + + timers8: timers@40013400 { + compatible = "st,stm32-timers"; + reg = <0x40013400 0x400>; + clocks = <&rcc (0x060) (1 << 13)>, + <&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x40) << 5U) | (13))>; + interrupts = <43 0>, <44 0>, <45 0>, <46 0>; + interrupt-names = "brk", "up", "trgcom", "cc"; + st,prescaler = <0>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + + qdec { + compatible = "st,stm32-qdec"; + st,input-filter-level = <0>; + status = "disabled"; + }; + }; + + timers15: timers@40014000 { + compatible = "st,stm32-timers"; + reg = <0x40014000 0x400>; + clocks = <&rcc (0x060) (1 << 16)>, + <&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x40) << 5U) | (16))>; + interrupts = <24 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + }; + + timers16: timers@40014400 { + compatible = "st,stm32-timers"; + reg = <0x40014400 0x400>; + clocks = <&rcc (0x060) (1 << 17)>, + <&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x40) << 5U) | (17))>; + interrupts = <25 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + }; + + timers17: timers@40014800 { + compatible = "st,stm32-timers"; + reg = <0x40014800 0x400>; + clocks = <&rcc (0x060) (1 << 18)>, + <&rcc (((((((0x003 + 1) + 1) + 1) + 1) + 1) + 1) + 1) 0xFF>; + resets = <&rctl (((0x40) << 5U) | (18))>; + interrupts = <26 0>; + interrupt-names = "global"; + st,prescaler = <0>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + #pwm-cells = <3>; + }; + + counter { + compatible = "st,stm32-counter"; + status = "disabled"; + }; + }; + + rtc: rtc@40002800 { + compatible = "st,stm32-rtc"; + reg = <0x40002800 0x400>; + interrupts = <41 0>; + clocks = <&rcc (0x058) (1 << 10)>; + prescaler = <32768>; + alarms-count = <2>; + alrm-exti-line = <17>; + status = "disabled"; + }; + + rng: rng@50060800 { + compatible = "st,stm32-rng"; + reg = <0x50060800 0x400>; + interrupts = <90 0>; + clocks = <&rcc (0x04c) (1 << 26)>; + status = "disabled"; + }; + + usb: usb@40005c00 { + compatible = "st,stm32-usb"; + reg = <0x40005c00 0x400>; + interrupts = <20 0>, <19 0>; + interrupt-names = "usb", "usbhp"; + num-bidir-endpoints = <8>; + ram-size = <1024>; + maximum-speed = "full-speed"; + phys = <&usb_fs_phy>; + clocks = <&rcc (0x058) (1 << 23)>, + <&rcc ((0x003 + 1) + 1) ((((0x88) & 0xFFFFU) << 0U) | (((26) & 0x1FU) << 16U) | ((((27) - (26)) & 0x3U) << 21U) | ((((0)) & 0xFFU) << 24U))>; + status = "disabled"; + }; + + dma1: dma@40020000 { + compatible = "st,stm32-dma-v2"; + #dma-cells = <3>; + reg = <0x40020000 0x400>; + clocks = <&rcc (0x048) (1 << 0)>; + dma-offset = <0>; + status = "disabled"; + }; + + dma2: dma@40020400 { + compatible = "st,stm32-dma-v2"; + #dma-cells = <3>; + reg = <0x40020400 0x400>; + clocks = <&rcc (0x048) (1 << 1)>; + status = "disabled"; + }; + + dmamux1: dmamux@40020800 { + compatible = "st,stm32-dmamux"; + #dma-cells = <3>; + reg = <0x40020800 0x400>; + interrupts = <94 0>; + clocks = <&rcc (0x048) (1 << 2)>; + dma-generators = <4>; + dma-requests = <111>; + status = "disabled"; + }; + + ucpd1: ucpd@4000a000 { + compatible = "st,stm32-ucpd"; + reg = <0x4000a000 0x400>; + clocks = <&rcc (0x058) (1 << 4)>; + interrupts = <63 0>; + status = "disabled"; + }; + + sai1_a: sai1@40015404 { + compatible = "st,stm32-sai"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40015404 0x20>; + clocks = <&rcc (0x060) (1 << 21)>; + dmas = <&dma1 1 108 (((0 & 0x1) << 5) | ((2 & 0x3) << 16) | + (((1 & 0x3) << 11) | ((1 & 0x3) << 13)))>; + status = "disabled"; + }; + + sai1_b: sai1@40015424 { + compatible = "st,stm32-sai"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40015424 0x20>; + clocks = <&rcc (0x060) (1 << 21)>; + dmas = <&dma1 2 109 (((0 & 0x1) << 5) | ((2 & 0x3) << 16) | + (((1 & 0x3) << 11) | ((1 & 0x3) << 13)))>; + status = "disabled"; + }; + + opamp1: opamp1@40010300 { + compatible = "st,stm32g4-opamp", "st,stm32-opamp"; + reg = <0x40010300 0x18>; + clocks = <&rcc (0x060) (1 << 0)>; + clock-names = "opampx"; + programmable-gain = "OPAMP_GAIN_1", "OPAMP_GAIN_2", + "OPAMP_GAIN_3", "OPAMP_GAIN_4", + "OPAMP_GAIN_7", "OPAMP_GAIN_8", + "OPAMP_GAIN_15", "OPAMP_GAIN_16", + "OPAMP_GAIN_31", "OPAMP_GAIN_32", + "OPAMP_GAIN_63", "OPAMP_GAIN_64"; + status = "disabled"; + }; + + opamp2: opamp2@40010304 { + compatible = "st,stm32g4-opamp", "st,stm32-opamp"; + reg = <0x40010304 0x18>; + clocks = <&rcc (0x060) (1 << 0)>; + clock-names = "opampx"; + programmable-gain = "OPAMP_GAIN_1", "OPAMP_GAIN_2", + "OPAMP_GAIN_3", "OPAMP_GAIN_4", + "OPAMP_GAIN_7", "OPAMP_GAIN_8", + "OPAMP_GAIN_15", "OPAMP_GAIN_16", + "OPAMP_GAIN_31", "OPAMP_GAIN_32", + "OPAMP_GAIN_63", "OPAMP_GAIN_64"; + status = "disabled"; + }; + + opamp3: opamp3@40010308 { + compatible = "st,stm32g4-opamp", "st,stm32-opamp"; + reg = <0x40010308 0x18>; + clocks = <&rcc (0x060) (1 << 0)>; + clock-names = "opampx"; + programmable-gain = "OPAMP_GAIN_1", "OPAMP_GAIN_2", + "OPAMP_GAIN_3", "OPAMP_GAIN_4", + "OPAMP_GAIN_7", "OPAMP_GAIN_8", + "OPAMP_GAIN_15", "OPAMP_GAIN_16", + "OPAMP_GAIN_31", "OPAMP_GAIN_32", + "OPAMP_GAIN_63", "OPAMP_GAIN_64"; + status = "disabled"; + }; + + comp1: comparator@40010200 { + compatible = "st,stm32g4-comp", "st,stm32-comp"; + reg = <0x40010200 0x4>; + interrupts = <64 0>; + st,exti-line = <21>; + clocks = <&rcc (0x060) (1 << 0)>; + status = "disabled"; + }; + + comp2: comparator@40010204 { + compatible = "st,stm32g4-comp", "st,stm32-comp"; + reg = <0x40010204 0x4>; + interrupts = <64 0>; + st,exti-line = <22>; + clocks = <&rcc (0x060) (1 << 0)>; + status = "disabled"; + }; + + crc: crc@40023000 { + compatible = "st,stm32-crc"; + reg = <0x40023000 0x400>; + clocks = <&rcc (0x048) (1 << 12)>; + resets = <&rctl (((0x28) << 5U) | (12))>; + status = "disabled"; + }; + }; + + die_temp: dietemp { + compatible = "st,stm32-temp-cal"; + nvmem-cells = <&ts_cal1_otp>, <&ts_cal2_otp>; + nvmem-cell-names = "TS_CAL1", "TS_CAL2"; + ts-cal1-temp = <30>; + ts-cal2-temp = <130>; + ts-cal-vrefanalog = <3000>; + io-channels = <&adc1 16>; + status = "disabled"; + }; + + vref: vref { + compatible = "st,stm32-vref"; + nvmem-cells = <&vrefint_otp>; + vrefint-cal-mv = <3000>; + io-channels = <&adc1 18>; + status = "disabled"; + }; + + vbat: vbat { + compatible = "st,stm32-vbat"; + ratio = <3>; + io-channels = <&adc1 17>; + status = "disabled"; + }; + + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + + smbus1: smbus1 { + compatible = "st,stm32-smbus"; + #address-cells = <1>; + #size-cells = <0>; + i2c = <&i2c1>; + status = "disabled"; + }; + + smbus2: smbus2 { + compatible = "st,stm32-smbus"; + #address-cells = <1>; + #size-cells = <0>; + i2c = <&i2c2>; + status = "disabled"; + }; + + smbus3: smbus3 { + compatible = "st,stm32-smbus"; + #address-cells = <1>; + #size-cells = <0>; + i2c = <&i2c3>; + status = "disabled"; + }; +}; + +&nvic { + arm,num-irq-priority-bits = <4>; +}; +# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431.dtsi" 2 3 4 + +/ { + soc { + compatible = "st,stm32g431", "st,stm32g4", "simple-bus"; + + dma1: dma@40020000 { + interrupts = <11 0 12 0 13 0 14 0 15 0 16 0>; + dma-requests = <6>; + }; + + dma2: dma@40020400 { + interrupts = <56 0 57 0 58 0 59 0 60 0 97 0>; + dma-requests = <6>; + dma-offset = <6>; + }; + + dmamux1: dmamux@40020800 { + dma-channels = <12>; + }; + }; +}; +# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/dts/arm/st/g4/stm32g431Xb.dtsi" 2 3 4 + +&sram0 { + reg = <0x20000000 ((32) * 1024)>; +}; + +&flash0 { + reg = <0x08000000 ((128) * 1024)>; + ranges = <0 0x8000000 ((128) * 1024)>; +}; +# 9 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2 +# 1 "/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi" 1 3 4 + + + + + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h" 1 3 4 +# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h" 3 4 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h" 1 3 4 +# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h" 2 3 4 +# 8 "/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32/dts/st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi" 2 3 4 + +&pinctrl { + + + + /omit-if-no-ref/ adc1_in1_pa0: adc1_in1_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in2_pa1: adc1_in2_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in3_pa2: adc1_in3_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in4_pa3: adc1_in4_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in15_pb0: adc1_in15_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in12_pb1: adc1_in12_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in14_pb11: adc1_in14_pb11 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in11_pb12: adc1_in11_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in5_pb14: adc1_in5_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in6_pc0: adc1_in6_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in7_pc1: adc1_in7_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in8_pc2: adc1_in8_pc2 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in9_pc3: adc1_in9_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc1_in10_pf0: adc1_in10_pf0 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in1_pa0: adc2_in1_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in2_pa1: adc2_in2_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in17_pa4: adc2_in17_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in13_pa5: adc2_in13_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in3_pa6: adc2_in3_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in4_pa7: adc2_in4_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in12_pb2: adc2_in12_pb2 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in14_pb11: adc2_in14_pb11 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in15_pb15: adc2_in15_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in6_pc0: adc2_in6_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in7_pc1: adc2_in7_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in8_pc2: adc2_in8_pc2 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in9_pc3: adc2_in9_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in5_pc4: adc2_in5_pc4 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in11_pc5: adc2_in11_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ adc2_in10_pf1: adc2_in10_pf1 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa4: analog_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb10: analog_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc0: analog_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc1: analog_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc2: analog_pc2 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc3: analog_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc4: analog_pc4 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc5: analog_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc6: analog_pc6 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc7: analog_pc7 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc8: analog_pc8 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc9: analog_pc9 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc10: analog_pc10 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc11: analog_pc11 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc12: analog_pc12 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pd2: analog_pd2 { + pinmux = <((((('D') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pf0: analog_pf0 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pf1: analog_pf1 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ analog_pg10: analog_pg10 { + pinmux = <((((('G') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ comp1_inm_pa0: comp1_inm_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp1_inp_pa1: comp1_inp_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp1_inm_pa4: comp1_inm_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp1_inp_pb1: comp1_inp_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_inm_pa2: comp2_inm_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_inp_pa3: comp2_inp_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_inm_pa5: comp2_inm_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_inp_pa7: comp2_inp_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_inp_pa0: comp3_inp_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_inm_pc0: comp3_inm_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_inp_pc1: comp3_inp_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_inm_pf1: comp3_inm_pf1 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp4_inp_pb0: comp4_inp_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp4_inm_pb2: comp4_inm_pb2 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ comp1_out_pa0: comp1_out_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp1_out_pa6: comp1_out_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp1_out_pa11: comp1_out_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp1_out_pb8: comp1_out_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_out_pa2: comp2_out_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_out_pa7: comp2_out_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_out_pa12: comp2_out_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp2_out_pb9: comp2_out_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_out_pb7: comp3_out_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_out_pb15: comp3_out_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp3_out_pc2: comp3_out_pc2 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp4_out_pb1: comp4_out_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp4_out_pb6: comp4_out_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ comp4_out_pb14: comp4_out_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ dac1_out1_pa4: dac1_out1_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ dac1_out2_pa5: dac1_out2_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ fdcan1_rx_pa11: fdcan1_rx_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ fdcan1_rx_pb8: fdcan1_rx_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ fdcan1_tx_pa12: fdcan1_tx_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ fdcan1_tx_pb9: fdcan1_tx_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ i2c1_scl_pa13: i2c1_scl_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb8: i2c1_scl_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c2_scl_pa9: i2c2_scl_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c2_scl_pc4: i2c2_scl_pc4 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa8: i2c3_scl_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pc8: i2c3_scl_pc8 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + + + /omit-if-no-ref/ i2c1_sda_pa14: i2c1_sda_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb7: i2c1_sda_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb9: i2c1_sda_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c2_sda_pa8: i2c2_sda_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c2_sda_pf0: i2c2_sda_pf0 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb5: i2c3_sda_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pc9: i2c3_sda_pc9 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pc11: i2c3_sda_pc11 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + drive-open-drain; + }; + + + + /omit-if-no-ref/ i2c1_smba_pb5: i2c1_smba_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ i2c2_smba_pa10: i2c2_smba_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ i2c2_smba_pb12: i2c2_smba_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ i2c3_smba_pa9: i2c3_smba_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ i2c3_smba_pb2: i2c3_smba_pb2 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + + + /omit-if-no-ref/ i2s2_ck_pb13: i2s2_ck_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ i2s2_ck_pf1: i2s2_ck_pf1 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ i2s3_ck_pb3: i2s3_ck_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ i2s3_ck_pc10: i2s3_ck_pc10 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ i2s2_mck_pa8: i2s2_mck_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ i2s2_mck_pc6: i2s2_mck_pc6 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ i2s3_mck_pa9: i2s3_mck_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ i2s3_mck_pc7: i2s3_mck_pc7 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ i2s2_sd_pa11: i2s2_sd_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ i2s2_sd_pb15: i2s2_sd_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ i2s3_sd_pb5: i2s3_sd_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ i2s3_sd_pc12: i2s3_sd_pc12 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ i2s2_ws_pb12: i2s2_ws_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ i2s2_ws_pf0: i2s2_ws_pf0 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ i2s3_ws_pa4: i2s3_ws_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ i2s3_ws_pa15: i2s3_ws_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ sys_jtms_swdio_pa13: sys_jtms_swdio_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sys_jtck_swclk_pa14: sys_jtck_swclk_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sys_jtdi_pa15: sys_jtdi_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sys_jtdo_swo_pb3: sys_jtdo_swo_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sys_jtrst_pb4: sys_jtrst_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ lptim1_out_pa14: lptim1_out_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_out_pb2: lptim1_out_pb2 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_in1_pb5: lptim1_in1_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_etr_pb6: lptim1_etr_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_in2_pb7: lptim1_in2_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_in1_pc0: lptim1_in1_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_out_pc1: lptim1_out_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_in2_pc2: lptim1_in2_pc2 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lptim1_etr_pc3: lptim1_etr_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ opamp1_vinp_pa1: opamp1_vinp_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp1_vout_pa2: opamp1_vout_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp1_vinm_pa3: opamp1_vinm_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp1_vinp_pa3: opamp1_vinp_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp1_vinp_pa7: opamp1_vinp_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp1_vinm_pc5: opamp1_vinm_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp2_vinm_pa5: opamp2_vinm_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp2_vout_pa6: opamp2_vout_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp2_vinp_pa7: opamp2_vinp_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp2_vinp_pb0: opamp2_vinp_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp2_vinp_pb14: opamp2_vinp_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp2_vinm_pc5: opamp2_vinm_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp3_vinp_pa1: opamp3_vinp_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp3_vinp_pb0: opamp3_vinp_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp3_vout_pb1: opamp3_vout_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp3_vinm_pb2: opamp3_vinm_pb2 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp3_vinm_pb10: opamp3_vinm_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ opamp3_vinp_pb13: opamp3_vinp_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ rcc_mco_pa8: rcc_mco_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ rcc_mco_pg10: rcc_mco_pg10 { + pinmux = <((((('G') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x0) & 0x1FU) << 0U))>; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ sai1_ck1_pa3: sai1_ck1_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_mclk_a_pa3: sai1_mclk_a_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_fs_b_pa4: sai1_fs_b_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_ck2_pa8: sai1_ck2_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sck_a_pa8: sai1_sck_a_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_fs_a_pa9: sai1_fs_a_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_d1_pa10: sai1_d1_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sd_a_pa10: sai1_sd_a_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sd_b_pa13: sai1_sd_b_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_fs_b_pa14: sai1_fs_b_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sck_b_pb3: sai1_sck_b_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_mclk_b_pb4: sai1_mclk_b_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sd_b_pb5: sai1_sd_b_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_fs_b_pb6: sai1_fs_b_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_ck1_pb8: sai1_ck1_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_mclk_a_pb8: sai1_mclk_a_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_d2_pb9: sai1_d2_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_fs_a_pb9: sai1_fs_a_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sck_a_pb10: sai1_sck_a_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sd_a_pc1: sai1_sd_a_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_d1_pc3: sai1_d1_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_sd_a_pc3: sai1_sd_a_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xd) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ sai1_d3_pc5: sai1_d3_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ spi1_miso_pa6: spi1_miso_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi1_miso_pb4: spi1_miso_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_miso_pa10: spi2_miso_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_miso_pb14: spi2_miso_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_miso_pb4: spi3_miso_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_miso_pc11: spi3_miso_pc11 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ spi1_mosi_pa7: spi1_mosi_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi1_mosi_pb5: spi1_mosi_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_mosi_pa11: spi2_mosi_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_mosi_pb15: spi2_mosi_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_mosi_pb5: spi3_mosi_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_mosi_pc12: spi3_mosi_pc12 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ spi1_nss_pa4: spi1_nss_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-up; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi1_nss_pa15: spi1_nss_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-up; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_nss_pb12: spi2_nss_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-up; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_nss_pf0: spi2_nss_pf0 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-up; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_nss_pa4: spi3_nss_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-up; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_nss_pa15: spi3_nss_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-up; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ spi1_sck_pa5: spi1_sck_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi1_sck_pb3: spi1_sck_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_sck_pb13: spi2_sck_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi2_sck_pf1: spi2_sck_pf1 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pb3: spi3_sck_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pc10: spi3_sck_pc10 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + + + /omit-if-no-ref/ tim1_bkin_pa6: tim1_bkin_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin2_pa11: tim1_bkin2_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin_pa14: tim1_bkin_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin_pa15: tim1_bkin_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin_pb8: tim1_bkin_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin_pb10: tim1_bkin_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin_pb12: tim1_bkin_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin2_pc3: tim1_bkin2_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_bkin_pc13: tim1_bkin_pc13 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_bkin_pa9: tim15_bkin_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_bkin_pc5: tim15_bkin_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_bkin_pb5: tim16_bkin_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim17_bkin_pa10: tim17_bkin_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim17_bkin_pb4: tim17_bkin_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin_pa0: tim8_bkin_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin_pa6: tim8_bkin_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin_pa10: tim8_bkin_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin2_pb6: tim8_bkin2_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin_pb7: tim8_bkin_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin2_pc9: tim8_bkin2_pc9 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_bkin_pd2: tim8_bkin_pd2 { + pinmux = <((((('D') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ tim1_ch1n_pa7: tim1_ch1n_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch1_pa8: tim1_ch1_pa8 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch2_pa9: tim1_ch2_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch3_pa10: tim1_ch3_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch1n_pa11: tim1_ch1n_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch4_pa11: tim1_ch4_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0xb) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch2n_pa12: tim1_ch2n_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch2n_pb0: tim1_ch2n_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch3n_pb1: tim1_ch3n_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch1n_pb13: tim1_ch1n_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch2n_pb14: tim1_ch2n_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch3n_pb15: tim1_ch3n_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch1_pc0: tim1_ch1_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch2_pc1: tim1_ch2_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch3_pc2: tim1_ch3_pc2 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch4_pc3: tim1_ch4_pc3 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch4n_pc5: tim1_ch4n_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch1n_pc13: tim1_ch1n_pc13 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim1_ch3n_pf0: tim1_ch3n_pf0 { + pinmux = <((((('F') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch1_pa0: tim2_ch1_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch2_pa1: tim2_ch2_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch3_pa2: tim2_ch3_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch4_pa3: tim2_ch4_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch3_pa9: tim2_ch3_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch4_pa10: tim2_ch4_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch1_pa15: tim2_ch1_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch2_pb3: tim2_ch2_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch3_pb10: tim2_ch3_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim2_ch4_pb11: tim2_ch4_pb11 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch2_pa4: tim3_ch2_pa4 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch1_pa6: tim3_ch1_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch2_pa7: tim3_ch2_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch3_pb0: tim3_ch3_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch4_pb1: tim3_ch4_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch1_pb4: tim3_ch1_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch2_pb5: tim3_ch2_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch4_pb7: tim3_ch4_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch1_pc6: tim3_ch1_pc6 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch2_pc7: tim3_ch2_pc7 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch3_pc8: tim3_ch3_pc8 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim3_ch4_pc9: tim3_ch4_pc9 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch1_pa11: tim4_ch1_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch2_pa12: tim4_ch2_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch3_pa13: tim4_ch3_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch1_pb6: tim4_ch1_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch2_pb7: tim4_ch2_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch3_pb8: tim4_ch3_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim4_ch4_pb9: tim4_ch4_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_ch1n_pa1: tim15_ch1n_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_ch1_pa2: tim15_ch1_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_ch2_pa3: tim15_ch2_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x9) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_ch1_pb14: tim15_ch1_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_ch1n_pb15: tim15_ch1n_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim15_ch2_pb15: tim15_ch2_pb15 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_ch1_pa6: tim16_ch1_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_ch1_pa12: tim16_ch1_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_ch1n_pa13: tim16_ch1n_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_ch1_pb4: tim16_ch1_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_ch1n_pb6: tim16_ch1n_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim16_ch1_pb8: tim16_ch1_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim17_ch1_pa7: tim17_ch1_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim17_ch1_pb5: tim17_ch1_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim17_ch1n_pb7: tim17_ch1n_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim17_ch1_pb9: tim17_ch1_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x1) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch1n_pa7: tim8_ch1n_pa7 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch2_pa14: tim8_ch2_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch1_pa15: tim8_ch1_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x2) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch2n_pb0: tim8_ch2n_pb0 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch3n_pb1: tim8_ch3n_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch1n_pb3: tim8_ch1n_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch2n_pb4: tim8_ch2n_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch3n_pb5: tim8_ch3n_pb5 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x3) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch1_pb6: tim8_ch1_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch2_pb8: tim8_ch2_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch3_pb9: tim8_ch3_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0xa) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch1_pc6: tim8_ch1_pc6 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch2_pc7: tim8_ch2_pc7 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch3_pc8: tim8_ch3_pc8 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch4_pc9: tim8_ch4_pc9 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch1n_pc10: tim8_ch1n_pc10 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch2n_pc11: tim8_ch2n_pc11 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch3n_pc12: tim8_ch3n_pc12 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x4) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ tim8_ch4n_pc13: tim8_ch4n_pc13 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x6) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ lpuart1_cts_pa6: lpuart1_cts_pa6 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_cts_pa11: usart1_cts_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_cts_pb13: lpuart1_cts_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_cts_pa0: usart2_cts_pa0 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart3_cts_pa13: usart3_cts_pa13 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart3_cts_pb13: usart3_cts_pb13 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((13) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ uart4_cts_pb7: uart4_cts_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0xe) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + + + /omit-if-no-ref/ usart1_de_pa12: usart1_de_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb1: lpuart1_de_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb12: lpuart1_de_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa1: usart2_de_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ usart3_de_pb14: usart3_de_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ uart4_de_pa15: uart4_de_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + + + /omit-if-no-ref/ usart1_rts_pa12: usart1_rts_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_rts_pb1: lpuart1_rts_pb1 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_rts_pb12: lpuart1_rts_pb12 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_rts_pa1: usart2_rts_pa1 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ usart3_rts_pb14: usart3_rts_pb14 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + /omit-if-no-ref/ uart4_rts_pa15: uart4_rts_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + drive-push-pull; + }; + + + + /omit-if-no-ref/ lpuart1_rx_pa3: lpuart1_rx_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart1_rx_pa10: usart1_rx_pa10 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart1_rx_pb7: usart1_rx_pb7 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((7) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lpuart1_rx_pb10: lpuart1_rx_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ lpuart1_rx_pc0: lpuart1_rx_pc0 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((0) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart1_rx_pc5: usart1_rx_pc5 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((5) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart2_rx_pa3: usart2_rx_pa3 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart2_rx_pa15: usart2_rx_pa15 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((15) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart3_rx_pb8: usart3_rx_pb8 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((8) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart3_rx_pb11: usart3_rx_pb11 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usart3_rx_pc11: usart3_rx_pc11 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ uart4_rx_pc11: uart4_rx_pc11 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0xc) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pa9: usart1_tx_pa9 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb6: usart1_tx_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pc1: lpuart1_tx_pc1 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((1) & 0xFU) << 5U) | (((0x8) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pc4: usart1_tx_pc4 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa2: usart2_tx_pa2 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((2) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((14) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb3: usart2_tx_pb3 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((3) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart3_tx_pb9: usart3_tx_pb9 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((9) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart3_tx_pb10: usart3_tx_pb10 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ usart3_tx_pc10: usart3_tx_pc10 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x7) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + /omit-if-no-ref/ uart4_tx_pc10: uart4_tx_pc10 { + pinmux = <((((('C') - 'A') & 0x1FU) << 9U) | (((10) & 0xFU) << 5U) | (((0x5) & 0x1FU) << 0U))>; + bias-pull-up; + }; + + + + /omit-if-no-ref/ ucpd1_cc2_pb4: ucpd1_cc2_pb4 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((4) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ ucpd1_cc1_pb6: ucpd1_cc1_pb6 { + pinmux = <((((('B') - 'A') & 0x1FU) << 9U) | (((6) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + + + /omit-if-no-ref/ usb_dm_pa11: usb_dm_pa11 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((11) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + + /omit-if-no-ref/ usb_dp_pa12: usb_dp_pa12 { + pinmux = <((((('A') - 'A') & 0x1FU) << 9U) | (((12) & 0xFU) << 5U) | (((0x10) & 0x1FU) << 0U))>; + }; + +}; +# 10 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi" 1 + + + + + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/arduino-header-r3.h" 1 3 4 +# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi" 2 + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 0 0>, + <1 0 &gpioa 1 0>, + <2 0 &gpioa 4 0>, + <3 0 &gpiob 0 0>, + <4 0 &gpioc 1 0>, + <5 0 &gpioc 0 0>, + <6 0 &gpioc 5 0>, + <7 0 &gpioc 4 0>, + <8 0 &gpioa 10 0>, + <9 0 &gpiob 3 0>, + <10 0 &gpiob 5 0>, + <11 0 &gpiob 4 0>, + <12 0 &gpiob 10 0>, + <13 0 &gpioa 8 0>, + <14 0 &gpioa 9 0>, + <15 0 &gpioc 7 0>, + <16 0 &gpiob 6 0>, + <17 0 &gpioa 7 0>, + <18 0 &gpioa 6 0>, + <19 0 &gpioa 5 0>, + <20 0 &gpiob 9 0>, + <21 0 &gpiob 8 0>; + }; +}; + +arduino_i2c: &i2c1 {}; + +arduino_spi: &spi1 {}; + +arduino_serial: &usart1 {}; +# 11 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi" 1 + + + + + + +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/st-morpho-header.h" 1 3 4 +# 8 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/st_morpho_connector.dtsi" 2 + +/ { + st_morpho_header: st-morpho-header { + compatible = "st-morpho-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xFF 0x0>; + gpio-map-pass-thru = <0x0 0x7F>; + gpio-map = <0 0 &gpioc 10 0>, + <1 0 &gpioc 11 0>, + <2 0 &gpioc 12 0>, + <3 0 &gpiod 2 0>, + <12 0 &gpioa 13 0>, + <14 0 &gpioa 14 0>, + <16 0 &gpioa 15 0>, + <20 0 &gpiob 7 0>, + <22 0 &gpioc 13 0>, + <24 0 &gpioc 14 0>, + <26 0 &gpioc 15 0>, + <27 0 &gpioa 0 0>, + <28 0 &gpiof 0 0>, + <29 0 &gpioa 1 0>, + <30 0 &gpiof 1 0>, + <31 0 &gpioa 4 0>, + <33 0 &gpiob 0 0>, + <34 0 &gpioc 2 0>, + <35 0 &gpioc 1 0>, + <36 0 &gpioc 3 0>, + <37 0 &gpioc 0 0>, + <72 0 &gpioc 9 0>, + <73 0 &gpioc 8 0>, + <74 0 &gpiob 8 0>, + <75 0 &gpioc 6 0>, + <76 0 &gpiob 9 0>, + <77 0 &gpioc 5 0>, + <82 0 &gpiob 13 0>, + <83 0 &gpioa 12 0>, + <84 0 &gpiob 14 0>, + <85 0 &gpioa 11 0>, + <86 0 &gpiob 15 0>, + <87 0 &gpiob 12 0>, + <88 0 &gpiob 6 0>, + <89 0 &gpiob 11 0>, + <90 0 &gpioc 7 0>, + <92 0 &gpioa 9 0>, + <93 0 &gpiob 2 0>, + <94 0 &gpioa 8 0>, + <95 0 &gpiob 1 0>, + <96 0 &gpiob 10 0>, + <97 0 &gpioa 7 0>, + <98 0 &gpiob 4 0>, + <99 0 &gpioa 6 0>, + <100 0 &gpiob 5 0>, + <101 0 &gpioa 5 0>, + <102 0 &gpiob 3 0>, + <104 0 &gpioa 10 0>, + <105 0 &gpioc 4 0>, + <106 0 &gpioa 2 0>, + <108 0 &gpioa 3 0>; + }; +}; +# 12 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/include/zephyr/dt-bindings/input/input-event-codes.h" 1 3 4 +# 13 "/home/jeremy/utat-dev/zephyrproject/zephyr/boards/st/nucleo_g431rb/nucleo_g431rb.dts" 2 + +/ { + model = "STMicroelectronics STM32G431RB-NUCLEO board"; + compatible = "st,stm32g431rb-nucleo"; + + chosen { + zephyr,console = &lpuart1; + zephyr,shell-uart = &lpuart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + leds: leds { + compatible = "gpio-leds"; + + green_led: led_0 { + gpios = <&gpioa 5 (0 << 0)>; + label = "User LD2"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + green_pwm_led: green_pwm_led { + pwms = <&pwm2 1 (((20) * 1000UL) * 1000UL) (0 << 0)>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + user_button: button { + label = "User"; + gpios = <&gpioc 13 (0 << 0)>; + zephyr,code = <11>; + }; + }; + + aliases { + led0 = &green_led; + mcuboot-led0 = &green_led; + pwm-led0 = &green_pwm_led; + sw0 = &user_button; + watchdog0 = &iwdg; + }; +}; + +&clk_lsi { + status = "okay"; +}; + +&clk_lse { + status = "okay"; +}; + +&clk_hsi48 { + status = "okay"; +}; + +&clk_hse { + clock-frequency = <(((24) * 1000) * 1000)>; + status = "okay"; +}; + +&pll { + div-m = <6>; + mul-n = <85>; + div-p = <7>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = <(((170) * 1000) * 1000)>; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; +}; + +&rng { + clocks = <&rcc (0x04c) (1 << 26)>, + <&rcc ((0x003 + 1) + 1) ((((0x88) & 0xFFFFU) << 0U) | (((26) & 0x1FU) << 16U) | ((((27) - (26)) & 0x3U) << 21U) | ((((0)) & 0xFFU) << 24U))>; + status = "okay"; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&lpuart1 { + pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; + pinctrl-names = "default"; + status = "okay"; +}; + +&spi1 { + pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; + pinctrl-names = "default"; + cs-gpios = <&gpiob 6 ((1 << 0) | (1 << 4))>; + status = "okay"; +}; + +&spi2 { + pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13 + &spi2_miso_pb14 &spi2_mosi_pb15>; + pinctrl-names = "default"; + status = "okay"; +}; + +&spi3 { + + pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10 + &spi3_miso_pc11 &spi3_mosi_pc12>; + pinctrl-names = "default"; + status = "okay"; +}; + +&timers2 { + status = "okay"; + + pwm2: pwm { + status = "okay"; + pinctrl-0 = <&tim2_ch1_pa5>; + pinctrl-names = "default"; + }; +}; + +stm32_lp_tick_source: &lptim1 { + clocks = <&rcc (0x058) (1 << 31)>, + <&rcc 0x002 ((((0x88) & 0xFFFFU) << 0U) | (((18) & 0x1FU) << 16U) | ((((19) - (18)) & 0x3U) << 21U) | ((((3)) & 0xFFU) << 24U))>; + status = "okay"; +}; + +&rtc { + clocks = <&rcc (0x058) (1 << 10)>, + <&rcc 0x003 ((((0x90) & 0xFFFFU) << 0U) | (((8) & 0x1FU) << 16U) | ((((9) - (8)) & 0x3U) << 21U) | ((((2)) & 0xFFU) << 24U))>; + status = "okay"; +}; + +&flash0 { + partitions { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + boot_partition: partition@0 { + compatible = "zephyr,mapped-partition"; + label = "mcuboot"; + reg = <0x00000000 ((34) * 1024)>; + }; + + slot0_partition: partition@8800 { + compatible = "zephyr,mapped-partition"; + label = "image-0"; + reg = <0x00008800 ((48) * 1024)>; + }; + + slot1_partition: partition@14800 { + compatible = "zephyr,mapped-partition"; + label = "image-1"; + reg = <0x00014800 ((42) * 1024)>; + }; + + + storage_partition: partition@1f000 { + compatible = "zephyr,mapped-partition"; + label = "storage"; + reg = <0x0001f000 ((4) * 1024)>; + }; + }; +}; + +&iwdg { + status = "okay"; +}; + +&dac1 { + status = "okay"; + pinctrl-0 = <&dac1_out1_pa4>; + pinctrl-names = "default"; +}; +# 0 "" 2 +# 1 "/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/app.overlay" 1 +/ { + chosen { + zephyr,code-partition = &boot_partition; + }; +}; +# 0 "" 2 +# 1 "/home/jeremy/utat-dev/zephyrproject/zephyr/misc/empty_file.c" diff --git a/zephyrproject/build/mcuboot/zephyr/zephyr.elf b/zephyrproject/build/mcuboot/zephyr/zephyr.elf new file mode 100755 index 0000000000000000000000000000000000000000..a3bad9ad26c57cbac98defa15eb7c9ae9cfb73e7 GIT binary patch literal 1010524 zcmeFadw5jU^*_ANWoAw?xlAr-2mwwq35F!%Kv2U)4U^%JWY8d>BG@`1TqY4nOoC!- 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*(SORT_BY_NAME(SORT_BY_ALIGNMENT(._entropy_driver_api.static.*))) + 0x08004acc _entropy_driver_api_list_end = . + 0x08004acc _entropy_driver_api_ext_end = . + 0x08004acc _espi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._espi_driver_api.static.*))) + 0x08004acc _espi_driver_api_list_end = . + 0x08004acc _espi_driver_api_ext_end = . + 0x08004acc _espi_saf_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._espi_saf_driver_api.static.*))) + 0x08004acc _espi_saf_driver_api_list_end = . + 0x08004acc _espi_saf_driver_api_ext_end = . + 0x08004acc _fpga_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._fpga_driver_api.static.*))) + 0x08004acc _fpga_driver_api_list_end = . + 0x08004acc _fpga_driver_api_ext_end = . + 0x08004acc _fuel_gauge_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._fuel_gauge_driver_api.static.*))) + 0x08004acc _fuel_gauge_driver_api_list_end = . + 0x08004acc _fuel_gauge_driver_api_ext_end = . + 0x08004acc _gnss_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._gnss_driver_api.static.*))) + 0x08004acc _gnss_driver_api_list_end = . + 0x08004acc _gnss_driver_api_ext_end = . + 0x08004acc _gpio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._gpio_driver_api.static.*))) + 0x08004acc _gpio_driver_api_list_end = . + 0x08004acc _gpio_driver_api_ext_end = . + 0x08004acc _haptics_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._haptics_driver_api.static.*))) + 0x08004acc _haptics_driver_api_list_end = . + 0x08004acc _haptics_driver_api_ext_end = . + 0x08004acc _hwspinlock_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._hwspinlock_driver_api.static.*))) + 0x08004acc _hwspinlock_driver_api_list_end = . + 0x08004acc _hwspinlock_driver_api_ext_end = . + 0x08004acc _i2c_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i2c_driver_api.static.*))) + 0x08004acc _i2c_driver_api_list_end = . + 0x08004acc _i3c_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i3c_driver_api.static.*))) + 0x08004acc _i3c_driver_api_list_end = . + 0x08004acc _i3c_driver_api_ext_end = . + 0x08004acc _i2c_driver_api_ext_end = . + 0x08004acc _i2c_target_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i2c_target_driver_api.static.*))) + 0x08004acc _i2c_target_driver_api_list_end = . + 0x08004acc _i2c_target_driver_api_ext_end = . + 0x08004acc _i2s_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i2s_driver_api.static.*))) + 0x08004acc _i2s_driver_api_list_end = . + 0x08004acc _i2s_driver_api_ext_end = . + 0x08004acc _ipm_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ipm_driver_api.static.*))) + 0x08004acc _ipm_driver_api_list_end = . + 0x08004acc _ipm_driver_api_ext_end = . + 0x08004acc _led_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._led_driver_api.static.*))) + 0x08004acc _led_driver_api_list_end = . + 0x08004acc _led_driver_api_ext_end = . + 0x08004acc _led_strip_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._led_strip_driver_api.static.*))) + 0x08004acc _led_strip_driver_api_list_end = . + 0x08004acc _led_strip_driver_api_ext_end = . + 0x08004acc _lora_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._lora_driver_api.static.*))) + 0x08004acc _lora_driver_api_list_end = . + 0x08004acc _lora_driver_api_ext_end = . + 0x08004acc _mbox_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mbox_driver_api.static.*))) + 0x08004acc _mbox_driver_api_list_end = . + 0x08004acc _mbox_driver_api_ext_end = . + 0x08004acc _mdio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mdio_driver_api.static.*))) + 0x08004acc _mdio_driver_api_list_end = . + 0x08004acc _mdio_driver_api_ext_end = . + 0x08004acc _mipi_dbi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mipi_dbi_driver_api.static.*))) + 0x08004acc _mipi_dbi_driver_api_list_end = . + 0x08004acc _mipi_dbi_driver_api_ext_end = . + 0x08004acc _mipi_dsi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mipi_dsi_driver_api.static.*))) + 0x08004acc _mipi_dsi_driver_api_list_end = . + 0x08004acc _mipi_dsi_driver_api_ext_end = . + 0x08004acc _mspi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mspi_driver_api.static.*))) + 0x08004acc _mspi_driver_api_list_end = . + 0x08004acc _mspi_driver_api_ext_end = . + 0x08004acc _opamp_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._opamp_driver_api.static.*))) + 0x08004acc _opamp_driver_api_list_end = . + 0x08004acc _opamp_driver_api_ext_end = . + 0x08004acc _otp_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._otp_driver_api.static.*))) + 0x08004acc _otp_driver_api_list_end = . + 0x08004acc _otp_driver_api_ext_end = . + 0x08004acc _peci_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._peci_driver_api.static.*))) + 0x08004acc _peci_driver_api_list_end = . + 0x08004acc _peci_driver_api_ext_end = . + 0x08004acc _ps2_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ps2_driver_api.static.*))) + 0x08004acc _ps2_driver_api_list_end = . + 0x08004acc _ps2_driver_api_ext_end = . + 0x08004acc _ptp_clock_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ptp_clock_driver_api.static.*))) + 0x08004acc _ptp_clock_driver_api_list_end = . + 0x08004acc _ptp_clock_driver_api_ext_end = . + 0x08004acc _pwm_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pwm_driver_api.static.*))) + 0x08004acc _pwm_driver_api_list_end = . + 0x08004acc _pwm_driver_api_ext_end = . + 0x08004acc _regulator_parent_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._regulator_parent_driver_api.static.*))) + 0x08004acc _regulator_parent_driver_api_list_end = . + 0x08004acc _regulator_parent_driver_api_ext_end = . + 0x08004acc _regulator_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._regulator_driver_api.static.*))) + 0x08004acc _regulator_driver_api_list_end = . + 0x08004acc _regulator_driver_api_ext_end = . + 0x08004acc _reset_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._reset_driver_api.static.*))) + 0x08004acc _reset_driver_api_list_end = . + 0x08004acc _reset_driver_api_ext_end = . + 0x08004acc _retained_mem_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._retained_mem_driver_api.static.*))) + 0x08004acc _retained_mem_driver_api_list_end = . + 0x08004acc _retained_mem_driver_api_ext_end = . + 0x08004acc _rtc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._rtc_driver_api.static.*))) + 0x08004acc _rtc_driver_api_list_end = . + 0x08004acc _rtc_driver_api_ext_end = . + 0x08004acc _sdhc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sdhc_driver_api.static.*))) + 0x08004acc _sdhc_driver_api_list_end = . + 0x08004acc _sdhc_driver_api_ext_end = . + 0x08004acc _sensor_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sensor_driver_api.static.*))) + 0x08004acc _sensor_driver_api_list_end = . + 0x08004acc _sensor_driver_api_ext_end = . + 0x08004acc _smbus_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._smbus_driver_api.static.*))) + 0x08004acc _smbus_driver_api_list_end = . + 0x08004acc _smbus_driver_api_ext_end = . + 0x08004acc _spi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._spi_driver_api.static.*))) + 0x08004acc _spi_driver_api_list_end = . + 0x08004acc _spi_driver_api_ext_end = . + 0x08004acc _syscon_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._syscon_driver_api.static.*))) + 0x08004acc _syscon_driver_api_list_end = . + 0x08004acc _syscon_driver_api_ext_end = . + 0x08004acc _tee_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tee_driver_api.static.*))) + 0x08004acc _tee_driver_api_list_end = . + 0x08004acc _tee_driver_api_ext_end = . + 0x08004acc _tgpio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tgpio_driver_api.static.*))) + 0x08004acc _tgpio_driver_api_list_end = . + 0x08004acc _tgpio_driver_api_ext_end = . + 0x08004acc _uaol_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._uaol_driver_api.static.*))) + 0x08004acc _uaol_driver_api_list_end = . + 0x08004acc _uaol_driver_api_ext_end = . + 0x08004acc _video_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._video_driver_api.static.*))) + 0x08004acc _video_driver_api_list_end = . + 0x08004acc _video_driver_api_ext_end = . + 0x08004acc _virtio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._virtio_driver_api.static.*))) + 0x08004acc _virtio_driver_api_list_end = . + 0x08004acc _virtio_driver_api_ext_end = . + 0x08004acc _w1_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._w1_driver_api.static.*))) + 0x08004acc _w1_driver_api_list_end = . + 0x08004acc _w1_driver_api_ext_end = . + 0x08004acc _wdt_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._wdt_driver_api.static.*))) + 0x08004acc _wdt_driver_api_list_end = . + 0x08004acc _wdt_driver_api_ext_end = . + 0x08004acc _wuc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._wuc_driver_api.static.*))) + 0x08004acc _wuc_driver_api_list_end = . + 0x08004acc _wuc_driver_api_ext_end = . + 0x08004acc _can_transceiver_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._can_transceiver_driver_api.static.*))) + 0x08004acc _can_transceiver_driver_api_list_end = . + 0x08004acc _can_transceiver_driver_api_ext_end = . + 0x08004acc _i3c_target_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i3c_target_driver_api.static.*))) + 0x08004acc _i3c_target_driver_api_list_end = . + 0x08004acc _i3c_target_driver_api_ext_end = . + 0x08004acc _its_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._its_driver_api.static.*))) + 0x08004acc _its_driver_api_list_end = . + 0x08004acc _its_driver_api_ext_end = . + 0x08004acc _vtd_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._vtd_driver_api.static.*))) + 0x08004acc _vtd_driver_api_list_end = . + 0x08004acc _vtd_driver_api_ext_end = . + 0x08004acc _renesas_elc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._renesas_elc_driver_api.static.*))) + 0x08004acc _renesas_elc_driver_api_list_end = . + 0x08004acc _renesas_elc_driver_api_ext_end = . + 0x08004acc _pcie_ctrl_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pcie_ctrl_driver_api.static.*))) + 0x08004acc _pcie_ctrl_driver_api_list_end = . + 0x08004acc _pcie_ctrl_driver_api_ext_end = . + 0x08004acc _pcie_ep_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pcie_ep_driver_api.static.*))) + 0x08004acc _pcie_ep_driver_api_list_end = . + 0x08004acc _pcie_ep_driver_api_ext_end = . + 0x08004acc _psi5_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._psi5_driver_api.static.*))) + 0x08004acc _psi5_driver_api_list_end = . + 0x08004acc _psi5_driver_api_ext_end = . + 0x08004acc _sent_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sent_driver_api.static.*))) + 0x08004acc _sent_driver_api_list_end = . + 0x08004acc _sent_driver_api_ext_end = . + 0x08004acc _svc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._svc_driver_api.static.*))) + 0x08004acc _svc_driver_api_list_end = . + 0x08004acc _svc_driver_api_ext_end = . + 0x08004acc _stepper_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._stepper_driver_api.static.*))) + 0x08004acc _stepper_driver_api_list_end = . + 0x08004acc _stepper_driver_api_ext_end = . + 0x08004acc _stepper_ctrl_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._stepper_ctrl_driver_api.static.*))) + 0x08004acc _stepper_ctrl_driver_api_list_end = . + 0x08004acc _stepper_ctrl_driver_api_ext_end = . + 0x08004acc _uart_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._uart_driver_api.static.*))) + 0x08004acc _uart_driver_api_list_end = . + 0x08004acc _uart_driver_api_ext_end = . + 0x08004acc _bc12_emul_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bc12_emul_driver_api.static.*))) + 0x08004acc _bc12_emul_driver_api_list_end = . + 0x08004acc _bc12_emul_driver_api_ext_end = . + 0x08004acc _bc12_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bc12_driver_api.static.*))) + 0x08004acc _bc12_driver_api_list_end = . + 0x08004acc _bc12_driver_api_ext_end = . + 0x08004acc _usbc_ppc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._usbc_ppc_driver_api.static.*))) + 0x08004acc _usbc_ppc_driver_api_list_end = . + 0x08004acc _usbc_ppc_driver_api_ext_end = . + 0x08004acc _tcpc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tcpc_driver_api.static.*))) + 0x08004acc _tcpc_driver_api_list_end = . + 0x08004acc _tcpc_driver_api_ext_end = . + 0x08004acc _usbc_vbus_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._usbc_vbus_driver_api.static.*))) + 0x08004acc _usbc_vbus_driver_api_list_end = . + 0x08004acc _usbc_vbus_driver_api_ext_end = . + 0x08004acc _ivshmem_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ivshmem_driver_api.static.*))) + 0x08004acc _ivshmem_driver_api_list_end = . + 0x08004acc _ivshmem_driver_api_ext_end = . + 0x08004acc _ethphy_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ethphy_driver_api.static.*))) + 0x08004acc _ethphy_driver_api_list_end = . + 0x08004acc _ethphy_driver_api_ext_end = . + +ztest 0x08004acc 0x0 + 0x08004acc _ztest_expected_result_entry_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_expected_result_entry.static.*))) + 0x08004acc _ztest_expected_result_entry_list_end = . + 0x08004acc _ztest_suite_node_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_suite_node.static.*))) + 0x08004acc _ztest_suite_node_list_end = . + 0x08004acc _ztest_unit_test_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_unit_test.static.*))) + 0x08004acc _ztest_unit_test_list_end = . + 0x08004acc _ztest_test_rule_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_test_rule.static.*))) + 0x08004acc _ztest_test_rule_list_end = . + +init_array 0x08004acc 0x0 + 0x08004acc __zephyr_init_array_start = . + *(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)) + *(SORT_BY_ALIGNMENT(.init_array) SORT_BY_ALIGNMENT(.ctors)) + 0x08004acc __zephyr_init_array_end = . + 0x00000001 ASSERT ((__zephyr_init_array_start == __zephyr_init_array_end), GNU-style constructors required but STATIC_INIT_GNU not enabled) + +bt_l2cap_fixed_chan_area + 0x08004acc 0x0 + 0x08004acc _bt_l2cap_fixed_chan_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_l2cap_fixed_chan.static.*))) + 0x08004acc _bt_l2cap_fixed_chan_list_end = . + +bt_gatt_service_static_area + 0x08004acc 0x0 + 0x08004acc _bt_gatt_service_static_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_gatt_service_static.static.*))) + 0x08004acc _bt_gatt_service_static_list_end = . + +log_strings_area + 0x08004acc 0x0 + 0x08004acc _log_strings_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_strings.static.*))) + 0x08004acc _log_strings_list_end = . + +log_stmesp_ptr_area + 0x08004acc 0x0 + 0x08004acc _log_stmesp_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_stmesp_ptr.static.*))) + 0x08004acc _log_stmesp_ptr_list_end = . + +log_stmesp_str_area + 0x08004acc 0x0 + 0x08004acc _log_stmesp_str_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_stmesp_str.static.*))) + 0x08004acc _log_stmesp_str_list_end = . + +log_const_area 0x08004acc 0x8 + 0x08004acc _log_const_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_const.static.*))) + ._log_const.static.log_const_mcuboot_ + 0x08004acc 0x8 app/libapp.a(main.c.obj) + 0x08004acc log_const_mcuboot + 0x08004ad4 _log_const_list_end = . + +log_backend_area + 0x08004ad4 0x0 + 0x08004ad4 _log_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_backend.static.*))) + 0x08004ad4 _log_backend_list_end = . + +log_link_area 0x08004ad4 0x0 + 0x08004ad4 _log_link_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_link.static.*))) + 0x08004ad4 _log_link_list_end = . + +tracing_backend_area + 0x08004ad4 0x0 + 0x08004ad4 _tracing_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tracing_backend.static.*))) + 0x08004ad4 _tracing_backend_list_end = . + +zephyr_dbg_info + *(SORT_BY_ALIGNMENT(.dbg_thread_info)) + +intc_table_area + 0x08004ad4 0x0 + 0x08004ad4 _intc_table_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._intc_table.static.*))) + 0x08004ad4 _intc_table_list_end = . + +symbol_to_keep 0x08004ad4 0x0 + 0x08004ad4 __symbol_to_keep_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.symbol_to_keep*))) + 0x08004ad4 __symbol_to_keep_end = . + +shell_area 0x08004ad4 0x0 + 0x08004ad4 _shell_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell.static.*))) + 0x08004ad4 _shell_list_end = . + +shell_root_cmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_root_cmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_root_cmds.static.*))) + 0x08004ad4 _shell_root_cmds_list_end = . + +shell_subcmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_subcmds.static.*))) + 0x08004ad4 _shell_subcmds_list_end = . + +shell_dynamic_subcmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_dynamic_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_dynamic_subcmds.static.*))) + 0x08004ad4 _shell_dynamic_subcmds_list_end = . + +shell_remote_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_remote_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_remote.static.*))) + 0x08004ad4 _shell_remote_list_end = . + +cfb_font_area 0x08004ad4 0x0 + 0x08004ad4 _cfb_font_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._cfb_font.static.*))) + 0x08004ad4 _cfb_font_list_end = . + +tdata 0x08004ad4 0x0 + *(SORT_BY_ALIGNMENT(.tdata) SORT_BY_ALIGNMENT(.tdata.*) SORT_BY_ALIGNMENT(.gnu.linkonce.td.*)) + +tbss 0x08004ad4 0x4 + *(SORT_BY_ALIGNMENT(.tbss) SORT_BY_ALIGNMENT(.tbss.*) SORT_BY_ALIGNMENT(.gnu.linkonce.tb.*) SORT_BY_ALIGNMENT(.tcommon)) + .tbss.z_tls_current + 0x08004ad4 0x4 zephyr/libzephyr.a(thread_entry.c.obj) + 0x08004ad4 z_tls_current + 0x08004ad4 PROVIDE (__tdata_start = LOADADDR (tdata)) + 0x00000001 PROVIDE (__tdata_align = ALIGNOF (tdata)) + 0x00000000 PROVIDE (__tdata_size = (((SIZEOF (tdata) + __tdata_align) - 0x1) & ~ ((__tdata_align - 0x1)))) + [!provide] PROVIDE (__tdata_end = (__tdata_start + __tdata_size)) + 0x00000004 PROVIDE (__tbss_align = ALIGNOF (tbss)) + [!provide] PROVIDE (__tbss_start = ADDR (tbss)) + 0x00000004 PROVIDE (__tbss_size = (((SIZEOF (tbss) + __tbss_align) - 0x1) & ~ ((__tbss_align - 0x1)))) + [!provide] PROVIDE (__tbss_end = (__tbss_start + __tbss_size)) + [!provide] PROVIDE (__tls_start = __tdata_start) + [!provide] PROVIDE (__tls_size = (__tbss_end - __tdata_start)) + [!provide] PROVIDE (__tls_end = __tbss_end) + +rodata 0x08004ad4 0x82c + *(SORT_BY_ALIGNMENT(.rodata)) + .rodata 0x08004ad4 0x8 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.rodata.*)) + .rodata.all_slots.0 + 0x08004adc 0x8 app/libapp.a(flash_map_extended.c.obj) + .rodata.mem_attr_region + 0x08004ae4 0x0 zephyr/libzephyr.a(mem_attr.c.obj) + .rodata.flash_map_entries + 0x08004ae4 0x4 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x08004ae4 flash_map_entries + .rodata.default_flash_map + 0x08004ae8 0x40 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x08004ae8 default_flash_map + .rodata.all_slots.0 + 0x08004b28 0x8 zephyr/libzephyr.a(bootutil_misc.c.obj) + .rodata.all_slots.0 + 0x08004b30 0x8 zephyr/libzephyr.a(swap_misc.c.obj) + .rodata.k256 0x08004b38 0x100 zephyr/libzephyr.a(sha256.c.obj) + .rodata.static_regions + 0x08004c38 0xc zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_core_mpu.c.obj) + .rodata.mpu_config + 0x08004c44 0x8 zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_mpu_regions.c.obj) + 0x08004c44 mpu_config + .rodata.mpu_regions + 0x08004c4c 0x18 zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_mpu_regions.c.obj) + .rodata.flash_stm32_parameters + 0x08004c64 0x8 zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + .rodata.CSWTCH.2044 + 0x08004c6c 0xc modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.all_slots.0 + 0x08004c78 0x8 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.levels.0 + 0x08004c80 0x18 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.allowed_unprot_tlvs + 0x08004c98 0x1e zephyr/libzephyr.a(image_validate.c.obj) + .rodata.boot_img_magic + 0x08004cb6 0x10 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + 0x08004cb6 boot_img_magic + .rodata.main.str1.1 + 0x08004cc6 0x608 app/libapp.a(main.c.obj) + 0xc9 (size before relaxing) + .rodata.str1.1 + 0x080052ce 0x8 app/libapp.a(main.c.obj) + .rodata.flash_device_base.str1.1 + 0x080052ce 0x19 app/libapp.a(flash_map_extended.c.obj) + .rodata.boot_banner.str1.1 + 0x080052ce 0x39 zephyr/libzephyr.a(boot_banner.c.obj) + .rodata.boot_find_status.str1.1 + 0x080052ce 0x2c zephyr/libzephyr.a(bootutil_misc.c.obj) + .rodata.boot_validate_slot.isra.0.str1.1 + 0x080052ce 0x79 zephyr/libzephyr.a(loader.c.obj) + .rodata.boot_swap_image.isra.0.str1.1 + 0x080052ce 0x2f zephyr/libzephyr.a(loader.c.obj) + .rodata.context_boot_go.str1.1 + 0x080052ce 0xd5 zephyr/libzephyr.a(loader.c.obj) + .rodata.swap_read_status_bytes.str1.1 + 0x080052ce 0x23 zephyr/libzephyr.a(swap_move.c.obj) + .rodata.boot_slots_compatible.str1.1 + 0x080052ce 0xcc zephyr/libzephyr.a(swap_move.c.obj) + .rodata.swap_status_source.str1.1 + 0x080052ce 0xa4 zephyr/libzephyr.a(swap_move.c.obj) + .rodata.swap_run.str1.1 + 0x080052ce 0x89 zephyr/libzephyr.a(swap_move.c.obj) + .rodata.str1.1 + 0x080052ce 0xf zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_mpu_regions.c.obj) + .rodata.abort.str1.1 + 0x080052ce 0x9 zephyr/lib/libc/common/liblib__libc__common.a(abort.c.obj) + .rodata.str1.1 + 0x080052ce 0x1e zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + .rodata.line_range_6.0 + 0x080052ce 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_5.1 + 0x080052d0 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_4.2 + 0x080052d2 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_3.3 + 0x080052d4 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_2.4 + 0x080052d6 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_1.5 + 0x080052d8 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_0.6 + 0x080052da 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.str1.1 + 0x080052dc 0xd zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_stm32_ll_common.c.obj) + .rodata.str1.1 + 0x080052dc 0x1a zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + .rodata.AHBPrescTable + 0x080052dc 0x10 modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a(system_stm32g4xx.c.obj) + 0x080052dc AHBPrescTable + .rodata.boot_swap_type_multi.str1.1 + 0x080052ec 0xa6 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.str1.1 + 0x080052ec 0x11 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.boot_swap_tables + 0x080052ec 0x12 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.z_cstart.str1.1 + 0x080052fe 0x5 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.__m_vfprintf.str1.1 + 0x080052fe 0x7 /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/14.3.0/../../../../arm-zephyr-eabi/lib/thumb/v7e-m/nofp/space/libc.a(libc_tinystdio_vfmprintf.c.o) + *(SORT_BY_ALIGNMENT(.gnu.linkonce.r.*)) + 0x080053a4 . = ALIGN (0x4) + *fill* 0x080052fe 0x2 + [!provide] PROVIDE (__eh_frame_start = 0x0) + [!provide] PROVIDE (__eh_frame_end = 0x0) + [!provide] PROVIDE (__eh_frame_hdr_start = 0x0) + [!provide] PROVIDE (__eh_frame_hdr_end = 0x0) + +/DISCARD/ + *(SORT_BY_ALIGNMENT(.eh_frame)) + 0x08005300 __rodata_region_end = . + 0x08005300 . = ALIGN (_region_min_align) + 0x08008000 . = ALIGN ((0x1 << LOG2CEIL ((__rodata_region_end - ADDR (rom_start))))) + 0x08008000 __rom_region_end = ((__rom_region_start + .) - ADDR (rom_start)) + 0x00008000 __rom_region_size = (__rom_region_end - __rom_region_start) + +/DISCARD/ + *(SORT_BY_ALIGNMENT(.got.plt)) + *(SORT_BY_ALIGNMENT(.igot.plt)) + *(SORT_BY_ALIGNMENT(.got)) + *(SORT_BY_ALIGNMENT(.igot)) + 0x20000000 . = 0x20000000 + 0x20000000 . = ALIGN (_region_min_align) + 0x20000000 _image_ram_start = . + +.ramfunc 0x20000000 0x0 load address 0x08005300 + 0x20000000 __ramfunc_region_start = . + 0x20000000 . = ALIGN (_region_min_align) + 0x20000000 . = ALIGN ((0x1 << LOG2CEIL (__ramfunc_size))) + 0x20000000 __ramfunc_start = . + *(SORT_BY_ALIGNMENT(.ramfunc)) + *(SORT_BY_ALIGNMENT(.ramfunc.*)) + 0x20000000 . = ALIGN (_region_min_align) + 0x20000000 . = ALIGN ((0x1 << LOG2CEIL (__ramfunc_size))) + 0x20000000 __ramfunc_end = . + 0x00000000 __ramfunc_size = (__ramfunc_end - __ramfunc_start) + 0x08005300 __ramfunc_load_start = LOADADDR (.ramfunc) + +datas 0x20000000 0x4c load address 0x08005300 + 0x20000000 __data_region_start = . + 0x20000000 __data_start = . + *(SORT_BY_ALIGNMENT(.data)) + *(SORT_BY_ALIGNMENT(.data.*)) + .data._char_out + 0x20000000 0x4 zephyr/libzephyr.a(printk.c.obj) + .data.flash_map + 0x20000004 0x4 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x20000004 flash_map + .data.FIH_NO_BOOTABLE_IMAGE + 0x20000008 0x4 zephyr/libzephyr.a(fault_injection_hardening.c.obj) + 0x20000008 FIH_NO_BOOTABLE_IMAGE + .data.FIH_FAILURE + 0x2000000c 0x4 zephyr/libzephyr.a(fault_injection_hardening.c.obj) + 0x2000000c FIH_FAILURE + .data.flash_data + 0x20000010 0x1c zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + .data.SystemCoreClock + 0x2000002c 0x4 modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a(system_stm32g4xx.c.obj) + 0x2000002c SystemCoreClock + .data.slice_ticks + 0x20000030 0x4 zephyr/kernel/libkernel.a(timeslicing.c.obj) + .data.timeout_list + 0x20000034 0x8 zephyr/kernel/libkernel.a(timeout.c.obj) + .data.exti_irq_table + 0x2000003c 0x10 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.kernel.*)) + 0x2000004c __data_end = . + 0x0000004c __data_size = (__data_end - __data_start) + 0x08005300 __data_load_start = LOADADDR (datas) + 0x08005300 __data_region_load_start = LOADADDR (datas) + +device_states 0x2000004c 0x8 load address 0x0800534c + 0x2000004c . = ALIGN (0x4) + 0x2000004c __device_states_start = . + *(SORT_BY_ALIGNMENT(.z_devstate)) + .z_devstate 0x2000004c 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + .z_devstate 0x2000004e 0x2 zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_stm32_ll_common.c.obj) + .z_devstate 0x20000050 0x2 zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.z_devstate.*)) + 0x20000052 __device_states_end = . + 0x20000054 . = ALIGN (0x4) + *fill* 0x20000052 0x2 + +log_mpsc_pbuf_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _log_mpsc_pbuf_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_mpsc_pbuf.static.*))) + 0x20000054 _log_mpsc_pbuf_list_end = . + +log_msg_ptr_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _log_msg_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_msg_ptr.static.*))) + 0x20000054 _log_msg_ptr_list_end = . + +log_dynamic_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _log_dynamic_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_dynamic.static.*))) + 0x20000054 _log_dynamic_list_end = . + +k_timer_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_timer_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_timer.static.*))) + 0x20000054 _k_timer_list_end = . + +k_mem_slab_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_mem_slab_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mem_slab.static.*))) + 0x20000054 _k_mem_slab_list_end = . + +k_heap_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_heap_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_heap.static.*))) + 0x20000054 _k_heap_list_end = . + +k_mutex_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_mutex_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mutex.static.*))) + 0x20000054 _k_mutex_list_end = . + +k_stack_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_stack_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_stack.static.*))) + 0x20000054 _k_stack_list_end = . + +k_msgq_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_msgq_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_msgq.static.*))) + 0x20000054 _k_msgq_list_end = . + +k_mbox_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_mbox_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mbox.static.*))) + 0x20000054 _k_mbox_list_end = . + +k_pipe_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_pipe_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_pipe.static.*))) + 0x20000054 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elf32-littlearm) +LOAD linker stubs diff --git a/zephyrproject/build/mcuboot/zephyr/zephyr.stat b/zephyrproject/build/mcuboot/zephyr/zephyr.stat new file mode 100644 index 0000000..45470d3 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/zephyr.stat @@ -0,0 +1,75 @@ +ELF Header: + Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 + Class: ELF32 + Data: 2's complement, little endian + Version: 1 (current) + OS/ABI: UNIX - System V + ABI Version: 0 + Type: EXEC (Executable file) + Machine: ARM + Version: 0x1 + Entry point address: 0x8001709 + Start of program headers: 52 (bytes into file) + Start of section headers: 1009364 (bytes into file) + Flags: 0x5000200, Version5 EABI, soft-float ABI + Size of this header: 52 (bytes) + Size of program headers: 32 (bytes) + Number of program headers: 6 + Size of section headers: 40 (bytes) + Number of section headers: 29 + Section header string table index: 28 + +Section Headers: + [Nr] Name Type Addr Off Size ES Flg Lk Inf Al + [ 0] NULL 00000000 000000 000000 00 0 0 0 + [ 1] rom_start PROGBITS 08000000 0000f4 0001b0 00 AX 0 0 4 + [ 2] text PROGBITS 080001b0 0002a4 00457c 00 AX 0 0 4 + [ 3] initlevel PROGBITS 0800472c 004820 000038 00 A 0 0 4 + [ 4] device_area PROGBITS 08004764 004858 000054 00 A 0 0 4 + [ 5] sw_isr_table PROGBITS 080047b8 0048ac 0002e0 00 A 0 0 4 + [ 6] device_api_area PROGBITS 08004a98 004b8c 000034 00 A 0 0 4 + [ 7] log_const_area PROGBITS 08004acc 004bc0 000008 00 A 0 0 4 + [ 8] tbss NOBITS 08004ad4 004bc8 000004 00 WAT 0 0 4 + [ 9] rodata PROGBITS 08004ad4 004bc8 00082c 00 A 0 0 4 + [10] .ramfunc PROGBITS 20000000 00544c 000000 00 W 0 0 1 + [11] datas PROGBITS 20000000 0053f4 00004c 00 WA 0 0 4 + [12] device_states PROGBITS 2000004c 005440 000008 00 WA 0 0 1 + [13] .comment PROGBITS 00000000 00544c 00001f 01 MS 0 0 1 + [14] .debug_aranges PROGBITS 00000000 005470 0013b8 00 0 0 8 + [15] .debug_info PROGBITS 00000000 006828 08ced2 00 0 0 1 + [16] .debug_abbrev PROGBITS 00000000 0936fa 00d503 00 0 0 1 + [17] .debug_line PROGBITS 00000000 0a0bfd 021c0d 00 0 0 1 + [18] .debug_frame PROGBITS 00000000 0c280c 00290c 00 0 0 4 + [19] .debug_str PROGBITS 00000000 0c5118 008d70 01 MS 0 0 1 + [20] .debug_loc PROGBITS 00000000 0cde88 015f93 00 0 0 1 + [21] .debug_ranges PROGBITS 00000000 0e3e1b 003898 00 0 0 1 + [22] .ARM.attributes ARM_ATTRIBUTES 00000000 0e76b3 000032 00 0 0 1 + [23] .last_section PROGBITS 08005354 005448 000004 00 WA 0 0 4 + [24] bss NOBITS 20000058 005458 000983 00 WA 0 0 8 + [25] noinit NOBITS 20000a00 005458 003200 00 WA 0 0 64 + [26] .symtab SYMTAB 00000000 0e76e8 0072c0 10 27 714 4 + [27] .strtab STRTAB 00000000 0ee9a8 007c01 00 0 0 1 + [28] .shstrtab STRTAB 00000000 0f65a9 000129 00 0 0 1 +Key to Flags: + W (write), A (alloc), X (execute), M (merge), S (strings), I (info), + L (link order), O (extra OS processing required), G (group), T (TLS), + C (compressed), x (unknown), o (OS specific), E (exclude), + D (mbind), y (purecode), p (processor specific) + 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*(SORT_BY_NAME(SORT_BY_ALIGNMENT(._syscon_driver_api.static.*))) + 0x08004acc _syscon_driver_api_list_end = . + 0x08004acc _syscon_driver_api_ext_end = . + 0x08004acc _tee_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tee_driver_api.static.*))) + 0x08004acc _tee_driver_api_list_end = . + 0x08004acc _tee_driver_api_ext_end = . + 0x08004acc _tgpio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tgpio_driver_api.static.*))) + 0x08004acc _tgpio_driver_api_list_end = . + 0x08004acc _tgpio_driver_api_ext_end = . + 0x08004acc _uaol_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._uaol_driver_api.static.*))) + 0x08004acc _uaol_driver_api_list_end = . + 0x08004acc _uaol_driver_api_ext_end = . + 0x08004acc _video_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._video_driver_api.static.*))) + 0x08004acc _video_driver_api_list_end = . + 0x08004acc _video_driver_api_ext_end = . + 0x08004acc _virtio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._virtio_driver_api.static.*))) + 0x08004acc _virtio_driver_api_list_end = . + 0x08004acc _virtio_driver_api_ext_end = . + 0x08004acc _w1_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._w1_driver_api.static.*))) + 0x08004acc _w1_driver_api_list_end = . + 0x08004acc _w1_driver_api_ext_end = . + 0x08004acc _wdt_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._wdt_driver_api.static.*))) + 0x08004acc _wdt_driver_api_list_end = . + 0x08004acc _wdt_driver_api_ext_end = . + 0x08004acc _wuc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._wuc_driver_api.static.*))) + 0x08004acc _wuc_driver_api_list_end = . + 0x08004acc _wuc_driver_api_ext_end = . + 0x08004acc _can_transceiver_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._can_transceiver_driver_api.static.*))) + 0x08004acc _can_transceiver_driver_api_list_end = . + 0x08004acc _can_transceiver_driver_api_ext_end = . + 0x08004acc _i3c_target_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i3c_target_driver_api.static.*))) + 0x08004acc _i3c_target_driver_api_list_end = . + 0x08004acc _i3c_target_driver_api_ext_end = . + 0x08004acc _its_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._its_driver_api.static.*))) + 0x08004acc _its_driver_api_list_end = . + 0x08004acc _its_driver_api_ext_end = . + 0x08004acc _vtd_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._vtd_driver_api.static.*))) + 0x08004acc _vtd_driver_api_list_end = . + 0x08004acc _vtd_driver_api_ext_end = . + 0x08004acc _renesas_elc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._renesas_elc_driver_api.static.*))) + 0x08004acc _renesas_elc_driver_api_list_end = . + 0x08004acc _renesas_elc_driver_api_ext_end = . + 0x08004acc _pcie_ctrl_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pcie_ctrl_driver_api.static.*))) + 0x08004acc _pcie_ctrl_driver_api_list_end = . + 0x08004acc _pcie_ctrl_driver_api_ext_end = . + 0x08004acc _pcie_ep_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pcie_ep_driver_api.static.*))) + 0x08004acc _pcie_ep_driver_api_list_end = . + 0x08004acc _pcie_ep_driver_api_ext_end = . + 0x08004acc _psi5_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._psi5_driver_api.static.*))) + 0x08004acc _psi5_driver_api_list_end = . + 0x08004acc _psi5_driver_api_ext_end = . + 0x08004acc _sent_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sent_driver_api.static.*))) + 0x08004acc _sent_driver_api_list_end = . + 0x08004acc _sent_driver_api_ext_end = . + 0x08004acc _svc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._svc_driver_api.static.*))) + 0x08004acc _svc_driver_api_list_end = . + 0x08004acc _svc_driver_api_ext_end = . + 0x08004acc _stepper_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._stepper_driver_api.static.*))) + 0x08004acc _stepper_driver_api_list_end = . + 0x08004acc _stepper_driver_api_ext_end = . + 0x08004acc _stepper_ctrl_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._stepper_ctrl_driver_api.static.*))) + 0x08004acc _stepper_ctrl_driver_api_list_end = . + 0x08004acc _stepper_ctrl_driver_api_ext_end = . + 0x08004acc _uart_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._uart_driver_api.static.*))) + 0x08004acc _uart_driver_api_list_end = . + 0x08004acc _uart_driver_api_ext_end = . + 0x08004acc _bc12_emul_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bc12_emul_driver_api.static.*))) + 0x08004acc _bc12_emul_driver_api_list_end = . + 0x08004acc _bc12_emul_driver_api_ext_end = . + 0x08004acc _bc12_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bc12_driver_api.static.*))) + 0x08004acc _bc12_driver_api_list_end = . + 0x08004acc _bc12_driver_api_ext_end = . + 0x08004acc _usbc_ppc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._usbc_ppc_driver_api.static.*))) + 0x08004acc _usbc_ppc_driver_api_list_end = . + 0x08004acc _usbc_ppc_driver_api_ext_end = . + 0x08004acc _tcpc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tcpc_driver_api.static.*))) + 0x08004acc _tcpc_driver_api_list_end = . + 0x08004acc _tcpc_driver_api_ext_end = . + 0x08004acc _usbc_vbus_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._usbc_vbus_driver_api.static.*))) + 0x08004acc _usbc_vbus_driver_api_list_end = . + 0x08004acc _usbc_vbus_driver_api_ext_end = . + 0x08004acc _ivshmem_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ivshmem_driver_api.static.*))) + 0x08004acc _ivshmem_driver_api_list_end = . + 0x08004acc _ivshmem_driver_api_ext_end = . + 0x08004acc _ethphy_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ethphy_driver_api.static.*))) + 0x08004acc _ethphy_driver_api_list_end = . + 0x08004acc _ethphy_driver_api_ext_end = . + +ztest 0x08004acc 0x0 + 0x08004acc _ztest_expected_result_entry_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_expected_result_entry.static.*))) + 0x08004acc _ztest_expected_result_entry_list_end = . + 0x08004acc _ztest_suite_node_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_suite_node.static.*))) + 0x08004acc _ztest_suite_node_list_end = . + 0x08004acc _ztest_unit_test_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_unit_test.static.*))) + 0x08004acc _ztest_unit_test_list_end = . + 0x08004acc _ztest_test_rule_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_test_rule.static.*))) + 0x08004acc _ztest_test_rule_list_end = . + +init_array 0x08004acc 0x0 + 0x08004acc __zephyr_init_array_start = . + *(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)) + *(SORT_BY_ALIGNMENT(.init_array) SORT_BY_ALIGNMENT(.ctors)) + 0x08004acc __zephyr_init_array_end = . + 0x00000001 ASSERT ((__zephyr_init_array_start == __zephyr_init_array_end), GNU-style constructors required but STATIC_INIT_GNU not enabled) + +bt_l2cap_fixed_chan_area + 0x08004acc 0x0 + 0x08004acc _bt_l2cap_fixed_chan_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_l2cap_fixed_chan.static.*))) + 0x08004acc _bt_l2cap_fixed_chan_list_end = . + +bt_gatt_service_static_area + 0x08004acc 0x0 + 0x08004acc _bt_gatt_service_static_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_gatt_service_static.static.*))) + 0x08004acc _bt_gatt_service_static_list_end = . + +log_strings_area + 0x08004acc 0x0 + 0x08004acc _log_strings_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_strings.static.*))) + 0x08004acc _log_strings_list_end = . + +log_stmesp_ptr_area + 0x08004acc 0x0 + 0x08004acc _log_stmesp_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_stmesp_ptr.static.*))) + 0x08004acc _log_stmesp_ptr_list_end = . + +log_stmesp_str_area + 0x08004acc 0x0 + 0x08004acc _log_stmesp_str_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_stmesp_str.static.*))) + 0x08004acc _log_stmesp_str_list_end = . + +log_const_area 0x08004acc 0x8 + 0x08004acc _log_const_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_const.static.*))) + ._log_const.static.log_const_mcuboot_ + 0x08004acc 0x8 app/libapp.a(main.c.obj) + 0x08004acc log_const_mcuboot + 0x08004ad4 _log_const_list_end = . + +log_backend_area + 0x08004ad4 0x0 + 0x08004ad4 _log_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_backend.static.*))) + 0x08004ad4 _log_backend_list_end = . + +log_link_area 0x08004ad4 0x0 + 0x08004ad4 _log_link_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_link.static.*))) + 0x08004ad4 _log_link_list_end = . + +tracing_backend_area + 0x08004ad4 0x0 + 0x08004ad4 _tracing_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tracing_backend.static.*))) + 0x08004ad4 _tracing_backend_list_end = . + +zephyr_dbg_info + *(SORT_BY_ALIGNMENT(.dbg_thread_info)) + +intc_table_area + 0x08004ad4 0x0 + 0x08004ad4 _intc_table_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._intc_table.static.*))) + 0x08004ad4 _intc_table_list_end = . + +symbol_to_keep 0x08004ad4 0x0 + 0x08004ad4 __symbol_to_keep_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.symbol_to_keep*))) + 0x08004ad4 __symbol_to_keep_end = . + +shell_area 0x08004ad4 0x0 + 0x08004ad4 _shell_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell.static.*))) + 0x08004ad4 _shell_list_end = . + +shell_root_cmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_root_cmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_root_cmds.static.*))) + 0x08004ad4 _shell_root_cmds_list_end = . + +shell_subcmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_subcmds.static.*))) + 0x08004ad4 _shell_subcmds_list_end = . + +shell_dynamic_subcmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_dynamic_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_dynamic_subcmds.static.*))) + 0x08004ad4 _shell_dynamic_subcmds_list_end = . + +shell_remote_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_remote_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_remote.static.*))) + 0x08004ad4 _shell_remote_list_end = . + +cfb_font_area 0x08004ad4 0x0 + 0x08004ad4 _cfb_font_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._cfb_font.static.*))) + 0x08004ad4 _cfb_font_list_end = . + +tdata 0x08004ad4 0x0 + *(SORT_BY_ALIGNMENT(.tdata) SORT_BY_ALIGNMENT(.tdata.*) SORT_BY_ALIGNMENT(.gnu.linkonce.td.*)) + +tbss 0x08004ad4 0x4 + *(SORT_BY_ALIGNMENT(.tbss) SORT_BY_ALIGNMENT(.tbss.*) SORT_BY_ALIGNMENT(.gnu.linkonce.tb.*) SORT_BY_ALIGNMENT(.tcommon)) + .tbss.z_tls_current + 0x08004ad4 0x4 zephyr/libzephyr.a(thread_entry.c.obj) + 0x08004ad4 z_tls_current + 0x08004ad4 PROVIDE (__tdata_start = LOADADDR (tdata)) + 0x00000001 PROVIDE (__tdata_align = ALIGNOF (tdata)) + 0x00000000 PROVIDE (__tdata_size = (((SIZEOF (tdata) + __tdata_align) - 0x1) & ~ ((__tdata_align - 0x1)))) + [!provide] PROVIDE (__tdata_end = (__tdata_start + __tdata_size)) + 0x00000004 PROVIDE (__tbss_align = ALIGNOF (tbss)) + [!provide] PROVIDE (__tbss_start = ADDR (tbss)) + 0x00000004 PROVIDE (__tbss_size = (((SIZEOF (tbss) + __tbss_align) - 0x1) & ~ ((__tbss_align - 0x1)))) + [!provide] PROVIDE (__tbss_end = (__tbss_start + __tbss_size)) + [!provide] PROVIDE (__tls_start = __tdata_start) + [!provide] PROVIDE (__tls_size = (__tbss_end - __tdata_start)) + [!provide] PROVIDE (__tls_end = __tbss_end) + +rodata 0x08004ad4 0x82c + *(SORT_BY_ALIGNMENT(.rodata)) + .rodata 0x08004ad4 0x8 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.rodata.*)) + .rodata.all_slots.0 + 0x08004adc 0x8 app/libapp.a(flash_map_extended.c.obj) + .rodata.mem_attr_region + 0x08004ae4 0x0 zephyr/libzephyr.a(mem_attr.c.obj) + .rodata.flash_map_entries + 0x08004ae4 0x4 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x08004ae4 flash_map_entries + .rodata.default_flash_map + 0x08004ae8 0x40 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x08004ae8 default_flash_map + .rodata.all_slots.0 + 0x08004b28 0x8 zephyr/libzephyr.a(bootutil_misc.c.obj) + .rodata.all_slots.0 + 0x08004b30 0x8 zephyr/libzephyr.a(swap_misc.c.obj) + .rodata.k256 0x08004b38 0x100 zephyr/libzephyr.a(sha256.c.obj) + .rodata.static_regions + 0x08004c38 0xc zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_core_mpu.c.obj) + .rodata.mpu_config + 0x08004c44 0x8 zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_mpu_regions.c.obj) + 0x08004c44 mpu_config + .rodata.mpu_regions + 0x08004c4c 0x18 zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_mpu_regions.c.obj) + .rodata.flash_stm32_parameters + 0x08004c64 0x8 zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + .rodata.CSWTCH.2044 + 0x08004c6c 0xc modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.all_slots.0 + 0x08004c78 0x8 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.levels.0 + 0x08004c80 0x18 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.allowed_unprot_tlvs + 0x08004c98 0x1e zephyr/libzephyr.a(image_validate.c.obj) + .rodata.boot_img_magic + 0x08004cb6 0x10 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + 0x08004cb6 boot_img_magic + .rodata.main.str1.1 + 0x08004cc6 0x608 app/libapp.a(main.c.obj) + 0xc9 (size before relaxing) + .rodata.str1.1 + 0x080052ce 0x8 app/libapp.a(main.c.obj) + .rodata.flash_device_base.str1.1 + 0x080052ce 0x19 app/libapp.a(flash_map_extended.c.obj) + .rodata.boot_banner.str1.1 + 0x080052ce 0x39 zephyr/libzephyr.a(boot_banner.c.obj) + .rodata.boot_find_status.str1.1 + 0x080052ce 0x2c zephyr/libzephyr.a(bootutil_misc.c.obj) + .rodata.boot_validate_slot.isra.0.str1.1 + 0x080052ce 0x79 zephyr/libzephyr.a(loader.c.obj) + .rodata.boot_swap_image.isra.0.str1.1 + 0x080052ce 0x2f zephyr/libzephyr.a(loader.c.obj) + .rodata.context_boot_go.str1.1 + 0x080052ce 0xd5 zephyr/libzephyr.a(loader.c.obj) + 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0x08004acc _haptics_driver_api_ext_end = . + 0x08004acc _hwspinlock_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._hwspinlock_driver_api.static.*))) + 0x08004acc _hwspinlock_driver_api_list_end = . + 0x08004acc _hwspinlock_driver_api_ext_end = . + 0x08004acc _i2c_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i2c_driver_api.static.*))) + 0x08004acc _i2c_driver_api_list_end = . + 0x08004acc _i3c_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i3c_driver_api.static.*))) + 0x08004acc _i3c_driver_api_list_end = . + 0x08004acc _i3c_driver_api_ext_end = . + 0x08004acc _i2c_driver_api_ext_end = . + 0x08004acc _i2c_target_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i2c_target_driver_api.static.*))) + 0x08004acc _i2c_target_driver_api_list_end = . + 0x08004acc _i2c_target_driver_api_ext_end = . + 0x08004acc _i2s_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i2s_driver_api.static.*))) + 0x08004acc _i2s_driver_api_list_end = . + 0x08004acc _i2s_driver_api_ext_end = . + 0x08004acc _ipm_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ipm_driver_api.static.*))) + 0x08004acc _ipm_driver_api_list_end = . + 0x08004acc _ipm_driver_api_ext_end = . + 0x08004acc _led_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._led_driver_api.static.*))) + 0x08004acc _led_driver_api_list_end = . + 0x08004acc _led_driver_api_ext_end = . + 0x08004acc _led_strip_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._led_strip_driver_api.static.*))) + 0x08004acc _led_strip_driver_api_list_end = . + 0x08004acc _led_strip_driver_api_ext_end = . + 0x08004acc _lora_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._lora_driver_api.static.*))) + 0x08004acc _lora_driver_api_list_end = . + 0x08004acc _lora_driver_api_ext_end = . + 0x08004acc _mbox_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mbox_driver_api.static.*))) + 0x08004acc _mbox_driver_api_list_end = . + 0x08004acc _mbox_driver_api_ext_end = . + 0x08004acc _mdio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mdio_driver_api.static.*))) + 0x08004acc _mdio_driver_api_list_end = . + 0x08004acc _mdio_driver_api_ext_end = . + 0x08004acc _mipi_dbi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mipi_dbi_driver_api.static.*))) + 0x08004acc _mipi_dbi_driver_api_list_end = . + 0x08004acc _mipi_dbi_driver_api_ext_end = . + 0x08004acc _mipi_dsi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mipi_dsi_driver_api.static.*))) + 0x08004acc _mipi_dsi_driver_api_list_end = . + 0x08004acc _mipi_dsi_driver_api_ext_end = . + 0x08004acc _mspi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._mspi_driver_api.static.*))) + 0x08004acc _mspi_driver_api_list_end = . + 0x08004acc _mspi_driver_api_ext_end = . + 0x08004acc _opamp_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._opamp_driver_api.static.*))) + 0x08004acc _opamp_driver_api_list_end = . + 0x08004acc _opamp_driver_api_ext_end = . + 0x08004acc _otp_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._otp_driver_api.static.*))) + 0x08004acc _otp_driver_api_list_end = . + 0x08004acc _otp_driver_api_ext_end = . + 0x08004acc _peci_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._peci_driver_api.static.*))) + 0x08004acc _peci_driver_api_list_end = . + 0x08004acc _peci_driver_api_ext_end = . + 0x08004acc _ps2_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ps2_driver_api.static.*))) + 0x08004acc _ps2_driver_api_list_end = . + 0x08004acc _ps2_driver_api_ext_end = . + 0x08004acc _ptp_clock_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ptp_clock_driver_api.static.*))) + 0x08004acc _ptp_clock_driver_api_list_end = . + 0x08004acc _ptp_clock_driver_api_ext_end = . + 0x08004acc _pwm_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pwm_driver_api.static.*))) + 0x08004acc _pwm_driver_api_list_end = . + 0x08004acc _pwm_driver_api_ext_end = . + 0x08004acc _regulator_parent_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._regulator_parent_driver_api.static.*))) + 0x08004acc _regulator_parent_driver_api_list_end = . + 0x08004acc _regulator_parent_driver_api_ext_end = . + 0x08004acc _regulator_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._regulator_driver_api.static.*))) + 0x08004acc _regulator_driver_api_list_end = . + 0x08004acc _regulator_driver_api_ext_end = . + 0x08004acc _reset_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._reset_driver_api.static.*))) + 0x08004acc _reset_driver_api_list_end = . + 0x08004acc _reset_driver_api_ext_end = . + 0x08004acc _retained_mem_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._retained_mem_driver_api.static.*))) + 0x08004acc _retained_mem_driver_api_list_end = . + 0x08004acc _retained_mem_driver_api_ext_end = . + 0x08004acc _rtc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._rtc_driver_api.static.*))) + 0x08004acc _rtc_driver_api_list_end = . + 0x08004acc _rtc_driver_api_ext_end = . + 0x08004acc _sdhc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sdhc_driver_api.static.*))) + 0x08004acc _sdhc_driver_api_list_end = . + 0x08004acc _sdhc_driver_api_ext_end = . + 0x08004acc _sensor_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sensor_driver_api.static.*))) + 0x08004acc _sensor_driver_api_list_end = . + 0x08004acc _sensor_driver_api_ext_end = . + 0x08004acc _smbus_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._smbus_driver_api.static.*))) + 0x08004acc _smbus_driver_api_list_end = . + 0x08004acc _smbus_driver_api_ext_end = . + 0x08004acc _spi_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._spi_driver_api.static.*))) + 0x08004acc _spi_driver_api_list_end = . + 0x08004acc _spi_driver_api_ext_end = . + 0x08004acc _syscon_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._syscon_driver_api.static.*))) + 0x08004acc _syscon_driver_api_list_end = . + 0x08004acc _syscon_driver_api_ext_end = . + 0x08004acc _tee_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tee_driver_api.static.*))) + 0x08004acc _tee_driver_api_list_end = . + 0x08004acc _tee_driver_api_ext_end = . + 0x08004acc _tgpio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tgpio_driver_api.static.*))) + 0x08004acc _tgpio_driver_api_list_end = . + 0x08004acc _tgpio_driver_api_ext_end = . + 0x08004acc _uaol_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._uaol_driver_api.static.*))) + 0x08004acc _uaol_driver_api_list_end = . + 0x08004acc _uaol_driver_api_ext_end = . + 0x08004acc _video_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._video_driver_api.static.*))) + 0x08004acc _video_driver_api_list_end = . + 0x08004acc _video_driver_api_ext_end = . + 0x08004acc _virtio_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._virtio_driver_api.static.*))) + 0x08004acc _virtio_driver_api_list_end = . + 0x08004acc _virtio_driver_api_ext_end = . + 0x08004acc _w1_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._w1_driver_api.static.*))) + 0x08004acc _w1_driver_api_list_end = . + 0x08004acc _w1_driver_api_ext_end = . + 0x08004acc _wdt_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._wdt_driver_api.static.*))) + 0x08004acc _wdt_driver_api_list_end = . + 0x08004acc _wdt_driver_api_ext_end = . + 0x08004acc _wuc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._wuc_driver_api.static.*))) + 0x08004acc _wuc_driver_api_list_end = . + 0x08004acc _wuc_driver_api_ext_end = . + 0x08004acc _can_transceiver_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._can_transceiver_driver_api.static.*))) + 0x08004acc _can_transceiver_driver_api_list_end = . + 0x08004acc _can_transceiver_driver_api_ext_end = . + 0x08004acc _i3c_target_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._i3c_target_driver_api.static.*))) + 0x08004acc _i3c_target_driver_api_list_end = . + 0x08004acc _i3c_target_driver_api_ext_end = . + 0x08004acc _its_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._its_driver_api.static.*))) + 0x08004acc _its_driver_api_list_end = . + 0x08004acc _its_driver_api_ext_end = . + 0x08004acc _vtd_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._vtd_driver_api.static.*))) + 0x08004acc _vtd_driver_api_list_end = . + 0x08004acc _vtd_driver_api_ext_end = . + 0x08004acc _renesas_elc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._renesas_elc_driver_api.static.*))) + 0x08004acc _renesas_elc_driver_api_list_end = . + 0x08004acc _renesas_elc_driver_api_ext_end = . + 0x08004acc _pcie_ctrl_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pcie_ctrl_driver_api.static.*))) + 0x08004acc _pcie_ctrl_driver_api_list_end = . + 0x08004acc _pcie_ctrl_driver_api_ext_end = . + 0x08004acc _pcie_ep_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._pcie_ep_driver_api.static.*))) + 0x08004acc _pcie_ep_driver_api_list_end = . + 0x08004acc _pcie_ep_driver_api_ext_end = . + 0x08004acc _psi5_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._psi5_driver_api.static.*))) + 0x08004acc _psi5_driver_api_list_end = . + 0x08004acc _psi5_driver_api_ext_end = . + 0x08004acc _sent_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sent_driver_api.static.*))) + 0x08004acc _sent_driver_api_list_end = . + 0x08004acc _sent_driver_api_ext_end = . + 0x08004acc _svc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._svc_driver_api.static.*))) + 0x08004acc _svc_driver_api_list_end = . + 0x08004acc _svc_driver_api_ext_end = . + 0x08004acc _stepper_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._stepper_driver_api.static.*))) + 0x08004acc _stepper_driver_api_list_end = . + 0x08004acc _stepper_driver_api_ext_end = . + 0x08004acc _stepper_ctrl_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._stepper_ctrl_driver_api.static.*))) + 0x08004acc _stepper_ctrl_driver_api_list_end = . + 0x08004acc _stepper_ctrl_driver_api_ext_end = . + 0x08004acc _uart_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._uart_driver_api.static.*))) + 0x08004acc _uart_driver_api_list_end = . + 0x08004acc _uart_driver_api_ext_end = . + 0x08004acc _bc12_emul_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bc12_emul_driver_api.static.*))) + 0x08004acc _bc12_emul_driver_api_list_end = . + 0x08004acc _bc12_emul_driver_api_ext_end = . + 0x08004acc _bc12_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bc12_driver_api.static.*))) + 0x08004acc _bc12_driver_api_list_end = . + 0x08004acc _bc12_driver_api_ext_end = . + 0x08004acc _usbc_ppc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._usbc_ppc_driver_api.static.*))) + 0x08004acc _usbc_ppc_driver_api_list_end = . + 0x08004acc _usbc_ppc_driver_api_ext_end = . + 0x08004acc _tcpc_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tcpc_driver_api.static.*))) + 0x08004acc _tcpc_driver_api_list_end = . + 0x08004acc _tcpc_driver_api_ext_end = . + 0x08004acc _usbc_vbus_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._usbc_vbus_driver_api.static.*))) + 0x08004acc _usbc_vbus_driver_api_list_end = . + 0x08004acc _usbc_vbus_driver_api_ext_end = . + 0x08004acc _ivshmem_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ivshmem_driver_api.static.*))) + 0x08004acc _ivshmem_driver_api_list_end = . + 0x08004acc _ivshmem_driver_api_ext_end = . + 0x08004acc _ethphy_driver_api_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ethphy_driver_api.static.*))) + 0x08004acc _ethphy_driver_api_list_end = . + 0x08004acc _ethphy_driver_api_ext_end = . + +ztest 0x08004acc 0x0 + 0x08004acc _ztest_expected_result_entry_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_expected_result_entry.static.*))) + 0x08004acc _ztest_expected_result_entry_list_end = . + 0x08004acc _ztest_suite_node_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_suite_node.static.*))) + 0x08004acc _ztest_suite_node_list_end = . + 0x08004acc _ztest_unit_test_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_unit_test.static.*))) + 0x08004acc _ztest_unit_test_list_end = . + 0x08004acc _ztest_test_rule_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_test_rule.static.*))) + 0x08004acc _ztest_test_rule_list_end = . + +init_array 0x08004acc 0x0 + 0x08004acc __zephyr_init_array_start = . + *(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)) + *(SORT_BY_ALIGNMENT(.init_array) SORT_BY_ALIGNMENT(.ctors)) + 0x08004acc __zephyr_init_array_end = . + 0x00000001 ASSERT ((__zephyr_init_array_start == __zephyr_init_array_end), GNU-style constructors required but STATIC_INIT_GNU not enabled) + +bt_l2cap_fixed_chan_area + 0x08004acc 0x0 + 0x08004acc _bt_l2cap_fixed_chan_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_l2cap_fixed_chan.static.*))) + 0x08004acc _bt_l2cap_fixed_chan_list_end = . + +bt_gatt_service_static_area + 0x08004acc 0x0 + 0x08004acc _bt_gatt_service_static_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_gatt_service_static.static.*))) + 0x08004acc _bt_gatt_service_static_list_end = . + +log_strings_area + 0x08004acc 0x0 + 0x08004acc _log_strings_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_strings.static.*))) + 0x08004acc _log_strings_list_end = . + +log_stmesp_ptr_area + 0x08004acc 0x0 + 0x08004acc _log_stmesp_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_stmesp_ptr.static.*))) + 0x08004acc _log_stmesp_ptr_list_end = . + +log_stmesp_str_area + 0x08004acc 0x0 + 0x08004acc _log_stmesp_str_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_stmesp_str.static.*))) + 0x08004acc _log_stmesp_str_list_end = . + +log_const_area 0x08004acc 0x8 + 0x08004acc _log_const_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_const.static.*))) + ._log_const.static.log_const_mcuboot_ + 0x08004acc 0x8 app/libapp.a(main.c.obj) + 0x08004acc log_const_mcuboot + 0x08004ad4 _log_const_list_end = . + +log_backend_area + 0x08004ad4 0x0 + 0x08004ad4 _log_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_backend.static.*))) + 0x08004ad4 _log_backend_list_end = . + +log_link_area 0x08004ad4 0x0 + 0x08004ad4 _log_link_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_link.static.*))) + 0x08004ad4 _log_link_list_end = . + +tracing_backend_area + 0x08004ad4 0x0 + 0x08004ad4 _tracing_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tracing_backend.static.*))) + 0x08004ad4 _tracing_backend_list_end = . + +zephyr_dbg_info + *(SORT_BY_ALIGNMENT(.dbg_thread_info)) + +intc_table_area + 0x08004ad4 0x0 + 0x08004ad4 _intc_table_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._intc_table.static.*))) + 0x08004ad4 _intc_table_list_end = . + +symbol_to_keep 0x08004ad4 0x0 + 0x08004ad4 __symbol_to_keep_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.symbol_to_keep*))) + 0x08004ad4 __symbol_to_keep_end = . + +shell_area 0x08004ad4 0x0 + 0x08004ad4 _shell_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell.static.*))) + 0x08004ad4 _shell_list_end = . + +shell_root_cmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_root_cmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_root_cmds.static.*))) + 0x08004ad4 _shell_root_cmds_list_end = . + +shell_subcmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_subcmds.static.*))) + 0x08004ad4 _shell_subcmds_list_end = . + +shell_dynamic_subcmds_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_dynamic_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_dynamic_subcmds.static.*))) + 0x08004ad4 _shell_dynamic_subcmds_list_end = . + +shell_remote_area + 0x08004ad4 0x0 + 0x08004ad4 _shell_remote_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_remote.static.*))) + 0x08004ad4 _shell_remote_list_end = . + +cfb_font_area 0x08004ad4 0x0 + 0x08004ad4 _cfb_font_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._cfb_font.static.*))) + 0x08004ad4 _cfb_font_list_end = . + +tdata 0x08004ad4 0x0 + *(SORT_BY_ALIGNMENT(.tdata) SORT_BY_ALIGNMENT(.tdata.*) SORT_BY_ALIGNMENT(.gnu.linkonce.td.*)) + +tbss 0x08004ad4 0x4 + *(SORT_BY_ALIGNMENT(.tbss) SORT_BY_ALIGNMENT(.tbss.*) SORT_BY_ALIGNMENT(.gnu.linkonce.tb.*) SORT_BY_ALIGNMENT(.tcommon)) + .tbss.z_tls_current + 0x08004ad4 0x4 zephyr/libzephyr.a(thread_entry.c.obj) + 0x08004ad4 z_tls_current + 0x08004ad4 PROVIDE (__tdata_start = LOADADDR (tdata)) + 0x00000001 PROVIDE (__tdata_align = ALIGNOF (tdata)) + 0x00000000 PROVIDE (__tdata_size = (((SIZEOF (tdata) + __tdata_align) - 0x1) & ~ ((__tdata_align - 0x1)))) + [!provide] PROVIDE (__tdata_end = (__tdata_start + __tdata_size)) + 0x00000004 PROVIDE (__tbss_align = ALIGNOF (tbss)) + [!provide] PROVIDE (__tbss_start = ADDR (tbss)) + 0x00000004 PROVIDE (__tbss_size = (((SIZEOF (tbss) + __tbss_align) - 0x1) & ~ ((__tbss_align - 0x1)))) + [!provide] PROVIDE (__tbss_end = (__tbss_start + __tbss_size)) + [!provide] PROVIDE (__tls_start = __tdata_start) + [!provide] PROVIDE (__tls_size = (__tbss_end - __tdata_start)) + [!provide] PROVIDE (__tls_end = __tbss_end) + +rodata 0x08004ad4 0x82c + *(SORT_BY_ALIGNMENT(.rodata)) + .rodata 0x08004ad4 0x8 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.rodata.*)) + .rodata.all_slots.0 + 0x08004adc 0x8 app/libapp.a(flash_map_extended.c.obj) + .rodata.mem_attr_region + 0x08004ae4 0x0 zephyr/libzephyr.a(mem_attr.c.obj) + .rodata.flash_map_entries + 0x08004ae4 0x4 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x08004ae4 flash_map_entries + .rodata.default_flash_map + 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.rodata.levels.0 + 0x08004c80 0x18 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.allowed_unprot_tlvs + 0x08004c98 0x1e zephyr/libzephyr.a(image_validate.c.obj) + .rodata.boot_img_magic + 0x08004cb6 0x10 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + 0x08004cb6 boot_img_magic + .rodata.main.str1.1 + 0x08004cc6 0x608 app/libapp.a(main.c.obj) + 0xc9 (size before relaxing) + .rodata.str1.1 + 0x080052ce 0x8 app/libapp.a(main.c.obj) + .rodata.flash_device_base.str1.1 + 0x080052ce 0x19 app/libapp.a(flash_map_extended.c.obj) + .rodata.boot_banner.str1.1 + 0x080052ce 0x39 zephyr/libzephyr.a(boot_banner.c.obj) + .rodata.boot_find_status.str1.1 + 0x080052ce 0x2c zephyr/libzephyr.a(bootutil_misc.c.obj) + .rodata.boot_validate_slot.isra.0.str1.1 + 0x080052ce 0x79 zephyr/libzephyr.a(loader.c.obj) + .rodata.boot_swap_image.isra.0.str1.1 + 0x080052ce 0x2f zephyr/libzephyr.a(loader.c.obj) + .rodata.context_boot_go.str1.1 + 0x080052ce 0xd5 zephyr/libzephyr.a(loader.c.obj) + .rodata.swap_read_status_bytes.str1.1 + 0x080052ce 0x23 zephyr/libzephyr.a(swap_move.c.obj) + .rodata.boot_slots_compatible.str1.1 + 0x080052ce 0xcc zephyr/libzephyr.a(swap_move.c.obj) + .rodata.swap_status_source.str1.1 + 0x080052ce 0xa4 zephyr/libzephyr.a(swap_move.c.obj) + .rodata.swap_run.str1.1 + 0x080052ce 0x89 zephyr/libzephyr.a(swap_move.c.obj) + .rodata.str1.1 + 0x080052ce 0xf zephyr/arch/arch/arm/core/mpu/libarch__arm__core__mpu.a(arm_mpu_regions.c.obj) + .rodata.abort.str1.1 + 0x080052ce 0x9 zephyr/lib/libc/common/liblib__libc__common.a(abort.c.obj) + .rodata.str1.1 + 0x080052ce 0x1e zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + .rodata.line_range_6.0 + 0x080052ce 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_5.1 + 0x080052d0 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_4.2 + 0x080052d2 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_3.3 + 0x080052d4 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_2.4 + 0x080052d6 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_1.5 + 0x080052d8 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.line_range_0.6 + 0x080052da 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + .rodata.str1.1 + 0x080052dc 0xd zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_stm32_ll_common.c.obj) + .rodata.str1.1 + 0x080052dc 0x1a zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + .rodata.AHBPrescTable + 0x080052dc 0x10 modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a(system_stm32g4xx.c.obj) + 0x080052dc AHBPrescTable + .rodata.boot_swap_type_multi.str1.1 + 0x080052ec 0xa6 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.str1.1 + 0x080052ec 0x11 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.boot_swap_tables + 0x080052ec 0x12 modules/mcuboot/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.z_cstart.str1.1 + 0x080052fe 0x5 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.__m_vfprintf.str1.1 + 0x080052fe 0x7 /nix/store/jc8rrlxa357m23f36nknc61ns5ajm114-zephyr-sdk-1.0.1/gnu/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/14.3.0/../../../../arm-zephyr-eabi/lib/thumb/v7e-m/nofp/space/libc.a(libc_tinystdio_vfmprintf.c.o) + *(SORT_BY_ALIGNMENT(.gnu.linkonce.r.*)) + 0x080053a4 . = ALIGN (0x4) + *fill* 0x080052fe 0x2 + [!provide] PROVIDE (__eh_frame_start = 0x0) + [!provide] PROVIDE (__eh_frame_end = 0x0) + [!provide] PROVIDE (__eh_frame_hdr_start = 0x0) + [!provide] PROVIDE (__eh_frame_hdr_end = 0x0) + +/DISCARD/ + *(SORT_BY_ALIGNMENT(.eh_frame)) + 0x08005300 __rodata_region_end = . + 0x08005300 . = ALIGN (_region_min_align) + 0x08008000 . = ALIGN ((0x1 << LOG2CEIL ((__rodata_region_end - ADDR (rom_start))))) + 0x08008000 __rom_region_end = ((__rom_region_start + .) - ADDR (rom_start)) + 0x00008000 __rom_region_size = (__rom_region_end - __rom_region_start) + +/DISCARD/ + *(SORT_BY_ALIGNMENT(.got.plt)) + *(SORT_BY_ALIGNMENT(.igot.plt)) + *(SORT_BY_ALIGNMENT(.got)) + *(SORT_BY_ALIGNMENT(.igot)) + 0x20000000 . = 0x20000000 + 0x20000000 . = ALIGN (_region_min_align) + 0x20000000 _image_ram_start = . + +.ramfunc 0x20000000 0x0 load address 0x08005300 + 0x20000000 __ramfunc_region_start = . + 0x20000000 . = ALIGN (_region_min_align) + 0x20000000 . = ALIGN ((0x1 << LOG2CEIL (__ramfunc_size))) + 0x20000000 __ramfunc_start = . + *(SORT_BY_ALIGNMENT(.ramfunc)) + *(SORT_BY_ALIGNMENT(.ramfunc.*)) + 0x20000000 . = ALIGN (_region_min_align) + 0x20000000 . = ALIGN ((0x1 << LOG2CEIL (__ramfunc_size))) + 0x20000000 __ramfunc_end = . + 0x00000000 __ramfunc_size = (__ramfunc_end - __ramfunc_start) + 0x08005300 __ramfunc_load_start = LOADADDR (.ramfunc) + +datas 0x20000000 0x4c load address 0x08005300 + 0x20000000 __data_region_start = . + 0x20000000 __data_start = . + *(SORT_BY_ALIGNMENT(.data)) + *(SORT_BY_ALIGNMENT(.data.*)) + .data._char_out + 0x20000000 0x4 zephyr/libzephyr.a(printk.c.obj) + .data.flash_map + 0x20000004 0x4 zephyr/libzephyr.a(flash_map_default.c.obj) + 0x20000004 flash_map + .data.FIH_NO_BOOTABLE_IMAGE + 0x20000008 0x4 zephyr/libzephyr.a(fault_injection_hardening.c.obj) + 0x20000008 FIH_NO_BOOTABLE_IMAGE + .data.FIH_FAILURE + 0x2000000c 0x4 zephyr/libzephyr.a(fault_injection_hardening.c.obj) + 0x2000000c FIH_FAILURE + .data.flash_data + 0x20000010 0x1c zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + .data.SystemCoreClock + 0x2000002c 0x4 modules/hal_stm32/stm32cube/lib..__modules__hal__stm32__stm32cube.a(system_stm32g4xx.c.obj) + 0x2000002c SystemCoreClock + .data.slice_ticks + 0x20000030 0x4 zephyr/kernel/libkernel.a(timeslicing.c.obj) + .data.timeout_list + 0x20000034 0x8 zephyr/kernel/libkernel.a(timeout.c.obj) + .data.exti_irq_table + 0x2000003c 0x10 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_gpio_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.kernel.*)) + 0x2000004c __data_end = . + 0x0000004c __data_size = (__data_end - __data_start) + 0x08005300 __data_load_start = LOADADDR (datas) + 0x08005300 __data_region_load_start = LOADADDR (datas) + +device_states 0x2000004c 0x8 load address 0x0800534c + 0x2000004c . = ALIGN (0x4) + 0x2000004c __device_states_start = . + *(SORT_BY_ALIGNMENT(.z_devstate)) + .z_devstate 0x2000004c 0x2 zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a(intc_exti_stm32.c.obj) + .z_devstate 0x2000004e 0x2 zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_stm32_ll_common.c.obj) + .z_devstate 0x20000050 0x2 zephyr/drivers/flash/libdrivers__flash.a(flash_stm32.c.obj) + *(SORT_BY_ALIGNMENT(.z_devstate.*)) + 0x20000052 __device_states_end = . + 0x20000054 . = ALIGN (0x4) + *fill* 0x20000052 0x2 + +log_mpsc_pbuf_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _log_mpsc_pbuf_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_mpsc_pbuf.static.*))) + 0x20000054 _log_mpsc_pbuf_list_end = . + +log_msg_ptr_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _log_msg_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_msg_ptr.static.*))) + 0x20000054 _log_msg_ptr_list_end = . + +log_dynamic_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _log_dynamic_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_dynamic.static.*))) + 0x20000054 _log_dynamic_list_end = . + +k_timer_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_timer_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_timer.static.*))) + 0x20000054 _k_timer_list_end = . + +k_mem_slab_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_mem_slab_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mem_slab.static.*))) + 0x20000054 _k_mem_slab_list_end = . + +k_heap_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_heap_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_heap.static.*))) + 0x20000054 _k_heap_list_end = . + +k_mutex_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_mutex_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mutex.static.*))) + 0x20000054 _k_mutex_list_end = . + +k_stack_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_stack_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_stack.static.*))) + 0x20000054 _k_stack_list_end = . + +k_msgq_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_msgq_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_msgq.static.*))) + 0x20000054 _k_msgq_list_end = . + +k_mbox_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_mbox_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mbox.static.*))) + 0x20000054 _k_mbox_list_end = . + +k_pipe_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_pipe_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_pipe.static.*))) + 0x20000054 _k_pipe_list_end = . + +k_sem_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_sem_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_sem.static.*))) + 0x20000054 _k_sem_list_end = . + +k_event_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_event_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_event.static.*))) + 0x20000054 _k_event_list_end = . + +k_queue_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_queue_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_queue.static.*))) + 0x20000054 _k_queue_list_end = . + +k_fifo_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_fifo_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_fifo.static.*))) + 0x20000054 _k_fifo_list_end = . + +k_lifo_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_lifo_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_lifo.static.*))) + 0x20000054 _k_lifo_list_end = . + +k_condvar_area 0x20000054 0x0 load address 0x08005354 + 0x20000054 _k_condvar_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_condvar.static.*))) + 0x20000054 _k_condvar_list_end = . + +sys_mem_blocks_ptr_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _sys_mem_blocks_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sys_mem_blocks_ptr.static.*))) + 0x20000054 _sys_mem_blocks_ptr_list_end = . + +net_buf_pool_area + 0x20000054 0x0 load address 0x08005354 + 0x20000054 _net_buf_pool_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._net_buf_pool.static.*))) + 0x20000054 _net_buf_pool_list_end = . + 0x20000054 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z_interrupt_stacks + .noinit.WEST_TOPDIR/zephyr/kernel/init.c.1 + 0x20001240 0x180 zephyr/kernel/libkernel.a(init.c.obj) + .noinit.WEST_TOPDIR/zephyr/kernel/init.c.0 + 0x200013c0 0x2840 zephyr/kernel/libkernel.a(init.c.obj) + 0x200013c0 z_main_stack + 0x20008000 __kernel_ram_end = 0x20008000 + 0x00007fa8 __kernel_ram_size = (__kernel_ram_end - __kernel_ram_start) + +.last_ram_section + 0x20003c00 0x0 + 0x20003c00 _image_ram_end = . + 0x00003c00 _image_ram_size = (_image_ram_end - _image_ram_start) + 0x20003c00 _end = . + 0x20003c00 z_mapped_end = . +OUTPUT(zephyr/zephyr_pre0.elf elf32-littlearm) +LOAD linker stubs diff --git a/zephyrproject/build/mcuboot/zephyr_modules.txt b/zephyrproject/build/mcuboot/zephyr_modules.txt new file mode 100644 index 0000000..5df99bf --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr_modules.txt @@ -0,0 +1,65 @@ +"acpica":"/home/jeremy/utat-dev/zephyrproject/modules/lib/acpica":"${ZEPHYR_ACPICA_CMAKE_DIR}" +"cmsis":"/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis":"${ZEPHYR_CMSIS_CMAKE_DIR}" +"cmsis-dsp":"/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-dsp":"${ZEPHYR_CMSIS_DSP_CMAKE_DIR}" +"cmsis-nn":"/home/jeremy/utat-dev/zephyrproject/modules/lib/cmsis-nn":"${ZEPHYR_CMSIS_NN_CMAKE_DIR}" +"cmsis_6":"/home/jeremy/utat-dev/zephyrproject/modules/hal/cmsis_6":"${ZEPHYR_CMSIS_6_CMAKE_DIR}" +"dhara":"/home/jeremy/utat-dev/zephyrproject/modules/lib/dhara":"${ZEPHYR_DHARA_CMAKE_DIR}" +"fatfs":"/home/jeremy/utat-dev/zephyrproject/modules/fs/fatfs":"${ZEPHYR_FATFS_CMAKE_DIR}" +"adi":"/home/jeremy/utat-dev/zephyrproject/modules/hal/adi":"/home/jeremy/utat-dev/zephyrproject/modules/hal/adi" +"hal_afbr":"/home/jeremy/utat-dev/zephyrproject/modules/hal/afbr":"${ZEPHYR_HAL_AFBR_CMAKE_DIR}" +"hal_ambiq":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq" +"atmel":"/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel":"/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel" +"hal_bouffalolab":"/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab":"${ZEPHYR_HAL_BOUFFALOLAB_CMAKE_DIR}" +"hal_espressif":"/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif":"/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/zephyr" +"hal_ethos_u":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ethos_u":"${ZEPHYR_HAL_ETHOS_U_CMAKE_DIR}" +"hal_gigadevice":"/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice":"${ZEPHYR_HAL_GIGADEVICE_CMAKE_DIR}" +"hal_infineon":"/home/jeremy/utat-dev/zephyrproject/modules/hal/infineon":"${ZEPHYR_HAL_INFINEON_CMAKE_DIR}" +"hal_intel":"/home/jeremy/utat-dev/zephyrproject/modules/hal/intel":"/home/jeremy/utat-dev/zephyrproject/modules/hal/intel/zephyr" +"microchip":"/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip":"/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip" +"hal_nordic":"/home/jeremy/utat-dev/zephyrproject/modules/hal/nordic":"${ZEPHYR_HAL_NORDIC_CMAKE_DIR}" +"nuvoton":"/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton":"/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton" +"hal_nxp":"/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp":"${ZEPHYR_HAL_NXP_CMAKE_DIR}" +"openisa":"/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa":"/home/jeremy/utat-dev/zephyrproject/modules/hal/openisa" +"quicklogic":"/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic":"/home/jeremy/utat-dev/zephyrproject/modules/hal/quicklogic" +"hal_realtek":"/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek":"${ZEPHYR_HAL_REALTEK_CMAKE_DIR}" +"hal_renesas":"/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas":"/home/jeremy/utat-dev/zephyrproject/modules/hal/renesas" +"hal_rpi_pico":"/home/jeremy/utat-dev/zephyrproject/modules/hal/rpi_pico":"${ZEPHYR_HAL_RPI_PICO_CMAKE_DIR}" +"hal_sifli":"/home/jeremy/utat-dev/zephyrproject/modules/hal/sifli":"${ZEPHYR_HAL_SIFLI_CMAKE_DIR}" +"hal_silabs":"/home/jeremy/utat-dev/zephyrproject/modules/hal/silabs":"${ZEPHYR_HAL_SILABS_CMAKE_DIR}" +"hal_st":"/home/jeremy/utat-dev/zephyrproject/modules/hal/st":"/home/jeremy/utat-dev/zephyrproject/modules/hal/st" +"hal_stm32":"/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32":"/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32" +"hal_tdk":"/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk":"/home/jeremy/utat-dev/zephyrproject/modules/hal/tdk" +"hal_telink":"/home/jeremy/utat-dev/zephyrproject/modules/hal/telink":"/home/jeremy/utat-dev/zephyrproject/modules/hal/telink" +"ti":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ti":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ti" +"hal_wch":"/home/jeremy/utat-dev/zephyrproject/modules/hal/wch":"${ZEPHYR_HAL_WCH_CMAKE_DIR}" +"hal_wurthelektronik":"/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik":"/home/jeremy/utat-dev/zephyrproject/modules/hal/wurthelektronik" +"xtensa":"/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa":"/home/jeremy/utat-dev/zephyrproject/modules/hal/xtensa" +"hostap":"/home/jeremy/utat-dev/zephyrproject/modules/lib/hostap":"${ZEPHYR_HOSTAP_CMAKE_DIR}" +"liblc3":"/home/jeremy/utat-dev/zephyrproject/modules/lib/liblc3":"${ZEPHYR_LIBLC3_CMAKE_DIR}" +"libmctp":"/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp":"/home/jeremy/utat-dev/zephyrproject/modules/lib/libmctp/zephyr" +"libmetal":"/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal":"/home/jeremy/utat-dev/zephyrproject/modules/hal/libmetal" +"libsbc":"/home/jeremy/utat-dev/zephyrproject/modules/lib/libsbc":"${ZEPHYR_LIBSBC_CMAKE_DIR}" +"littlefs":"/home/jeremy/utat-dev/zephyrproject/modules/fs/littlefs":"${ZEPHYR_LITTLEFS_CMAKE_DIR}" +"lora-basics-modem":"/home/jeremy/utat-dev/zephyrproject/modules/lib/lora-basics-modem":"${ZEPHYR_LORA_BASICS_MODEM_CMAKE_DIR}" +"loramac-node":"/home/jeremy/utat-dev/zephyrproject/modules/lib/loramac-node":"${ZEPHYR_LORAMAC_NODE_CMAKE_DIR}" +"lvgl":"/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl":"${ZEPHYR_LVGL_CMAKE_DIR}" +"mbedtls":"/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls":"${ZEPHYR_MBEDTLS_CMAKE_DIR}" +"mbedtls-3.6":"/home/jeremy/utat-dev/zephyrproject/modules/crypto/mbedtls-3.6":"" +"mcuboot":"/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot":"/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/bootutil/zephyr" +"mipi-sys-t":"/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t":"/home/jeremy/utat-dev/zephyrproject/modules/debug/mipi-sys-t" +"mldsa-native":"/home/jeremy/utat-dev/zephyrproject/modules/crypto/mldsa-native":"" +"nanopb":"/home/jeremy/utat-dev/zephyrproject/modules/lib/nanopb":"${ZEPHYR_NANOPB_CMAKE_DIR}" +"nrf_wifi":"/home/jeremy/utat-dev/zephyrproject/modules/lib/nrf_wifi":"${ZEPHYR_NRF_WIFI_CMAKE_DIR}" +"open-amp":"/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp":"/home/jeremy/utat-dev/zephyrproject/modules/lib/open-amp" +"openthread":"/home/jeremy/utat-dev/zephyrproject/modules/lib/openthread":"${ZEPHYR_OPENTHREAD_CMAKE_DIR}" +"percepio":"/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio":"${ZEPHYR_PERCEPIO_CMAKE_DIR}" +"picolibc":"/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc":"/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc" +"psa-arch-tests":"/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/psa-arch-tests":"" +"segger":"/home/jeremy/utat-dev/zephyrproject/modules/debug/segger":"${ZEPHYR_SEGGER_CMAKE_DIR}" +"tf-m-tests":"/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/tf-m-tests":"" +"tf-psa-crypto":"/home/jeremy/utat-dev/zephyrproject/modules/crypto/tf-psa-crypto":"" +"trusted-firmware-a":"/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-a/trusted-firmware-a":"${ZEPHYR_TRUSTED_FIRMWARE_A_CMAKE_DIR}" +"trusted-firmware-m":"/home/jeremy/utat-dev/zephyrproject/modules/tee/tf-m/trusted-firmware-m":"${ZEPHYR_TRUSTED_FIRMWARE_M_CMAKE_DIR}" +"uoscore-uedhoc":"/home/jeremy/utat-dev/zephyrproject/modules/lib/uoscore-uedhoc":"${ZEPHYR_UOSCORE_UEDHOC_CMAKE_DIR}" +"zcbor":"/home/jeremy/utat-dev/zephyrproject/modules/lib/zcbor":"${ZEPHYR_ZCBOR_CMAKE_DIR}" +"nrf_hw_models":"/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models":"/home/jeremy/utat-dev/zephyrproject/modules/bsim_hw_models/nrf_hw_models" diff --git a/zephyrproject/build/mcuboot/zephyr_settings.txt b/zephyrproject/build/mcuboot/zephyr_settings.txt new file mode 100644 index 0000000..4827831 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr_settings.txt @@ -0,0 +1,19 @@ +# WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! +# +# This file contains build system settings derived from your modules. +# +# Modules may be set via ZEPHYR_MODULES, ZEPHYR_EXTRA_MODULES, +# and/or the west manifest file. +# +# See the Modules guide for more information. +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/adi" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ambiq" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/atmel" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/bouffalolab" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/gigadevice" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/microchip" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/nuvoton" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/nxp" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/stm32" +"DTS_ROOT":"/home/jeremy/utat-dev/zephyrproject/modules/hal/ti" diff --git a/zephyrproject/modules/bsim_hw_models/nrf_hw_models b/zephyrproject/modules/bsim_hw_models/nrf_hw_models new file mode 160000 index 0000000..b452ce2 --- /dev/null +++ b/zephyrproject/modules/bsim_hw_models/nrf_hw_models @@ -0,0 +1 @@ +Subproject commit b452ce26db23a79fe50d7307adabfff3a75a53ad diff --git a/zephyrproject/modules/crypto/mbedtls b/zephyrproject/modules/crypto/mbedtls new file mode 160000 index 0000000..6a08a7e --- /dev/null +++ b/zephyrproject/modules/crypto/mbedtls @@ -0,0 +1 @@ +Subproject commit 6a08a7eb799853ce2a9053d24ecde31bf3a1322c diff --git a/zephyrproject/modules/crypto/mbedtls-3.6 b/zephyrproject/modules/crypto/mbedtls-3.6 new file mode 160000 index 0000000..a00e23d --- /dev/null +++ b/zephyrproject/modules/crypto/mbedtls-3.6 @@ -0,0 +1 @@ +Subproject commit a00e23de17b6b0a0de28e180cb186da6f0008836 diff --git a/zephyrproject/modules/crypto/mldsa-native b/zephyrproject/modules/crypto/mldsa-native new file mode 160000 index 0000000..3fc1998 --- /dev/null +++ b/zephyrproject/modules/crypto/mldsa-native @@ -0,0 +1 @@ +Subproject commit 3fc19982839305d305071f0de0c540bc9c9bea8a diff --git a/zephyrproject/modules/crypto/tf-psa-crypto b/zephyrproject/modules/crypto/tf-psa-crypto new file mode 160000 index 0000000..dc575a2 --- /dev/null +++ b/zephyrproject/modules/crypto/tf-psa-crypto @@ -0,0 +1 @@ +Subproject commit dc575a2ddcc8cb16275d24c42a52eaf79ebe2231 diff --git a/zephyrproject/modules/debug/mipi-sys-t b/zephyrproject/modules/debug/mipi-sys-t new file mode 160000 index 0000000..5a9d605 --- /dev/null +++ b/zephyrproject/modules/debug/mipi-sys-t @@ -0,0 +1 @@ +Subproject commit 5a9d6055b62edc54566d6d0034d9daec91749b98 diff --git a/zephyrproject/modules/debug/percepio b/zephyrproject/modules/debug/percepio new file mode 160000 index 0000000..f9159fe --- /dev/null +++ b/zephyrproject/modules/debug/percepio @@ -0,0 +1 @@ +Subproject commit f9159fe3c79578e8d90c8593e83f9862d9b8962c diff --git a/zephyrproject/modules/debug/segger b/zephyrproject/modules/debug/segger new file mode 160000 index 0000000..50892fd --- /dev/null +++ b/zephyrproject/modules/debug/segger @@ -0,0 +1 @@ +Subproject commit 50892fdbcf2f570e67baa72b8894a66b16946f72 diff --git a/zephyrproject/modules/fs/fatfs b/zephyrproject/modules/fs/fatfs new file mode 160000 index 0000000..f4ead3b --- /dev/null +++ b/zephyrproject/modules/fs/fatfs @@ -0,0 +1 @@ +Subproject commit f4ead3bf4a6dab3a07d7b5f5315795c073db568d diff --git a/zephyrproject/modules/fs/littlefs b/zephyrproject/modules/fs/littlefs new file mode 160000 index 0000000..8f5ca34 --- /dev/null +++ b/zephyrproject/modules/fs/littlefs @@ -0,0 +1 @@ +Subproject commit 8f5ca347843363882619d8f96c00d8dbd88a8e79 diff --git a/zephyrproject/modules/hal/adi b/zephyrproject/modules/hal/adi new file mode 160000 index 0000000..c8aa8d5 --- /dev/null +++ b/zephyrproject/modules/hal/adi @@ -0,0 +1 @@ +Subproject commit c8aa8d545635a5821045ab500c70b878bd55f15d diff --git a/zephyrproject/modules/hal/afbr b/zephyrproject/modules/hal/afbr new file mode 160000 index 0000000..1abf694 --- /dev/null +++ b/zephyrproject/modules/hal/afbr @@ -0,0 +1 @@ +Subproject commit 1abf6947457380934e27f92508ec5532ddedfc6d diff --git a/zephyrproject/modules/hal/ambiq b/zephyrproject/modules/hal/ambiq new file mode 160000 index 0000000..c03d2f9 --- /dev/null +++ b/zephyrproject/modules/hal/ambiq @@ -0,0 +1 @@ +Subproject commit c03d2f9902cfc3ff0d3f78ead538e9726251f7f9 diff --git a/zephyrproject/modules/hal/atmel b/zephyrproject/modules/hal/atmel new file mode 160000 index 0000000..8cd5750 --- /dev/null +++ b/zephyrproject/modules/hal/atmel @@ -0,0 +1 @@ +Subproject commit 8cd575049f04131e333558072484bfc6334c19c4 diff --git a/zephyrproject/modules/hal/bouffalolab b/zephyrproject/modules/hal/bouffalolab new file mode 160000 index 0000000..6f8ee38 --- /dev/null +++ b/zephyrproject/modules/hal/bouffalolab @@ -0,0 +1 @@ +Subproject commit 6f8ee38a67b5c4a9f0b6e395d9c363fc920182a0 diff --git a/zephyrproject/modules/hal/cmsis b/zephyrproject/modules/hal/cmsis new file mode 160000 index 0000000..512cc7e --- /dev/null +++ b/zephyrproject/modules/hal/cmsis @@ -0,0 +1 @@ +Subproject commit 512cc7e895e8491696b61f7ba8066b4a182569b8 diff --git a/zephyrproject/modules/hal/cmsis_6 b/zephyrproject/modules/hal/cmsis_6 new file mode 160000 index 0000000..b2dfbe1 --- /dev/null +++ b/zephyrproject/modules/hal/cmsis_6 @@ -0,0 +1 @@ +Subproject commit b2dfbe1a20bbd49c2d2c605073799671074bbb30 diff --git a/zephyrproject/modules/hal/espressif b/zephyrproject/modules/hal/espressif new file mode 160000 index 0000000..426ef93 --- /dev/null +++ b/zephyrproject/modules/hal/espressif @@ -0,0 +1 @@ +Subproject commit 426ef931c15ae0299cfd45c33a59424a7d9f931a diff --git a/zephyrproject/modules/hal/ethos_u b/zephyrproject/modules/hal/ethos_u new file mode 160000 index 0000000..0356707 --- /dev/null +++ b/zephyrproject/modules/hal/ethos_u @@ -0,0 +1 @@ +Subproject commit 03567073fe2b9802c0bd73f9534da6f8a03924d1 diff --git a/zephyrproject/modules/hal/gigadevice b/zephyrproject/modules/hal/gigadevice new file mode 160000 index 0000000..ee0e313 --- /dev/null +++ b/zephyrproject/modules/hal/gigadevice @@ -0,0 +1 @@ +Subproject commit ee0e31302c21b2a465dc303b3ced8c606c2167c8 diff --git a/zephyrproject/modules/hal/infineon b/zephyrproject/modules/hal/infineon new file mode 160000 index 0000000..ab7351b --- /dev/null +++ b/zephyrproject/modules/hal/infineon @@ -0,0 +1 @@ +Subproject commit ab7351b491e360329ce564e087cac6aef0bf4b08 diff --git a/zephyrproject/modules/hal/intel b/zephyrproject/modules/hal/intel new file mode 160000 index 0000000..2ddab7f --- /dev/null +++ b/zephyrproject/modules/hal/intel @@ -0,0 +1 @@ +Subproject commit 2ddab7fe5bfe85c7af8b87a490c4a0e560dc1078 diff --git a/zephyrproject/modules/hal/libmetal b/zephyrproject/modules/hal/libmetal new file mode 160000 index 0000000..c41f476 --- /dev/null +++ b/zephyrproject/modules/hal/libmetal @@ -0,0 +1 @@ +Subproject commit c41f476ba425663cadf7e456b6432e4b21591278 diff --git a/zephyrproject/modules/hal/microchip b/zephyrproject/modules/hal/microchip new file mode 160000 index 0000000..c0890ac --- /dev/null +++ b/zephyrproject/modules/hal/microchip @@ -0,0 +1 @@ +Subproject commit c0890ac01eaebdd19cb70a5475ed7b4f4ecc8911 diff --git a/zephyrproject/modules/hal/nordic b/zephyrproject/modules/hal/nordic new file mode 160000 index 0000000..3c08112 --- /dev/null +++ b/zephyrproject/modules/hal/nordic @@ -0,0 +1 @@ +Subproject commit 3c08112f3d92c81b98134479c01d3cfd40f54016 diff --git a/zephyrproject/modules/hal/nuvoton b/zephyrproject/modules/hal/nuvoton new file mode 160000 index 0000000..bed550b --- /dev/null +++ b/zephyrproject/modules/hal/nuvoton @@ -0,0 +1 @@ +Subproject commit bed550b27c00f0ee4a8086f3eeb9daf7a1aa6c32 diff --git a/zephyrproject/modules/hal/nxp b/zephyrproject/modules/hal/nxp new file mode 160000 index 0000000..8e39b38 --- /dev/null +++ b/zephyrproject/modules/hal/nxp @@ -0,0 +1 @@ +Subproject commit 8e39b38f4c13aa1f1d4a5f1033d8d9ec196bac99 diff --git a/zephyrproject/modules/hal/openisa b/zephyrproject/modules/hal/openisa new file mode 160000 index 0000000..eabd530 --- /dev/null +++ b/zephyrproject/modules/hal/openisa @@ -0,0 +1 @@ +Subproject commit eabd530a64d71de91d907bad257cd61aacf607bc diff --git a/zephyrproject/modules/hal/quicklogic b/zephyrproject/modules/hal/quicklogic new file mode 160000 index 0000000..bad8944 --- /dev/null +++ b/zephyrproject/modules/hal/quicklogic @@ -0,0 +1 @@ +Subproject commit bad894440fe72c814864798c8e3a76d13edffb6c diff --git a/zephyrproject/modules/hal/realtek b/zephyrproject/modules/hal/realtek new file mode 160000 index 0000000..428e4dd --- /dev/null +++ b/zephyrproject/modules/hal/realtek @@ -0,0 +1 @@ +Subproject commit 428e4ddd2a19560cb32ddd56cbb62bf4597edafd diff --git a/zephyrproject/modules/hal/renesas b/zephyrproject/modules/hal/renesas new file mode 160000 index 0000000..b994af0 --- /dev/null +++ b/zephyrproject/modules/hal/renesas @@ -0,0 +1 @@ +Subproject commit b994af098811b0ea02d5388efeefd0ac54f082e3 diff --git a/zephyrproject/modules/hal/rpi_pico b/zephyrproject/modules/hal/rpi_pico new file mode 160000 index 0000000..562b41e --- /dev/null +++ b/zephyrproject/modules/hal/rpi_pico @@ -0,0 +1 @@ +Subproject commit 562b41e10a1d8b1a761b253b107c5c6a84cf4535 diff --git a/zephyrproject/modules/hal/sifli b/zephyrproject/modules/hal/sifli new file mode 160000 index 0000000..86fa0e9 --- /dev/null +++ b/zephyrproject/modules/hal/sifli @@ -0,0 +1 @@ +Subproject commit 86fa0e9433fda1a760e0077c19b8407ecceea2f9 diff --git a/zephyrproject/modules/hal/silabs b/zephyrproject/modules/hal/silabs new file mode 160000 index 0000000..8b00abb --- /dev/null +++ b/zephyrproject/modules/hal/silabs @@ -0,0 +1 @@ +Subproject commit 8b00abb4b3ce7d216bb5ce6c4be7a4b6abaddf5e diff --git a/zephyrproject/modules/hal/st b/zephyrproject/modules/hal/st new file mode 160000 index 0000000..e9f0468 --- /dev/null +++ b/zephyrproject/modules/hal/st @@ -0,0 +1 @@ +Subproject commit e9f0468ade3c06d5e3961e3821543dd67c7ea7f0 diff --git a/zephyrproject/modules/hal/stm32 b/zephyrproject/modules/hal/stm32 new file mode 160000 index 0000000..ff0f1fa --- /dev/null +++ b/zephyrproject/modules/hal/stm32 @@ -0,0 +1 @@ +Subproject commit ff0f1fa5ab4e6559cfbb61d5270d38caad9ad0b0 diff --git a/zephyrproject/modules/hal/tdk b/zephyrproject/modules/hal/tdk new file mode 160000 index 0000000..fa54cb6 --- /dev/null +++ b/zephyrproject/modules/hal/tdk @@ -0,0 +1 @@ +Subproject commit fa54cb65535b0ed69564423c9e0bf4e7ee47dcb1 diff --git a/zephyrproject/modules/hal/telink b/zephyrproject/modules/hal/telink new file mode 160000 index 0000000..4226c7f --- /dev/null +++ b/zephyrproject/modules/hal/telink @@ -0,0 +1 @@ +Subproject commit 4226c7fc17d5a34e557d026d428fc766191a0800 diff --git a/zephyrproject/modules/hal/ti b/zephyrproject/modules/hal/ti new file mode 160000 index 0000000..e66677c --- /dev/null +++ b/zephyrproject/modules/hal/ti @@ -0,0 +1 @@ +Subproject commit e66677c8c8d8b5e521c744f6b9788137b41b98fc diff --git a/zephyrproject/modules/hal/wch b/zephyrproject/modules/hal/wch new file mode 160000 index 0000000..dd3855e --- /dev/null +++ b/zephyrproject/modules/hal/wch @@ -0,0 +1 @@ +Subproject commit dd3855ea624b05de7e6e95584789615d2058a0f3 diff --git a/zephyrproject/modules/hal/wurthelektronik b/zephyrproject/modules/hal/wurthelektronik new file mode 160000 index 0000000..7c1297e --- /dev/null +++ b/zephyrproject/modules/hal/wurthelektronik @@ -0,0 +1 @@ +Subproject commit 7c1297ea071d03289112eb24e789c89c7095c0a2 diff --git a/zephyrproject/modules/hal/xtensa b/zephyrproject/modules/hal/xtensa new file mode 160000 index 0000000..0495a1a --- /dev/null +++ b/zephyrproject/modules/hal/xtensa @@ -0,0 +1 @@ +Subproject commit 0495a1afd300b644d3ec8dd2c3bd11007e69a892 diff --git a/zephyrproject/modules/lib/acpica b/zephyrproject/modules/lib/acpica new file mode 160000 index 0000000..8d24867 --- /dev/null +++ b/zephyrproject/modules/lib/acpica @@ -0,0 +1 @@ +Subproject commit 8d24867bc9c9d81c81eeac59391cda59333affd4 diff --git a/zephyrproject/modules/lib/cmsis-dsp b/zephyrproject/modules/lib/cmsis-dsp new file mode 160000 index 0000000..9751261 --- /dev/null +++ b/zephyrproject/modules/lib/cmsis-dsp @@ -0,0 +1 @@ +Subproject commit 97512610ec92058f0119450b9e743eeb7e95b5c8 diff --git a/zephyrproject/modules/lib/cmsis-nn b/zephyrproject/modules/lib/cmsis-nn new file mode 160000 index 0000000..d20117c --- /dev/null +++ b/zephyrproject/modules/lib/cmsis-nn @@ -0,0 +1 @@ +Subproject commit d20117c9e88cf9018d6fa06744dddac700c3e3a1 diff --git a/zephyrproject/modules/lib/dhara b/zephyrproject/modules/lib/dhara new file mode 160000 index 0000000..6f163ca --- /dev/null +++ b/zephyrproject/modules/lib/dhara @@ -0,0 +1 @@ +Subproject commit 6f163ca05e174b168b4d148160b50eeaeeb561fc diff --git a/zephyrproject/modules/lib/gui/lvgl b/zephyrproject/modules/lib/gui/lvgl new file mode 160000 index 0000000..85aa60d --- /dev/null +++ b/zephyrproject/modules/lib/gui/lvgl @@ -0,0 +1 @@ +Subproject commit 85aa60d18b3d5e5588d7b247abf90198f07c8a63 diff --git a/zephyrproject/modules/lib/hostap b/zephyrproject/modules/lib/hostap new file mode 160000 index 0000000..cffaf39 --- /dev/null +++ b/zephyrproject/modules/lib/hostap @@ -0,0 +1 @@ +Subproject commit cffaf3935fa0233580765934f4784ec28c20a77b diff --git a/zephyrproject/modules/lib/liblc3 b/zephyrproject/modules/lib/liblc3 new file mode 160000 index 0000000..48bbd3e --- /dev/null +++ b/zephyrproject/modules/lib/liblc3 @@ -0,0 +1 @@ +Subproject commit 48bbd3eacd36e99a57317a0a4867002e0b09e183 diff --git a/zephyrproject/modules/lib/libmctp b/zephyrproject/modules/lib/libmctp new file mode 160000 index 0000000..782a9da --- /dev/null +++ b/zephyrproject/modules/lib/libmctp @@ -0,0 +1 @@ +Subproject commit 782a9da666b6e7703b28dee65499a8f1f456f2b5 diff --git a/zephyrproject/modules/lib/libsbc b/zephyrproject/modules/lib/libsbc new file mode 160000 index 0000000..8e1beda --- /dev/null +++ b/zephyrproject/modules/lib/libsbc @@ -0,0 +1 @@ +Subproject commit 8e1beda02acb8972e29e6edbb423f7cafe16e445 diff --git a/zephyrproject/modules/lib/lora-basics-modem b/zephyrproject/modules/lib/lora-basics-modem new file mode 160000 index 0000000..a8ddc54 --- /dev/null +++ b/zephyrproject/modules/lib/lora-basics-modem @@ -0,0 +1 @@ +Subproject commit a8ddc544043e72807cf7db532478e1dda734ae7c diff --git a/zephyrproject/modules/lib/loramac-node b/zephyrproject/modules/lib/loramac-node new file mode 160000 index 0000000..fb00b38 --- /dev/null +++ b/zephyrproject/modules/lib/loramac-node @@ -0,0 +1 @@ +Subproject commit fb00b383072518c918e2258b0916c996f2d4eebe diff --git a/zephyrproject/modules/lib/nanopb b/zephyrproject/modules/lib/nanopb new file mode 160000 index 0000000..5499fd4 --- /dev/null +++ b/zephyrproject/modules/lib/nanopb @@ -0,0 +1 @@ +Subproject commit 5499fd4c9a478f8139eeb07a82c3b4468d6067f7 diff --git a/zephyrproject/modules/lib/nrf_wifi b/zephyrproject/modules/lib/nrf_wifi new file mode 160000 index 0000000..47bd5b4 --- /dev/null +++ b/zephyrproject/modules/lib/nrf_wifi @@ -0,0 +1 @@ +Subproject commit 47bd5b4ebd357ba637be0f2b092e1c0d370eea2f diff --git a/zephyrproject/modules/lib/open-amp b/zephyrproject/modules/lib/open-amp new file mode 160000 index 0000000..01032a8 --- /dev/null +++ b/zephyrproject/modules/lib/open-amp @@ -0,0 +1 @@ +Subproject commit 01032a8a7bdfdd541686f5dfa3671e602b9fcbff diff --git a/zephyrproject/modules/lib/openthread b/zephyrproject/modules/lib/openthread new file mode 160000 index 0000000..e4d9768 --- /dev/null +++ b/zephyrproject/modules/lib/openthread @@ -0,0 +1 @@ +Subproject commit e4d97681c53ec1cc34af1404ad2960adda4ba691 diff --git a/zephyrproject/modules/lib/picolibc b/zephyrproject/modules/lib/picolibc new file mode 160000 index 0000000..0125493 --- /dev/null +++ b/zephyrproject/modules/lib/picolibc @@ -0,0 +1 @@ +Subproject commit 01254932e8e81085817ed61fd858648584ffe37c diff --git a/zephyrproject/modules/lib/uoscore-uedhoc b/zephyrproject/modules/lib/uoscore-uedhoc new file mode 160000 index 0000000..dc0ab63 --- /dev/null +++ b/zephyrproject/modules/lib/uoscore-uedhoc @@ -0,0 +1 @@ +Subproject commit dc0ab6345450668de3f9597320a48c5a2d409bb6 diff --git a/zephyrproject/modules/lib/zcbor b/zephyrproject/modules/lib/zcbor new file mode 160000 index 0000000..9164bd1 --- /dev/null +++ b/zephyrproject/modules/lib/zcbor @@ -0,0 +1 @@ +Subproject commit 9164bd18dcd88ff9d9ef98279501fc1093571017 diff --git a/zephyrproject/modules/tee/tf-a/trusted-firmware-a b/zephyrproject/modules/tee/tf-a/trusted-firmware-a new file mode 160000 index 0000000..4aef38a --- /dev/null +++ b/zephyrproject/modules/tee/tf-a/trusted-firmware-a @@ -0,0 +1 @@ +Subproject commit 4aef38a5bf03edfa615c1f8af5a49e7065f9fb3f diff --git a/zephyrproject/modules/tee/tf-m/psa-arch-tests b/zephyrproject/modules/tee/tf-m/psa-arch-tests new file mode 160000 index 0000000..6e82192 --- /dev/null +++ b/zephyrproject/modules/tee/tf-m/psa-arch-tests @@ -0,0 +1 @@ +Subproject commit 6e8219237435112df33bbcf37b7f5657fcfb9cff diff --git a/zephyrproject/modules/tee/tf-m/tf-m-tests b/zephyrproject/modules/tee/tf-m/tf-m-tests new file mode 160000 index 0000000..42f0fb9 --- /dev/null +++ b/zephyrproject/modules/tee/tf-m/tf-m-tests @@ -0,0 +1 @@ +Subproject commit 42f0fb9250acdd62219a13b8d272072f94446b84 diff --git a/zephyrproject/modules/tee/tf-m/trusted-firmware-m b/zephyrproject/modules/tee/tf-m/trusted-firmware-m new file mode 160000 index 0000000..9a4cb1a --- /dev/null +++ b/zephyrproject/modules/tee/tf-m/trusted-firmware-m @@ -0,0 +1 @@ +Subproject commit 9a4cb1a280b63a5e66bd469e82eb75f2b3e05a78 diff --git a/zephyrproject/tools/edtt b/zephyrproject/tools/edtt new file mode 160000 index 0000000..c282625 --- /dev/null +++ b/zephyrproject/tools/edtt @@ -0,0 +1 @@ +Subproject commit c282625e694f0b53ea53e13231ea6d2f49411768 diff --git a/zephyrproject/tools/net-tools b/zephyrproject/tools/net-tools new file mode 160000 index 0000000..c3431f4 --- /dev/null +++ b/zephyrproject/tools/net-tools @@ -0,0 +1 @@ +Subproject commit c3431f482ea8a7b570fa4573aa5d35875b7f2a23 diff --git a/zephyrproject/zephyr b/zephyrproject/zephyr new file mode 160000 index 0000000..4424aa6 --- /dev/null +++ b/zephyrproject/zephyr @@ -0,0 +1 @@ +Subproject commit 4424aa681e0b80e9cbd0ae27a987d582be88cb74

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new file mode 100644 index 0000000..6d57923 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/edt.pickle.cmake @@ -0,0 +1,2175 @@ +set_target_properties(${DEVICETREE_TARGET} + PROPERTIES + "DT_CHOSEN|zephyr,crc" "/soc/crc@40023000" + "DT_CHOSEN|zephyr,entropy" "/soc/rng@50060800" + "DT_CHOSEN|zephyr,flash-controller" "/soc/flash-controller@40022000" + "DT_CHOSEN|zephyr,console" "/soc/serial@40008000" + "DT_CHOSEN|zephyr,shell-uart" "/soc/serial@40008000" + "DT_CHOSEN|zephyr,sram" "/memory@20000000" + "DT_CHOSEN|zephyr,flash" "/soc/flash-controller@40022000/flash@8000000" + "DT_CHOSEN|zephyr,code-partition" "/soc/flash-controller@40022000/flash@8000000/partitions/partition@0" + "DT_ALIAS|watchdog0" "/soc/watchdog@40003000" + "DT_ALIAS|led0" "/leds/led_0" + "DT_ALIAS|mcuboot-led0" "/leds/led_0" + "DT_ALIAS|pwm-led0" "/pwmleds/green_pwm_led" + "DT_ALIAS|sw0" "/gpio_keys/button" + "DT_NODE|/" TRUE + "DT_PROP|/|compatible" "st,stm32g431rb-nucleo" + "DT_REG|/|NUM" "0" + "DT_REG|/|ADDR" "" + "DT_REG|/|SIZE" "" + "DT_UNIT_ADDR|/" "NONE" + "DT_NODE|/chosen" TRUE + "DT_REG|/chosen|NUM" "0" + "DT_REG|/chosen|ADDR" "" + "DT_REG|/chosen|SIZE" "" + "DT_UNIT_ADDR|/chosen" "NONE" + "DT_NODE|/aliases" TRUE + "DT_REG|/aliases|NUM" "0" + "DT_REG|/aliases|ADDR" "" + "DT_REG|/aliases|SIZE" "" + "DT_UNIT_ADDR|/aliases" "NONE" + "DT_NODE|/soc" TRUE + "DT_PROP|/soc|ranges" "None" + "DT_PROP|/soc|compatible" "st,stm32g431;st,stm32g4;simple-bus" + "DT_REG|/soc|NUM" "0" + "DT_REG|/soc|ADDR" "" + "DT_REG|/soc|SIZE" "" + "DT_UNIT_ADDR|/soc" "NONE" + "DT_NODE|/soc/interrupt-controller@e000e100" TRUE + "DT_NODELABEL|nvic" "/soc/interrupt-controller@e000e100" + "DT_PROP|/soc/interrupt-controller@e000e100|reg" "3758153984;3072" + "DT_PROP|/soc/interrupt-controller@e000e100|arm,num-irq-priority-bits" "4" + "DT_PROP|/soc/interrupt-controller@e000e100|interrupt-controller" "True" + "DT_PROP|/soc/interrupt-controller@e000e100|compatible" "arm,v7m-nvic" + "DT_PROP|/soc/interrupt-controller@e000e100|dma-coherent" "False" + "DT_PROP|/soc/interrupt-controller@e000e100|zephyr,deferred-init" "False" + "DT_PROP|/soc/interrupt-controller@e000e100|wakeup-source" "False" + "DT_PROP|/soc/interrupt-controller@e000e100|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/interrupt-controller@e000e100|NUM" "1" + "DT_REG|/soc/interrupt-controller@e000e100|ADDR" "0xe000e100" + "DT_REG|/soc/interrupt-controller@e000e100|SIZE" "0xc00" + "DT_UNIT_ADDR|/soc/interrupt-controller@e000e100" "0xe000e100" + "DT_NODE|/soc/timer@e000e010" TRUE + "DT_NODELABEL|systick" "/soc/timer@e000e010" + "DT_PROP|/soc/timer@e000e010|reg" "3758153744;16" + "DT_PROP|/soc/timer@e000e010|external-clock-source" "False" + "DT_PROP|/soc/timer@e000e010|compatible" "arm,armv7m-systick" + "DT_PROP|/soc/timer@e000e010|dma-coherent" "False" + "DT_PROP|/soc/timer@e000e010|zephyr,deferred-init" "False" + "DT_PROP|/soc/timer@e000e010|wakeup-source" "False" + "DT_PROP|/soc/timer@e000e010|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timer@e000e010|NUM" "1" + "DT_REG|/soc/timer@e000e010|ADDR" "0xe000e010" + "DT_REG|/soc/timer@e000e010|SIZE" "0x10" + "DT_UNIT_ADDR|/soc/timer@e000e010" "0xe000e010" + "DT_NODE|/soc/adc@50000000" TRUE + "DT_NODELABEL|adc1" "/soc/adc@50000000" + "DT_PROP|/soc/adc@50000000|reg" "1342177280;256" + "DT_PROP|/soc/adc@50000000|clock-names" "adcx" + "DT_PROP|/soc/adc@50000000|interrupts" "18;0" + "DT_PROP|/soc/adc@50000000|vref-mv" "3300" + "DT_PROP|/soc/adc@50000000|st,adc-resolutions" "12;10;8;6" + "DT_PROP|/soc/adc@50000000|sampling-times" "3;7;13;25;48;93;248;641" + "DT_PROP|/soc/adc@50000000|st,adc-sequencer" "programmable" + "DT_PROP|/soc/adc@50000000|st,adc-oversampler" "minimal" + "DT_PROP|/soc/adc@50000000|st,adc-internal-regulator" "startup-sw-delay" + "DT_PROP|/soc/adc@50000000|st,adc-has-deep-powerdown" "True" + "DT_PROP|/soc/adc@50000000|st,adc-has-channel-preselection" "False" + "DT_PROP|/soc/adc@50000000|st,adc-has-differential-support" "True" + "DT_PROP|/soc/adc@50000000|st,adc-has-injected-support" "True" + "DT_PROP|/soc/adc@50000000|status" "disabled" + "DT_PROP|/soc/adc@50000000|compatible" "st,stm32-adc" + "DT_PROP|/soc/adc@50000000|dma-coherent" "False" + "DT_PROP|/soc/adc@50000000|zephyr,deferred-init" "False" + "DT_PROP|/soc/adc@50000000|wakeup-source" "False" + "DT_PROP|/soc/adc@50000000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/adc@50000000|NUM" "1" + "DT_REG|/soc/adc@50000000|ADDR" "0x50000000" + "DT_REG|/soc/adc@50000000|SIZE" "0x100" + "DT_UNIT_ADDR|/soc/adc@50000000" "0x50000000" + "DT_NODE|/soc/adc@50000100" TRUE + "DT_NODELABEL|adc2" "/soc/adc@50000100" + "DT_PROP|/soc/adc@50000100|reg" "1342177536;256" + "DT_PROP|/soc/adc@50000100|clock-names" "adcx" + "DT_PROP|/soc/adc@50000100|interrupts" "18;0" + "DT_PROP|/soc/adc@50000100|vref-mv" "3300" + "DT_PROP|/soc/adc@50000100|st,adc-resolutions" "12;10;8;6" + "DT_PROP|/soc/adc@50000100|sampling-times" "3;7;13;25;48;93;248;641" + "DT_PROP|/soc/adc@50000100|st,adc-sequencer" "programmable" + "DT_PROP|/soc/adc@50000100|st,adc-oversampler" "minimal" + "DT_PROP|/soc/adc@50000100|st,adc-internal-regulator" "startup-sw-delay" + "DT_PROP|/soc/adc@50000100|st,adc-has-deep-powerdown" "True" + "DT_PROP|/soc/adc@50000100|st,adc-has-channel-preselection" "False" + "DT_PROP|/soc/adc@50000100|st,adc-has-differential-support" "True" + "DT_PROP|/soc/adc@50000100|st,adc-has-injected-support" "True" + "DT_PROP|/soc/adc@50000100|status" "disabled" + "DT_PROP|/soc/adc@50000100|compatible" "st,stm32-adc" + "DT_PROP|/soc/adc@50000100|dma-coherent" "False" + "DT_PROP|/soc/adc@50000100|zephyr,deferred-init" "False" + "DT_PROP|/soc/adc@50000100|wakeup-source" "False" + "DT_PROP|/soc/adc@50000100|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/adc@50000100|NUM" "1" + "DT_REG|/soc/adc@50000100|ADDR" "0x50000100" + "DT_REG|/soc/adc@50000100|SIZE" "0x100" + "DT_UNIT_ADDR|/soc/adc@50000100" "0x50000100" + "DT_NODE|/soc/dac@50000800" TRUE + "DT_NODELABEL|dac1" "/soc/dac@50000800" + "DT_PROP|/soc/dac@50000800|reg" "1342179328;1024" + "DT_PROP|/soc/dac@50000800|status" "okay" + "DT_PROP|/soc/dac@50000800|compatible" "st,stm32-dac" + "DT_PROP|/soc/dac@50000800|dma-coherent" "False" + "DT_PROP|/soc/dac@50000800|zephyr,deferred-init" "False" + "DT_PROP|/soc/dac@50000800|wakeup-source" "False" + "DT_PROP|/soc/dac@50000800|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/dac@50000800|pinctrl-0" "/soc/pin-controller@48000000/dac1_out1_pa4" + "DT_PROP|/soc/dac@50000800|pinctrl-names" "default" + "DT_REG|/soc/dac@50000800|NUM" "1" + "DT_REG|/soc/dac@50000800|ADDR" "0x50000800" + "DT_REG|/soc/dac@50000800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/dac@50000800" "0x50000800" + "DT_NODE|/soc/dac@50001000" TRUE + "DT_NODELABEL|dac3" "/soc/dac@50001000" + "DT_PROP|/soc/dac@50001000|reg" "1342181376;1024" + "DT_PROP|/soc/dac@50001000|status" "disabled" + "DT_PROP|/soc/dac@50001000|compatible" "st,stm32-dac" + "DT_PROP|/soc/dac@50001000|dma-coherent" "False" + "DT_PROP|/soc/dac@50001000|zephyr,deferred-init" "False" + "DT_PROP|/soc/dac@50001000|wakeup-source" "False" + "DT_PROP|/soc/dac@50001000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/dac@50001000|NUM" "1" + "DT_REG|/soc/dac@50001000|ADDR" "0x50001000" + "DT_REG|/soc/dac@50001000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/dac@50001000" "0x50001000" + "DT_NODE|/soc/flash-controller@40022000" TRUE + "DT_NODELABEL|flash" "/soc/flash-controller@40022000" + "DT_PROP|/soc/flash-controller@40022000|st,rdp1-enable-byte" "85" + "DT_PROP|/soc/flash-controller@40022000|reg" "1073881088;1024" + "DT_PROP|/soc/flash-controller@40022000|compatible" "st,stm32-flash-controller;st,stm32g4-flash-controller" + "DT_PROP|/soc/flash-controller@40022000|interrupts" "3;0" + "DT_PROP|/soc/flash-controller@40022000|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000|NUM" "1" + "DT_REG|/soc/flash-controller@40022000|ADDR" "0x40022000" + "DT_REG|/soc/flash-controller@40022000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/flash-controller@40022000" "0x40022000" + "DT_NODE|/soc/flash-controller@40022000/flash@8000000" TRUE + "DT_NODELABEL|flash0" "/soc/flash-controller@40022000/flash@8000000" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|max-erase-time" "25" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|erase-block-size" "2048" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|write-block-size" "8" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|compatible" "st,stm32-nv-flash;soc-nv-flash" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|reg" "134217728;131072" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@8000000|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@8000000|ADDR" "0x8000000" + "DT_REG|/soc/flash-controller@40022000/flash@8000000|SIZE" "0x20000" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@8000000" "0x8000000" + "DT_NODE|/soc/flash-controller@40022000/flash@8000000/partitions" TRUE + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions|ranges" "None" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions|NUM" "0" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions|ADDR" "" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions|SIZE" "" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@8000000/partitions" "NONE" + "DT_NODE|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0" TRUE + "DT_NODELABEL|boot_partition" "/soc/flash-controller@40022000/flash@8000000/partitions/partition@0" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|label" "mcuboot" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|read-only" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|reg" "0;34816" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|compatible" "zephyr,mapped-partition" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|ADDR" "0x8000000" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0|SIZE" "0x8800" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@8000000/partitions/partition@0" "0x8000000" + "DT_NODE|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800" TRUE + "DT_NODELABEL|slot0_partition" "/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|label" "image-0" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|read-only" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|reg" "34816;49152" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|compatible" "zephyr,mapped-partition" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|ADDR" "0x8008800" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800|SIZE" "0xc000" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800" "0x8008800" + "DT_NODE|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800" TRUE + "DT_NODELABEL|slot1_partition" "/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|label" "image-1" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|read-only" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|reg" "83968;43008" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|compatible" "zephyr,mapped-partition" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|ADDR" "0x8014800" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800|SIZE" "0xa800" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800" "0x8014800" + "DT_NODE|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000" TRUE + "DT_NODELABEL|storage_partition" "/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|label" "storage" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|read-only" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|reg" "126976;4096" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|compatible" "zephyr,mapped-partition" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|ADDR" "0x801f000" + "DT_REG|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000|SIZE" "0x1000" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000" "0x801f000" + "DT_NODE|/soc/flash-controller@40022000/flash@1fff7000" TRUE + "DT_NODELABEL|st_nvm_user_otp" "/soc/flash-controller@40022000/flash@1fff7000" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|reg" "536834048;1024" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|status" "disabled" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|compatible" "st,stm32-nvm-otp" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7000|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7000|ADDR" "0x1fff7000" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@1fff7000" "0x1fff7000" + "DT_NODE|/soc/flash-controller@40022000/flash@1fff7500" TRUE + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500|reg" "536835328;768" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500|compatible" "st,stm32-nvm-otp" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500|dma-coherent" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500|zephyr,deferred-init" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500|wakeup-source" "False" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500|ADDR" "0x1fff7500" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500|SIZE" "0x300" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@1fff7500" "0x1fff7500" + "DT_NODE|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout" TRUE + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout|compatible" "fixed-layout" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout|NUM" "0" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout|ADDR" "" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout|SIZE" "" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout" "NONE" + "DT_NODE|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8" TRUE + "DT_NODELABEL|ts_cal1_otp" "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8|reg" "168;2" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8|read-only" "True" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8|ADDR" "0xa8" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8|SIZE" "0x2" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8" "0xa8" + "DT_NODE|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa" TRUE + "DT_NODELABEL|vrefint_otp" "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa|reg" "170;2" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa|read-only" "True" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa|ADDR" "0xaa" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa|SIZE" "0x2" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa" "0xaa" + "DT_NODE|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca" TRUE + "DT_NODELABEL|ts_cal2_otp" "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca|reg" "202;2" + "DT_PROP|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca|read-only" "True" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca|NUM" "1" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca|ADDR" "0xca" + "DT_REG|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca|SIZE" "0x2" + "DT_UNIT_ADDR|/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca" "0xca" + "DT_NODE|/soc/rcc@40021000" TRUE + "DT_NODELABEL|rcc" "/soc/rcc@40021000" + "DT_PROP|/soc/rcc@40021000|reg" "1073876992;1024" + "DT_PROP|/soc/rcc@40021000|clock-frequency" "170000000" + "DT_PROP|/soc/rcc@40021000|ahb-prescaler" "1" + "DT_PROP|/soc/rcc@40021000|apb1-prescaler" "1" + "DT_PROP|/soc/rcc@40021000|apb2-prescaler" "1" + "DT_PROP|/soc/rcc@40021000|undershoot-prevention" "True" + "DT_PROP|/soc/rcc@40021000|compatible" "st,stm32-rcc" + "DT_PROP|/soc/rcc@40021000|dma-coherent" "False" + "DT_PROP|/soc/rcc@40021000|zephyr,deferred-init" "False" + "DT_PROP|/soc/rcc@40021000|wakeup-source" "False" + "DT_PROP|/soc/rcc@40021000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/rcc@40021000|NUM" "1" + "DT_REG|/soc/rcc@40021000|ADDR" "0x40021000" + "DT_REG|/soc/rcc@40021000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/rcc@40021000" "0x40021000" + "DT_NODE|/soc/rcc@40021000/reset-controller" TRUE + "DT_NODELABEL|rctl" "/soc/rcc@40021000/reset-controller" + "DT_PROP|/soc/rcc@40021000/reset-controller|set-bit-to-deassert" "False" + "DT_PROP|/soc/rcc@40021000/reset-controller|compatible" "st,stm32-rcc-rctl" + "DT_PROP|/soc/rcc@40021000/reset-controller|dma-coherent" "False" + "DT_PROP|/soc/rcc@40021000/reset-controller|zephyr,deferred-init" "False" + "DT_PROP|/soc/rcc@40021000/reset-controller|wakeup-source" "False" + "DT_PROP|/soc/rcc@40021000/reset-controller|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/rcc@40021000/reset-controller|NUM" "0" + "DT_REG|/soc/rcc@40021000/reset-controller|ADDR" "" + "DT_REG|/soc/rcc@40021000/reset-controller|SIZE" "" + "DT_UNIT_ADDR|/soc/rcc@40021000/reset-controller" "NONE" + "DT_NODE|/soc/interrupt-controller@40010400" TRUE + "DT_NODELABEL|exti" "/soc/interrupt-controller@40010400" + "DT_PROP|/soc/interrupt-controller@40010400|reg" "1073808384;1024" + "DT_PROP|/soc/interrupt-controller@40010400|interrupts" "6;0;7;0;8;0;9;0;10;0;23;0;40;0" + "DT_PROP|/soc/interrupt-controller@40010400|interrupt-names" "line0;line1;line2-TSC;line3;line4;line5-9;line10-15" + "DT_PROP|/soc/interrupt-controller@40010400|num-lines" "64" + "DT_PROP|/soc/interrupt-controller@40010400|num-gpio-lines" "16" + "DT_PROP|/soc/interrupt-controller@40010400|line-ranges" "0;1;1;1;2;1;3;1;4;1;5;5;10;6" + "DT_PROP|/soc/interrupt-controller@40010400|compatible" "st,stm32-exti" + "DT_PROP|/soc/interrupt-controller@40010400|dma-coherent" "False" + "DT_PROP|/soc/interrupt-controller@40010400|zephyr,deferred-init" "False" + "DT_PROP|/soc/interrupt-controller@40010400|wakeup-source" "False" + "DT_PROP|/soc/interrupt-controller@40010400|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/interrupt-controller@40010400|interrupt-controller" "True" + "DT_REG|/soc/interrupt-controller@40010400|NUM" "1" + "DT_REG|/soc/interrupt-controller@40010400|ADDR" "0x40010400" + "DT_REG|/soc/interrupt-controller@40010400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/interrupt-controller@40010400" "0x40010400" + "DT_NODE|/soc/pin-controller@48000000" TRUE + "DT_NODELABEL|pinctrl" "/soc/pin-controller@48000000" + "DT_PROP|/soc/pin-controller@48000000|reg" "1207959552;8192" + "DT_PROP|/soc/pin-controller@48000000|remap-pa11" "False" + "DT_PROP|/soc/pin-controller@48000000|remap-pa12" "False" + "DT_PROP|/soc/pin-controller@48000000|remap-pa11-pa12" "False" + "DT_PROP|/soc/pin-controller@48000000|compatible" "st,stm32-pinctrl" + "DT_PROP|/soc/pin-controller@48000000|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000|NUM" "1" + "DT_REG|/soc/pin-controller@48000000|ADDR" "0x48000000" + "DT_REG|/soc/pin-controller@48000000|SIZE" "0x2000" + "DT_UNIT_ADDR|/soc/pin-controller@48000000" "0x48000000" + "DT_NODE|/soc/pin-controller@48000000/gpio@48000000" TRUE + "DT_NODELABEL|gpioa" "/soc/pin-controller@48000000/gpio@48000000" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|reg" "1207959552;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48000000|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48000000|ADDR" "0x48000000" + "DT_REG|/soc/pin-controller@48000000/gpio@48000000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48000000" "0x48000000" + "DT_NODE|/soc/pin-controller@48000000/gpio@48000400" TRUE + "DT_NODELABEL|gpiob" "/soc/pin-controller@48000000/gpio@48000400" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|reg" "1207960576;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000400|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48000400|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48000400|ADDR" "0x48000400" + "DT_REG|/soc/pin-controller@48000000/gpio@48000400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48000400" "0x48000400" + "DT_NODE|/soc/pin-controller@48000000/gpio@48000800" TRUE + "DT_NODELABEL|gpioc" "/soc/pin-controller@48000000/gpio@48000800" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|reg" "1207961600;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48000800|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48000800|ADDR" "0x48000800" + "DT_REG|/soc/pin-controller@48000000/gpio@48000800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48000800" "0x48000800" + "DT_NODE|/soc/pin-controller@48000000/gpio@48000c00" TRUE + "DT_NODELABEL|gpiod" "/soc/pin-controller@48000000/gpio@48000c00" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|reg" "1207962624;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48000c00|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48000c00|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48000c00|ADDR" "0x48000c00" + "DT_REG|/soc/pin-controller@48000000/gpio@48000c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48000c00" "0x48000c00" + "DT_NODE|/soc/pin-controller@48000000/gpio@48001000" TRUE + "DT_NODELABEL|gpioe" "/soc/pin-controller@48000000/gpio@48001000" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|reg" "1207963648;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48001000|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48001000|ADDR" "0x48001000" + "DT_REG|/soc/pin-controller@48000000/gpio@48001000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48001000" "0x48001000" + "DT_NODE|/soc/pin-controller@48000000/gpio@48001400" TRUE + "DT_NODELABEL|gpiof" "/soc/pin-controller@48000000/gpio@48001400" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|reg" "1207964672;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001400|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48001400|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48001400|ADDR" "0x48001400" + "DT_REG|/soc/pin-controller@48000000/gpio@48001400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48001400" "0x48001400" + "DT_NODE|/soc/pin-controller@48000000/gpio@48001800" TRUE + "DT_NODELABEL|gpiog" "/soc/pin-controller@48000000/gpio@48001800" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|reg" "1207965696;1024" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|ngpios" "16" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|gpio-controller" "True" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|compatible" "st,stm32-gpio" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|dma-coherent" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|zephyr,deferred-init" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|wakeup-source" "False" + "DT_PROP|/soc/pin-controller@48000000/gpio@48001800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/pin-controller@48000000/gpio@48001800|NUM" "1" + "DT_REG|/soc/pin-controller@48000000/gpio@48001800|ADDR" "0x48001800" + "DT_REG|/soc/pin-controller@48000000/gpio@48001800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/gpio@48001800" "0x48001800" + "DT_NODE|/soc/pin-controller@48000000/dac1_out1_pa4" TRUE + "DT_NODELABEL|dac1_out1_pa4" "/soc/pin-controller@48000000/dac1_out1_pa4" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|pinmux" "144" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/dac1_out1_pa4|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/dac1_out1_pa4|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/dac1_out1_pa4|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/dac1_out1_pa4|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/dac1_out1_pa4" "NONE" + "DT_NODE|/soc/pin-controller@48000000/i2c1_scl_pb8" TRUE + "DT_NODELABEL|i2c1_scl_pb8" "/soc/pin-controller@48000000/i2c1_scl_pb8" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|pinmux" "772" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|bias-pull-up" "True" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|drive-open-drain" "True" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_scl_pb8|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/i2c1_scl_pb8|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/i2c1_scl_pb8|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/i2c1_scl_pb8|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/i2c1_scl_pb8" "NONE" + "DT_NODE|/soc/pin-controller@48000000/i2c1_sda_pb9" TRUE + "DT_NODELABEL|i2c1_sda_pb9" "/soc/pin-controller@48000000/i2c1_sda_pb9" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|pinmux" "804" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|bias-pull-up" "True" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|drive-open-drain" "True" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/i2c1_sda_pb9|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/i2c1_sda_pb9|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/i2c1_sda_pb9|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/i2c1_sda_pb9|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/i2c1_sda_pb9" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi1_miso_pa6" TRUE + "DT_NODELABEL|spi1_miso_pa6" "/soc/pin-controller@48000000/spi1_miso_pa6" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|pinmux" "197" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_miso_pa6|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi1_miso_pa6|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi1_miso_pa6|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi1_miso_pa6|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi1_miso_pa6" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi2_miso_pb14" TRUE + "DT_NODELABEL|spi2_miso_pb14" "/soc/pin-controller@48000000/spi2_miso_pb14" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|pinmux" "965" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_miso_pb14|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi2_miso_pb14|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi2_miso_pb14|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi2_miso_pb14|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi2_miso_pb14" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi3_miso_pc11" TRUE + "DT_NODELABEL|spi3_miso_pc11" "/soc/pin-controller@48000000/spi3_miso_pc11" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|pinmux" "1382" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_miso_pc11|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi3_miso_pc11|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi3_miso_pc11|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi3_miso_pc11|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi3_miso_pc11" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi1_mosi_pa7" TRUE + "DT_NODELABEL|spi1_mosi_pa7" "/soc/pin-controller@48000000/spi1_mosi_pa7" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|pinmux" "229" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_mosi_pa7|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi1_mosi_pa7|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi1_mosi_pa7|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi1_mosi_pa7|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi1_mosi_pa7" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi2_mosi_pb15" TRUE + "DT_NODELABEL|spi2_mosi_pb15" "/soc/pin-controller@48000000/spi2_mosi_pb15" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|pinmux" "997" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_mosi_pb15|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi2_mosi_pb15|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi2_mosi_pb15|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi2_mosi_pb15|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi2_mosi_pb15" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi3_mosi_pc12" TRUE + "DT_NODELABEL|spi3_mosi_pc12" "/soc/pin-controller@48000000/spi3_mosi_pc12" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|pinmux" "1414" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_mosi_pc12|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi3_mosi_pc12|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi3_mosi_pc12|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi3_mosi_pc12|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi3_mosi_pc12" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi2_nss_pb12" TRUE + "DT_NODELABEL|spi2_nss_pb12" "/soc/pin-controller@48000000/spi2_nss_pb12" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|pinmux" "901" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|bias-pull-up" "True" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_nss_pb12|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi2_nss_pb12|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi2_nss_pb12|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi2_nss_pb12|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi2_nss_pb12" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi3_nss_pa15" TRUE + "DT_NODELABEL|spi3_nss_pa15" "/soc/pin-controller@48000000/spi3_nss_pa15" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|pinmux" "486" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|bias-pull-up" "True" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_nss_pa15|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi3_nss_pa15|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi3_nss_pa15|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi3_nss_pa15|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi3_nss_pa15" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi1_sck_pa5" TRUE + "DT_NODELABEL|spi1_sck_pa5" "/soc/pin-controller@48000000/spi1_sck_pa5" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|pinmux" "165" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi1_sck_pa5|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi1_sck_pa5|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi1_sck_pa5|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi1_sck_pa5|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi1_sck_pa5" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi2_sck_pb13" TRUE + "DT_NODELABEL|spi2_sck_pb13" "/soc/pin-controller@48000000/spi2_sck_pb13" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|pinmux" "933" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi2_sck_pb13|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi2_sck_pb13|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi2_sck_pb13|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi2_sck_pb13|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi2_sck_pb13" "NONE" + "DT_NODE|/soc/pin-controller@48000000/spi3_sck_pc10" TRUE + "DT_NODELABEL|spi3_sck_pc10" "/soc/pin-controller@48000000/spi3_sck_pc10" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|pinmux" "1350" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|slew-rate" "very-high-speed" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|bias-pull-down" "True" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/spi3_sck_pc10|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/spi3_sck_pc10|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/spi3_sck_pc10|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/spi3_sck_pc10|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/spi3_sck_pc10" "NONE" + "DT_NODE|/soc/pin-controller@48000000/tim2_ch1_pa5" TRUE + "DT_NODELABEL|tim2_ch1_pa5" "/soc/pin-controller@48000000/tim2_ch1_pa5" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|pinmux" "161" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/tim2_ch1_pa5|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/tim2_ch1_pa5|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/tim2_ch1_pa5|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/tim2_ch1_pa5|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/tim2_ch1_pa5" "NONE" + "DT_NODE|/soc/pin-controller@48000000/lpuart1_rx_pa3" TRUE + "DT_NODELABEL|lpuart1_rx_pa3" "/soc/pin-controller@48000000/lpuart1_rx_pa3" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|pinmux" "108" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_rx_pa3|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/lpuart1_rx_pa3|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/lpuart1_rx_pa3|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/lpuart1_rx_pa3|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/lpuart1_rx_pa3" "NONE" + "DT_NODE|/soc/pin-controller@48000000/usart1_rx_pc5" TRUE + "DT_NODELABEL|usart1_rx_pc5" "/soc/pin-controller@48000000/usart1_rx_pc5" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|pinmux" "1191" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|bias-pull-up" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_rx_pc5|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/usart1_rx_pc5|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/usart1_rx_pc5|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/usart1_rx_pc5|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/usart1_rx_pc5" "NONE" + "DT_NODE|/soc/pin-controller@48000000/lpuart1_tx_pa2" TRUE + "DT_NODELABEL|lpuart1_tx_pa2" "/soc/pin-controller@48000000/lpuart1_tx_pa2" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|pinmux" "76" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|bias-pull-up" "True" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/lpuart1_tx_pa2|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/lpuart1_tx_pa2|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/lpuart1_tx_pa2|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/lpuart1_tx_pa2|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/lpuart1_tx_pa2" "NONE" + "DT_NODE|/soc/pin-controller@48000000/usart1_tx_pc4" TRUE + "DT_NODELABEL|usart1_tx_pc4" "/soc/pin-controller@48000000/usart1_tx_pc4" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|pinmux" "1159" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|slew-rate" "low-speed" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|bias-disable" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|bias-pull-up" "True" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|bias-pull-down" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|drive-push-pull" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|drive-open-drain" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|output-low" "False" + "DT_PROP|/soc/pin-controller@48000000/usart1_tx_pc4|output-high" "False" + "DT_REG|/soc/pin-controller@48000000/usart1_tx_pc4|NUM" "0" + "DT_REG|/soc/pin-controller@48000000/usart1_tx_pc4|ADDR" "" + "DT_REG|/soc/pin-controller@48000000/usart1_tx_pc4|SIZE" "" + "DT_UNIT_ADDR|/soc/pin-controller@48000000/usart1_tx_pc4" "NONE" + "DT_NODE|/soc/serial@40013800" TRUE + "DT_NODELABEL|usart1" "/soc/serial@40013800" + "DT_NODELABEL|arduino_serial" "/soc/serial@40013800" + "DT_PROP|/soc/serial@40013800|reg" "1073821696;1024" + "DT_PROP|/soc/serial@40013800|interrupts" "37;0" + "DT_PROP|/soc/serial@40013800|current-speed" "115200" + "DT_PROP|/soc/serial@40013800|stop-bits" "1" + "DT_PROP|/soc/serial@40013800|data-bits" "8" + "DT_PROP|/soc/serial@40013800|single-wire" "False" + "DT_PROP|/soc/serial@40013800|tx-rx-swap" "False" + "DT_PROP|/soc/serial@40013800|pinctrl-0" "/soc/pin-controller@48000000/usart1_tx_pc4;/soc/pin-controller@48000000/usart1_rx_pc5" + "DT_PROP|/soc/serial@40013800|pinctrl-names" "default" + "DT_PROP|/soc/serial@40013800|de-enable" "False" + "DT_PROP|/soc/serial@40013800|de-assert-time" "0" + "DT_PROP|/soc/serial@40013800|de-deassert-time" "0" + "DT_PROP|/soc/serial@40013800|de-invert" "False" + "DT_PROP|/soc/serial@40013800|fifo-enable" "False" + "DT_PROP|/soc/serial@40013800|hw-flow-control" "False" + "DT_PROP|/soc/serial@40013800|parity" "none" + "DT_PROP|/soc/serial@40013800|status" "okay" + "DT_PROP|/soc/serial@40013800|compatible" "st,stm32-usart;st,stm32-uart" + "DT_PROP|/soc/serial@40013800|dma-coherent" "False" + "DT_PROP|/soc/serial@40013800|zephyr,deferred-init" "False" + "DT_PROP|/soc/serial@40013800|wakeup-source" "False" + "DT_PROP|/soc/serial@40013800|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/serial@40013800|tx-invert" "False" + "DT_PROP|/soc/serial@40013800|rx-invert" "False" + "DT_REG|/soc/serial@40013800|NUM" "1" + "DT_REG|/soc/serial@40013800|ADDR" "0x40013800" + "DT_REG|/soc/serial@40013800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/serial@40013800" "0x40013800" + "DT_NODE|/soc/serial@40004400" TRUE + "DT_NODELABEL|usart2" "/soc/serial@40004400" + "DT_PROP|/soc/serial@40004400|reg" "1073759232;1024" + "DT_PROP|/soc/serial@40004400|interrupts" "38;0" + "DT_PROP|/soc/serial@40004400|current-speed" "115200" + "DT_PROP|/soc/serial@40004400|stop-bits" "1" + "DT_PROP|/soc/serial@40004400|data-bits" "8" + "DT_PROP|/soc/serial@40004400|single-wire" "False" + "DT_PROP|/soc/serial@40004400|tx-rx-swap" "False" + "DT_PROP|/soc/serial@40004400|de-enable" "False" + "DT_PROP|/soc/serial@40004400|de-assert-time" "0" + "DT_PROP|/soc/serial@40004400|de-deassert-time" "0" + "DT_PROP|/soc/serial@40004400|de-invert" "False" + "DT_PROP|/soc/serial@40004400|fifo-enable" "False" + "DT_PROP|/soc/serial@40004400|hw-flow-control" "False" + "DT_PROP|/soc/serial@40004400|parity" "none" + "DT_PROP|/soc/serial@40004400|status" "disabled" + "DT_PROP|/soc/serial@40004400|compatible" "st,stm32-usart;st,stm32-uart" + "DT_PROP|/soc/serial@40004400|dma-coherent" "False" + "DT_PROP|/soc/serial@40004400|zephyr,deferred-init" "False" + "DT_PROP|/soc/serial@40004400|wakeup-source" "False" + "DT_PROP|/soc/serial@40004400|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/serial@40004400|tx-invert" "False" + "DT_PROP|/soc/serial@40004400|rx-invert" "False" + "DT_REG|/soc/serial@40004400|NUM" "1" + "DT_REG|/soc/serial@40004400|ADDR" "0x40004400" + "DT_REG|/soc/serial@40004400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/serial@40004400" "0x40004400" + "DT_NODE|/soc/serial@40004800" TRUE + "DT_NODELABEL|usart3" "/soc/serial@40004800" + "DT_PROP|/soc/serial@40004800|reg" "1073760256;1024" + "DT_PROP|/soc/serial@40004800|interrupts" "39;0" + "DT_PROP|/soc/serial@40004800|current-speed" "115200" + "DT_PROP|/soc/serial@40004800|stop-bits" "1" + "DT_PROP|/soc/serial@40004800|data-bits" "8" + "DT_PROP|/soc/serial@40004800|single-wire" "False" + "DT_PROP|/soc/serial@40004800|tx-rx-swap" "False" + "DT_PROP|/soc/serial@40004800|de-enable" "False" + "DT_PROP|/soc/serial@40004800|de-assert-time" "0" + "DT_PROP|/soc/serial@40004800|de-deassert-time" "0" + "DT_PROP|/soc/serial@40004800|de-invert" "False" + "DT_PROP|/soc/serial@40004800|fifo-enable" "False" + "DT_PROP|/soc/serial@40004800|hw-flow-control" "False" + "DT_PROP|/soc/serial@40004800|parity" "none" + "DT_PROP|/soc/serial@40004800|status" "disabled" + "DT_PROP|/soc/serial@40004800|compatible" "st,stm32-usart;st,stm32-uart" + "DT_PROP|/soc/serial@40004800|dma-coherent" "False" + "DT_PROP|/soc/serial@40004800|zephyr,deferred-init" "False" + "DT_PROP|/soc/serial@40004800|wakeup-source" "False" + "DT_PROP|/soc/serial@40004800|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/serial@40004800|tx-invert" "False" + "DT_PROP|/soc/serial@40004800|rx-invert" "False" + "DT_REG|/soc/serial@40004800|NUM" "1" + "DT_REG|/soc/serial@40004800|ADDR" "0x40004800" + "DT_REG|/soc/serial@40004800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/serial@40004800" "0x40004800" + "DT_NODE|/soc/serial@40004c00" TRUE + "DT_NODELABEL|uart4" "/soc/serial@40004c00" + "DT_PROP|/soc/serial@40004c00|reg" "1073761280;1024" + "DT_PROP|/soc/serial@40004c00|interrupts" "52;0" + "DT_PROP|/soc/serial@40004c00|current-speed" "115200" + "DT_PROP|/soc/serial@40004c00|stop-bits" "1" + "DT_PROP|/soc/serial@40004c00|data-bits" "8" + "DT_PROP|/soc/serial@40004c00|single-wire" "False" + "DT_PROP|/soc/serial@40004c00|tx-rx-swap" "False" + "DT_PROP|/soc/serial@40004c00|de-enable" "False" + "DT_PROP|/soc/serial@40004c00|de-assert-time" "0" + "DT_PROP|/soc/serial@40004c00|de-deassert-time" "0" + "DT_PROP|/soc/serial@40004c00|de-invert" "False" + "DT_PROP|/soc/serial@40004c00|fifo-enable" "False" + "DT_PROP|/soc/serial@40004c00|hw-flow-control" "False" + "DT_PROP|/soc/serial@40004c00|parity" "none" + "DT_PROP|/soc/serial@40004c00|status" "disabled" + "DT_PROP|/soc/serial@40004c00|compatible" "st,stm32-uart" + "DT_PROP|/soc/serial@40004c00|dma-coherent" "False" + "DT_PROP|/soc/serial@40004c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/serial@40004c00|wakeup-source" "False" + "DT_PROP|/soc/serial@40004c00|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/serial@40004c00|tx-invert" "False" + "DT_PROP|/soc/serial@40004c00|rx-invert" "False" + "DT_REG|/soc/serial@40004c00|NUM" "1" + "DT_REG|/soc/serial@40004c00|ADDR" "0x40004c00" + "DT_REG|/soc/serial@40004c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/serial@40004c00" "0x40004c00" + "DT_NODE|/soc/serial@40008000" TRUE + "DT_NODELABEL|lpuart1" "/soc/serial@40008000" + "DT_PROP|/soc/serial@40008000|reg" "1073774592;1024" + "DT_PROP|/soc/serial@40008000|interrupts" "91;0" + "DT_PROP|/soc/serial@40008000|current-speed" "115200" + "DT_PROP|/soc/serial@40008000|stop-bits" "1" + "DT_PROP|/soc/serial@40008000|data-bits" "8" + "DT_PROP|/soc/serial@40008000|single-wire" "False" + "DT_PROP|/soc/serial@40008000|tx-rx-swap" "False" + "DT_PROP|/soc/serial@40008000|pinctrl-0" "/soc/pin-controller@48000000/lpuart1_tx_pa2;/soc/pin-controller@48000000/lpuart1_rx_pa3" + "DT_PROP|/soc/serial@40008000|pinctrl-names" "default" + "DT_PROP|/soc/serial@40008000|de-enable" "False" + "DT_PROP|/soc/serial@40008000|de-assert-time" "0" + "DT_PROP|/soc/serial@40008000|de-deassert-time" "0" + "DT_PROP|/soc/serial@40008000|de-invert" "False" + "DT_PROP|/soc/serial@40008000|fifo-enable" "False" + "DT_PROP|/soc/serial@40008000|hw-flow-control" "False" + "DT_PROP|/soc/serial@40008000|parity" "none" + "DT_PROP|/soc/serial@40008000|status" "okay" + "DT_PROP|/soc/serial@40008000|compatible" "st,stm32-lpuart;st,stm32-uart" + "DT_PROP|/soc/serial@40008000|dma-coherent" "False" + "DT_PROP|/soc/serial@40008000|zephyr,deferred-init" "False" + "DT_PROP|/soc/serial@40008000|wakeup-source" "False" + "DT_PROP|/soc/serial@40008000|zephyr,pm-device-runtime-auto" "False" + "DT_PROP|/soc/serial@40008000|tx-invert" "False" + "DT_PROP|/soc/serial@40008000|rx-invert" "False" + "DT_REG|/soc/serial@40008000|NUM" "1" + "DT_REG|/soc/serial@40008000|ADDR" "0x40008000" + "DT_REG|/soc/serial@40008000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/serial@40008000" "0x40008000" + "DT_NODE|/soc/watchdog@40003000" TRUE + "DT_NODELABEL|iwdg" "/soc/watchdog@40003000" + "DT_PROP|/soc/watchdog@40003000|reg" "1073754112;1024" + "DT_PROP|/soc/watchdog@40003000|status" "okay" + "DT_PROP|/soc/watchdog@40003000|compatible" "st,stm32-watchdog" + "DT_PROP|/soc/watchdog@40003000|dma-coherent" "False" + "DT_PROP|/soc/watchdog@40003000|zephyr,deferred-init" "False" + "DT_PROP|/soc/watchdog@40003000|wakeup-source" "False" + "DT_PROP|/soc/watchdog@40003000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/watchdog@40003000|NUM" "1" + "DT_REG|/soc/watchdog@40003000|ADDR" "0x40003000" + "DT_REG|/soc/watchdog@40003000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/watchdog@40003000" "0x40003000" + "DT_NODE|/soc/watchdog@40002c00" TRUE + "DT_NODELABEL|wwdg" "/soc/watchdog@40002c00" + "DT_PROP|/soc/watchdog@40002c00|reg" "1073753088;1024" + "DT_PROP|/soc/watchdog@40002c00|status" "disabled" + "DT_PROP|/soc/watchdog@40002c00|compatible" "st,stm32-window-watchdog" + "DT_PROP|/soc/watchdog@40002c00|interrupts" "0;0" + "DT_PROP|/soc/watchdog@40002c00|dma-coherent" "False" + "DT_PROP|/soc/watchdog@40002c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/watchdog@40002c00|wakeup-source" "False" + "DT_PROP|/soc/watchdog@40002c00|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/watchdog@40002c00|NUM" "1" + "DT_REG|/soc/watchdog@40002c00|ADDR" "0x40002c00" + "DT_REG|/soc/watchdog@40002c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/watchdog@40002c00" "0x40002c00" + "DT_NODE|/soc/i2c@40005400" TRUE + "DT_NODELABEL|i2c1" "/soc/i2c@40005400" + "DT_NODELABEL|arduino_i2c" "/soc/i2c@40005400" + "DT_PROP|/soc/i2c@40005400|reg" "1073763328;1024" + "DT_PROP|/soc/i2c@40005400|interrupts" "31;0;32;0" + "DT_PROP|/soc/i2c@40005400|pinctrl-0" "/soc/pin-controller@48000000/i2c1_scl_pb8;/soc/pin-controller@48000000/i2c1_sda_pb9" + "DT_PROP|/soc/i2c@40005400|pinctrl-names" "default" + "DT_PROP|/soc/i2c@40005400|clock-frequency" "100000" + "DT_PROP|/soc/i2c@40005400|sq-size" "4" + "DT_PROP|/soc/i2c@40005400|cq-size" "4" + "DT_PROP|/soc/i2c@40005400|status" "okay" + "DT_PROP|/soc/i2c@40005400|compatible" "st,stm32-i2c-v2" + "DT_PROP|/soc/i2c@40005400|interrupt-names" "event;error" + "DT_PROP|/soc/i2c@40005400|dma-coherent" "False" + "DT_PROP|/soc/i2c@40005400|zephyr,deferred-init" "False" + "DT_PROP|/soc/i2c@40005400|wakeup-source" "False" + "DT_PROP|/soc/i2c@40005400|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/i2c@40005400|NUM" "1" + "DT_REG|/soc/i2c@40005400|ADDR" "0x40005400" + "DT_REG|/soc/i2c@40005400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/i2c@40005400" "0x40005400" + "DT_NODE|/soc/i2c@40005800" TRUE + "DT_NODELABEL|i2c2" "/soc/i2c@40005800" + "DT_PROP|/soc/i2c@40005800|reg" "1073764352;1024" + "DT_PROP|/soc/i2c@40005800|interrupts" "33;0;34;0" + "DT_PROP|/soc/i2c@40005800|clock-frequency" "100000" + "DT_PROP|/soc/i2c@40005800|sq-size" "4" + "DT_PROP|/soc/i2c@40005800|cq-size" "4" + "DT_PROP|/soc/i2c@40005800|status" "disabled" + "DT_PROP|/soc/i2c@40005800|compatible" "st,stm32-i2c-v2" + "DT_PROP|/soc/i2c@40005800|interrupt-names" "event;error" + "DT_PROP|/soc/i2c@40005800|dma-coherent" "False" + "DT_PROP|/soc/i2c@40005800|zephyr,deferred-init" "False" + "DT_PROP|/soc/i2c@40005800|wakeup-source" "False" + "DT_PROP|/soc/i2c@40005800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/i2c@40005800|NUM" "1" + "DT_REG|/soc/i2c@40005800|ADDR" "0x40005800" + "DT_REG|/soc/i2c@40005800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/i2c@40005800" "0x40005800" + "DT_NODE|/soc/i2c@40007800" TRUE + "DT_NODELABEL|i2c3" "/soc/i2c@40007800" + "DT_PROP|/soc/i2c@40007800|reg" "1073772544;1024" + "DT_PROP|/soc/i2c@40007800|interrupts" "92;0;93;0" + "DT_PROP|/soc/i2c@40007800|clock-frequency" "100000" + "DT_PROP|/soc/i2c@40007800|sq-size" "4" + "DT_PROP|/soc/i2c@40007800|cq-size" "4" + "DT_PROP|/soc/i2c@40007800|status" "disabled" + "DT_PROP|/soc/i2c@40007800|compatible" "st,stm32-i2c-v2" + "DT_PROP|/soc/i2c@40007800|interrupt-names" "event;error" + "DT_PROP|/soc/i2c@40007800|dma-coherent" "False" + "DT_PROP|/soc/i2c@40007800|zephyr,deferred-init" "False" + "DT_PROP|/soc/i2c@40007800|wakeup-source" "False" + "DT_PROP|/soc/i2c@40007800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/i2c@40007800|NUM" "1" + "DT_REG|/soc/i2c@40007800|ADDR" "0x40007800" + "DT_REG|/soc/i2c@40007800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/i2c@40007800" "0x40007800" + "DT_NODE|/soc/spi@40013000" TRUE + "DT_NODELABEL|spi1" "/soc/spi@40013000" + "DT_NODELABEL|arduino_spi" "/soc/spi@40013000" + "DT_PROP|/soc/spi@40013000|reg" "1073819648;1024" + "DT_PROP|/soc/spi@40013000|interrupts" "35;0" + "DT_PROP|/soc/spi@40013000|pinctrl-0" "/soc/pin-controller@48000000/spi1_sck_pa5;/soc/pin-controller@48000000/spi1_miso_pa6;/soc/pin-controller@48000000/spi1_mosi_pa7" + "DT_PROP|/soc/spi@40013000|pinctrl-names" "default" + "DT_PROP|/soc/spi@40013000|ioswp" "False" + "DT_PROP|/soc/spi@40013000|st,spi-data-width" "full-4-to-16-bit" + "DT_PROP|/soc/spi@40013000|st,soft-nss" "False" + "DT_PROP|/soc/spi@40013000|status" "okay" + "DT_PROP|/soc/spi@40013000|compatible" "st,stm32-spi-fifo;st,stm32-spi" + "DT_PROP|/soc/spi@40013000|dma-coherent" "False" + "DT_PROP|/soc/spi@40013000|zephyr,deferred-init" "False" + "DT_PROP|/soc/spi@40013000|wakeup-source" "False" + "DT_PROP|/soc/spi@40013000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/spi@40013000|NUM" "1" + "DT_REG|/soc/spi@40013000|ADDR" "0x40013000" + "DT_REG|/soc/spi@40013000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/spi@40013000" "0x40013000" + "DT_NODE|/soc/spi@40003800" TRUE + "DT_NODELABEL|spi2" "/soc/spi@40003800" + "DT_PROP|/soc/spi@40003800|reg" "1073756160;1024" + "DT_PROP|/soc/spi@40003800|interrupts" "36;0" + "DT_PROP|/soc/spi@40003800|pinctrl-0" "/soc/pin-controller@48000000/spi2_nss_pb12;/soc/pin-controller@48000000/spi2_sck_pb13;/soc/pin-controller@48000000/spi2_miso_pb14;/soc/pin-controller@48000000/spi2_mosi_pb15" + "DT_PROP|/soc/spi@40003800|pinctrl-names" "default" + "DT_PROP|/soc/spi@40003800|ioswp" "False" + "DT_PROP|/soc/spi@40003800|st,spi-data-width" "full-4-to-16-bit" + "DT_PROP|/soc/spi@40003800|st,soft-nss" "False" + "DT_PROP|/soc/spi@40003800|status" "okay" + "DT_PROP|/soc/spi@40003800|compatible" "st,stm32-spi-fifo;st,stm32-spi" + "DT_PROP|/soc/spi@40003800|dma-coherent" "False" + "DT_PROP|/soc/spi@40003800|zephyr,deferred-init" "False" + "DT_PROP|/soc/spi@40003800|wakeup-source" "False" + "DT_PROP|/soc/spi@40003800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/spi@40003800|NUM" "1" + "DT_REG|/soc/spi@40003800|ADDR" "0x40003800" + "DT_REG|/soc/spi@40003800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/spi@40003800" "0x40003800" + "DT_NODE|/soc/spi@40003c00" TRUE + "DT_NODELABEL|spi3" "/soc/spi@40003c00" + "DT_PROP|/soc/spi@40003c00|reg" "1073757184;1024" + "DT_PROP|/soc/spi@40003c00|interrupts" "51;0" + "DT_PROP|/soc/spi@40003c00|pinctrl-0" "/soc/pin-controller@48000000/spi3_nss_pa15;/soc/pin-controller@48000000/spi3_sck_pc10;/soc/pin-controller@48000000/spi3_miso_pc11;/soc/pin-controller@48000000/spi3_mosi_pc12" + "DT_PROP|/soc/spi@40003c00|pinctrl-names" "default" + "DT_PROP|/soc/spi@40003c00|ioswp" "False" + "DT_PROP|/soc/spi@40003c00|st,spi-data-width" "full-4-to-16-bit" + "DT_PROP|/soc/spi@40003c00|st,soft-nss" "False" + "DT_PROP|/soc/spi@40003c00|status" "okay" + "DT_PROP|/soc/spi@40003c00|compatible" "st,stm32-spi-fifo;st,stm32-spi" + "DT_PROP|/soc/spi@40003c00|dma-coherent" "False" + "DT_PROP|/soc/spi@40003c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/spi@40003c00|wakeup-source" "False" + "DT_PROP|/soc/spi@40003c00|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/spi@40003c00|NUM" "1" + "DT_REG|/soc/spi@40003c00|ADDR" "0x40003c00" + "DT_REG|/soc/spi@40003c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/spi@40003c00" "0x40003c00" + "DT_NODE|/soc/can@40006400" TRUE + "DT_NODELABEL|fdcan1" "/soc/can@40006400" + "DT_PROP|/soc/can@40006400|reg" "1073767424;1024;1073783808;848" + "DT_PROP|/soc/can@40006400|interrupts" "21;0;22;0" + "DT_PROP|/soc/can@40006400|interrupt-names" "int0;int1" + "DT_PROP|/soc/can@40006400|bosch,mram-cfg" "0;28;8;3;3;0;3;3" + "DT_PROP|/soc/can@40006400|bosch,timestamp-counter-prescaler" "1" + "DT_PROP|/soc/can@40006400|status" "disabled" + "DT_PROP|/soc/can@40006400|compatible" "st,stm32-fdcan" + "DT_PROP|/soc/can@40006400|reg-names" "m_can;message_ram" + "DT_PROP|/soc/can@40006400|dma-coherent" "False" + "DT_PROP|/soc/can@40006400|zephyr,deferred-init" "False" + "DT_PROP|/soc/can@40006400|wakeup-source" "False" + "DT_PROP|/soc/can@40006400|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/can@40006400|NUM" "2" + "DT_REG|/soc/can@40006400|ADDR" "0x40006400;0x4000a400" + "DT_REG|/soc/can@40006400|SIZE" "0x400;0x350" + "DT_UNIT_ADDR|/soc/can@40006400" "0x40006400" + "DT_NODE|/soc/timers@40007c00" TRUE + "DT_NODELABEL|lptim1" "/soc/timers@40007c00" + "DT_NODELABEL|stm32_lp_tick_source" "/soc/timers@40007c00" + "DT_PROP|/soc/timers@40007c00|st,prescaler" "1" + "DT_PROP|/soc/timers@40007c00|reg" "1073773568;1024" + "DT_PROP|/soc/timers@40007c00|st,deadtime" "0" + "DT_PROP|/soc/timers@40007c00|status" "okay" + "DT_PROP|/soc/timers@40007c00|compatible" "st,stm32-lptim" + "DT_PROP|/soc/timers@40007c00|interrupts" "49;0" + "DT_PROP|/soc/timers@40007c00|interrupt-names" "wakeup" + "DT_PROP|/soc/timers@40007c00|dma-coherent" "False" + "DT_PROP|/soc/timers@40007c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40007c00|wakeup-source" "False" + "DT_PROP|/soc/timers@40007c00|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40007c00|NUM" "1" + "DT_REG|/soc/timers@40007c00|ADDR" "0x40007c00" + "DT_REG|/soc/timers@40007c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/timers@40007c00" "0x40007c00" + "DT_NODE|/soc/timers@40012c00" TRUE + "DT_NODELABEL|timers1" "/soc/timers@40012c00" + "DT_PROP|/soc/timers@40012c00|reg" "1073818624;1024" + "DT_PROP|/soc/timers@40012c00|st,prescaler" "0" + "DT_PROP|/soc/timers@40012c00|st,countermode" "0" + "DT_PROP|/soc/timers@40012c00|st,deadtime" "0" + "DT_PROP|/soc/timers@40012c00|st,mastermode" "RESET" + "DT_PROP|/soc/timers@40012c00|status" "disabled" + "DT_PROP|/soc/timers@40012c00|compatible" "st,stm32-timers" + "DT_PROP|/soc/timers@40012c00|interrupts" "24;0;25;0;26;0;27;0" + "DT_PROP|/soc/timers@40012c00|interrupt-names" "brk;up;trgcom;cc" + "DT_PROP|/soc/timers@40012c00|dma-coherent" "False" + "DT_PROP|/soc/timers@40012c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40012c00|wakeup-source" "False" + "DT_PROP|/soc/timers@40012c00|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40012c00|NUM" "1" + "DT_REG|/soc/timers@40012c00|ADDR" "0x40012c00" + "DT_REG|/soc/timers@40012c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/timers@40012c00" "0x40012c00" + "DT_NODE|/soc/timers@40012c00/pwm" TRUE + "DT_PROP|/soc/timers@40012c00/pwm|four-channel-capture-support" "False" + "DT_PROP|/soc/timers@40012c00/pwm|status" "disabled" + "DT_PROP|/soc/timers@40012c00/pwm|compatible" "st,stm32-pwm" + "DT_PROP|/soc/timers@40012c00/pwm|dma-coherent" "False" + "DT_PROP|/soc/timers@40012c00/pwm|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40012c00/pwm|wakeup-source" "False" + "DT_PROP|/soc/timers@40012c00/pwm|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40012c00/pwm|NUM" "0" + "DT_REG|/soc/timers@40012c00/pwm|ADDR" "" + "DT_REG|/soc/timers@40012c00/pwm|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40012c00/pwm" "NONE" + "DT_NODE|/soc/timers@40012c00/counter" TRUE + "DT_PROP|/soc/timers@40012c00/counter|status" "disabled" + "DT_PROP|/soc/timers@40012c00/counter|compatible" "st,stm32-counter" + "DT_PROP|/soc/timers@40012c00/counter|dma-coherent" "False" + "DT_PROP|/soc/timers@40012c00/counter|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40012c00/counter|wakeup-source" "False" + "DT_PROP|/soc/timers@40012c00/counter|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40012c00/counter|NUM" "0" + "DT_REG|/soc/timers@40012c00/counter|ADDR" "" + "DT_REG|/soc/timers@40012c00/counter|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40012c00/counter" "NONE" + "DT_NODE|/soc/timers@40012c00/qdec" TRUE + "DT_PROP|/soc/timers@40012c00/qdec|st,encoder-mode" "1" + "DT_PROP|/soc/timers@40012c00/qdec|st,input-polarity-inverted" "False" + "DT_PROP|/soc/timers@40012c00/qdec|st,input-filter-level" "0" + "DT_PROP|/soc/timers@40012c00/qdec|status" "disabled" + "DT_PROP|/soc/timers@40012c00/qdec|compatible" "st,stm32-qdec" + "DT_PROP|/soc/timers@40012c00/qdec|dma-coherent" "False" + "DT_PROP|/soc/timers@40012c00/qdec|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40012c00/qdec|wakeup-source" "False" + "DT_PROP|/soc/timers@40012c00/qdec|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40012c00/qdec|NUM" "0" + "DT_REG|/soc/timers@40012c00/qdec|ADDR" "" + "DT_REG|/soc/timers@40012c00/qdec|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40012c00/qdec" "NONE" + "DT_NODE|/soc/timers@40000000" TRUE + "DT_NODELABEL|timers2" "/soc/timers@40000000" + "DT_PROP|/soc/timers@40000000|reg" "1073741824;1024" + "DT_PROP|/soc/timers@40000000|st,prescaler" "0" + "DT_PROP|/soc/timers@40000000|st,countermode" "0" + "DT_PROP|/soc/timers@40000000|st,deadtime" "0" + "DT_PROP|/soc/timers@40000000|st,mastermode" "RESET" + "DT_PROP|/soc/timers@40000000|status" "okay" + "DT_PROP|/soc/timers@40000000|compatible" "st,stm32-timers" + "DT_PROP|/soc/timers@40000000|interrupts" "28;0" + "DT_PROP|/soc/timers@40000000|interrupt-names" "global" + "DT_PROP|/soc/timers@40000000|dma-coherent" "False" + "DT_PROP|/soc/timers@40000000|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000000|wakeup-source" "False" + "DT_PROP|/soc/timers@40000000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000000|NUM" "1" + "DT_REG|/soc/timers@40000000|ADDR" "0x40000000" + "DT_REG|/soc/timers@40000000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/timers@40000000" "0x40000000" + "DT_NODE|/soc/timers@40000000/counter" TRUE + "DT_PROP|/soc/timers@40000000/counter|status" "disabled" + "DT_PROP|/soc/timers@40000000/counter|compatible" "st,stm32-counter" + "DT_PROP|/soc/timers@40000000/counter|dma-coherent" "False" + "DT_PROP|/soc/timers@40000000/counter|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000000/counter|wakeup-source" "False" + "DT_PROP|/soc/timers@40000000/counter|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000000/counter|NUM" "0" + "DT_REG|/soc/timers@40000000/counter|ADDR" "" + "DT_REG|/soc/timers@40000000/counter|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40000000/counter" "NONE" + "DT_NODE|/soc/timers@40000000/pwm" TRUE + "DT_NODELABEL|pwm2" "/soc/timers@40000000/pwm" + "DT_PROP|/soc/timers@40000000/pwm|pinctrl-0" "/soc/pin-controller@48000000/tim2_ch1_pa5" + "DT_PROP|/soc/timers@40000000/pwm|pinctrl-names" "default" + "DT_PROP|/soc/timers@40000000/pwm|four-channel-capture-support" "False" + "DT_PROP|/soc/timers@40000000/pwm|status" "okay" + "DT_PROP|/soc/timers@40000000/pwm|compatible" "st,stm32-pwm" + "DT_PROP|/soc/timers@40000000/pwm|dma-coherent" "False" + "DT_PROP|/soc/timers@40000000/pwm|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000000/pwm|wakeup-source" "False" + "DT_PROP|/soc/timers@40000000/pwm|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000000/pwm|NUM" "0" + "DT_REG|/soc/timers@40000000/pwm|ADDR" "" + "DT_REG|/soc/timers@40000000/pwm|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40000000/pwm" "NONE" + "DT_NODE|/soc/timers@40000000/qdec" TRUE + "DT_PROP|/soc/timers@40000000/qdec|st,encoder-mode" "1" + "DT_PROP|/soc/timers@40000000/qdec|st,input-polarity-inverted" "False" + "DT_PROP|/soc/timers@40000000/qdec|st,input-filter-level" "0" + "DT_PROP|/soc/timers@40000000/qdec|status" "disabled" + "DT_PROP|/soc/timers@40000000/qdec|compatible" "st,stm32-qdec" + "DT_PROP|/soc/timers@40000000/qdec|dma-coherent" "False" + "DT_PROP|/soc/timers@40000000/qdec|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000000/qdec|wakeup-source" "False" + "DT_PROP|/soc/timers@40000000/qdec|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000000/qdec|NUM" "0" + "DT_REG|/soc/timers@40000000/qdec|ADDR" "" + "DT_REG|/soc/timers@40000000/qdec|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40000000/qdec" "NONE" + "DT_NODE|/soc/timers@40000400" TRUE + "DT_NODELABEL|timers3" "/soc/timers@40000400" + "DT_PROP|/soc/timers@40000400|reg" "1073742848;1024" + "DT_PROP|/soc/timers@40000400|st,prescaler" "0" + "DT_PROP|/soc/timers@40000400|st,countermode" "0" + "DT_PROP|/soc/timers@40000400|st,deadtime" "0" + "DT_PROP|/soc/timers@40000400|st,mastermode" "RESET" + "DT_PROP|/soc/timers@40000400|status" "disabled" + "DT_PROP|/soc/timers@40000400|compatible" "st,stm32-timers" + "DT_PROP|/soc/timers@40000400|interrupts" "29;0" + "DT_PROP|/soc/timers@40000400|interrupt-names" "global" + "DT_PROP|/soc/timers@40000400|dma-coherent" "False" + "DT_PROP|/soc/timers@40000400|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000400|wakeup-source" "False" + "DT_PROP|/soc/timers@40000400|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000400|NUM" "1" + "DT_REG|/soc/timers@40000400|ADDR" "0x40000400" + "DT_REG|/soc/timers@40000400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/timers@40000400" "0x40000400" + "DT_NODE|/soc/timers@40000400/counter" TRUE + "DT_PROP|/soc/timers@40000400/counter|status" "disabled" + "DT_PROP|/soc/timers@40000400/counter|compatible" "st,stm32-counter" + "DT_PROP|/soc/timers@40000400/counter|dma-coherent" "False" + "DT_PROP|/soc/timers@40000400/counter|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000400/counter|wakeup-source" "False" + "DT_PROP|/soc/timers@40000400/counter|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000400/counter|NUM" "0" + "DT_REG|/soc/timers@40000400/counter|ADDR" "" + "DT_REG|/soc/timers@40000400/counter|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40000400/counter" "NONE" + "DT_NODE|/soc/timers@40000400/pwm" TRUE + "DT_PROP|/soc/timers@40000400/pwm|four-channel-capture-support" "False" + "DT_PROP|/soc/timers@40000400/pwm|status" "disabled" + "DT_PROP|/soc/timers@40000400/pwm|compatible" "st,stm32-pwm" + "DT_PROP|/soc/timers@40000400/pwm|dma-coherent" "False" + "DT_PROP|/soc/timers@40000400/pwm|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40000400/pwm|wakeup-source" "False" + "DT_PROP|/soc/timers@40000400/pwm|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40000400/pwm|NUM" "0" + "DT_REG|/soc/timers@40000400/pwm|ADDR" "" + "DT_REG|/soc/timers@40000400/pwm|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40000400/pwm" "NONE" + "DT_NODE|/soc/timers@40000400/qdec" TRUE + "DT_PROP|/soc/timers@40000400/qdec|st,encoder-mode" "1" + "DT_PROP|/soc/timers@40000400/qdec|st,input-polarity-inverted" "False" + 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"DT_PROP|/soc/timers@40014400/pwm|status" "disabled" + "DT_PROP|/soc/timers@40014400/pwm|compatible" "st,stm32-pwm" + "DT_PROP|/soc/timers@40014400/pwm|dma-coherent" "False" + "DT_PROP|/soc/timers@40014400/pwm|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40014400/pwm|wakeup-source" "False" + "DT_PROP|/soc/timers@40014400/pwm|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40014400/pwm|NUM" "0" + "DT_REG|/soc/timers@40014400/pwm|ADDR" "" + "DT_REG|/soc/timers@40014400/pwm|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40014400/pwm" "NONE" + "DT_NODE|/soc/timers@40014400/counter" TRUE + "DT_PROP|/soc/timers@40014400/counter|status" "disabled" + "DT_PROP|/soc/timers@40014400/counter|compatible" "st,stm32-counter" + "DT_PROP|/soc/timers@40014400/counter|dma-coherent" "False" + "DT_PROP|/soc/timers@40014400/counter|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40014400/counter|wakeup-source" "False" + "DT_PROP|/soc/timers@40014400/counter|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40014400/counter|NUM" "0" + "DT_REG|/soc/timers@40014400/counter|ADDR" "" + "DT_REG|/soc/timers@40014400/counter|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40014400/counter" "NONE" + "DT_NODE|/soc/timers@40014800" TRUE + "DT_NODELABEL|timers17" "/soc/timers@40014800" + "DT_PROP|/soc/timers@40014800|reg" "1073825792;1024" + "DT_PROP|/soc/timers@40014800|st,prescaler" "0" + "DT_PROP|/soc/timers@40014800|st,countermode" "0" + "DT_PROP|/soc/timers@40014800|st,deadtime" "0" + "DT_PROP|/soc/timers@40014800|st,mastermode" "RESET" + "DT_PROP|/soc/timers@40014800|status" "disabled" + "DT_PROP|/soc/timers@40014800|compatible" "st,stm32-timers" + "DT_PROP|/soc/timers@40014800|interrupts" "26;0" + "DT_PROP|/soc/timers@40014800|interrupt-names" "global" + "DT_PROP|/soc/timers@40014800|dma-coherent" "False" + "DT_PROP|/soc/timers@40014800|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40014800|wakeup-source" "False" + "DT_PROP|/soc/timers@40014800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40014800|NUM" "1" + "DT_REG|/soc/timers@40014800|ADDR" "0x40014800" + "DT_REG|/soc/timers@40014800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/timers@40014800" "0x40014800" + "DT_NODE|/soc/timers@40014800/pwm" TRUE + "DT_PROP|/soc/timers@40014800/pwm|four-channel-capture-support" "False" + "DT_PROP|/soc/timers@40014800/pwm|status" "disabled" + "DT_PROP|/soc/timers@40014800/pwm|compatible" "st,stm32-pwm" + "DT_PROP|/soc/timers@40014800/pwm|dma-coherent" "False" + "DT_PROP|/soc/timers@40014800/pwm|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40014800/pwm|wakeup-source" "False" + "DT_PROP|/soc/timers@40014800/pwm|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40014800/pwm|NUM" "0" + "DT_REG|/soc/timers@40014800/pwm|ADDR" "" + "DT_REG|/soc/timers@40014800/pwm|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40014800/pwm" "NONE" + "DT_NODE|/soc/timers@40014800/counter" TRUE + "DT_PROP|/soc/timers@40014800/counter|status" "disabled" + "DT_PROP|/soc/timers@40014800/counter|compatible" "st,stm32-counter" + "DT_PROP|/soc/timers@40014800/counter|dma-coherent" "False" + "DT_PROP|/soc/timers@40014800/counter|zephyr,deferred-init" "False" + "DT_PROP|/soc/timers@40014800/counter|wakeup-source" "False" + "DT_PROP|/soc/timers@40014800/counter|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/timers@40014800/counter|NUM" "0" + "DT_REG|/soc/timers@40014800/counter|ADDR" "" + "DT_REG|/soc/timers@40014800/counter|SIZE" "" + "DT_UNIT_ADDR|/soc/timers@40014800/counter" "NONE" + "DT_NODE|/soc/rtc@40002800" TRUE + "DT_NODELABEL|rtc" "/soc/rtc@40002800" + "DT_PROP|/soc/rtc@40002800|reg" "1073752064;1024" + "DT_PROP|/soc/rtc@40002800|alarms-count" "2" + "DT_PROP|/soc/rtc@40002800|alrm-exti-line" "17" + "DT_PROP|/soc/rtc@40002800|interrupts" "41;0" + "DT_PROP|/soc/rtc@40002800|prescaler" "32768" + "DT_PROP|/soc/rtc@40002800|status" "okay" + "DT_PROP|/soc/rtc@40002800|compatible" "st,stm32-rtc" + "DT_PROP|/soc/rtc@40002800|dma-coherent" "False" + "DT_PROP|/soc/rtc@40002800|zephyr,deferred-init" "False" + "DT_PROP|/soc/rtc@40002800|wakeup-source" "False" + "DT_PROP|/soc/rtc@40002800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/rtc@40002800|NUM" "1" + "DT_REG|/soc/rtc@40002800|ADDR" "0x40002800" + "DT_REG|/soc/rtc@40002800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/rtc@40002800" "0x40002800" + "DT_NODE|/soc/rng@50060800" TRUE + "DT_NODELABEL|rng" "/soc/rng@50060800" + "DT_PROP|/soc/rng@50060800|reg" "1342572544;1024" + "DT_PROP|/soc/rng@50060800|status" "okay" + "DT_PROP|/soc/rng@50060800|compatible" "st,stm32-rng" + "DT_PROP|/soc/rng@50060800|interrupts" "90;0" + "DT_PROP|/soc/rng@50060800|dma-coherent" "False" + "DT_PROP|/soc/rng@50060800|zephyr,deferred-init" "False" + "DT_PROP|/soc/rng@50060800|wakeup-source" "False" + "DT_PROP|/soc/rng@50060800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/rng@50060800|NUM" "1" + "DT_REG|/soc/rng@50060800|ADDR" "0x50060800" + "DT_REG|/soc/rng@50060800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/rng@50060800" "0x50060800" + "DT_NODE|/soc/usb@40005c00" TRUE + "DT_NODELABEL|usb" "/soc/usb@40005c00" + "DT_PROP|/soc/usb@40005c00|reg" "1073765376;1024" + "DT_PROP|/soc/usb@40005c00|interrupts" "20;0;19;0" + "DT_PROP|/soc/usb@40005c00|ram-size" "1024" + "DT_PROP|/soc/usb@40005c00|phys" "/usbphy" + "DT_PROP|/soc/usb@40005c00|num-bidir-endpoints" "8" + "DT_PROP|/soc/usb@40005c00|maximum-speed" "full-speed" + "DT_PROP|/soc/usb@40005c00|status" "disabled" + "DT_PROP|/soc/usb@40005c00|compatible" "st,stm32-usb" + "DT_PROP|/soc/usb@40005c00|interrupt-names" "usb;usbhp" + "DT_PROP|/soc/usb@40005c00|dma-coherent" "False" + "DT_PROP|/soc/usb@40005c00|zephyr,deferred-init" "False" + "DT_PROP|/soc/usb@40005c00|wakeup-source" "False" + "DT_PROP|/soc/usb@40005c00|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/usb@40005c00|NUM" "1" + "DT_REG|/soc/usb@40005c00|ADDR" "0x40005c00" + "DT_REG|/soc/usb@40005c00|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/usb@40005c00" "0x40005c00" + "DT_NODE|/soc/dma@40020000" TRUE + "DT_NODELABEL|dma1" "/soc/dma@40020000" + "DT_PROP|/soc/dma@40020000|reg" "1073872896;1024" + "DT_PROP|/soc/dma@40020000|interrupts" "11;0;12;0;13;0;14;0;15;0;16;0" + "DT_PROP|/soc/dma@40020000|st,mem2mem" "False" + "DT_PROP|/soc/dma@40020000|dma-offset" "0" + "DT_PROP|/soc/dma@40020000|dma-requests" "6" + "DT_PROP|/soc/dma@40020000|status" "disabled" + "DT_PROP|/soc/dma@40020000|compatible" "st,stm32-dma-v2" + "DT_PROP|/soc/dma@40020000|dma-coherent" "False" + "DT_PROP|/soc/dma@40020000|zephyr,deferred-init" "False" + "DT_PROP|/soc/dma@40020000|wakeup-source" "False" + "DT_PROP|/soc/dma@40020000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/dma@40020000|NUM" "1" + "DT_REG|/soc/dma@40020000|ADDR" "0x40020000" + "DT_REG|/soc/dma@40020000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/dma@40020000" "0x40020000" + "DT_NODE|/soc/dma@40020400" TRUE + "DT_NODELABEL|dma2" "/soc/dma@40020400" + "DT_PROP|/soc/dma@40020400|reg" "1073873920;1024" + "DT_PROP|/soc/dma@40020400|interrupts" "56;0;57;0;58;0;59;0;60;0;97;0" + "DT_PROP|/soc/dma@40020400|st,mem2mem" "False" + "DT_PROP|/soc/dma@40020400|dma-offset" "6" + "DT_PROP|/soc/dma@40020400|dma-requests" "6" + "DT_PROP|/soc/dma@40020400|status" "disabled" + "DT_PROP|/soc/dma@40020400|compatible" "st,stm32-dma-v2" + "DT_PROP|/soc/dma@40020400|dma-coherent" "False" + "DT_PROP|/soc/dma@40020400|zephyr,deferred-init" "False" + "DT_PROP|/soc/dma@40020400|wakeup-source" "False" + "DT_PROP|/soc/dma@40020400|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/dma@40020400|NUM" "1" + "DT_REG|/soc/dma@40020400|ADDR" "0x40020400" + "DT_REG|/soc/dma@40020400|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/dma@40020400" "0x40020400" + "DT_NODE|/soc/dmamux@40020800" TRUE + "DT_NODELABEL|dmamux1" "/soc/dmamux@40020800" + "DT_PROP|/soc/dmamux@40020800|reg" "1073874944;1024" + "DT_PROP|/soc/dmamux@40020800|dma-channels" "12" + "DT_PROP|/soc/dmamux@40020800|dma-generators" "4" + "DT_PROP|/soc/dmamux@40020800|dma-requests" "111" + "DT_PROP|/soc/dmamux@40020800|status" "disabled" + "DT_PROP|/soc/dmamux@40020800|compatible" "st,stm32-dmamux" + "DT_PROP|/soc/dmamux@40020800|interrupts" "94;0" + "DT_PROP|/soc/dmamux@40020800|dma-coherent" "False" + "DT_PROP|/soc/dmamux@40020800|zephyr,deferred-init" "False" + "DT_PROP|/soc/dmamux@40020800|wakeup-source" "False" + "DT_PROP|/soc/dmamux@40020800|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/dmamux@40020800|NUM" "1" + "DT_REG|/soc/dmamux@40020800|ADDR" "0x40020800" + "DT_REG|/soc/dmamux@40020800|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/dmamux@40020800" "0x40020800" + "DT_NODE|/soc/ucpd@4000a000" TRUE + "DT_NODELABEL|ucpd1" "/soc/ucpd@4000a000" + "DT_PROP|/soc/ucpd@4000a000|reg" "1073782784;1024" + "DT_PROP|/soc/ucpd@4000a000|interrupts" "63;0" + "DT_PROP|/soc/ucpd@4000a000|psc-ucpdclk" "2" + "DT_PROP|/soc/ucpd@4000a000|ifrgap" "17" + "DT_PROP|/soc/ucpd@4000a000|transwin" "8" + "DT_PROP|/soc/ucpd@4000a000|hbitclkdiv" "14" + "DT_PROP|/soc/ucpd@4000a000|dead-battery" "False" + "DT_PROP|/soc/ucpd@4000a000|status" "disabled" + "DT_PROP|/soc/ucpd@4000a000|compatible" "st,stm32-ucpd" + "DT_PROP|/soc/ucpd@4000a000|dma-coherent" "False" + "DT_PROP|/soc/ucpd@4000a000|zephyr,deferred-init" "False" + "DT_PROP|/soc/ucpd@4000a000|wakeup-source" "False" + "DT_PROP|/soc/ucpd@4000a000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/ucpd@4000a000|NUM" "1" + "DT_REG|/soc/ucpd@4000a000|ADDR" "0x4000a000" + "DT_REG|/soc/ucpd@4000a000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/ucpd@4000a000" "0x4000a000" + "DT_NODE|/soc/sai1@40015404" TRUE + "DT_NODELABEL|sai1_a" "/soc/sai1@40015404" + "DT_PROP|/soc/sai1@40015404|reg" "1073828868;32" + "DT_PROP|/soc/sai1@40015404|mclk-enable" "False" + "DT_PROP|/soc/sai1@40015404|mclk-divider" "no-div" + "DT_PROP|/soc/sai1@40015404|synchronous" "False" + "DT_PROP|/soc/sai1@40015404|fifo-threshold" "full" + "DT_PROP|/soc/sai1@40015404|status" "disabled" + "DT_PROP|/soc/sai1@40015404|compatible" "st,stm32-sai" + "DT_PROP|/soc/sai1@40015404|dma-coherent" "False" + "DT_PROP|/soc/sai1@40015404|zephyr,deferred-init" "False" + "DT_PROP|/soc/sai1@40015404|wakeup-source" "False" + "DT_PROP|/soc/sai1@40015404|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/sai1@40015404|NUM" "1" + "DT_REG|/soc/sai1@40015404|ADDR" "0x40015404" + "DT_REG|/soc/sai1@40015404|SIZE" "0x20" + "DT_UNIT_ADDR|/soc/sai1@40015404" "0x40015404" + "DT_NODE|/soc/sai1@40015424" TRUE + "DT_NODELABEL|sai1_b" "/soc/sai1@40015424" + "DT_PROP|/soc/sai1@40015424|reg" "1073828900;32" + "DT_PROP|/soc/sai1@40015424|mclk-enable" "False" + "DT_PROP|/soc/sai1@40015424|mclk-divider" "no-div" + "DT_PROP|/soc/sai1@40015424|synchronous" "False" + "DT_PROP|/soc/sai1@40015424|fifo-threshold" "full" + "DT_PROP|/soc/sai1@40015424|status" "disabled" + "DT_PROP|/soc/sai1@40015424|compatible" "st,stm32-sai" + "DT_PROP|/soc/sai1@40015424|dma-coherent" "False" + "DT_PROP|/soc/sai1@40015424|zephyr,deferred-init" "False" + "DT_PROP|/soc/sai1@40015424|wakeup-source" "False" + "DT_PROP|/soc/sai1@40015424|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/sai1@40015424|NUM" "1" + "DT_REG|/soc/sai1@40015424|ADDR" "0x40015424" + "DT_REG|/soc/sai1@40015424|SIZE" "0x20" + "DT_UNIT_ADDR|/soc/sai1@40015424" "0x40015424" + "DT_NODE|/soc/opamp1@40010300" TRUE + "DT_NODELABEL|opamp1" "/soc/opamp1@40010300" + "DT_PROP|/soc/opamp1@40010300|st,power-mode" "NORMAL" + "DT_PROP|/soc/opamp1@40010300|st,lock-enable" "False" + "DT_PROP|/soc/opamp1@40010300|st,enable-self-calibration" "False" + "DT_PROP|/soc/opamp1@40010300|st,inm-filtering" "NONE" + "DT_PROP|/soc/opamp1@40010300|st,inputs-mux-mode" "DISABLE" + "DT_PROP|/soc/opamp1@40010300|reg" "1073808128;24" + "DT_PROP|/soc/opamp1@40010300|clock-names" "opampx" + "DT_PROP|/soc/opamp1@40010300|programmable-gain" "OPAMP_GAIN_1;OPAMP_GAIN_2;OPAMP_GAIN_3;OPAMP_GAIN_4;OPAMP_GAIN_7;OPAMP_GAIN_8;OPAMP_GAIN_15;OPAMP_GAIN_16;OPAMP_GAIN_31;OPAMP_GAIN_32;OPAMP_GAIN_63;OPAMP_GAIN_64" + "DT_PROP|/soc/opamp1@40010300|status" "disabled" + "DT_PROP|/soc/opamp1@40010300|compatible" "st,stm32g4-opamp;st,stm32-opamp" + "DT_PROP|/soc/opamp1@40010300|dma-coherent" "False" + "DT_PROP|/soc/opamp1@40010300|zephyr,deferred-init" "False" + "DT_PROP|/soc/opamp1@40010300|wakeup-source" "False" + "DT_PROP|/soc/opamp1@40010300|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/opamp1@40010300|NUM" "1" + "DT_REG|/soc/opamp1@40010300|ADDR" "0x40010300" + "DT_REG|/soc/opamp1@40010300|SIZE" "0x18" + "DT_UNIT_ADDR|/soc/opamp1@40010300" "0x40010300" + "DT_NODE|/soc/opamp2@40010304" TRUE + "DT_NODELABEL|opamp2" "/soc/opamp2@40010304" + "DT_PROP|/soc/opamp2@40010304|st,power-mode" "NORMAL" + "DT_PROP|/soc/opamp2@40010304|st,lock-enable" "False" + "DT_PROP|/soc/opamp2@40010304|st,enable-self-calibration" "False" + "DT_PROP|/soc/opamp2@40010304|st,inm-filtering" "NONE" + "DT_PROP|/soc/opamp2@40010304|st,inputs-mux-mode" "DISABLE" + "DT_PROP|/soc/opamp2@40010304|reg" "1073808132;24" + "DT_PROP|/soc/opamp2@40010304|clock-names" "opampx" + "DT_PROP|/soc/opamp2@40010304|programmable-gain" "OPAMP_GAIN_1;OPAMP_GAIN_2;OPAMP_GAIN_3;OPAMP_GAIN_4;OPAMP_GAIN_7;OPAMP_GAIN_8;OPAMP_GAIN_15;OPAMP_GAIN_16;OPAMP_GAIN_31;OPAMP_GAIN_32;OPAMP_GAIN_63;OPAMP_GAIN_64" + "DT_PROP|/soc/opamp2@40010304|status" "disabled" + "DT_PROP|/soc/opamp2@40010304|compatible" "st,stm32g4-opamp;st,stm32-opamp" + "DT_PROP|/soc/opamp2@40010304|dma-coherent" "False" + "DT_PROP|/soc/opamp2@40010304|zephyr,deferred-init" "False" + "DT_PROP|/soc/opamp2@40010304|wakeup-source" "False" + "DT_PROP|/soc/opamp2@40010304|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/opamp2@40010304|NUM" "1" + "DT_REG|/soc/opamp2@40010304|ADDR" "0x40010304" + "DT_REG|/soc/opamp2@40010304|SIZE" "0x18" + "DT_UNIT_ADDR|/soc/opamp2@40010304" "0x40010304" + "DT_NODE|/soc/opamp3@40010308" TRUE + "DT_NODELABEL|opamp3" "/soc/opamp3@40010308" + "DT_PROP|/soc/opamp3@40010308|st,power-mode" "NORMAL" + "DT_PROP|/soc/opamp3@40010308|st,lock-enable" "False" + "DT_PROP|/soc/opamp3@40010308|st,enable-self-calibration" "False" + "DT_PROP|/soc/opamp3@40010308|st,inm-filtering" "NONE" + "DT_PROP|/soc/opamp3@40010308|st,inputs-mux-mode" "DISABLE" + "DT_PROP|/soc/opamp3@40010308|reg" "1073808136;24" + "DT_PROP|/soc/opamp3@40010308|clock-names" "opampx" + "DT_PROP|/soc/opamp3@40010308|programmable-gain" "OPAMP_GAIN_1;OPAMP_GAIN_2;OPAMP_GAIN_3;OPAMP_GAIN_4;OPAMP_GAIN_7;OPAMP_GAIN_8;OPAMP_GAIN_15;OPAMP_GAIN_16;OPAMP_GAIN_31;OPAMP_GAIN_32;OPAMP_GAIN_63;OPAMP_GAIN_64" + "DT_PROP|/soc/opamp3@40010308|status" "disabled" + "DT_PROP|/soc/opamp3@40010308|compatible" "st,stm32g4-opamp;st,stm32-opamp" + "DT_PROP|/soc/opamp3@40010308|dma-coherent" "False" + "DT_PROP|/soc/opamp3@40010308|zephyr,deferred-init" "False" + "DT_PROP|/soc/opamp3@40010308|wakeup-source" "False" + "DT_PROP|/soc/opamp3@40010308|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/opamp3@40010308|NUM" "1" + "DT_REG|/soc/opamp3@40010308|ADDR" "0x40010308" + "DT_REG|/soc/opamp3@40010308|SIZE" "0x18" + "DT_UNIT_ADDR|/soc/opamp3@40010308" "0x40010308" + "DT_NODE|/soc/comparator@40010200" TRUE + "DT_NODELABEL|comp1" "/soc/comparator@40010200" + "DT_PROP|/soc/comparator@40010200|hysteresis" "NONE" + "DT_PROP|/soc/comparator@40010200|st,blank-sel" "NONE" + "DT_PROP|/soc/comparator@40010200|st,miller-effect-hold-disable" "False" + "DT_PROP|/soc/comparator@40010200|reg" "1073807872;4" + "DT_PROP|/soc/comparator@40010200|interrupts" "64;0" + "DT_PROP|/soc/comparator@40010200|invert-output" "NONINVERTED" + "DT_PROP|/soc/comparator@40010200|st,exti-line" "21" + "DT_PROP|/soc/comparator@40010200|st,lock-enable" "False" + "DT_PROP|/soc/comparator@40010200|status" "disabled" + "DT_PROP|/soc/comparator@40010200|compatible" "st,stm32g4-comp;st,stm32-comp" + "DT_PROP|/soc/comparator@40010200|dma-coherent" "False" + "DT_PROP|/soc/comparator@40010200|zephyr,deferred-init" "False" + "DT_PROP|/soc/comparator@40010200|wakeup-source" "False" + "DT_PROP|/soc/comparator@40010200|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/comparator@40010200|NUM" "1" + "DT_REG|/soc/comparator@40010200|ADDR" "0x40010200" + "DT_REG|/soc/comparator@40010200|SIZE" "0x4" + "DT_UNIT_ADDR|/soc/comparator@40010200" "0x40010200" + "DT_NODE|/soc/comparator@40010204" TRUE + "DT_NODELABEL|comp2" "/soc/comparator@40010204" + "DT_PROP|/soc/comparator@40010204|hysteresis" "NONE" + "DT_PROP|/soc/comparator@40010204|st,blank-sel" "NONE" + "DT_PROP|/soc/comparator@40010204|st,miller-effect-hold-disable" "False" + "DT_PROP|/soc/comparator@40010204|reg" "1073807876;4" + "DT_PROP|/soc/comparator@40010204|interrupts" "64;0" + "DT_PROP|/soc/comparator@40010204|invert-output" "NONINVERTED" + "DT_PROP|/soc/comparator@40010204|st,exti-line" "22" + "DT_PROP|/soc/comparator@40010204|st,lock-enable" "False" + "DT_PROP|/soc/comparator@40010204|status" "disabled" + "DT_PROP|/soc/comparator@40010204|compatible" "st,stm32g4-comp;st,stm32-comp" + "DT_PROP|/soc/comparator@40010204|dma-coherent" "False" + "DT_PROP|/soc/comparator@40010204|zephyr,deferred-init" "False" + "DT_PROP|/soc/comparator@40010204|wakeup-source" "False" + "DT_PROP|/soc/comparator@40010204|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/comparator@40010204|NUM" "1" + "DT_REG|/soc/comparator@40010204|ADDR" "0x40010204" + "DT_REG|/soc/comparator@40010204|SIZE" "0x4" + "DT_UNIT_ADDR|/soc/comparator@40010204" "0x40010204" + "DT_NODE|/soc/crc@40023000" TRUE + "DT_NODELABEL|crc" "/soc/crc@40023000" + "DT_PROP|/soc/crc@40023000|reg" "1073885184;1024" + "DT_PROP|/soc/crc@40023000|status" "disabled" + "DT_PROP|/soc/crc@40023000|compatible" "st,stm32-crc" + "DT_PROP|/soc/crc@40023000|dma-coherent" "False" + "DT_PROP|/soc/crc@40023000|zephyr,deferred-init" "False" + "DT_PROP|/soc/crc@40023000|wakeup-source" "False" + "DT_PROP|/soc/crc@40023000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/soc/crc@40023000|NUM" "1" + "DT_REG|/soc/crc@40023000|ADDR" "0x40023000" + "DT_REG|/soc/crc@40023000|SIZE" "0x400" + "DT_UNIT_ADDR|/soc/crc@40023000" "0x40023000" + "DT_NODE|/cpus" TRUE + "DT_REG|/cpus|NUM" "0" + "DT_REG|/cpus|ADDR" "" + "DT_REG|/cpus|SIZE" "" + "DT_UNIT_ADDR|/cpus" "NONE" + "DT_NODE|/cpus/cpu@0" TRUE + "DT_NODELABEL|cpu0" "/cpus/cpu@0" + "DT_PROP|/cpus/cpu@0|cpu-power-states" "/cpus/power-states/state0;/cpus/power-states/state1" + "DT_PROP|/cpus/cpu@0|compatible" "arm,cortex-m4f" + "DT_PROP|/cpus/cpu@0|reg" "0" + "DT_PROP|/cpus/cpu@0|dma-coherent" "False" + "DT_PROP|/cpus/cpu@0|zephyr,deferred-init" "False" + "DT_PROP|/cpus/cpu@0|wakeup-source" "False" + "DT_PROP|/cpus/cpu@0|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/cpus/cpu@0|NUM" "1" + "DT_REG|/cpus/cpu@0|ADDR" "0x0" + "DT_REG|/cpus/cpu@0|SIZE" "NONE" + "DT_UNIT_ADDR|/cpus/cpu@0" "0x0" + "DT_NODE|/cpus/power-states" TRUE + "DT_REG|/cpus/power-states|NUM" "0" + "DT_REG|/cpus/power-states|ADDR" "" + "DT_REG|/cpus/power-states|SIZE" "" + "DT_UNIT_ADDR|/cpus/power-states" "NONE" + "DT_NODE|/cpus/power-states/state0" TRUE + "DT_NODELABEL|stop0" "/cpus/power-states/state0" + "DT_PROP|/cpus/power-states/state0|power-state-name" "suspend-to-idle" + "DT_PROP|/cpus/power-states/state0|substate-id" "1" + "DT_PROP|/cpus/power-states/state0|min-residency-us" "20" + "DT_PROP|/cpus/power-states/state0|zephyr,pm-device-disabled" "False" + "DT_REG|/cpus/power-states/state0|NUM" "0" + "DT_REG|/cpus/power-states/state0|ADDR" "" + "DT_REG|/cpus/power-states/state0|SIZE" "" + "DT_UNIT_ADDR|/cpus/power-states/state0" "NONE" + "DT_NODE|/cpus/power-states/state1" TRUE + "DT_NODELABEL|stop1" "/cpus/power-states/state1" + "DT_PROP|/cpus/power-states/state1|power-state-name" "suspend-to-idle" + "DT_PROP|/cpus/power-states/state1|substate-id" "2" + "DT_PROP|/cpus/power-states/state1|min-residency-us" "100" + "DT_PROP|/cpus/power-states/state1|zephyr,pm-device-disabled" "False" + "DT_REG|/cpus/power-states/state1|NUM" "0" + "DT_REG|/cpus/power-states/state1|ADDR" "" + "DT_REG|/cpus/power-states/state1|SIZE" "" + "DT_UNIT_ADDR|/cpus/power-states/state1" "NONE" + "DT_NODE|/memory@20000000" TRUE + "DT_NODELABEL|sram0" "/memory@20000000" + "DT_PROP|/memory@20000000|zephyr,memory-region" "SRAM0" + "DT_PROP|/memory@20000000|compatible" "zephyr,memory-region;mmio-sram" + "DT_PROP|/memory@20000000|reg" "536870912;32768" + "DT_PROP|/memory@20000000|dma-coherent" "False" + "DT_PROP|/memory@20000000|zephyr,deferred-init" "False" + "DT_PROP|/memory@20000000|wakeup-source" "False" + "DT_PROP|/memory@20000000|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/memory@20000000|NUM" "1" + "DT_REG|/memory@20000000|ADDR" "0x20000000" + "DT_REG|/memory@20000000|SIZE" "0x8000" + "DT_UNIT_ADDR|/memory@20000000" "0x20000000" + "DT_NODE|/clocks" TRUE + "DT_REG|/clocks|NUM" "0" + "DT_REG|/clocks|ADDR" "" + "DT_REG|/clocks|SIZE" "" + "DT_UNIT_ADDR|/clocks" "NONE" + "DT_NODE|/clocks/clk-hse" TRUE + "DT_NODELABEL|clk_hse" "/clocks/clk-hse" + "DT_PROP|/clocks/clk-hse|hse-bypass" "False" + "DT_PROP|/clocks/clk-hse|css-enabled" "False" + "DT_PROP|/clocks/clk-hse|clock-frequency" "24000000" + "DT_PROP|/clocks/clk-hse|status" "okay" + "DT_PROP|/clocks/clk-hse|compatible" "st,stm32-hse-clock" + "DT_PROP|/clocks/clk-hse|dma-coherent" "False" + "DT_PROP|/clocks/clk-hse|zephyr,deferred-init" "False" + "DT_PROP|/clocks/clk-hse|wakeup-source" "False" + "DT_PROP|/clocks/clk-hse|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/clocks/clk-hse|NUM" "0" + "DT_REG|/clocks/clk-hse|ADDR" "" + "DT_REG|/clocks/clk-hse|SIZE" "" + "DT_UNIT_ADDR|/clocks/clk-hse" "NONE" + "DT_NODE|/clocks/clk-hsi" TRUE + "DT_NODELABEL|clk_hsi" "/clocks/clk-hsi" + "DT_PROP|/clocks/clk-hsi|clock-frequency" "16000000" + "DT_PROP|/clocks/clk-hsi|status" "disabled" + "DT_PROP|/clocks/clk-hsi|compatible" "fixed-clock" + "DT_PROP|/clocks/clk-hsi|dma-coherent" "False" + "DT_PROP|/clocks/clk-hsi|zephyr,deferred-init" "False" + "DT_PROP|/clocks/clk-hsi|wakeup-source" "False" + "DT_PROP|/clocks/clk-hsi|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/clocks/clk-hsi|NUM" "0" + "DT_REG|/clocks/clk-hsi|ADDR" "" + "DT_REG|/clocks/clk-hsi|SIZE" "" + "DT_UNIT_ADDR|/clocks/clk-hsi" "NONE" + "DT_NODE|/clocks/clk-hsi48" TRUE + "DT_NODELABEL|clk_hsi48" "/clocks/clk-hsi48" + "DT_PROP|/clocks/clk-hsi48|clock-frequency" "48000000" + "DT_PROP|/clocks/clk-hsi48|status" "okay" + "DT_PROP|/clocks/clk-hsi48|compatible" "fixed-clock" + "DT_PROP|/clocks/clk-hsi48|dma-coherent" "False" + "DT_PROP|/clocks/clk-hsi48|zephyr,deferred-init" "False" + "DT_PROP|/clocks/clk-hsi48|wakeup-source" "False" + "DT_PROP|/clocks/clk-hsi48|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/clocks/clk-hsi48|NUM" "0" + "DT_REG|/clocks/clk-hsi48|ADDR" "" + "DT_REG|/clocks/clk-hsi48|SIZE" "" + "DT_UNIT_ADDR|/clocks/clk-hsi48" "NONE" + "DT_NODE|/clocks/clk-lse" TRUE + "DT_NODELABEL|clk_lse" "/clocks/clk-lse" + "DT_PROP|/clocks/clk-lse|driving-capability" "0" + "DT_PROP|/clocks/clk-lse|lse-bypass" "False" + "DT_PROP|/clocks/clk-lse|clock-frequency" "32768" + "DT_PROP|/clocks/clk-lse|status" "okay" + "DT_PROP|/clocks/clk-lse|compatible" "st,stm32-lse-clock" + "DT_PROP|/clocks/clk-lse|dma-coherent" "False" + "DT_PROP|/clocks/clk-lse|zephyr,deferred-init" "False" + "DT_PROP|/clocks/clk-lse|wakeup-source" "False" + "DT_PROP|/clocks/clk-lse|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/clocks/clk-lse|NUM" "0" + "DT_REG|/clocks/clk-lse|ADDR" "" + "DT_REG|/clocks/clk-lse|SIZE" "" + "DT_UNIT_ADDR|/clocks/clk-lse" "NONE" + "DT_NODE|/clocks/clk-lsi" TRUE + "DT_NODELABEL|clk_lsi" "/clocks/clk-lsi" + "DT_PROP|/clocks/clk-lsi|clock-frequency" "32000" + "DT_PROP|/clocks/clk-lsi|status" "okay" + "DT_PROP|/clocks/clk-lsi|compatible" "fixed-clock" + "DT_PROP|/clocks/clk-lsi|dma-coherent" "False" + "DT_PROP|/clocks/clk-lsi|zephyr,deferred-init" "False" + "DT_PROP|/clocks/clk-lsi|wakeup-source" "False" + "DT_PROP|/clocks/clk-lsi|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/clocks/clk-lsi|NUM" "0" + "DT_REG|/clocks/clk-lsi|ADDR" "" + "DT_REG|/clocks/clk-lsi|SIZE" "" + "DT_UNIT_ADDR|/clocks/clk-lsi" "NONE" + "DT_NODE|/clocks/pll" TRUE + "DT_NODELABEL|pll" "/clocks/pll" + "DT_PROP|/clocks/pll|div-m" "6" + "DT_PROP|/clocks/pll|mul-n" "85" + "DT_PROP|/clocks/pll|div-p" "7" + "DT_PROP|/clocks/pll|div-q" "2" + "DT_PROP|/clocks/pll|div-r" "2" + "DT_PROP|/clocks/pll|status" "okay" + "DT_PROP|/clocks/pll|compatible" "st,stm32g4-pll-clock" + "DT_PROP|/clocks/pll|dma-coherent" "False" + "DT_PROP|/clocks/pll|zephyr,deferred-init" "False" + "DT_PROP|/clocks/pll|wakeup-source" "False" + "DT_PROP|/clocks/pll|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/clocks/pll|NUM" "0" + "DT_REG|/clocks/pll|ADDR" "" + "DT_REG|/clocks/pll|SIZE" "" + "DT_UNIT_ADDR|/clocks/pll" "NONE" + "DT_NODE|/dietemp" TRUE + "DT_NODELABEL|die_temp" "/dietemp" + "DT_PROP|/dietemp|nvmem-cell-names" "TS_CAL1;TS_CAL2" + "DT_PROP|/dietemp|ts-cal2-temp" "130" + "DT_PROP|/dietemp|ts-cal1-temp" "30" + "DT_PROP|/dietemp|ts-cal-vrefanalog" "3000" + "DT_PROP|/dietemp|ts-cal-resolution" "12" + "DT_PROP|/dietemp|status" "disabled" + "DT_PROP|/dietemp|compatible" "st,stm32-temp-cal" + "DT_PROP|/dietemp|dma-coherent" "False" + "DT_PROP|/dietemp|zephyr,deferred-init" "False" + "DT_PROP|/dietemp|wakeup-source" "False" + "DT_PROP|/dietemp|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/dietemp|NUM" "0" + "DT_REG|/dietemp|ADDR" "" + "DT_REG|/dietemp|SIZE" "" + "DT_UNIT_ADDR|/dietemp" "NONE" + "DT_NODE|/vref" TRUE + "DT_NODELABEL|vref" "/vref" + "DT_PROP|/vref|vrefint-cal-mv" "3000" + "DT_PROP|/vref|vrefint-cal-resolution" "12" + "DT_PROP|/vref|status" "disabled" + "DT_PROP|/vref|compatible" "st,stm32-vref" + "DT_PROP|/vref|dma-coherent" "False" + "DT_PROP|/vref|zephyr,deferred-init" "False" + "DT_PROP|/vref|wakeup-source" "False" + "DT_PROP|/vref|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/vref|NUM" "0" + "DT_REG|/vref|ADDR" "" + "DT_REG|/vref|SIZE" "" + "DT_UNIT_ADDR|/vref" "NONE" + "DT_NODE|/vbat" TRUE + "DT_NODELABEL|vbat" "/vbat" + "DT_PROP|/vbat|ratio" "3" + "DT_PROP|/vbat|status" "disabled" + "DT_PROP|/vbat|compatible" "st,stm32-vbat" + "DT_PROP|/vbat|dma-coherent" "False" + "DT_PROP|/vbat|zephyr,deferred-init" "False" + "DT_PROP|/vbat|wakeup-source" "False" + "DT_PROP|/vbat|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/vbat|NUM" "0" + "DT_REG|/vbat|ADDR" "" + "DT_REG|/vbat|SIZE" "" + "DT_UNIT_ADDR|/vbat" "NONE" + "DT_NODE|/usbphy" TRUE + "DT_NODELABEL|usb_fs_phy" "/usbphy" + "DT_PROP|/usbphy|compatible" "usb-nop-xceiv" + "DT_PROP|/usbphy|dma-coherent" "False" + "DT_PROP|/usbphy|zephyr,deferred-init" "False" + "DT_PROP|/usbphy|wakeup-source" "False" + "DT_PROP|/usbphy|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/usbphy|NUM" "0" + "DT_REG|/usbphy|ADDR" "" + "DT_REG|/usbphy|SIZE" "" + "DT_UNIT_ADDR|/usbphy" "NONE" + "DT_NODE|/smbus1" TRUE + "DT_NODELABEL|smbus1" "/smbus1" + "DT_PROP|/smbus1|i2c" "/soc/i2c@40005400" + "DT_PROP|/smbus1|status" "disabled" + "DT_PROP|/smbus1|compatible" "st,stm32-smbus" + "DT_PROP|/smbus1|dma-coherent" "False" + "DT_PROP|/smbus1|zephyr,deferred-init" "False" + "DT_PROP|/smbus1|wakeup-source" "False" + "DT_PROP|/smbus1|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/smbus1|NUM" "0" + "DT_REG|/smbus1|ADDR" "" + "DT_REG|/smbus1|SIZE" "" + "DT_UNIT_ADDR|/smbus1" "NONE" + "DT_NODE|/smbus2" TRUE + "DT_NODELABEL|smbus2" "/smbus2" + "DT_PROP|/smbus2|i2c" "/soc/i2c@40005800" + "DT_PROP|/smbus2|status" "disabled" + "DT_PROP|/smbus2|compatible" "st,stm32-smbus" + "DT_PROP|/smbus2|dma-coherent" "False" + "DT_PROP|/smbus2|zephyr,deferred-init" "False" + "DT_PROP|/smbus2|wakeup-source" "False" + "DT_PROP|/smbus2|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/smbus2|NUM" "0" + "DT_REG|/smbus2|ADDR" "" + "DT_REG|/smbus2|SIZE" "" + "DT_UNIT_ADDR|/smbus2" "NONE" + "DT_NODE|/smbus3" TRUE + "DT_NODELABEL|smbus3" "/smbus3" + "DT_PROP|/smbus3|i2c" "/soc/i2c@40007800" + "DT_PROP|/smbus3|status" "disabled" + "DT_PROP|/smbus3|compatible" "st,stm32-smbus" + "DT_PROP|/smbus3|dma-coherent" "False" + "DT_PROP|/smbus3|zephyr,deferred-init" "False" + "DT_PROP|/smbus3|wakeup-source" "False" + "DT_PROP|/smbus3|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/smbus3|NUM" "0" + "DT_REG|/smbus3|ADDR" "" + "DT_REG|/smbus3|SIZE" "" + "DT_UNIT_ADDR|/smbus3" "NONE" + "DT_NODE|/connector" TRUE + "DT_NODELABEL|arduino_header" "/connector" + "DT_PROP|/connector|gpio-map-mask" "4294967295;4294967232" + "DT_PROP|/connector|gpio-map-pass-thru" "0;63" + "DT_PROP|/connector|compatible" "arduino-header-r3" + "DT_PROP|/connector|dma-coherent" "False" + "DT_PROP|/connector|zephyr,deferred-init" "False" + "DT_PROP|/connector|wakeup-source" "False" + "DT_PROP|/connector|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/connector|NUM" "0" + "DT_REG|/connector|ADDR" "" + "DT_REG|/connector|SIZE" "" + "DT_UNIT_ADDR|/connector" "NONE" + "DT_NODE|/st-morpho-header" TRUE + "DT_NODELABEL|st_morpho_header" "/st-morpho-header" + "DT_PROP|/st-morpho-header|gpio-map-mask" "255;0" + "DT_PROP|/st-morpho-header|gpio-map-pass-thru" "0;127" + "DT_PROP|/st-morpho-header|compatible" "st-morpho-header" + "DT_PROP|/st-morpho-header|dma-coherent" "False" + "DT_PROP|/st-morpho-header|zephyr,deferred-init" "False" + "DT_PROP|/st-morpho-header|wakeup-source" "False" + "DT_PROP|/st-morpho-header|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/st-morpho-header|NUM" "0" + "DT_REG|/st-morpho-header|ADDR" "" + "DT_REG|/st-morpho-header|SIZE" "" + "DT_UNIT_ADDR|/st-morpho-header" "NONE" + "DT_NODE|/leds" TRUE + "DT_NODELABEL|leds" "/leds" + "DT_PROP|/leds|compatible" "gpio-leds" + "DT_REG|/leds|NUM" "0" + "DT_REG|/leds|ADDR" "" + "DT_REG|/leds|SIZE" "" + "DT_UNIT_ADDR|/leds" "NONE" + "DT_NODE|/leds/led_0" TRUE + "DT_NODELABEL|green_led" "/leds/led_0" + "DT_PROP|/leds/led_0|label" "User LD2" + "DT_REG|/leds/led_0|NUM" "0" + "DT_REG|/leds/led_0|ADDR" "" + "DT_REG|/leds/led_0|SIZE" "" + "DT_UNIT_ADDR|/leds/led_0" "NONE" + "DT_NODE|/pwmleds" TRUE + "DT_PROP|/pwmleds|compatible" "pwm-leds" + "DT_PROP|/pwmleds|dma-coherent" "False" + "DT_PROP|/pwmleds|zephyr,deferred-init" "False" + "DT_PROP|/pwmleds|wakeup-source" "False" + "DT_PROP|/pwmleds|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/pwmleds|NUM" "0" + "DT_REG|/pwmleds|ADDR" "" + "DT_REG|/pwmleds|SIZE" "" + "DT_UNIT_ADDR|/pwmleds" "NONE" + "DT_NODE|/pwmleds/green_pwm_led" TRUE + "DT_NODELABEL|green_pwm_led" "/pwmleds/green_pwm_led" + "DT_REG|/pwmleds/green_pwm_led|NUM" "0" + "DT_REG|/pwmleds/green_pwm_led|ADDR" "" + "DT_REG|/pwmleds/green_pwm_led|SIZE" "" + "DT_UNIT_ADDR|/pwmleds/green_pwm_led" "NONE" + "DT_NODE|/gpio_keys" TRUE + "DT_PROP|/gpio_keys|debounce-interval-ms" "30" + "DT_PROP|/gpio_keys|polling-mode" "False" + "DT_PROP|/gpio_keys|zephyr,suspend-action" "disconnect-with-pupd" + "DT_PROP|/gpio_keys|compatible" "gpio-keys" + "DT_PROP|/gpio_keys|dma-coherent" "False" + "DT_PROP|/gpio_keys|zephyr,deferred-init" "False" + "DT_PROP|/gpio_keys|wakeup-source" "False" + "DT_PROP|/gpio_keys|zephyr,pm-device-runtime-auto" "False" + "DT_REG|/gpio_keys|NUM" "0" + "DT_REG|/gpio_keys|ADDR" "" + "DT_REG|/gpio_keys|SIZE" "" + "DT_UNIT_ADDR|/gpio_keys" "NONE" + "DT_NODE|/gpio_keys/button" TRUE + "DT_NODELABEL|user_button" "/gpio_keys/button" + "DT_PROP|/gpio_keys/button|label" "User" + "DT_PROP|/gpio_keys/button|zephyr,code" "11" + "DT_REG|/gpio_keys/button|NUM" "0" + "DT_REG|/gpio_keys/button|ADDR" "" + "DT_REG|/gpio_keys/button|SIZE" "" + "DT_UNIT_ADDR|/gpio_keys/button" "NONE" + "DT_COMP|st,stm32g431rb-nucleo" "/" + "DT_COMP|st,stm32g431" "/soc" + "DT_COMP|st,stm32g4" "/soc" + "DT_COMP|simple-bus" "/soc" + "DT_COMP|arm,v7m-nvic" "/soc/interrupt-controller@e000e100" + "DT_COMP|arm,armv7m-systick" "/soc/timer@e000e010" + "DT_COMP|st,stm32-adc" "/soc/adc@50000000;/soc/adc@50000100" + "DT_COMP|st,stm32-dac" "/soc/dac@50000800;/soc/dac@50001000" + "DT_COMP|st,stm32-flash-controller" "/soc/flash-controller@40022000" + "DT_COMP|st,stm32g4-flash-controller" "/soc/flash-controller@40022000" + "DT_COMP|st,stm32-nv-flash" "/soc/flash-controller@40022000/flash@8000000" + "DT_COMP|soc-nv-flash" "/soc/flash-controller@40022000/flash@8000000" + "DT_COMP|zephyr,mapped-partition" "/soc/flash-controller@40022000/flash@8000000/partitions/partition@0;/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800;/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800;/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000" + "DT_COMP|st,stm32-nvm-otp" "/soc/flash-controller@40022000/flash@1fff7000;/soc/flash-controller@40022000/flash@1fff7500" + "DT_COMP|fixed-layout" "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout" + "DT_COMP|st,stm32-rcc" "/soc/rcc@40021000" + "DT_COMP|st,stm32-rcc-rctl" "/soc/rcc@40021000/reset-controller" + "DT_COMP|st,stm32-exti" "/soc/interrupt-controller@40010400" + "DT_COMP|st,stm32-pinctrl" "/soc/pin-controller@48000000" + "DT_COMP|st,stm32-gpio" "/soc/pin-controller@48000000/gpio@48000000;/soc/pin-controller@48000000/gpio@48000400;/soc/pin-controller@48000000/gpio@48000800;/soc/pin-controller@48000000/gpio@48000c00;/soc/pin-controller@48000000/gpio@48001000;/soc/pin-controller@48000000/gpio@48001400;/soc/pin-controller@48000000/gpio@48001800" + "DT_COMP|st,stm32-usart" "/soc/serial@40013800;/soc/serial@40004400;/soc/serial@40004800" + "DT_COMP|st,stm32-uart" "/soc/serial@40013800;/soc/serial@40004400;/soc/serial@40004800;/soc/serial@40004c00;/soc/serial@40008000" + "DT_COMP|st,stm32-lpuart" "/soc/serial@40008000" + "DT_COMP|st,stm32-watchdog" "/soc/watchdog@40003000" + "DT_COMP|st,stm32-window-watchdog" "/soc/watchdog@40002c00" + "DT_COMP|st,stm32-i2c-v2" "/soc/i2c@40005400;/soc/i2c@40005800;/soc/i2c@40007800" + "DT_COMP|st,stm32-spi-fifo" "/soc/spi@40013000;/soc/spi@40003800;/soc/spi@40003c00" + "DT_COMP|st,stm32-spi" "/soc/spi@40013000;/soc/spi@40003800;/soc/spi@40003c00" + "DT_COMP|st,stm32-fdcan" "/soc/can@40006400" + "DT_COMP|st,stm32-lptim" "/soc/timers@40007c00" + "DT_COMP|st,stm32-timers" "/soc/timers@40012c00;/soc/timers@40000000;/soc/timers@40000400;/soc/timers@40000800;/soc/timers@40001000;/soc/timers@40001400;/soc/timers@40013400;/soc/timers@40014000;/soc/timers@40014400;/soc/timers@40014800" + "DT_COMP|st,stm32-pwm" "/soc/timers@40012c00/pwm;/soc/timers@40000000/pwm;/soc/timers@40000400/pwm;/soc/timers@40000800/pwm;/soc/timers@40013400/pwm;/soc/timers@40014000/pwm;/soc/timers@40014400/pwm;/soc/timers@40014800/pwm" + "DT_COMP|st,stm32-counter" "/soc/timers@40012c00/counter;/soc/timers@40000000/counter;/soc/timers@40000400/counter;/soc/timers@40000800/counter;/soc/timers@40001000/counter;/soc/timers@40001400/counter;/soc/timers@40013400/counter;/soc/timers@40014000/counter;/soc/timers@40014400/counter;/soc/timers@40014800/counter" + "DT_COMP|st,stm32-qdec" "/soc/timers@40012c00/qdec;/soc/timers@40000000/qdec;/soc/timers@40000400/qdec;/soc/timers@40000800/qdec;/soc/timers@40013400/qdec" + "DT_COMP|st,stm32-rtc" "/soc/rtc@40002800" + "DT_COMP|st,stm32-rng" "/soc/rng@50060800" + "DT_COMP|st,stm32-usb" "/soc/usb@40005c00" + "DT_COMP|st,stm32-dma-v2" "/soc/dma@40020000;/soc/dma@40020400" + "DT_COMP|st,stm32-dmamux" "/soc/dmamux@40020800" + "DT_COMP|st,stm32-ucpd" "/soc/ucpd@4000a000" + "DT_COMP|st,stm32-sai" "/soc/sai1@40015404;/soc/sai1@40015424" + "DT_COMP|st,stm32g4-opamp" "/soc/opamp1@40010300;/soc/opamp2@40010304;/soc/opamp3@40010308" + "DT_COMP|st,stm32-opamp" "/soc/opamp1@40010300;/soc/opamp2@40010304;/soc/opamp3@40010308" + "DT_COMP|st,stm32g4-comp" "/soc/comparator@40010200;/soc/comparator@40010204" + "DT_COMP|st,stm32-comp" "/soc/comparator@40010200;/soc/comparator@40010204" + "DT_COMP|st,stm32-crc" "/soc/crc@40023000" + "DT_COMP|arm,cortex-m4f" "/cpus/cpu@0" + "DT_COMP|zephyr,power-state" "/cpus/power-states/state0;/cpus/power-states/state1" + "DT_COMP|zephyr,memory-region" "/memory@20000000" + "DT_COMP|mmio-sram" "/memory@20000000" + "DT_COMP|st,stm32-hse-clock" "/clocks/clk-hse" + "DT_COMP|fixed-clock" "/clocks/clk-hsi;/clocks/clk-hsi48;/clocks/clk-lsi" + "DT_COMP|st,stm32-lse-clock" "/clocks/clk-lse" + "DT_COMP|st,stm32g4-pll-clock" "/clocks/pll" + "DT_COMP|st,stm32-temp-cal" "/dietemp" + "DT_COMP|st,stm32-vref" "/vref" + "DT_COMP|st,stm32-vbat" "/vbat" + "DT_COMP|usb-nop-xceiv" "/usbphy" + "DT_COMP|st,stm32-smbus" "/smbus1;/smbus2;/smbus3" + "DT_COMP|arduino-header-r3" "/connector" + "DT_COMP|st-morpho-header" "/st-morpho-header" + "DT_COMP|gpio-leds" "/leds" + "DT_COMP|pwm-leds" "/pwmleds" + "DT_COMP|gpio-keys" "/gpio_keys" +) diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/app_data_alignment.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/app_data_alignment.ld new file mode 100644 index 0000000..a9257f1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/app_data_alignment.ld @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Set initial alignment to the 32 byte minimum for all MPUs */ +_app_data_align = 32; +. = ALIGN(32); diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem.ld new file mode 100644 index 0000000..7b3eead --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem.ld @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* + * This hackish way of including files is due to CMake issues: + * https://gitlab.kitware.com/cmake/cmake/issues/11985 + * https://gitlab.kitware.com/cmake/cmake/issues/13718 + * + * When using the "Unix Makefiles" generator, CMake simply + * greps for "#include" to generate dependency list. + * So if doing it normally, both files are being included + * in the dependency list. This creates weird dependency + * issue: + * + * 1. Using A.ld to create a linker script A.cmd. + * 2. Using A.cmd to generate A_prebuilt.elf. + * 3. Using A_prebuilt.elf to create B.ld. + * 4. Creating B.cmd with B.ld. + * 5. Creating B_prebuilt.elf using B.cmd. + * + * Since the dependency list of A.cmd contains both + * A.ld and B.ld, when make is invoked again, B.ld + * is newer than A.cmd so everything from this point on + * gets rebuilt. In order to break this cycle, this + * hackish needs to be used since CMake does not parse + * macros, and thus these will not appear in + * the dependency list. The dependencies should then be + * put in CMakeLists.txt instead. + * + * Note: Ninja generator does not suffer from this issue. + */ +#ifdef LINKER_APP_SMEM_UNALIGNED +#define APP_SMEM_LD +#else +#define APP_SMEM_LD +#endif + +#include APP_SMEM_LD +#undef APP_SMEM_LD diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem_aligned.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem_aligned.ld new file mode 100644 index 0000000..ce36567 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem_aligned.ld @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* Empty file */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem_unaligned.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem_unaligned.ld new file mode 100644 index 0000000..ddc31d4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/app_smem_unaligned.ld @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* Empty file */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.cmake b/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.cmake new file mode 100644 index 0000000..488e7be --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.cmake @@ -0,0 +1,189 @@ +list(APPEND sections "{NAME\;device_api_area\;GROUP\;RODATA_REGION\;SUBALIGN\;4\;NOINPUT\;TRUE}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._flash_driver_api.static.*\;SYMBOLS\;_flash_driver_api_list_start\;_flash_driver_api_list_end\;PRIO\;100}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_flash_driver_api_ext_end\;PRIO\;101}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._shared_irq_driver_api.static.*\;SYMBOLS\;_shared_irq_driver_api_list_start\;_shared_irq_driver_api_list_end\;PRIO\;102}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_shared_irq_driver_api_ext_end\;PRIO\;103}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._dmic_driver_api.static.*\;SYMBOLS\;_dmic_driver_api_list_start\;_dmic_driver_api_list_end\;PRIO\;104}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_dmic_driver_api_ext_end\;PRIO\;105}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._crypto_driver_api.static.*\;SYMBOLS\;_crypto_driver_api_list_start\;_crypto_driver_api_list_end\;PRIO\;106}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_crypto_driver_api_ext_end\;PRIO\;107}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._adc_driver_api.static.*\;SYMBOLS\;_adc_driver_api_list_start\;_adc_driver_api_list_end\;PRIO\;108}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_adc_driver_api_ext_end\;PRIO\;109}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._auxdisplay_driver_api.static.*\;SYMBOLS\;_auxdisplay_driver_api_list_start\;_auxdisplay_driver_api_list_end\;PRIO\;110}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_auxdisplay_driver_api_ext_end\;PRIO\;111}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._bbram_driver_api.static.*\;SYMBOLS\;_bbram_driver_api_list_start\;_bbram_driver_api_list_end\;PRIO\;112}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_bbram_driver_api_ext_end\;PRIO\;113}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._biometric_driver_api.static.*\;SYMBOLS\;_biometric_driver_api_list_start\;_biometric_driver_api_list_end\;PRIO\;114}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_biometric_driver_api_ext_end\;PRIO\;115}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._bt_hci_driver_api.static.*\;SYMBOLS\;_bt_hci_driver_api_list_start\;_bt_hci_driver_api_list_end\;PRIO\;116}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_bt_hci_driver_api_ext_end\;PRIO\;117}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._can_driver_api.static.*\;SYMBOLS\;_can_driver_api_list_start\;_can_driver_api_list_end\;PRIO\;118}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_can_driver_api_ext_end\;PRIO\;119}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._cellular_driver_api.static.*\;SYMBOLS\;_cellular_driver_api_list_start\;_cellular_driver_api_list_end\;PRIO\;120}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_cellular_driver_api_ext_end\;PRIO\;121}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._charger_driver_api.static.*\;SYMBOLS\;_charger_driver_api_list_start\;_charger_driver_api_list_end\;PRIO\;122}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_charger_driver_api_ext_end\;PRIO\;123}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._clock_control_driver_api.static.*\;SYMBOLS\;_clock_control_driver_api_list_start\;_clock_control_driver_api_list_end\;PRIO\;124}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._nrf_clock_control_driver_api.static.*\;SYMBOLS\;_nrf_clock_control_driver_api_list_start\;_nrf_clock_control_driver_api_list_end\;PRIO\;125}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_nrf_clock_control_driver_api_ext_end\;PRIO\;126}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_clock_control_driver_api_ext_end\;PRIO\;127}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._comparator_driver_api.static.*\;SYMBOLS\;_comparator_driver_api_list_start\;_comparator_driver_api_list_end\;PRIO\;128}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_comparator_driver_api_ext_end\;PRIO\;129}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._coredump_driver_api.static.*\;SYMBOLS\;_coredump_driver_api_list_start\;_coredump_driver_api_list_end\;PRIO\;130}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_coredump_driver_api_ext_end\;PRIO\;131}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._counter_driver_api.static.*\;SYMBOLS\;_counter_driver_api_list_start\;_counter_driver_api_list_end\;PRIO\;132}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_counter_driver_api_ext_end\;PRIO\;133}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._crc_driver_api.static.*\;SYMBOLS\;_crc_driver_api_list_start\;_crc_driver_api_list_end\;PRIO\;134}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_crc_driver_api_ext_end\;PRIO\;135}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._dac_driver_api.static.*\;SYMBOLS\;_dac_driver_api_list_start\;_dac_driver_api_list_end\;PRIO\;136}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_dac_driver_api_ext_end\;PRIO\;137}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._dai_driver_api.static.*\;SYMBOLS\;_dai_driver_api_list_start\;_dai_driver_api_list_end\;PRIO\;138}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_dai_driver_api_ext_end\;PRIO\;139}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._display_driver_api.static.*\;SYMBOLS\;_display_driver_api_list_start\;_display_driver_api_list_end\;PRIO\;140}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_display_driver_api_ext_end\;PRIO\;141}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._dma_driver_api.static.*\;SYMBOLS\;_dma_driver_api_list_start\;_dma_driver_api_list_end\;PRIO\;142}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_dma_driver_api_ext_end\;PRIO\;143}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._edac_driver_api.static.*\;SYMBOLS\;_edac_driver_api_list_start\;_edac_driver_api_list_end\;PRIO\;144}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_edac_driver_api_ext_end\;PRIO\;145}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._eeprom_driver_api.static.*\;SYMBOLS\;_eeprom_driver_api_list_start\;_eeprom_driver_api_list_end\;PRIO\;146}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_eeprom_driver_api_ext_end\;PRIO\;147}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._emul_bbram_driver_api.static.*\;SYMBOLS\;_emul_bbram_driver_api_list_start\;_emul_bbram_driver_api_list_end\;PRIO\;148}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_emul_bbram_driver_api_ext_end\;PRIO\;149}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._fuel_gauge_emul_driver_api.static.*\;SYMBOLS\;_fuel_gauge_emul_driver_api_list_start\;_fuel_gauge_emul_driver_api_list_end\;PRIO\;150}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_fuel_gauge_emul_driver_api_ext_end\;PRIO\;151}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._emul_sensor_driver_api.static.*\;SYMBOLS\;_emul_sensor_driver_api_list_start\;_emul_sensor_driver_api_list_end\;PRIO\;152}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_emul_sensor_driver_api_ext_end\;PRIO\;153}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._entropy_driver_api.static.*\;SYMBOLS\;_entropy_driver_api_list_start\;_entropy_driver_api_list_end\;PRIO\;154}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_entropy_driver_api_ext_end\;PRIO\;155}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._espi_driver_api.static.*\;SYMBOLS\;_espi_driver_api_list_start\;_espi_driver_api_list_end\;PRIO\;156}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_espi_driver_api_ext_end\;PRIO\;157}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._espi_saf_driver_api.static.*\;SYMBOLS\;_espi_saf_driver_api_list_start\;_espi_saf_driver_api_list_end\;PRIO\;158}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_espi_saf_driver_api_ext_end\;PRIO\;159}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._fpga_driver_api.static.*\;SYMBOLS\;_fpga_driver_api_list_start\;_fpga_driver_api_list_end\;PRIO\;160}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_fpga_driver_api_ext_end\;PRIO\;161}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._fuel_gauge_driver_api.static.*\;SYMBOLS\;_fuel_gauge_driver_api_list_start\;_fuel_gauge_driver_api_list_end\;PRIO\;162}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_fuel_gauge_driver_api_ext_end\;PRIO\;163}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._gnss_driver_api.static.*\;SYMBOLS\;_gnss_driver_api_list_start\;_gnss_driver_api_list_end\;PRIO\;164}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_gnss_driver_api_ext_end\;PRIO\;165}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._gpio_driver_api.static.*\;SYMBOLS\;_gpio_driver_api_list_start\;_gpio_driver_api_list_end\;PRIO\;166}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_gpio_driver_api_ext_end\;PRIO\;167}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._haptics_driver_api.static.*\;SYMBOLS\;_haptics_driver_api_list_start\;_haptics_driver_api_list_end\;PRIO\;168}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_haptics_driver_api_ext_end\;PRIO\;169}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._hwspinlock_driver_api.static.*\;SYMBOLS\;_hwspinlock_driver_api_list_start\;_hwspinlock_driver_api_list_end\;PRIO\;170}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_hwspinlock_driver_api_ext_end\;PRIO\;171}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._i2c_driver_api.static.*\;SYMBOLS\;_i2c_driver_api_list_start\;_i2c_driver_api_list_end\;PRIO\;172}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._i3c_driver_api.static.*\;SYMBOLS\;_i3c_driver_api_list_start\;_i3c_driver_api_list_end\;PRIO\;173}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_i3c_driver_api_ext_end\;PRIO\;174}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_i2c_driver_api_ext_end\;PRIO\;175}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._i2c_target_driver_api.static.*\;SYMBOLS\;_i2c_target_driver_api_list_start\;_i2c_target_driver_api_list_end\;PRIO\;176}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_i2c_target_driver_api_ext_end\;PRIO\;177}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._i2s_driver_api.static.*\;SYMBOLS\;_i2s_driver_api_list_start\;_i2s_driver_api_list_end\;PRIO\;178}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_i2s_driver_api_ext_end\;PRIO\;179}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._ipm_driver_api.static.*\;SYMBOLS\;_ipm_driver_api_list_start\;_ipm_driver_api_list_end\;PRIO\;180}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_ipm_driver_api_ext_end\;PRIO\;181}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._led_driver_api.static.*\;SYMBOLS\;_led_driver_api_list_start\;_led_driver_api_list_end\;PRIO\;182}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_led_driver_api_ext_end\;PRIO\;183}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._led_strip_driver_api.static.*\;SYMBOLS\;_led_strip_driver_api_list_start\;_led_strip_driver_api_list_end\;PRIO\;184}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_led_strip_driver_api_ext_end\;PRIO\;185}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._lora_driver_api.static.*\;SYMBOLS\;_lora_driver_api_list_start\;_lora_driver_api_list_end\;PRIO\;186}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_lora_driver_api_ext_end\;PRIO\;187}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._mbox_driver_api.static.*\;SYMBOLS\;_mbox_driver_api_list_start\;_mbox_driver_api_list_end\;PRIO\;188}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_mbox_driver_api_ext_end\;PRIO\;189}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._mdio_driver_api.static.*\;SYMBOLS\;_mdio_driver_api_list_start\;_mdio_driver_api_list_end\;PRIO\;190}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_mdio_driver_api_ext_end\;PRIO\;191}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._mipi_dbi_driver_api.static.*\;SYMBOLS\;_mipi_dbi_driver_api_list_start\;_mipi_dbi_driver_api_list_end\;PRIO\;192}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_mipi_dbi_driver_api_ext_end\;PRIO\;193}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._mipi_dsi_driver_api.static.*\;SYMBOLS\;_mipi_dsi_driver_api_list_start\;_mipi_dsi_driver_api_list_end\;PRIO\;194}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_mipi_dsi_driver_api_ext_end\;PRIO\;195}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._mspi_driver_api.static.*\;SYMBOLS\;_mspi_driver_api_list_start\;_mspi_driver_api_list_end\;PRIO\;196}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_mspi_driver_api_ext_end\;PRIO\;197}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._opamp_driver_api.static.*\;SYMBOLS\;_opamp_driver_api_list_start\;_opamp_driver_api_list_end\;PRIO\;198}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_opamp_driver_api_ext_end\;PRIO\;199}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._otp_driver_api.static.*\;SYMBOLS\;_otp_driver_api_list_start\;_otp_driver_api_list_end\;PRIO\;200}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_otp_driver_api_ext_end\;PRIO\;201}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._peci_driver_api.static.*\;SYMBOLS\;_peci_driver_api_list_start\;_peci_driver_api_list_end\;PRIO\;202}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_peci_driver_api_ext_end\;PRIO\;203}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._ps2_driver_api.static.*\;SYMBOLS\;_ps2_driver_api_list_start\;_ps2_driver_api_list_end\;PRIO\;204}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_ps2_driver_api_ext_end\;PRIO\;205}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._ptp_clock_driver_api.static.*\;SYMBOLS\;_ptp_clock_driver_api_list_start\;_ptp_clock_driver_api_list_end\;PRIO\;206}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_ptp_clock_driver_api_ext_end\;PRIO\;207}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._pwm_driver_api.static.*\;SYMBOLS\;_pwm_driver_api_list_start\;_pwm_driver_api_list_end\;PRIO\;208}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_pwm_driver_api_ext_end\;PRIO\;209}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._regulator_parent_driver_api.static.*\;SYMBOLS\;_regulator_parent_driver_api_list_start\;_regulator_parent_driver_api_list_end\;PRIO\;210}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_regulator_parent_driver_api_ext_end\;PRIO\;211}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._regulator_driver_api.static.*\;SYMBOLS\;_regulator_driver_api_list_start\;_regulator_driver_api_list_end\;PRIO\;212}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_regulator_driver_api_ext_end\;PRIO\;213}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._reset_driver_api.static.*\;SYMBOLS\;_reset_driver_api_list_start\;_reset_driver_api_list_end\;PRIO\;214}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_reset_driver_api_ext_end\;PRIO\;215}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._retained_mem_driver_api.static.*\;SYMBOLS\;_retained_mem_driver_api_list_start\;_retained_mem_driver_api_list_end\;PRIO\;216}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_retained_mem_driver_api_ext_end\;PRIO\;217}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._rtc_driver_api.static.*\;SYMBOLS\;_rtc_driver_api_list_start\;_rtc_driver_api_list_end\;PRIO\;218}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_rtc_driver_api_ext_end\;PRIO\;219}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._sdhc_driver_api.static.*\;SYMBOLS\;_sdhc_driver_api_list_start\;_sdhc_driver_api_list_end\;PRIO\;220}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_sdhc_driver_api_ext_end\;PRIO\;221}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._sensor_driver_api.static.*\;SYMBOLS\;_sensor_driver_api_list_start\;_sensor_driver_api_list_end\;PRIO\;222}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_sensor_driver_api_ext_end\;PRIO\;223}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._smbus_driver_api.static.*\;SYMBOLS\;_smbus_driver_api_list_start\;_smbus_driver_api_list_end\;PRIO\;224}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_smbus_driver_api_ext_end\;PRIO\;225}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._spi_driver_api.static.*\;SYMBOLS\;_spi_driver_api_list_start\;_spi_driver_api_list_end\;PRIO\;226}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_spi_driver_api_ext_end\;PRIO\;227}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._syscon_driver_api.static.*\;SYMBOLS\;_syscon_driver_api_list_start\;_syscon_driver_api_list_end\;PRIO\;228}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_syscon_driver_api_ext_end\;PRIO\;229}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._tee_driver_api.static.*\;SYMBOLS\;_tee_driver_api_list_start\;_tee_driver_api_list_end\;PRIO\;230}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_tee_driver_api_ext_end\;PRIO\;231}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._tgpio_driver_api.static.*\;SYMBOLS\;_tgpio_driver_api_list_start\;_tgpio_driver_api_list_end\;PRIO\;232}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_tgpio_driver_api_ext_end\;PRIO\;233}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._uaol_driver_api.static.*\;SYMBOLS\;_uaol_driver_api_list_start\;_uaol_driver_api_list_end\;PRIO\;234}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_uaol_driver_api_ext_end\;PRIO\;235}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._video_driver_api.static.*\;SYMBOLS\;_video_driver_api_list_start\;_video_driver_api_list_end\;PRIO\;236}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_video_driver_api_ext_end\;PRIO\;237}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._virtio_driver_api.static.*\;SYMBOLS\;_virtio_driver_api_list_start\;_virtio_driver_api_list_end\;PRIO\;238}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_virtio_driver_api_ext_end\;PRIO\;239}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._w1_driver_api.static.*\;SYMBOLS\;_w1_driver_api_list_start\;_w1_driver_api_list_end\;PRIO\;240}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_w1_driver_api_ext_end\;PRIO\;241}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._wdt_driver_api.static.*\;SYMBOLS\;_wdt_driver_api_list_start\;_wdt_driver_api_list_end\;PRIO\;242}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_wdt_driver_api_ext_end\;PRIO\;243}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._wuc_driver_api.static.*\;SYMBOLS\;_wuc_driver_api_list_start\;_wuc_driver_api_list_end\;PRIO\;244}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_wuc_driver_api_ext_end\;PRIO\;245}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._can_transceiver_driver_api.static.*\;SYMBOLS\;_can_transceiver_driver_api_list_start\;_can_transceiver_driver_api_list_end\;PRIO\;246}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_can_transceiver_driver_api_ext_end\;PRIO\;247}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._i3c_target_driver_api.static.*\;SYMBOLS\;_i3c_target_driver_api_list_start\;_i3c_target_driver_api_list_end\;PRIO\;248}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_i3c_target_driver_api_ext_end\;PRIO\;249}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._its_driver_api.static.*\;SYMBOLS\;_its_driver_api_list_start\;_its_driver_api_list_end\;PRIO\;250}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_its_driver_api_ext_end\;PRIO\;251}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._vtd_driver_api.static.*\;SYMBOLS\;_vtd_driver_api_list_start\;_vtd_driver_api_list_end\;PRIO\;252}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_vtd_driver_api_ext_end\;PRIO\;253}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._renesas_elc_driver_api.static.*\;SYMBOLS\;_renesas_elc_driver_api_list_start\;_renesas_elc_driver_api_list_end\;PRIO\;254}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_renesas_elc_driver_api_ext_end\;PRIO\;255}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._pcie_ctrl_driver_api.static.*\;SYMBOLS\;_pcie_ctrl_driver_api_list_start\;_pcie_ctrl_driver_api_list_end\;PRIO\;256}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_pcie_ctrl_driver_api_ext_end\;PRIO\;257}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._pcie_ep_driver_api.static.*\;SYMBOLS\;_pcie_ep_driver_api_list_start\;_pcie_ep_driver_api_list_end\;PRIO\;258}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_pcie_ep_driver_api_ext_end\;PRIO\;259}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._psi5_driver_api.static.*\;SYMBOLS\;_psi5_driver_api_list_start\;_psi5_driver_api_list_end\;PRIO\;260}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_psi5_driver_api_ext_end\;PRIO\;261}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._sent_driver_api.static.*\;SYMBOLS\;_sent_driver_api_list_start\;_sent_driver_api_list_end\;PRIO\;262}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_sent_driver_api_ext_end\;PRIO\;263}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._svc_driver_api.static.*\;SYMBOLS\;_svc_driver_api_list_start\;_svc_driver_api_list_end\;PRIO\;264}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_svc_driver_api_ext_end\;PRIO\;265}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._stepper_driver_api.static.*\;SYMBOLS\;_stepper_driver_api_list_start\;_stepper_driver_api_list_end\;PRIO\;266}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_stepper_driver_api_ext_end\;PRIO\;267}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._stepper_ctrl_driver_api.static.*\;SYMBOLS\;_stepper_ctrl_driver_api_list_start\;_stepper_ctrl_driver_api_list_end\;PRIO\;268}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_stepper_ctrl_driver_api_ext_end\;PRIO\;269}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._uart_driver_api.static.*\;SYMBOLS\;_uart_driver_api_list_start\;_uart_driver_api_list_end\;PRIO\;270}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_uart_driver_api_ext_end\;PRIO\;271}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._bc12_emul_driver_api.static.*\;SYMBOLS\;_bc12_emul_driver_api_list_start\;_bc12_emul_driver_api_list_end\;PRIO\;272}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_bc12_emul_driver_api_ext_end\;PRIO\;273}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._bc12_driver_api.static.*\;SYMBOLS\;_bc12_driver_api_list_start\;_bc12_driver_api_list_end\;PRIO\;274}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_bc12_driver_api_ext_end\;PRIO\;275}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._usbc_ppc_driver_api.static.*\;SYMBOLS\;_usbc_ppc_driver_api_list_start\;_usbc_ppc_driver_api_list_end\;PRIO\;276}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_usbc_ppc_driver_api_ext_end\;PRIO\;277}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._tcpc_driver_api.static.*\;SYMBOLS\;_tcpc_driver_api_list_start\;_tcpc_driver_api_list_end\;PRIO\;278}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_tcpc_driver_api_ext_end\;PRIO\;279}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._usbc_vbus_driver_api.static.*\;SYMBOLS\;_usbc_vbus_driver_api_list_start\;_usbc_vbus_driver_api_list_end\;PRIO\;280}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_usbc_vbus_driver_api_ext_end\;PRIO\;281}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._ivshmem_driver_api.static.*\;SYMBOLS\;_ivshmem_driver_api_list_start\;_ivshmem_driver_api_list_end\;PRIO\;282}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_ivshmem_driver_api_ext_end\;PRIO\;283}") +list(APPEND section_settings "{SECTION\;device_api_area\;SORT\;NAME\;KEEP\;TRUE\;INPUT\;._ethphy_driver_api.static.*\;SYMBOLS\;_ethphy_driver_api_list_start\;_ethphy_driver_api_list_end\;PRIO\;284}") +list(APPEND section_settings "{SECTION\;device_api_area\;SYMBOLS\;_ethphy_driver_api_ext_end\;PRIO\;285}") +set(DEVICE_API_SECTIONS "${sections}" CACHE INTERNAL "") +set(DEVICE_API_SECTION_SETTINGS "${section_settings}" CACHE INTERNAL "") diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.ld new file mode 100644 index 0000000..7ff1e59 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/device-api-sections.ld @@ -0,0 +1,189 @@ +SECTION_PROLOGUE(device_api_area,,SUBALIGN(4)) +{ + Z_LINK_ITERABLE(flash_driver_api); + PLACE_SYMBOL_HERE(_flash_driver_api_ext_end); + Z_LINK_ITERABLE(shared_irq_driver_api); + PLACE_SYMBOL_HERE(_shared_irq_driver_api_ext_end); + Z_LINK_ITERABLE(dmic_driver_api); + PLACE_SYMBOL_HERE(_dmic_driver_api_ext_end); + Z_LINK_ITERABLE(crypto_driver_api); + PLACE_SYMBOL_HERE(_crypto_driver_api_ext_end); + Z_LINK_ITERABLE(adc_driver_api); + PLACE_SYMBOL_HERE(_adc_driver_api_ext_end); + Z_LINK_ITERABLE(auxdisplay_driver_api); + PLACE_SYMBOL_HERE(_auxdisplay_driver_api_ext_end); + Z_LINK_ITERABLE(bbram_driver_api); + PLACE_SYMBOL_HERE(_bbram_driver_api_ext_end); + Z_LINK_ITERABLE(biometric_driver_api); + PLACE_SYMBOL_HERE(_biometric_driver_api_ext_end); + Z_LINK_ITERABLE(bt_hci_driver_api); + PLACE_SYMBOL_HERE(_bt_hci_driver_api_ext_end); + Z_LINK_ITERABLE(can_driver_api); + PLACE_SYMBOL_HERE(_can_driver_api_ext_end); + Z_LINK_ITERABLE(cellular_driver_api); + PLACE_SYMBOL_HERE(_cellular_driver_api_ext_end); + Z_LINK_ITERABLE(charger_driver_api); + PLACE_SYMBOL_HERE(_charger_driver_api_ext_end); + Z_LINK_ITERABLE(clock_control_driver_api); + Z_LINK_ITERABLE(nrf_clock_control_driver_api); + PLACE_SYMBOL_HERE(_nrf_clock_control_driver_api_ext_end); + PLACE_SYMBOL_HERE(_clock_control_driver_api_ext_end); + Z_LINK_ITERABLE(comparator_driver_api); + PLACE_SYMBOL_HERE(_comparator_driver_api_ext_end); + Z_LINK_ITERABLE(coredump_driver_api); + PLACE_SYMBOL_HERE(_coredump_driver_api_ext_end); + Z_LINK_ITERABLE(counter_driver_api); + PLACE_SYMBOL_HERE(_counter_driver_api_ext_end); + Z_LINK_ITERABLE(crc_driver_api); + PLACE_SYMBOL_HERE(_crc_driver_api_ext_end); + Z_LINK_ITERABLE(dac_driver_api); + PLACE_SYMBOL_HERE(_dac_driver_api_ext_end); + Z_LINK_ITERABLE(dai_driver_api); + PLACE_SYMBOL_HERE(_dai_driver_api_ext_end); + Z_LINK_ITERABLE(display_driver_api); + PLACE_SYMBOL_HERE(_display_driver_api_ext_end); + Z_LINK_ITERABLE(dma_driver_api); + PLACE_SYMBOL_HERE(_dma_driver_api_ext_end); + Z_LINK_ITERABLE(edac_driver_api); + PLACE_SYMBOL_HERE(_edac_driver_api_ext_end); + Z_LINK_ITERABLE(eeprom_driver_api); + PLACE_SYMBOL_HERE(_eeprom_driver_api_ext_end); + Z_LINK_ITERABLE(emul_bbram_driver_api); + PLACE_SYMBOL_HERE(_emul_bbram_driver_api_ext_end); + Z_LINK_ITERABLE(fuel_gauge_emul_driver_api); + PLACE_SYMBOL_HERE(_fuel_gauge_emul_driver_api_ext_end); + Z_LINK_ITERABLE(emul_sensor_driver_api); + PLACE_SYMBOL_HERE(_emul_sensor_driver_api_ext_end); + Z_LINK_ITERABLE(entropy_driver_api); + PLACE_SYMBOL_HERE(_entropy_driver_api_ext_end); + Z_LINK_ITERABLE(espi_driver_api); + PLACE_SYMBOL_HERE(_espi_driver_api_ext_end); + Z_LINK_ITERABLE(espi_saf_driver_api); + PLACE_SYMBOL_HERE(_espi_saf_driver_api_ext_end); + Z_LINK_ITERABLE(fpga_driver_api); + PLACE_SYMBOL_HERE(_fpga_driver_api_ext_end); + Z_LINK_ITERABLE(fuel_gauge_driver_api); + PLACE_SYMBOL_HERE(_fuel_gauge_driver_api_ext_end); + Z_LINK_ITERABLE(gnss_driver_api); + PLACE_SYMBOL_HERE(_gnss_driver_api_ext_end); + Z_LINK_ITERABLE(gpio_driver_api); + PLACE_SYMBOL_HERE(_gpio_driver_api_ext_end); + Z_LINK_ITERABLE(haptics_driver_api); + PLACE_SYMBOL_HERE(_haptics_driver_api_ext_end); + Z_LINK_ITERABLE(hwspinlock_driver_api); + PLACE_SYMBOL_HERE(_hwspinlock_driver_api_ext_end); + Z_LINK_ITERABLE(i2c_driver_api); + Z_LINK_ITERABLE(i3c_driver_api); + PLACE_SYMBOL_HERE(_i3c_driver_api_ext_end); + PLACE_SYMBOL_HERE(_i2c_driver_api_ext_end); + Z_LINK_ITERABLE(i2c_target_driver_api); + PLACE_SYMBOL_HERE(_i2c_target_driver_api_ext_end); + Z_LINK_ITERABLE(i2s_driver_api); + PLACE_SYMBOL_HERE(_i2s_driver_api_ext_end); + Z_LINK_ITERABLE(ipm_driver_api); + PLACE_SYMBOL_HERE(_ipm_driver_api_ext_end); + Z_LINK_ITERABLE(led_driver_api); + PLACE_SYMBOL_HERE(_led_driver_api_ext_end); + Z_LINK_ITERABLE(led_strip_driver_api); + PLACE_SYMBOL_HERE(_led_strip_driver_api_ext_end); + Z_LINK_ITERABLE(lora_driver_api); + PLACE_SYMBOL_HERE(_lora_driver_api_ext_end); + Z_LINK_ITERABLE(mbox_driver_api); + PLACE_SYMBOL_HERE(_mbox_driver_api_ext_end); + Z_LINK_ITERABLE(mdio_driver_api); + PLACE_SYMBOL_HERE(_mdio_driver_api_ext_end); + Z_LINK_ITERABLE(mipi_dbi_driver_api); + PLACE_SYMBOL_HERE(_mipi_dbi_driver_api_ext_end); + Z_LINK_ITERABLE(mipi_dsi_driver_api); + PLACE_SYMBOL_HERE(_mipi_dsi_driver_api_ext_end); + Z_LINK_ITERABLE(mspi_driver_api); + PLACE_SYMBOL_HERE(_mspi_driver_api_ext_end); + Z_LINK_ITERABLE(opamp_driver_api); + PLACE_SYMBOL_HERE(_opamp_driver_api_ext_end); + Z_LINK_ITERABLE(otp_driver_api); + PLACE_SYMBOL_HERE(_otp_driver_api_ext_end); + Z_LINK_ITERABLE(peci_driver_api); + PLACE_SYMBOL_HERE(_peci_driver_api_ext_end); + Z_LINK_ITERABLE(ps2_driver_api); + PLACE_SYMBOL_HERE(_ps2_driver_api_ext_end); + Z_LINK_ITERABLE(ptp_clock_driver_api); + PLACE_SYMBOL_HERE(_ptp_clock_driver_api_ext_end); + Z_LINK_ITERABLE(pwm_driver_api); + PLACE_SYMBOL_HERE(_pwm_driver_api_ext_end); + Z_LINK_ITERABLE(regulator_parent_driver_api); + PLACE_SYMBOL_HERE(_regulator_parent_driver_api_ext_end); + Z_LINK_ITERABLE(regulator_driver_api); + PLACE_SYMBOL_HERE(_regulator_driver_api_ext_end); + Z_LINK_ITERABLE(reset_driver_api); + PLACE_SYMBOL_HERE(_reset_driver_api_ext_end); + Z_LINK_ITERABLE(retained_mem_driver_api); + PLACE_SYMBOL_HERE(_retained_mem_driver_api_ext_end); + Z_LINK_ITERABLE(rtc_driver_api); + PLACE_SYMBOL_HERE(_rtc_driver_api_ext_end); + Z_LINK_ITERABLE(sdhc_driver_api); + PLACE_SYMBOL_HERE(_sdhc_driver_api_ext_end); + Z_LINK_ITERABLE(sensor_driver_api); + PLACE_SYMBOL_HERE(_sensor_driver_api_ext_end); + Z_LINK_ITERABLE(smbus_driver_api); + PLACE_SYMBOL_HERE(_smbus_driver_api_ext_end); + Z_LINK_ITERABLE(spi_driver_api); + PLACE_SYMBOL_HERE(_spi_driver_api_ext_end); + Z_LINK_ITERABLE(syscon_driver_api); + PLACE_SYMBOL_HERE(_syscon_driver_api_ext_end); + Z_LINK_ITERABLE(tee_driver_api); + PLACE_SYMBOL_HERE(_tee_driver_api_ext_end); + Z_LINK_ITERABLE(tgpio_driver_api); + PLACE_SYMBOL_HERE(_tgpio_driver_api_ext_end); + Z_LINK_ITERABLE(uaol_driver_api); + PLACE_SYMBOL_HERE(_uaol_driver_api_ext_end); + Z_LINK_ITERABLE(video_driver_api); + PLACE_SYMBOL_HERE(_video_driver_api_ext_end); + Z_LINK_ITERABLE(virtio_driver_api); + PLACE_SYMBOL_HERE(_virtio_driver_api_ext_end); + Z_LINK_ITERABLE(w1_driver_api); + PLACE_SYMBOL_HERE(_w1_driver_api_ext_end); + Z_LINK_ITERABLE(wdt_driver_api); + PLACE_SYMBOL_HERE(_wdt_driver_api_ext_end); + Z_LINK_ITERABLE(wuc_driver_api); + PLACE_SYMBOL_HERE(_wuc_driver_api_ext_end); + Z_LINK_ITERABLE(can_transceiver_driver_api); + PLACE_SYMBOL_HERE(_can_transceiver_driver_api_ext_end); + Z_LINK_ITERABLE(i3c_target_driver_api); + PLACE_SYMBOL_HERE(_i3c_target_driver_api_ext_end); + Z_LINK_ITERABLE(its_driver_api); + PLACE_SYMBOL_HERE(_its_driver_api_ext_end); + Z_LINK_ITERABLE(vtd_driver_api); + PLACE_SYMBOL_HERE(_vtd_driver_api_ext_end); + Z_LINK_ITERABLE(renesas_elc_driver_api); + PLACE_SYMBOL_HERE(_renesas_elc_driver_api_ext_end); + Z_LINK_ITERABLE(pcie_ctrl_driver_api); + PLACE_SYMBOL_HERE(_pcie_ctrl_driver_api_ext_end); + Z_LINK_ITERABLE(pcie_ep_driver_api); + PLACE_SYMBOL_HERE(_pcie_ep_driver_api_ext_end); + Z_LINK_ITERABLE(psi5_driver_api); + PLACE_SYMBOL_HERE(_psi5_driver_api_ext_end); + Z_LINK_ITERABLE(sent_driver_api); + PLACE_SYMBOL_HERE(_sent_driver_api_ext_end); + Z_LINK_ITERABLE(svc_driver_api); + PLACE_SYMBOL_HERE(_svc_driver_api_ext_end); + Z_LINK_ITERABLE(stepper_driver_api); + PLACE_SYMBOL_HERE(_stepper_driver_api_ext_end); + Z_LINK_ITERABLE(stepper_ctrl_driver_api); + PLACE_SYMBOL_HERE(_stepper_ctrl_driver_api_ext_end); + Z_LINK_ITERABLE(uart_driver_api); + PLACE_SYMBOL_HERE(_uart_driver_api_ext_end); + Z_LINK_ITERABLE(bc12_emul_driver_api); + PLACE_SYMBOL_HERE(_bc12_emul_driver_api_ext_end); + Z_LINK_ITERABLE(bc12_driver_api); + PLACE_SYMBOL_HERE(_bc12_driver_api_ext_end); + Z_LINK_ITERABLE(usbc_ppc_driver_api); + PLACE_SYMBOL_HERE(_usbc_ppc_driver_api_ext_end); + Z_LINK_ITERABLE(tcpc_driver_api); + PLACE_SYMBOL_HERE(_tcpc_driver_api_ext_end); + Z_LINK_ITERABLE(usbc_vbus_driver_api); + PLACE_SYMBOL_HERE(_usbc_vbus_driver_api_ext_end); + Z_LINK_ITERABLE(ivshmem_driver_api); + PLACE_SYMBOL_HERE(_ivshmem_driver_api_ext_end); + Z_LINK_ITERABLE(ethphy_driver_api); + PLACE_SYMBOL_HERE(_ethphy_driver_api_ext_end); +} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-itcm-section.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-itcm-section.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-nocache-section.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-nocache-section.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-noinit.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-noinit.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld new file mode 100644 index 0000000..74bd87f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld @@ -0,0 +1 @@ +/* Sort key: "default" */#include "../arch/common/ramfunc.ld" diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rodata.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rodata.ld new file mode 100644 index 0000000..27b783f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rodata.ld @@ -0,0 +1 @@ +/* Sort key: "default" */#include "../arch/arm/core/swi_tables.ld" diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-sections.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld new file mode 100644 index 0000000..4f6d2e6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld @@ -0,0 +1,6 @@ +/* Sort key: "!" */#include "../arch/common/rom_start_address.ld" +/* Sort key: "$" */#include "../arch/common/fill_with_zeros.ld" +/* Sort key: "0x0" */#include "../arch/common/rom_start_offset.ld" +/* Sort key: "0x0vectors" */#include "../arch/arm/core/vector_table.ld" +/* Sort key: "0x0vectors" */#include "zephyr/linker/irq-vector-table-section.ld" +/* Sort key: "0x1vectors" */#include "../arch/arm/core/cortex_m/vector_table_pad.ld" diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-sections.ld new file mode 100644 index 0000000..3c846b2 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-sections.ld @@ -0,0 +1 @@ +/* Sort key: "default" */#include "zephyr/linker/intlist.ld" diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-text-sections.ld b/zephyrproject/build/mcuboot/zephyr/include/generated/snippets-text-sections.ld new file mode 100644 index 0000000..e69de29 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/syscall_list.h b/zephyrproject/build/mcuboot/zephyr/include/generated/syscall_list.h new file mode 100644 index 0000000..8506f9a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/syscall_list.h @@ -0,0 +1,664 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef ZEPHYR_SYSCALL_LIST_H +#define ZEPHYR_SYSCALL_LIST_H + +#define K_SYSCALL_DEVICE_DEINIT 0 +#define K_SYSCALL_DEVICE_GET_BINDING 1 +#define K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL 2 +#define K_SYSCALL_DEVICE_INIT 3 +#define K_SYSCALL_DEVICE_IS_READY 4 +#define K_SYSCALL_FLASH_COPY 5 +#define K_SYSCALL_FLASH_ERASE 6 +#define K_SYSCALL_FLASH_EX_OP 7 +#define K_SYSCALL_FLASH_FILL 8 +#define K_SYSCALL_FLASH_FLATTEN 9 +#define K_SYSCALL_FLASH_GET_PAGE_COUNT 10 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 11 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 12 +#define K_SYSCALL_FLASH_GET_PARAMETERS 13 +#define K_SYSCALL_FLASH_GET_SIZE 14 +#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 15 +#define K_SYSCALL_FLASH_READ 16 +#define K_SYSCALL_FLASH_READ_JEDEC_ID 17 +#define K_SYSCALL_FLASH_SFDP_READ 18 +#define K_SYSCALL_FLASH_WRITE 19 +#define K_SYSCALL_K_BUSY_WAIT 20 +#define K_SYSCALL_K_CONDVAR_BROADCAST 21 +#define K_SYSCALL_K_CONDVAR_INIT 22 +#define K_SYSCALL_K_CONDVAR_SIGNAL 23 +#define K_SYSCALL_K_CONDVAR_WAIT 24 +#define K_SYSCALL_K_EVENT_CLEAR 25 +#define K_SYSCALL_K_EVENT_INIT 26 +#define K_SYSCALL_K_EVENT_POST 27 +#define K_SYSCALL_K_EVENT_SET 28 +#define K_SYSCALL_K_EVENT_SET_MASKED 29 +#define K_SYSCALL_K_EVENT_WAIT 30 +#define K_SYSCALL_K_EVENT_WAIT_ALL 31 +#define K_SYSCALL_K_EVENT_WAIT_ALL_SAFE 32 +#define K_SYSCALL_K_EVENT_WAIT_SAFE 33 +#define K_SYSCALL_K_FLOAT_DISABLE 34 +#define K_SYSCALL_K_FLOAT_ENABLE 35 +#define K_SYSCALL_K_FUTEX_WAIT 36 +#define K_SYSCALL_K_FUTEX_WAKE 37 +#define K_SYSCALL_K_IS_PREEMPT_THREAD 38 +#define K_SYSCALL_K_MSGQ_ALLOC_INIT 39 +#define K_SYSCALL_K_MSGQ_GET 40 +#define K_SYSCALL_K_MSGQ_GET_ATTRS 41 +#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 42 +#define K_SYSCALL_K_MSGQ_NUM_USED_GET 43 +#define K_SYSCALL_K_MSGQ_PEEK 44 +#define K_SYSCALL_K_MSGQ_PEEK_AT 45 +#define K_SYSCALL_K_MSGQ_PURGE 46 +#define K_SYSCALL_K_MSGQ_PUT 47 +#define K_SYSCALL_K_MSGQ_PUT_FRONT 48 +#define K_SYSCALL_K_MUTEX_INIT 49 +#define K_SYSCALL_K_MUTEX_LOCK 50 +#define K_SYSCALL_K_MUTEX_UNLOCK 51 +#define K_SYSCALL_K_OBJECT_ACCESS_CHECK 52 +#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 53 +#define K_SYSCALL_K_OBJECT_ALLOC 54 +#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 55 +#define K_SYSCALL_K_OBJECT_RELEASE 56 +#define K_SYSCALL_K_PIPE_CLOSE 57 +#define K_SYSCALL_K_PIPE_INIT 58 +#define K_SYSCALL_K_PIPE_READ 59 +#define K_SYSCALL_K_PIPE_RESET 60 +#define K_SYSCALL_K_PIPE_WRITE 61 +#define K_SYSCALL_K_POLL 62 +#define K_SYSCALL_K_POLL_SIGNAL_CHECK 63 +#define K_SYSCALL_K_POLL_SIGNAL_INIT 64 +#define K_SYSCALL_K_POLL_SIGNAL_RAISE 65 +#define K_SYSCALL_K_POLL_SIGNAL_RESET 66 +#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 67 +#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 68 +#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 69 +#define K_SYSCALL_K_QUEUE_GET 70 +#define K_SYSCALL_K_QUEUE_INIT 71 +#define K_SYSCALL_K_QUEUE_IS_EMPTY 72 +#define K_SYSCALL_K_QUEUE_PEEK_HEAD 73 +#define K_SYSCALL_K_QUEUE_PEEK_TAIL 74 +#define K_SYSCALL_K_RESCHEDULE 75 +#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 76 +#define K_SYSCALL_K_SEM_COUNT_GET 77 +#define K_SYSCALL_K_SEM_GIVE 78 +#define K_SYSCALL_K_SEM_INIT 79 +#define K_SYSCALL_K_SEM_RESET 80 +#define K_SYSCALL_K_SEM_TAKE 81 +#define K_SYSCALL_K_SLEEP 82 +#define K_SYSCALL_K_STACK_ALLOC_INIT 83 +#define K_SYSCALL_K_STACK_POP 84 +#define K_SYSCALL_K_STACK_PUSH 85 +#define K_SYSCALL_K_STR_OUT 86 +#define K_SYSCALL_K_THREAD_ABORT 87 +#define K_SYSCALL_K_THREAD_ABSOLUTE_DEADLINE_SET 88 +#define K_SYSCALL_K_THREAD_CREATE 89 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 90 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 91 +#define K_SYSCALL_K_THREAD_DEADLINE_SET 92 +#define K_SYSCALL_K_THREAD_JOIN 93 +#define K_SYSCALL_K_THREAD_NAME_COPY 94 +#define K_SYSCALL_K_THREAD_NAME_SET 95 +#define K_SYSCALL_K_THREAD_PRIORITY_GET 96 +#define K_SYSCALL_K_THREAD_PRIORITY_SET 97 +#define K_SYSCALL_K_THREAD_RESUME 98 +#define K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_GET 99 +#define K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_PCT_SET 100 +#define K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_SET 101 +#define K_SYSCALL_K_THREAD_STACK_ALLOC 102 +#define K_SYSCALL_K_THREAD_STACK_FREE 103 +#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 104 +#define K_SYSCALL_K_THREAD_SUSPEND 105 +#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 106 +#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 107 +#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 108 +#define K_SYSCALL_K_TIMER_REMAINING_TICKS 109 +#define K_SYSCALL_K_TIMER_START 110 +#define K_SYSCALL_K_TIMER_STATUS_GET 111 +#define K_SYSCALL_K_TIMER_STATUS_SYNC 112 +#define K_SYSCALL_K_TIMER_STOP 113 +#define K_SYSCALL_K_TIMER_USER_DATA_GET 114 +#define K_SYSCALL_K_TIMER_USER_DATA_SET 115 +#define K_SYSCALL_K_UPTIME_TICKS 116 +#define K_SYSCALL_K_USLEEP 117 +#define K_SYSCALL_K_WAKEUP 118 +#define K_SYSCALL_K_YIELD 119 +#define K_SYSCALL_LOG_BUFFERED_CNT 120 +#define K_SYSCALL_LOG_FILTER_SET 121 +#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 122 +#define K_SYSCALL_LOG_PANIC 123 +#define K_SYSCALL_LOG_PROCESS 124 +#define K_SYSCALL_SYS_CLOCK_GETRTOFFSET 125 +#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 126 +#define K_SYSCALL_SYS_CLOCK_NANOSLEEP 127 +#define K_SYSCALL_SYS_CLOCK_SETTIME 128 +#define K_SYSCALL_ZEPHYR_FPUTC 129 +#define K_SYSCALL_ZEPHYR_FWRITE 130 +#define K_SYSCALL_ZEPHYR_READ_STDIN 131 +#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 132 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 133 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 134 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 135 +#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 136 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 137 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 138 +#define K_SYSCALL_BAD 139 +#define K_SYSCALL_LIMIT 140 + + +/* Following syscalls are not used in image */ +#define K_SYSCALL_ADC_CHANNEL_SETUP 141 +#define K_SYSCALL_ADC_GET_DECODER 142 +#define K_SYSCALL_ADC_READ 143 +#define K_SYSCALL_ADC_READ_ASYNC 144 +#define K_SYSCALL_ATOMIC_ADD 145 +#define K_SYSCALL_ATOMIC_AND 146 +#define K_SYSCALL_ATOMIC_CAS 147 +#define K_SYSCALL_ATOMIC_NAND 148 +#define K_SYSCALL_ATOMIC_OR 149 +#define K_SYSCALL_ATOMIC_PTR_CAS 150 +#define K_SYSCALL_ATOMIC_PTR_SET 151 +#define K_SYSCALL_ATOMIC_SET 152 +#define K_SYSCALL_ATOMIC_SUB 153 +#define K_SYSCALL_ATOMIC_XOR 154 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 155 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 156 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 157 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 158 +#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 159 +#define K_SYSCALL_AUXDISPLAY_CLEAR 160 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 161 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 162 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 163 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 164 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 165 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 166 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 167 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 168 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 169 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 170 +#define K_SYSCALL_AUXDISPLAY_IS_BUSY 171 +#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 172 +#define K_SYSCALL_AUXDISPLAY_WRITE 173 +#define K_SYSCALL_BBRAM_CHECK_INVALID 174 +#define K_SYSCALL_BBRAM_CHECK_POWER 175 +#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 176 +#define K_SYSCALL_BBRAM_GET_SIZE 177 +#define K_SYSCALL_BBRAM_READ 178 +#define K_SYSCALL_BBRAM_WRITE 179 +#define K_SYSCALL_BC12_SET_RESULT_CB 180 +#define K_SYSCALL_BC12_SET_ROLE 181 +#define K_SYSCALL_BIOMETRIC_ATTR_GET 182 +#define K_SYSCALL_BIOMETRIC_ATTR_SET 183 +#define K_SYSCALL_BIOMETRIC_ENROLL_ABORT 184 +#define K_SYSCALL_BIOMETRIC_ENROLL_CAPTURE 185 +#define K_SYSCALL_BIOMETRIC_ENROLL_FINALIZE 186 +#define K_SYSCALL_BIOMETRIC_ENROLL_START 187 +#define K_SYSCALL_BIOMETRIC_GET_CAPABILITIES 188 +#define K_SYSCALL_BIOMETRIC_LED_CONTROL 189 +#define K_SYSCALL_BIOMETRIC_MATCH 190 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE 191 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE_ALL 192 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_LIST 193 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_READ 194 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_STORE 195 +#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 196 +#define K_SYSCALL_CAN_CALC_TIMING 197 +#define K_SYSCALL_CAN_CALC_TIMING_DATA 198 +#define K_SYSCALL_CAN_GET_BITRATE_MAX 199 +#define K_SYSCALL_CAN_GET_BITRATE_MIN 200 +#define K_SYSCALL_CAN_GET_CAPABILITIES 201 +#define K_SYSCALL_CAN_GET_CORE_CLOCK 202 +#define K_SYSCALL_CAN_GET_MAX_FILTERS 203 +#define K_SYSCALL_CAN_GET_MODE 204 +#define K_SYSCALL_CAN_GET_STATE 205 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 206 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 207 +#define K_SYSCALL_CAN_GET_TIMING_MAX 208 +#define K_SYSCALL_CAN_GET_TIMING_MIN 209 +#define K_SYSCALL_CAN_GET_TRANSCEIVER 210 +#define K_SYSCALL_CAN_RECOVER 211 +#define K_SYSCALL_CAN_REMOVE_RX_FILTER 212 +#define K_SYSCALL_CAN_SEND 213 +#define K_SYSCALL_CAN_SET_BITRATE 214 +#define K_SYSCALL_CAN_SET_BITRATE_DATA 215 +#define K_SYSCALL_CAN_SET_MODE 216 +#define K_SYSCALL_CAN_SET_TIMING 217 +#define K_SYSCALL_CAN_SET_TIMING_DATA 218 +#define K_SYSCALL_CAN_START 219 +#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 220 +#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 221 +#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 222 +#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 223 +#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 224 +#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 225 +#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 226 +#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 227 +#define K_SYSCALL_CAN_STOP 228 +#define K_SYSCALL_CHARGER_CHARGE_ENABLE 229 +#define K_SYSCALL_CHARGER_GET_PROP 230 +#define K_SYSCALL_CHARGER_SET_PROP 231 +#define K_SYSCALL_COMPARATOR_GET_OUTPUT 232 +#define K_SYSCALL_COMPARATOR_SET_TRIGGER 233 +#define K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING 234 +#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 235 +#define K_SYSCALL_COUNTER_DISABLE_CAPTURE 236 +#define K_SYSCALL_COUNTER_ENABLE_CAPTURE 237 +#define K_SYSCALL_COUNTER_GET_FREQUENCY 238 +#define K_SYSCALL_COUNTER_GET_FREQUENCY_64 239 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 240 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD_64 241 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 242 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE_64 243 +#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 244 +#define K_SYSCALL_COUNTER_GET_PENDING_INT 245 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE 246 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE_64 247 +#define K_SYSCALL_COUNTER_GET_VALUE 248 +#define K_SYSCALL_COUNTER_GET_VALUE_64 249 +#define K_SYSCALL_COUNTER_IS_COUNTING_UP 250 +#define K_SYSCALL_COUNTER_NS_TO_TICKS 251 +#define K_SYSCALL_COUNTER_NS_TO_TICKS_64 252 +#define K_SYSCALL_COUNTER_RESET 253 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 254 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM_64 255 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 256 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD_64 257 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE 258 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE_64 259 +#define K_SYSCALL_COUNTER_SET_VALUE 260 +#define K_SYSCALL_COUNTER_SET_VALUE_64 261 +#define K_SYSCALL_COUNTER_START 262 +#define K_SYSCALL_COUNTER_STOP 263 +#define K_SYSCALL_COUNTER_TICKS_TO_NS 264 +#define K_SYSCALL_COUNTER_TICKS_TO_NS_64 265 +#define K_SYSCALL_COUNTER_TICKS_TO_US 266 +#define K_SYSCALL_COUNTER_TICKS_TO_US_64 267 +#define K_SYSCALL_COUNTER_US_TO_TICKS 268 +#define K_SYSCALL_COUNTER_US_TO_TICKS_64 269 +#define K_SYSCALL_CRC_BEGIN 270 +#define K_SYSCALL_CRC_FINISH 271 +#define K_SYSCALL_CRC_UPDATE 272 +#define K_SYSCALL_DAC_CHANNEL_SETUP 273 +#define K_SYSCALL_DAC_WRITE_VALUE 274 +#define K_SYSCALL_DAI_CONFIG_GET 275 +#define K_SYSCALL_DAI_CONFIG_SET 276 +#define K_SYSCALL_DAI_CONFIG_UPDATE 277 +#define K_SYSCALL_DAI_GET_PROPERTIES_COPY 278 +#define K_SYSCALL_DAI_PROBE 279 +#define K_SYSCALL_DAI_REMOVE 280 +#define K_SYSCALL_DAI_TRIGGER 281 +#define K_SYSCALL_DAI_TS_CONFIG 282 +#define K_SYSCALL_DAI_TS_GET 283 +#define K_SYSCALL_DAI_TS_START 284 +#define K_SYSCALL_DAI_TS_STOP 285 +#define K_SYSCALL_DEVMUX_SELECT_GET 286 +#define K_SYSCALL_DEVMUX_SELECT_SET 287 +#define K_SYSCALL_EEPROM_GET_SIZE 288 +#define K_SYSCALL_EEPROM_READ 289 +#define K_SYSCALL_EEPROM_WRITE 290 +#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 291 +#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 292 +#define K_SYSCALL_ENTROPY_GET_ENTROPY 293 +#define K_SYSCALL_ESPI_CONFIG 294 +#define K_SYSCALL_ESPI_FLASH_ERASE 295 +#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 296 +#define K_SYSCALL_ESPI_READ_FLASH 297 +#define K_SYSCALL_ESPI_READ_LPC_REQUEST 298 +#define K_SYSCALL_ESPI_READ_REQUEST 299 +#define K_SYSCALL_ESPI_RECEIVE_OOB 300 +#define K_SYSCALL_ESPI_RECEIVE_VWIRE 301 +#define K_SYSCALL_ESPI_SAF_ACTIVATE 302 +#define K_SYSCALL_ESPI_SAF_CONFIG 303 +#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 304 +#define K_SYSCALL_ESPI_SAF_FLASH_READ 305 +#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 306 +#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 307 +#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 308 +#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 309 +#define K_SYSCALL_ESPI_SEND_OOB 310 +#define K_SYSCALL_ESPI_SEND_VWIRE 311 +#define K_SYSCALL_ESPI_WRITE_FLASH 312 +#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 313 +#define K_SYSCALL_ESPI_WRITE_REQUEST 314 +#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 315 +#define K_SYSCALL_FLASH_SIMULATOR_GET_PARAMS 316 +#define K_SYSCALL_FLASH_SIMULATOR_SET_CALLBACKS 317 +#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 318 +#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 319 +#define K_SYSCALL_FUEL_GAUGE_GET_PROP 320 +#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 321 +#define K_SYSCALL_FUEL_GAUGE_SET_PROP 322 +#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 323 +#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 324 +#define K_SYSCALL_GNSS_GET_FIX_RATE 325 +#define K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE 326 +#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 327 +#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 328 +#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 329 +#define K_SYSCALL_GNSS_SET_FIX_RATE 330 +#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 331 +#define K_SYSCALL_GPIO_GET_PENDING_INT 332 +#define K_SYSCALL_GPIO_PIN_CONFIGURE 333 +#define K_SYSCALL_GPIO_PIN_GET_CONFIG 334 +#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 335 +#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 336 +#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 337 +#define K_SYSCALL_GPIO_PORT_GET_RAW 338 +#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 339 +#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 340 +#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 341 +#define K_SYSCALL_HAPTICS_START_OUTPUT 342 +#define K_SYSCALL_HAPTICS_STOP_OUTPUT 343 +#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 344 +#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 345 +#define K_SYSCALL_HWINFO_GET_DEVICE_ID 346 +#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 347 +#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 348 +#define K_SYSCALL_I2C_CONFIGURE 349 +#define K_SYSCALL_I2C_GET_CONFIG 350 +#define K_SYSCALL_I2C_RECOVER_BUS 351 +#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 352 +#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 353 +#define K_SYSCALL_I2C_TRANSFER 354 +#define K_SYSCALL_I2S_BUF_READ 355 +#define K_SYSCALL_I2S_BUF_WRITE 356 +#define K_SYSCALL_I2S_CONFIGURE 357 +#define K_SYSCALL_I2S_TRIGGER 358 +#define K_SYSCALL_I3C_DO_CCC 359 +#define K_SYSCALL_I3C_DO_CCC_CB 360 +#define K_SYSCALL_I3C_TRANSFER 361 +#define K_SYSCALL_I3C_TRANSFER_CB 362 +#define K_SYSCALL_IPM_COMPLETE 363 +#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 364 +#define K_SYSCALL_IPM_MAX_ID_VAL_GET 365 +#define K_SYSCALL_IPM_SEND 366 +#define K_SYSCALL_IPM_SET_ENABLED 367 +#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 368 +#define K_SYSCALL_IVSHMEM_GET_ID 369 +#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 370 +#define K_SYSCALL_IVSHMEM_GET_MEM 371 +#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 372 +#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 373 +#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 374 +#define K_SYSCALL_IVSHMEM_GET_STATE 375 +#define K_SYSCALL_IVSHMEM_GET_VECTORS 376 +#define K_SYSCALL_IVSHMEM_INT_PEER 377 +#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 378 +#define K_SYSCALL_IVSHMEM_SET_STATE 379 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 380 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 381 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 382 +#define K_SYSCALL_K_MEM_PAGING_STATS_GET 383 +#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 384 +#define K_SYSCALL_LED_BLINK 385 +#define K_SYSCALL_LED_GET_INFO 386 +#define K_SYSCALL_LED_OFF 387 +#define K_SYSCALL_LED_ON 388 +#define K_SYSCALL_LED_SET_BRIGHTNESS 389 +#define K_SYSCALL_LED_SET_CHANNEL 390 +#define K_SYSCALL_LED_SET_COLOR 391 +#define K_SYSCALL_LED_WRITE_CHANNELS 392 +#define K_SYSCALL_LLEXT_GET_FN_TABLE 393 +#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 394 +#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 395 +#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 396 +#define K_SYSCALL_MBOX_MTU_GET 397 +#define K_SYSCALL_MBOX_SEND 398 +#define K_SYSCALL_MBOX_SET_ENABLED 399 +#define K_SYSCALL_MDIO_READ 400 +#define K_SYSCALL_MDIO_READ_C45 401 +#define K_SYSCALL_MDIO_WRITE 402 +#define K_SYSCALL_MDIO_WRITE_C45 403 +#define K_SYSCALL_MSPI_CONFIG 404 +#define K_SYSCALL_MSPI_DEV_CONFIG 405 +#define K_SYSCALL_MSPI_GET_CHANNEL_STATUS 406 +#define K_SYSCALL_MSPI_SCRAMBLE_CONFIG 407 +#define K_SYSCALL_MSPI_TIMING_CONFIG 408 +#define K_SYSCALL_MSPI_TRANSCEIVE 409 +#define K_SYSCALL_MSPI_XIP_CONFIG 410 +#define K_SYSCALL_NET_ADDR_NTOP 411 +#define K_SYSCALL_NET_ADDR_PTON 412 +#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 413 +#define K_SYSCALL_NET_IF_GET_BY_INDEX 414 +#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 415 +#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 416 +#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 417 +#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 418 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 419 +#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 420 +#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 421 +#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 422 +#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 423 +#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 424 +#define K_SYSCALL_OPAMP_SET_GAIN 425 +#define K_SYSCALL_OTP_PROGRAM 426 +#define K_SYSCALL_OTP_READ 427 +#define K_SYSCALL_PECI_CONFIG 428 +#define K_SYSCALL_PECI_DISABLE 429 +#define K_SYSCALL_PECI_ENABLE 430 +#define K_SYSCALL_PECI_TRANSFER 431 +#define K_SYSCALL_PS2_CONFIG 432 +#define K_SYSCALL_PS2_DISABLE_CALLBACK 433 +#define K_SYSCALL_PS2_ENABLE_CALLBACK 434 +#define K_SYSCALL_PS2_READ 435 +#define K_SYSCALL_PS2_WRITE 436 +#define K_SYSCALL_PSI5_REGISTER_CALLBACK 437 +#define K_SYSCALL_PSI5_SEND 438 +#define K_SYSCALL_PSI5_START_SYNC 439 +#define K_SYSCALL_PSI5_STOP_SYNC 440 +#define K_SYSCALL_PTP_CLOCK_GET 441 +#define K_SYSCALL_PWM_CAPTURE_CYCLES 442 +#define K_SYSCALL_PWM_DISABLE_CAPTURE 443 +#define K_SYSCALL_PWM_ENABLE_CAPTURE 444 +#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 445 +#define K_SYSCALL_PWM_SET_CYCLES 446 +#define K_SYSCALL_RENESAS_ELC_DISABLE 447 +#define K_SYSCALL_RENESAS_ELC_ENABLE 448 +#define K_SYSCALL_RENESAS_ELC_LINK_BREAK 449 +#define K_SYSCALL_RENESAS_ELC_LINK_SET 450 +#define K_SYSCALL_RENESAS_ELC_SOFTWARE_EVENT_GENERATE 451 +#define K_SYSCALL_RENESAS_RA_CTSU_GROUP_CONFIGURE 452 +#define K_SYSCALL_RENESAS_RX_CTSU_GROUP_CONFIGURE 453 +#define K_SYSCALL_RESET_LINE_ASSERT 454 +#define K_SYSCALL_RESET_LINE_DEASSERT 455 +#define K_SYSCALL_RESET_LINE_TOGGLE 456 +#define K_SYSCALL_RESET_STATUS 457 +#define K_SYSCALL_RETAINED_MEM_CLEAR 458 +#define K_SYSCALL_RETAINED_MEM_READ 459 +#define K_SYSCALL_RETAINED_MEM_SIZE 460 +#define K_SYSCALL_RETAINED_MEM_WRITE 461 +#define K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS 462 +#define K_SYSCALL_RTC_ALARM_GET_TIME 463 +#define K_SYSCALL_RTC_ALARM_IS_PENDING 464 +#define K_SYSCALL_RTC_ALARM_SET_TIME 465 +#define K_SYSCALL_RTC_GET_CALIBRATION 466 +#define K_SYSCALL_RTC_GET_TIME 467 +#define K_SYSCALL_RTC_SET_CALIBRATION 468 +#define K_SYSCALL_RTC_SET_TIME 469 +#define K_SYSCALL_RTIO_CQE_COPY_OUT 470 +#define K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER 471 +#define K_SYSCALL_RTIO_POOL_ACQUIRE 472 +#define K_SYSCALL_RTIO_POOL_RELEASE 473 +#define K_SYSCALL_RTIO_RELEASE_BUFFER 474 +#define K_SYSCALL_RTIO_SQE_CANCEL 475 +#define K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES 476 +#define K_SYSCALL_RTIO_SQE_SIGNAL 477 +#define K_SYSCALL_RTIO_SUBMIT 478 +#define K_SYSCALL_SDHC_CARD_BUSY 479 +#define K_SYSCALL_SDHC_CARD_PRESENT 480 +#define K_SYSCALL_SDHC_DISABLE_INTERRUPT 481 +#define K_SYSCALL_SDHC_ENABLE_INTERRUPT 482 +#define K_SYSCALL_SDHC_EXECUTE_TUNING 483 +#define K_SYSCALL_SDHC_GET_HOST_PROPS 484 +#define K_SYSCALL_SDHC_HW_RESET 485 +#define K_SYSCALL_SDHC_REQUEST 486 +#define K_SYSCALL_SDHC_SET_IO 487 +#define K_SYSCALL_SENSOR_ATTR_GET 488 +#define K_SYSCALL_SENSOR_ATTR_SET 489 +#define K_SYSCALL_SENSOR_CHANNEL_GET 490 +#define K_SYSCALL_SENSOR_GET_DECODER 491 +#define K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV 492 +#define K_SYSCALL_SENSOR_SAMPLE_FETCH 493 +#define K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN 494 +#define K_SYSCALL_SENT_REGISTER_CALLBACK 495 +#define K_SYSCALL_SENT_START_LISTENING 496 +#define K_SYSCALL_SENT_STOP_LISTENING 497 +#define K_SYSCALL_SIP_SUPERVISORY_CALL 498 +#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ 499 +#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES 500 +#define K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID 501 +#define K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY 502 +#define K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID 503 +#define K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE 504 +#define K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX 505 +#define K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID 506 +#define K_SYSCALL_SMBUS_BLOCK_PCALL 507 +#define K_SYSCALL_SMBUS_BLOCK_READ 508 +#define K_SYSCALL_SMBUS_BLOCK_WRITE 509 +#define K_SYSCALL_SMBUS_BYTE_DATA_READ 510 +#define K_SYSCALL_SMBUS_BYTE_DATA_WRITE 511 +#define K_SYSCALL_SMBUS_BYTE_READ 512 +#define K_SYSCALL_SMBUS_BYTE_WRITE 513 +#define K_SYSCALL_SMBUS_CONFIGURE 514 +#define K_SYSCALL_SMBUS_GET_CONFIG 515 +#define K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB 516 +#define K_SYSCALL_SMBUS_PCALL 517 +#define K_SYSCALL_SMBUS_QUICK 518 +#define K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB 519 +#define K_SYSCALL_SMBUS_WORD_DATA_READ 520 +#define K_SYSCALL_SMBUS_WORD_DATA_WRITE 521 +#define K_SYSCALL_SPI_RELEASE 522 +#define K_SYSCALL_SPI_TRANSCEIVE 523 +#define K_SYSCALL_STEPPER_CTRL_CONFIGURE_RAMP 524 +#define K_SYSCALL_STEPPER_CTRL_GET_ACTUAL_POSITION 525 +#define K_SYSCALL_STEPPER_CTRL_IS_MOVING 526 +#define K_SYSCALL_STEPPER_CTRL_MOVE_BY 527 +#define K_SYSCALL_STEPPER_CTRL_MOVE_TO 528 +#define K_SYSCALL_STEPPER_CTRL_RUN 529 +#define K_SYSCALL_STEPPER_CTRL_SET_EVENT_CB 530 +#define K_SYSCALL_STEPPER_CTRL_SET_MICROSTEP_INTERVAL 531 +#define K_SYSCALL_STEPPER_CTRL_SET_REFERENCE_POSITION 532 +#define K_SYSCALL_STEPPER_CTRL_STOP 533 +#define K_SYSCALL_STEPPER_DISABLE 534 +#define K_SYSCALL_STEPPER_ENABLE 535 +#define K_SYSCALL_STEPPER_GET_MICRO_STEP_RES 536 +#define K_SYSCALL_STEPPER_SET_EVENT_CB 537 +#define K_SYSCALL_STEPPER_SET_MICRO_STEP_RES 538 +#define K_SYSCALL_SWDP_CONFIGURE 539 +#define K_SYSCALL_SWDP_GET_PINS 540 +#define K_SYSCALL_SWDP_INPUT_SEQUENCE 541 +#define K_SYSCALL_SWDP_OUTPUT_SEQUENCE 542 +#define K_SYSCALL_SWDP_PORT_OFF 543 +#define K_SYSCALL_SWDP_PORT_ON 544 +#define K_SYSCALL_SWDP_SET_CLOCK 545 +#define K_SYSCALL_SWDP_SET_PINS 546 +#define K_SYSCALL_SWDP_TRANSFER 547 +#define K_SYSCALL_SYSCON_GET_BASE 548 +#define K_SYSCALL_SYSCON_GET_SIZE 549 +#define K_SYSCALL_SYSCON_READ_REG 550 +#define K_SYSCALL_SYSCON_UPDATE_BITS 551 +#define K_SYSCALL_SYSCON_WRITE_REG 552 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 553 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 554 +#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 555 +#define K_SYSCALL_SYS_CSRAND_GET 556 +#define K_SYSCALL_SYS_RAND_GET 557 +#define K_SYSCALL_TEE_CANCEL 558 +#define K_SYSCALL_TEE_CLOSE_SESSION 559 +#define K_SYSCALL_TEE_GET_VERSION 560 +#define K_SYSCALL_TEE_INVOKE_FUNC 561 +#define K_SYSCALL_TEE_OPEN_SESSION 562 +#define K_SYSCALL_TEE_SHM_ALLOC 563 +#define K_SYSCALL_TEE_SHM_FREE 564 +#define K_SYSCALL_TEE_SHM_REGISTER 565 +#define K_SYSCALL_TEE_SHM_UNREGISTER 566 +#define K_SYSCALL_TEE_SUPPL_RECV 567 +#define K_SYSCALL_TEE_SUPPL_SEND 568 +#define K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP 569 +#define K_SYSCALL_TGPIO_PIN_DISABLE 570 +#define K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT 571 +#define K_SYSCALL_TGPIO_PIN_READ_TS_EC 572 +#define K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND 573 +#define K_SYSCALL_TGPIO_PORT_GET_TIME 574 +#define K_SYSCALL_UART_CONFIGURE 575 +#define K_SYSCALL_UART_CONFIG_GET 576 +#define K_SYSCALL_UART_DRV_CMD 577 +#define K_SYSCALL_UART_ERR_CHECK 578 +#define K_SYSCALL_UART_IRQ_ERR_DISABLE 579 +#define K_SYSCALL_UART_IRQ_ERR_ENABLE 580 +#define K_SYSCALL_UART_IRQ_IS_PENDING 581 +#define K_SYSCALL_UART_IRQ_RX_DISABLE 582 +#define K_SYSCALL_UART_IRQ_RX_ENABLE 583 +#define K_SYSCALL_UART_IRQ_TX_DISABLE 584 +#define K_SYSCALL_UART_IRQ_TX_ENABLE 585 +#define K_SYSCALL_UART_IRQ_UPDATE 586 +#define K_SYSCALL_UART_LINE_CTRL_GET 587 +#define K_SYSCALL_UART_LINE_CTRL_SET 588 +#define K_SYSCALL_UART_POLL_IN 589 +#define K_SYSCALL_UART_POLL_IN_U16 590 +#define K_SYSCALL_UART_POLL_OUT 591 +#define K_SYSCALL_UART_POLL_OUT_U16 592 +#define K_SYSCALL_UART_RX_DISABLE 593 +#define K_SYSCALL_UART_RX_ENABLE 594 +#define K_SYSCALL_UART_RX_ENABLE_U16 595 +#define K_SYSCALL_UART_TX 596 +#define K_SYSCALL_UART_TX_ABORT 597 +#define K_SYSCALL_UART_TX_U16 598 +#define K_SYSCALL_UPDATEHUB_AUTOHANDLER 599 +#define K_SYSCALL_UPDATEHUB_CONFIRM 600 +#define K_SYSCALL_UPDATEHUB_PROBE 601 +#define K_SYSCALL_UPDATEHUB_REBOOT 602 +#define K_SYSCALL_UPDATEHUB_REPORT_ERROR 603 +#define K_SYSCALL_UPDATEHUB_UPDATE 604 +#define K_SYSCALL_USER_FAULT 605 +#define K_SYSCALL_W1_CHANGE_BUS_LOCK 606 +#define K_SYSCALL_W1_CONFIGURE 607 +#define K_SYSCALL_W1_GET_SLAVE_COUNT 608 +#define K_SYSCALL_W1_READ_BIT 609 +#define K_SYSCALL_W1_READ_BLOCK 610 +#define K_SYSCALL_W1_READ_BYTE 611 +#define K_SYSCALL_W1_RESET_BUS 612 +#define K_SYSCALL_W1_SEARCH_BUS 613 +#define K_SYSCALL_W1_WRITE_BIT 614 +#define K_SYSCALL_W1_WRITE_BLOCK 615 +#define K_SYSCALL_W1_WRITE_BYTE 616 +#define K_SYSCALL_WDT_DISABLE 617 +#define K_SYSCALL_WDT_FEED 618 +#define K_SYSCALL_WDT_SETUP 619 +#define K_SYSCALL_XTENSA_USER_FAULT 620 +#define K_SYSCALL_ZSOCK_ACCEPT 621 +#define K_SYSCALL_ZSOCK_BIND 622 +#define K_SYSCALL_ZSOCK_CLOSE 623 +#define K_SYSCALL_ZSOCK_CONNECT 624 +#define K_SYSCALL_ZSOCK_FCNTL_IMPL 625 +#define K_SYSCALL_ZSOCK_GETHOSTNAME 626 +#define K_SYSCALL_ZSOCK_GETPEERNAME 627 +#define K_SYSCALL_ZSOCK_GETSOCKNAME 628 +#define K_SYSCALL_ZSOCK_GETSOCKOPT 629 +#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 630 +#define K_SYSCALL_ZSOCK_INET_PTON 631 +#define K_SYSCALL_ZSOCK_IOCTL_IMPL 632 +#define K_SYSCALL_ZSOCK_LISTEN 633 +#define K_SYSCALL_ZSOCK_RECVFROM 634 +#define K_SYSCALL_ZSOCK_RECVMSG 635 +#define K_SYSCALL_ZSOCK_SENDMSG 636 +#define K_SYSCALL_ZSOCK_SENDTO 637 +#define K_SYSCALL_ZSOCK_SETSOCKOPT 638 +#define K_SYSCALL_ZSOCK_SHUTDOWN 639 +#define K_SYSCALL_ZSOCK_SOCKET 640 +#define K_SYSCALL_ZSOCK_SOCKETPAIR 641 +#define K_SYSCALL_ZVFS_POLL 642 +#define K_SYSCALL_ZVFS_SELECT 643 +#define K_SYSCALL_Z_ERRNO 644 +#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 645 + + +#ifndef _ASMLANGUAGE + +#include +#include + +#endif /* _ASMLANGUAGE */ + +#endif /* ZEPHYR_SYSCALL_LIST_H */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/app_version.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/app_version.h new file mode 100644 index 0000000..2e9cb5f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/app_version.h @@ -0,0 +1,26 @@ +#ifndef _APP_VERSION_H_ +#define _APP_VERSION_H_ + +/* The template values come from cmake/modules/version.cmake + * BUILD_VERSION related template values will be 'git describe', + * alternatively user defined BUILD_VERSION. + */ + +/* #undef ZEPHYR_VERSION_CODE */ +/* #undef ZEPHYR_VERSION */ + +#define APPVERSION 0x2040000 +#define APP_VERSION_NUMBER 0x20400 +#define APP_VERSION_MAJOR 2 +#define APP_VERSION_MINOR 4 +#define APP_PATCHLEVEL 0 +#define APP_TWEAK 0 +#define APP_EXTRAVERSION +#define APP_VERSION_STRING "2.4.0" +#define APP_VERSION_EXTENDED_STRING "2.4.0+0" +#define APP_VERSION_TWEAK_STRING "2.4.0+0" + +#define APP_BUILD_VERSION v2.4.0-41-ge36d3c8d6ca5 + + +#endif /* _APP_VERSION_H_ */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h new file mode 100644 index 0000000..c718a0c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/autoconf.h @@ -0,0 +1,432 @@ +#define CONFIG_MCUBOOT 1 +#define CONFIG_BOOT_USE_TINYCRYPT 1 +#define CONFIG_BOOT_SOMETHING_USES_SHA256 1 +#define CONFIG_BOOT_IMG_HASH_ALG_SHA256_ALLOW 1 +#define CONFIG_BOOT_IMG_HASH_ALG_SHA256 1 +#define CONFIG_BOOT_SIGNATURE_TYPE_NONE 1 +#define CONFIG_MCUBOOT_CLEANUP_ARM_CORE 1 +#define CONFIG_MBEDTLS_CONFIG_FILE "mcuboot-mbedtls-cfg.h" +#define CONFIG_BOOT_VALIDATE_SLOT0 1 +#define CONFIG_BOOT_PREFER_SWAP_OFFSET 1 +#define CONFIG_BOOT_SWAP_USING_MOVE 1 +#define CONFIG_BOOT_MAX_IMG_SECTORS_AUTO 1 +#define CONFIG_BOOT_SHARE_BACKEND_DISABLED 1 +#define CONFIG_BOOT_FIH_PROFILE_OFF 1 +#define CONFIG_MCUBOOT_LOG_LEVEL_INF 1 +#define CONFIG_MCUBOOT_LOG_LEVEL 3 +#define CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE 768 +#define CONFIG_BOOT_USB_DFU_NO 1 +#define CONFIG_UPDATEABLE_IMAGE_NUMBER 1 +#define CONFIG_MCUBOOT_BOOT_BANNER 1 +#define CONFIG_BOOT_BANNER_STRING "Using Zephyr OS build" +#define CONFIG_MCUBOOT_USE_TLV_ALLOW_LIST 1 +#define CONFIG_MCUBOOT_STORAGE_WITH_ERASE 1 +#define CONFIG_MCUBOOT_DEVICE_SETTINGS 1 +#define CONFIG_MULTITHREADING 1 +#define CONFIG_USB_DEVICE_PRODUCT "MCUBOOT" +#define CONFIG_MCUBOOT_BOOTUTIL_LIB_OWN_LOG 1 +#define CONFIG_DT_HAS_ARDUINO_HEADER_R3_ENABLED 1 +#define CONFIG_DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED 1 +#define CONFIG_DT_HAS_ARM_CORTEX_M4F_ENABLED 1 +#define CONFIG_DT_HAS_ARM_V7M_NVIC_ENABLED 1 +#define CONFIG_DT_HAS_FIXED_CLOCK_ENABLED 1 +#define CONFIG_DT_HAS_FIXED_LAYOUT_ENABLED 1 +#define CONFIG_DT_HAS_GPIO_KEYS_ENABLED 1 +#define CONFIG_DT_HAS_GPIO_LEDS_ENABLED 1 +#define CONFIG_DT_HAS_MMIO_SRAM_ENABLED 1 +#define CONFIG_DT_HAS_PWM_LEDS_ENABLED 1 +#define CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_DAC_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_EXTI_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_FLASH_CONTROLLER_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_GPIO_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_HSE_CLOCK_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_I2C_V2_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_LPTIM_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_LPUART_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_LSE_CLOCK_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_NV_FLASH_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_NVM_OTP_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_PINCTRL_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_PWM_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_RCC_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_RCC_RCTL_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_RNG_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_RTC_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_SPI_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_SPI_FIFO_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_TIMERS_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_UART_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_USART_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_WATCHDOG_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32G4_FLASH_CONTROLLER_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32G4_PLL_CLOCK_ENABLED 1 +#define CONFIG_DT_HAS_ST_MORPHO_HEADER_ENABLED 1 +#define CONFIG_DT_HAS_USB_NOP_XCEIV_ENABLED 1 +#define CONFIG_DT_HAS_ZEPHYR_MAPPED_PARTITION_ENABLED 1 +#define CONFIG_DT_HAS_ZEPHYR_MEMORY_REGION_ENABLED 1 +#define CONFIG_DT_HAS_ZEPHYR_POWER_STATE_ENABLED 1 +#define CONFIG_MAIN_STACK_SIZE 10240 +#define CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE 1024 +#define CONFIG_NUM_IRQS 92 +#define CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 170000000 +#define CONFIG_FLASH_SIZE 128 +#define CONFIG_FLASH_BASE_ADDRESS 0x8000000 +#define CONFIG_MP_MAX_NUM_CPUS 1 +#define CONFIG_DCACHE_LINE_SIZE 32 +#define CONFIG_ICACHE_LINE_SIZE 32 +#define CONFIG_IDLE_STACK_SIZE 320 +#define CONFIG_ISR_STACK_SIZE 2048 +#define CONFIG_CLOCK_CONTROL 1 +#define CONFIG_SYS_CLOCK_TICKS_PER_SEC 10000 +#define CONFIG_BUILD_OUTPUT_BIN 1 +#define CONFIG_ROM_START_OFFSET 0x0 +#define CONFIG_KERNEL_ENTRY "__start" +#define CONFIG_XIP 1 +#define CONFIG_HAS_FLASH_LOAD_OFFSET 1 +#define CONFIG_CPU_HAS_ARM_MPU 1 +#define CONFIG_STM32_FLASH_PREFETCH 1 +#define CONFIG_TICKLESS_KERNEL 1 +#define CONFIG_CORTEX_M_SYSTICK 1 +#define CONFIG_CLOCK_CONTROL_INIT_PRIORITY 1 +#define CONFIG_USE_DT_CODE_PARTITION 1 +#define CONFIG_STM32_BACKUP_PROTECTION 1 +#define CONFIG_NUM_METAIRQ_PRIORITIES 0 +#define CONFIG_NUM_PREEMPT_PRIORITIES 15 +#define CONFIG_BUILD_OUTPUT_HEX 1 +#define CONFIG_GEN_IRQ_VECTOR_TABLE 1 +#define CONFIG_GEN_ISR_TABLES 1 +#define CONFIG_TIMESLICE_SIZE 20 +#define CONFIG_SYS_CLOCK_EXISTS 1 +#define CONFIG_FLASH_FILL_BUFFER_SIZE 32 +#define CONFIG_FLASH 1 +#define CONFIG_HW_STACK_PROTECTION 1 +#define CONFIG_LOG 1 +#define CONFIG_ARCH_SW_ISR_TABLE_ALIGN 4 +#define CONFIG_LOG_DOMAIN_NAME "" +#define CONFIG_SOC_EARLY_INIT_HOOK 1 +#define CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE 0 +#define CONFIG_GEN_SW_ISR_TABLE 1 +#define CONFIG_FLASH_INIT_PRIORITY 50 +#define CONFIG_GEN_IRQ_START_VECTOR 0 +#define CONFIG_SRAM_OFFSET 0x0 +#define CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN 4 +#define CONFIG_ISR_TABLES_LOCAL_DECLARATION_SUPPORTED 1 +#define CONFIG_KERNEL_MEM_POOL 1 +#define CONFIG_LINKER_USE_RELAX 1 +#define CONFIG_ZEPHYR_ACPICA_MODULE 1 +#define CONFIG_ZEPHYR_CMSIS_MODULE 1 +#define CONFIG_HAS_CMSIS_CORE 1 +#define CONFIG_ZEPHYR_CMSIS_DSP_MODULE 1 +#define CONFIG_ZEPHYR_CMSIS_NN_MODULE 1 +#define CONFIG_ZEPHYR_CMSIS_6_MODULE 1 +#define CONFIG_HAS_CMSIS_CORE_M 1 +#define CONFIG_ZEPHYR_DHARA_MODULE 1 +#define CONFIG_ZEPHYR_FATFS_MODULE 1 +#define CONFIG_ZEPHYR_ADI_MODULE 1 +#define CONFIG_ZEPHYR_HAL_AFBR_MODULE 1 +#define CONFIG_ZEPHYR_HAL_AMBIQ_MODULE 1 +#define CONFIG_ZEPHYR_ATMEL_MODULE 1 +#define CONFIG_ZEPHYR_HAL_BOUFFALOLAB_MODULE 1 +#define CONFIG_ZEPHYR_HAL_ESPRESSIF_MODULE 1 +#define CONFIG_ZEPHYR_HAL_ETHOS_U_MODULE 1 +#define CONFIG_ZEPHYR_HAL_GIGADEVICE_MODULE 1 +#define CONFIG_ZEPHYR_HAL_INFINEON_MODULE 1 +#define CONFIG_ZEPHYR_HAL_INTEL_MODULE 1 +#define CONFIG_ZEPHYR_MICROCHIP_MODULE 1 +#define CONFIG_ZEPHYR_HAL_NORDIC_MODULE 1 +#define CONFIG_ZEPHYR_NUVOTON_MODULE 1 +#define CONFIG_ZEPHYR_HAL_NXP_MODULE 1 +#define CONFIG_ZEPHYR_OPENISA_MODULE 1 +#define CONFIG_ZEPHYR_QUICKLOGIC_MODULE 1 +#define CONFIG_ZEPHYR_HAL_REALTEK_MODULE 1 +#define CONFIG_REALTEK_BEE_NVIC 1 +#define CONFIG_REALTEK_BEE_COMMON_DRIVER 1 +#define CONFIG_WRAP_REALTEK_BEE_NVIC 1 +#define CONFIG_ZEPHYR_HAL_RENESAS_MODULE 1 +#define CONFIG_ZEPHYR_HAL_RPI_PICO_MODULE 1 +#define CONFIG_ZEPHYR_HAL_SIFLI_MODULE 1 +#define CONFIG_ZEPHYR_HAL_SILABS_MODULE 1 +#define CONFIG_ZEPHYR_HAL_ST_MODULE 1 +#define CONFIG_ZEPHYR_HAL_STM32_MODULE 1 +#define CONFIG_ZEPHYR_HAL_TDK_MODULE 1 +#define CONFIG_ZEPHYR_HAL_TELINK_MODULE 1 +#define CONFIG_ZEPHYR_TI_MODULE 1 +#define CONFIG_ZEPHYR_HAL_WCH_MODULE 1 +#define CONFIG_ZEPHYR_HAL_WURTHELEKTRONIK_MODULE 1 +#define CONFIG_ZEPHYR_XTENSA_MODULE 1 +#define CONFIG_ZEPHYR_HOSTAP_MODULE 1 +#define CONFIG_ZEPHYR_LIBLC3_MODULE 1 +#define CONFIG_ZEPHYR_LIBMCTP_MODULE 1 +#define CONFIG_ZEPHYR_LIBMETAL_MODULE 1 +#define CONFIG_ZEPHYR_LIBSBC_MODULE 1 +#define CONFIG_ZEPHYR_LITTLEFS_MODULE 1 +#define CONFIG_ZEPHYR_LORA_BASICS_MODEM_MODULE 1 +#define CONFIG_ZEPHYR_LORAMAC_NODE_MODULE 1 +#define CONFIG_ZEPHYR_LVGL_MODULE 1 +#define CONFIG_ZEPHYR_MBEDTLS_MODULE 1 +#define CONFIG_MBEDTLS_PROMPTLESS 1 +#define CONFIG_MBEDTLS_VERSION_4_x 1 +#define CONFIG_ZEPHYR_MBEDTLS_3_6_MODULE 1 +#define CONFIG_ZEPHYR_MCUBOOT_MODULE 1 +#define CONFIG_ZEPHYR_MIPI_SYS_T_MODULE 1 +#define CONFIG_ZEPHYR_MLDSA_NATIVE_MODULE 1 +#define CONFIG_ZEPHYR_NANOPB_MODULE 1 +#define CONFIG_ZEPHYR_NRF_WIFI_MODULE 1 +#define CONFIG_ZEPHYR_OPEN_AMP_MODULE 1 +#define CONFIG_ZEPHYR_OPENTHREAD_MODULE 1 +#define CONFIG_ZEPHYR_PERCEPIO_MODULE 1 +#define CONFIG_ZEPHYR_PICOLIBC_MODULE 1 +#define CONFIG_ZEPHYR_PSA_ARCH_TESTS_MODULE 1 +#define CONFIG_ZEPHYR_SEGGER_MODULE 1 +#define CONFIG_HAS_SEGGER_RTT 1 +#define CONFIG_ZEPHYR_TF_M_TESTS_MODULE 1 +#define CONFIG_ZEPHYR_TF_PSA_CRYPTO_MODULE 1 +#define CONFIG_ZEPHYR_TRUSTED_FIRMWARE_A_MODULE 1 +#define CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE 1 +#define CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE 1 +#define CONFIG_ZEPHYR_ZCBOR_MODULE 1 +#define CONFIG_ZEPHYR_NRF_HW_MODELS_MODULE 1 +#define CONFIG_HAS_STM32CUBE 1 +#define CONFIG_USE_STM32_LL_UTILS 1 +#define CONFIG_MCUBOOT_BOOTUTIL_LIB 1 +#define CONFIG_MCUBOOT_UTIL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MCUBOOT_UTIL_LOG_LEVEL 0 +#define CONFIG_MCUBOOT_BOOT_MAX_ALIGN 8 +#define CONFIG_BOARD "nucleo_g431rb" +#define CONFIG_BOARD_REVISION "" +#define CONFIG_BOARD_TARGET "nucleo_g431rb/stm32g431xx" +#define CONFIG_BOARD_NUCLEO_G431RB 1 +#define CONFIG_BOARD_NUCLEO_G431RB_STM32G431XX 1 +#define CONFIG_BOARD_QUALIFIERS "stm32g431xx" +#define CONFIG_SOC "stm32g431xx" +#define CONFIG_SOC_SERIES "stm32g4x" +#define CONFIG_SOC_FAMILY "stm32" +#define CONFIG_SOC_FAMILY_STM32 1 +#define CONFIG_SOC_SERIES_STM32G4X 1 +#define CONFIG_SOC_STM32G431XX 1 +#define CONFIG_SWJ_ANALOG_PRIORITY 49 +#define CONFIG_STM32_IOCELL_PRIORITY 50 +#define CONFIG_HAS_STM32_FLASH_PREFETCH 1 +#define CONFIG_SOC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_SOC_LOG_LEVEL 0 +#define CONFIG_ARCH "arm" +#define CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT 1 +#define CONFIG_CPU_CORTEX 1 +#define CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE 32 +#define CONFIG_MPU_ALLOW_FLASH_WRITE 1 +#define CONFIG_CPU_CORTEX_M 1 +#define CONFIG_ISA_THUMB2 1 +#define CONFIG_ASSEMBLER_ISA_THUMB2 1 +#define CONFIG_COMPILER_ISA_THUMB2 1 +#define CONFIG_STACK_ALIGN_DOUBLE_WORD 1 +#define CONFIG_FAULT_DUMP 2 +#define CONFIG_ARM_STACK_PROTECTION 1 +#define CONFIG_FP16 1 +#define CONFIG_FP16_IEEE 1 +#define CONFIG_CPU_CORTEX_M4 1 +#define CONFIG_CPU_CORTEX_M_HAS_SYSTICK 1 +#define CONFIG_CPU_CORTEX_M_HAS_DWT 1 +#define CONFIG_CPU_CORTEX_M_HAS_BASEPRI 1 +#define CONFIG_CPU_CORTEX_M_HAS_VTOR 1 +#define CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS 1 +#define CONFIG_ARMV7_M_ARMV8_M_MAINLINE 1 +#define CONFIG_ARMV7_M_ARMV8_M_FP 1 +#define CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE 1 +#define CONFIG_MPU_STACK_GUARD 1 +#define CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE 32 +#define CONFIG_HAS_SWO 1 +#define CONFIG_ARCH_HAS_LLEXT_VENEERS 1 +#define CONFIG_ARM 1 +#define CONFIG_ARCH_IS_SET 1 +#define CONFIG_ARCH_SUPPORTS_ROM_OFFSET 1 +#define CONFIG_ARM_MPU 1 +#define CONFIG_ARCH_LOG_LEVEL_DEFAULT 1 +#define CONFIG_ARCH_LOG_LEVEL 0 +#define CONFIG_LITTLE_ENDIAN 1 +#define CONFIG_SRAM_SIZE 32 +#define CONFIG_SRAM_BASE_ADDRESS 0x20000000 +#define CONFIG_GEN_PRIV_STACKS 1 +#define CONFIG_ARCH_DEVICE_STATE_ALIGN 4 +#define CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS 1 +#define CONFIG_GEN_SW_ISR_TABLE_ARRAY 1 +#define CONFIG_EXCEPTION_DEBUG 1 +#define CONFIG_ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS 1 +#define CONFIG_ARCH_HAS_TIMING_FUNCTIONS 1 +#define CONFIG_ARCH_HAS_STACK_PROTECTION 1 +#define CONFIG_ARCH_HAS_USERSPACE 1 +#define CONFIG_ARCH_HAS_EXECUTABLE_PAGE_BIT 1 +#define CONFIG_ARCH_HAS_RAMFUNC_SUPPORT 1 +#define CONFIG_ARCH_HAS_VECTOR_TABLE_RELOCATION 1 +#define CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION 1 +#define CONFIG_ARCH_SUPPORTS_COREDUMP 1 +#define CONFIG_ARCH_SUPPORTS_COREDUMP_THREADS 1 +#define CONFIG_ARCH_SUPPORTS_COREDUMP_STACK_PTR 1 +#define CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT 1 +#define CONFIG_ARCH_SUPPORTS_ROM_START 1 +#define CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO 1 +#define CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE 1 +#define CONFIG_ARCH_HAS_SUSPEND_TO_RAM 1 +#define CONFIG_ARCH_HAS_THREAD_ABORT 1 +#define CONFIG_ARCH_HAS_CODE_DATA_RELOCATION 1 +#define CONFIG_CPU_HAS_FPU 1 +#define CONFIG_CPU_HAS_MPU 1 +#define CONFIG_MPU 1 +#define CONFIG_MPU_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MPU_LOG_LEVEL 0 +#define CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT 1 +#define CONFIG_SRAM_REGION_PERMISSIONS 1 +#define CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS 1 +#define CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN 1 +#define CONFIG_KERNEL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_KERNEL_LOG_LEVEL 0 +#define CONFIG_NUM_COOP_PRIORITIES 16 +#define CONFIG_MAIN_THREAD_PRIORITY 0 +#define CONFIG_COOP_ENABLED 1 +#define CONFIG_PREEMPT_ENABLED 1 +#define CONFIG_PRIORITY_CEILING -128 +#define CONFIG_THREAD_STACK_INFO 1 +#define CONFIG_SCHED_SIMPLE 1 +#define CONFIG_WAITQ_SIMPLE 1 +#define CONFIG_CURRENT_THREAD_USE_TLS 1 +#define CONFIG_SYSTEM_WORKQUEUE_PRIORITY -1 +#define CONFIG_SYSTEM_WORKQUEUE_WORK_TIMEOUT_MS 0 +#define CONFIG_BARRIER_OPERATIONS_ARCH 1 +#define CONFIG_TIMESLICING 1 +#define CONFIG_TIMESLICE_PRIORITY 0 +#define CONFIG_NUM_MBOX_ASYNC_MSGS 10 +#define CONFIG_HEAP_MEM_POOL_SIZE 0 +#define CONFIG_SWAP_NONATOMIC 1 +#define CONFIG_TIMEOUT_64BIT 1 +#define CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS 365 +#define CONFIG_USE_SWITCH_SUPPORTED 1 +#define CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE 1 +#define CONFIG_THREAD_LOCAL_STORAGE 1 +#define CONFIG_TOOLCHAIN_SUPPORTS_STATIC_INIT_GNU 1 +#define CONFIG_KERNEL_INIT_PRIORITY_OBJECTS 30 +#define CONFIG_KERNEL_INIT_PRIORITY_LIBC 35 +#define CONFIG_KERNEL_INIT_PRIORITY_DEFAULT 40 +#define CONFIG_KERNEL_INIT_PRIORITY_DEVICE 50 +#define CONFIG_APPLICATION_INIT_PRIORITY 90 +#define CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_CLOCK_CONTROL_LOG_LEVEL 0 +#define CONFIG_CLOCK_CONTROL_STM32_CUBE 1 +#define CONFIG_CLOCK_STM32_HSE_CLOCK 24000000 +#define CONFIG_CLOCK_CONTROL_TISCI_PRIORITY 40 +#define CONFIG_FLASH_HAS_DRIVER_ENABLED 1 +#define CONFIG_FLASH_HAS_EXPLICIT_ERASE 1 +#define CONFIG_FLASH_HAS_PAGE_LAYOUT 1 +#define CONFIG_FLASH_PAGE_LAYOUT 1 +#define CONFIG_SOC_FLASH_STM32 1 +#define CONFIG_FLASH_LOG_LEVEL_DEFAULT 1 +#define CONFIG_FLASH_LOG_LEVEL 0 +#define CONFIG_INTC_INIT_PRIORITY 40 +#define CONFIG_INTC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_INTC_LOG_LEVEL 0 +#define CONFIG_EXTI_STM32 1 +#define CONFIG_GPIO_INTC_STM32 1 +#define CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER 1 +#define CONFIG_SYSTEM_CLOCK_INIT_PRIORITY 0 +#define CONFIG_TICKLESS_CAPABLE 1 +#define CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT 1 +#define CONFIG_CORTEX_M_SYSTICK_INSTALL_ISR 1 +#define CONFIG_CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER 1 +#define CONFIG_SYSTEM_TIMER_HAS_LPM_COMPANION_SUPPORT 1 +#define CONFIG_SYSTEM_TIMER_LPM_COMPANION_NONE 1 +#define CONFIG_STM32_USB_COMMON_LOG_LEVEL_DEFAULT 1 +#define CONFIG_STM32_USB_COMMON_LOG_LEVEL 0 +#define CONFIG_FULL_LIBC_SUPPORTED 1 +#define CONFIG_MINIMAL_LIBC_SUPPORTED 1 +#define CONFIG_PICOLIBC_SUPPORTED 1 +#define CONFIG_PICOLIBC 1 +#define CONFIG_COMMON_LIBC_ABORT 1 +#define CONFIG_COMMON_LIBC_TIME 1 +#define CONFIG_COMMON_LIBC_MALLOC 1 +#define CONFIG_COMMON_LIBC_CALLOC 1 +#define CONFIG_COMMON_LIBC_REALLOCARRAY 1 +#define CONFIG_LIBC_ERRNO 1 +#define CONFIG_ERRNO 1 +#define CONFIG_PICOLIBC_USE_TOOLCHAIN 1 +#define CONFIG_PICOLIBC_IO_MINIMAL 1 +#define CONFIG_NEED_LIBC_MEM_PARTITION 1 +#define CONFIG_SYS_HEAP_ALLOC_LOOPS 3 +#define CONFIG_SYS_HEAP_ARRAY_SIZE 0 +#define CONFIG_SYS_HEAP_HARDENING_BASIC 1 +#define CONFIG_SYS_HEAP_HARDENING_LEVEL 1 +#define CONFIG_SYS_HEAP_LOG_LEVEL_DEFAULT 1 +#define CONFIG_SYS_HEAP_LOG_LEVEL 0 +#define CONFIG_SYS_HEAP_SMALL_ONLY 1 +#define CONFIG_BOOT_BANNER 1 +#define CONFIG_BOOT_DELAY 0 +#define CONFIG_ATOMIC_OPERATIONS_BUILTIN 1 +#define CONFIG_CBPRINTF_NANO 1 +#define CONFIG_CBPRINTF_FULL_INTEGRAL 1 +#define CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT 1 +#define CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL 0 +#define CONFIG_CBPRINTF_CONVERT_CHECK_PTR 1 +#define CONFIG_CPU_LOAD_LOG_LEVEL_DEFAULT 1 +#define CONFIG_CPU_LOAD_LOG_LEVEL 0 +#define CONFIG_LIBGCC_RTLIB 1 +#define CONFIG_RING_BUFFER 1 +#define CONFIG_GETOPT 1 +#define CONFIG_TIMEUTIL_APPLY_SKEW 1 +#define CONFIG_PRINTK 1 +#define CONFIG_EARLY_CONSOLE 1 +#define CONFIG_ASSERT_VERBOSE 1 +#define CONFIG_CPU_LOAD_LOG_PERIODICALLY 0 +#define CONFIG_OPENAMP_VRING_ALIGNMENT 16 +#define CONFIG_LOG_CORE_INIT_PRIORITY 0 +#define CONFIG_LOG_MODE_MINIMAL 1 +#define CONFIG_LOG_DEFAULT_LEVEL 0 +#define CONFIG_LOG_OVERRIDE_LEVEL 0 +#define CONFIG_LOG_MAX_LEVEL 4 +#define CONFIG_LOG_USE_VLA 1 +#define CONFIG_LOG_SIMPLE_MSG_OPTIMIZE 1 +#define CONFIG_LOG_RATELIMIT 1 +#define CONFIG_LOG_RATELIMIT_INTERVAL_MS 5000 +#define CONFIG_MEM_ATTR 1 +#define CONFIG_HAS_PM 1 +#define CONFIG_POSIX_AEP_CHOICE_ZEPHYR 1 +#define CONFIG_TC_PROVIDES_POSIX_C_LANG_SUPPORT_R 1 +#define CONFIG_POSIX_C_LANG_SUPPORT_R 1 +#define CONFIG_POSIX_C_LIB_EXT 1 +#define CONFIG_TIMER_RANDOM_INITIAL_STATE 123456789 +#define CONFIG_ENTROPY_NODE_ENABLED 1 +#define CONFIG_FLASH_MAP 1 +#define CONFIG_COVERAGE_DUMP_PATH_EXCLUDE "" +#define CONFIG_TOOLCHAIN_ZEPHYR_1_0 1 +#define CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE 1 +#define CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_GNU_EXTENSIONS 1 +#define CONFIG_PICOLIBC_DEFAULT 1 +#define CONFIG_LINKER_ORPHAN_SECTION_WARN 1 +#define CONFIG_FLASH_USES_MAPPED_PARTITION 1 +#define CONFIG_ROM_END_OFFSET 0x0 +#define CONFIG_LD_LINKER_SCRIPT_SUPPORTED 1 +#define CONFIG_LD_LINKER_TEMPLATE 1 +#define CONFIG_LINKER_SORT_BY_ALIGNMENT 1 +#define CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT 1 +#define CONFIG_LINKER_LAST_SECTION_ID 1 +#define CONFIG_LINKER_LAST_SECTION_ID_PATTERN 0xE015E015 +#define CONFIG_LINKER_ITERABLE_SUBALIGN 4 +#define CONFIG_LINKER_DEVNULL_SUPPORT 1 +#define CONFIG_STD_C17 1 +#define CONFIG_TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS 1 +#define CONFIG_SIZE_OPTIMIZATIONS 1 +#define CONFIG_COMPILER_TRACK_MACRO_EXPANSION 1 +#define CONFIG_COMPILER_COLOR_DIAGNOSTICS 1 +#define CONFIG_FORTIFY_SOURCE_COMPILE_TIME 1 +#define CONFIG_COMPILER_OPT "" +#define CONFIG_TOOLCHAIN_SUPPORTS_VLA_IN_STATEMENTS 1 +#define CONFIG_TOOLCHAIN_SUPPORTS_VARIABLE_CLEANUP_ATTRIBUTE 1 +#define CONFIG_COMPILER_CODEGEN_VLIW_AUTO 1 +#define CONFIG_RUNTIME_ERROR_CHECKS 1 +#define CONFIG_KERNEL_BIN_NAME "zephyr" +#define CONFIG_OUTPUT_STAT 1 +#define CONFIG_OUTPUT_PRINT_MEMORY_USAGE 1 +#define CONFIG_BUILD_GAP_FILL_PATTERN 0xFF +#define CONFIG_BUILD_OUTPUT_STRIP_PATHS 1 +#define CONFIG_CHECK_INIT_PRIORITIES 1 +#define CONFIG_WARN_DEPRECATED 1 +#define CONFIG_ENFORCE_ZEPHYR_STDINT 1 +#define CONFIG_IS_BOOTLOADER 1 +#define CONFIG_LEGACY_GENERATED_INCLUDE_PATH 1 diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/devicetree_generated.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/devicetree_generated.h new file mode 100644 index 0000000..8da4e02 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/devicetree_generated.h @@ -0,0 +1,24816 @@ +/* + * Generated by gen_defines.py + * + * DTS input file: + * /home/jeremy/utat-dev/zephyrproject/build/mcuboot/zephyr/zephyr.dts.pre + * + * Directories with bindings: + * $ZEPHYR_BASE/dts/bindings + * + * Node dependency ordering (ordinal and path): + * 0 / + * 1 /aliases + * 2 /chosen + * 3 /connector + * 4 /soc + * 5 /soc/interrupt-controller@e000e100 + * 6 /clocks + * 7 /clocks/clk-hse + * 8 /clocks/pll + * 9 /soc/rcc@40021000 + * 10 /soc/adc@50000000 + * 11 /soc/flash-controller@40022000 + * 12 /soc/flash-controller@40022000/flash@1fff7500 + * 13 /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout + * 14 /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8 + * 15 /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca + * 16 /dietemp + * 17 /memory@20000000 + * 18 /soc/pin-controller@48000000 + * 19 /soc/pin-controller@48000000/i2c1_scl_pb8 + * 20 /soc/pin-controller@48000000/i2c1_sda_pb9 + * 21 /soc/i2c@40005400 + * 22 /smbus1 + * 23 /soc/i2c@40005800 + * 24 /smbus2 + * 25 /soc/i2c@40007800 + * 26 /smbus3 + * 27 /st-morpho-header + * 28 /vbat + * 29 /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa + * 30 /vref + * 31 /clocks/clk-hsi + * 32 /clocks/clk-hsi48 + * 33 /clocks/clk-lse + * 34 /clocks/clk-lsi + * 35 /cpus + * 36 /cpus/power-states + * 37 /cpus/power-states/state0 + * 38 /cpus/power-states/state1 + * 39 /cpus/cpu@0 + * 40 /soc/pin-controller@48000000/gpio@48000800 + * 41 /gpio_keys + * 42 /gpio_keys/button + * 43 /soc/pin-controller@48000000/gpio@48000000 + * 44 /leds + * 45 /leds/led_0 + * 46 /soc/rcc@40021000/reset-controller + * 47 /soc/timers@40000000 + * 48 /soc/pin-controller@48000000/tim2_ch1_pa5 + * 49 /soc/timers@40000000/pwm + * 50 /pwmleds + * 51 /pwmleds/green_pwm_led + * 52 /soc/adc@50000100 + * 53 /soc/can@40006400 + * 54 /soc/comparator@40010200 + * 55 /soc/comparator@40010204 + * 56 /soc/crc@40023000 + * 57 /soc/pin-controller@48000000/dac1_out1_pa4 + * 58 /soc/dac@50000800 + * 59 /soc/dac@50001000 + * 60 /soc/dma@40020400 + * 61 /soc/dmamux@40020800 + * 62 /soc/interrupt-controller@40010400 + * 63 /soc/opamp1@40010300 + * 64 /soc/opamp2@40010304 + * 65 /soc/opamp3@40010308 + * 66 /soc/rng@50060800 + * 67 /soc/rtc@40002800 + * 68 /soc/dma@40020000 + * 69 /soc/sai1@40015404 + * 70 /soc/sai1@40015424 + * 71 /soc/serial@40004400 + * 72 /soc/serial@40004800 + * 73 /soc/serial@40004c00 + * 74 /soc/pin-controller@48000000/lpuart1_rx_pa3 + * 75 /soc/pin-controller@48000000/lpuart1_tx_pa2 + * 76 /soc/serial@40008000 + * 77 /soc/pin-controller@48000000/usart1_rx_pc5 + * 78 /soc/pin-controller@48000000/usart1_tx_pc4 + * 79 /soc/serial@40013800 + * 80 /soc/pin-controller@48000000/spi2_miso_pb14 + * 81 /soc/pin-controller@48000000/spi2_mosi_pb15 + * 82 /soc/pin-controller@48000000/spi2_nss_pb12 + * 83 /soc/pin-controller@48000000/spi2_sck_pb13 + * 84 /soc/spi@40003800 + * 85 /soc/pin-controller@48000000/spi3_miso_pc11 + * 86 /soc/pin-controller@48000000/spi3_mosi_pc12 + * 87 /soc/pin-controller@48000000/spi3_nss_pa15 + * 88 /soc/pin-controller@48000000/spi3_sck_pc10 + * 89 /soc/spi@40003c00 + * 90 /soc/pin-controller@48000000/gpio@48000400 + * 91 /soc/pin-controller@48000000/spi1_miso_pa6 + * 92 /soc/pin-controller@48000000/spi1_mosi_pa7 + * 93 /soc/pin-controller@48000000/spi1_sck_pa5 + * 94 /soc/spi@40013000 + * 95 /soc/timer@e000e010 + * 96 /soc/timers@40007c00 + * 97 /soc/ucpd@4000a000 + * 98 /usbphy + * 99 /soc/usb@40005c00 + * 100 /soc/watchdog@40002c00 + * 101 /soc/watchdog@40003000 + * 102 /soc/flash-controller@40022000/flash@1fff7000 + * 103 /soc/flash-controller@40022000/flash@8000000 + * 104 /soc/flash-controller@40022000/flash@8000000/partitions + * 105 /soc/flash-controller@40022000/flash@8000000/partitions/partition@0 + * 106 /soc/flash-controller@40022000/flash@8000000/partitions/partition@8800 + * 107 /soc/flash-controller@40022000/flash@8000000/partitions/partition@14800 + * 108 /soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000 + * 109 /soc/pin-controller@48000000/gpio@48000c00 + * 110 /soc/pin-controller@48000000/gpio@48001000 + * 111 /soc/pin-controller@48000000/gpio@48001400 + * 112 /soc/pin-controller@48000000/gpio@48001800 + * 113 /soc/timers@40000000/counter + * 114 /soc/timers@40000000/qdec + * 115 /soc/timers@40000400 + * 116 /soc/timers@40000400/counter + * 117 /soc/timers@40000400/pwm + * 118 /soc/timers@40000400/qdec + * 119 /soc/timers@40000800 + * 120 /soc/timers@40000800/counter + * 121 /soc/timers@40000800/pwm + * 122 /soc/timers@40000800/qdec + * 123 /soc/timers@40001000 + * 124 /soc/timers@40001000/counter + * 125 /soc/timers@40001400 + * 126 /soc/timers@40001400/counter + * 127 /soc/timers@40012c00 + * 128 /soc/timers@40012c00/counter + * 129 /soc/timers@40012c00/pwm + * 130 /soc/timers@40012c00/qdec + * 131 /soc/timers@40013400 + * 132 /soc/timers@40013400/counter + * 133 /soc/timers@40013400/pwm + * 134 /soc/timers@40013400/qdec + * 135 /soc/timers@40014000 + * 136 /soc/timers@40014000/counter + * 137 /soc/timers@40014000/pwm + * 138 /soc/timers@40014400 + * 139 /soc/timers@40014400/counter + * 140 /soc/timers@40014400/pwm + * 141 /soc/timers@40014800 + * 142 /soc/timers@40014800/counter + * 143 /soc/timers@40014800/pwm + * + * Definitions derived from these nodes in dependency order are next, + * followed by /chosen nodes. + */ + +/* Used to remove brackets from around a single argument */ +#define DT_DEBRACKET_INTERNAL(...) __VA_ARGS__ + +/* + * Devicetree node: / + * + * Node identifier: DT_N + */ + +/* Node's full path: */ +#define DT_N_PATH "/" + +/* Node's name with unit-address: */ +#define DT_N_FULL_NAME "/" +#define DT_N_FULL_NAME_UNQUOTED / +#define DT_N_FULL_NAME_TOKEN _ +#define DT_N_FULL_NAME_UPPER_TOKEN _ + +/* Helpers for dealing with node labels: */ +#define DT_N_NODELABEL_NUM 0 +#define DT_N_FOREACH_NODELABEL(fn) +#define DT_N_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_FOREACH_ANCESTOR(fn) + +/* Helper macros for child nodes of this node. */ +#define DT_N_CHILD_NUM 18 +#define DT_N_CHILD_NUM_STATUS_OKAY 12 +#define DT_N_CHILD_UNIT_ADDR_INT_536870912 DT_N_S_memory_20000000 +#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_memory_20000000) fn(DT_N_S_clocks) fn(DT_N_S_dietemp) fn(DT_N_S_vref) fn(DT_N_S_vbat) fn(DT_N_S_usbphy) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_connector) fn(DT_N_S_st_morpho_header) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_gpio_keys) +#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_dietemp) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vref) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vbat) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_usbphy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_st_morpho_header) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_keys) +#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_usbphy, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_st_morpho_header, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_dietemp, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vref, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vbat, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_usbphy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_st_morpho_header, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_keys, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_memory_20000000) fn(DT_N_S_clocks) fn(DT_N_S_usbphy) fn(DT_N_S_connector) fn(DT_N_S_st_morpho_header) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_gpio_keys) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_usbphy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_st_morpho_header) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_keys) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_usbphy, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_st_morpho_header, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_usbphy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_st_morpho_header, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_keys, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_HASH il7asoJjJEMhngUeSt4tHVu8Zxx4EFG_FDeJfL3_oPE + +/* Node's dependency ordinal: */ +#define DT_N_ORD 0 +#define DT_N_ORD_STR_SORTABLE 00000 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_REQUIRES_ORDS /* nothing */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_SUPPORTS_ORDS \ + 1, /* /aliases */ \ + 2, /* /chosen */ \ + 3, /* /connector */ \ + 4, /* /soc */ \ + 6, /* /clocks */ \ + 16, /* /dietemp */ \ + 17, /* /memory@20000000 */ \ + 22, /* /smbus1 */ \ + 24, /* /smbus2 */ \ + 26, /* /smbus3 */ \ + 27, /* /st-morpho-header */ \ + 28, /* /vbat */ \ + 30, /* /vref */ \ + 35, /* /cpus */ \ + 41, /* /gpio_keys */ \ + 44, /* /leds */ \ + 50, /* /pwmleds */ \ + 98, /* /usbphy */ + +/* Existence and alternate IDs: */ +#define DT_N_EXISTS 1 +#define DT_N_INST_0_st_stm32g431rb_nucleo DT_N + +/* Macros for properties that are special in the specification: */ +#define DT_N_REG_NUM 0 +#define DT_N_FOREACH_REG(fn) +#define DT_N_FOREACH_REG_SEP(fn, sep) +#define DT_N_FOREACH_REG_VARGS(fn, ...) +#define DT_N_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_RANGES_NUM 0 +#define DT_N_FOREACH_RANGE(fn) +#define DT_N_IRQ_NUM 0 +#define DT_N_IRQ_LEVEL 0 +#define DT_N_COMPAT_MATCHES_st_stm32g431rb_nucleo 1 +#define DT_N_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_COMPAT_MODEL_IDX_0 "stm32g431rb-nucleo" +#define DT_N_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_P_compatible {"st,stm32g431rb-nucleo"} +#define DT_N_P_compatible_IDX_0_EXISTS 1 +#define DT_N_P_compatible_IDX_0 "st,stm32g431rb-nucleo" +#define DT_N_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g431rb-nucleo +#define DT_N_P_compatible_IDX_0_STRING_TOKEN st_stm32g431rb_nucleo +#define DT_N_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G431RB_NUCLEO +#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0) +#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N, compatible, 0) +#define DT_N_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N, compatible, 0, __VA_ARGS__) +#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N, compatible, 0, __VA_ARGS__) +#define DT_N_P_compatible_LEN 1 +#define DT_N_P_compatible_EXISTS 1 + +/* + * Devicetree node: /aliases + * + * Node identifier: DT_N_S_aliases + */ + +/* Node's full path: */ +#define DT_N_S_aliases_PATH "/aliases" + +/* Node's name with unit-address: */ +#define DT_N_S_aliases_FULL_NAME "aliases" +#define DT_N_S_aliases_FULL_NAME_UNQUOTED aliases +#define DT_N_S_aliases_FULL_NAME_TOKEN aliases +#define DT_N_S_aliases_FULL_NAME_UPPER_TOKEN ALIASES + +/* Node parent (/) identifier: */ +#define DT_N_S_aliases_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_aliases_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_aliases_NODELABEL_NUM 0 +#define DT_N_S_aliases_FOREACH_NODELABEL(fn) +#define DT_N_S_aliases_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_aliases_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_aliases_CHILD_NUM 0 +#define DT_N_S_aliases_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_aliases_FOREACH_CHILD(fn) +#define DT_N_S_aliases_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_aliases_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_aliases_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_aliases_HASH QavYY6yplHKhLPRKsRzaLCGlR0CWZ0JUNJakcBCfDXA + +/* Node's dependency ordinal: */ +#define DT_N_S_aliases_ORD 1 +#define DT_N_S_aliases_ORD_STR_SORTABLE 00001 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_aliases_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_aliases_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_aliases_REG_NUM 0 +#define DT_N_S_aliases_FOREACH_REG(fn) +#define DT_N_S_aliases_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_aliases_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_aliases_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_aliases_RANGES_NUM 0 +#define DT_N_S_aliases_FOREACH_RANGE(fn) +#define DT_N_S_aliases_IRQ_NUM 0 +#define DT_N_S_aliases_IRQ_LEVEL 0 +#define DT_N_S_aliases_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_aliases_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /chosen + * + * Node identifier: DT_N_S_chosen + */ + +/* Node's full path: */ +#define DT_N_S_chosen_PATH "/chosen" + +/* Node's name with unit-address: */ +#define DT_N_S_chosen_FULL_NAME "chosen" +#define DT_N_S_chosen_FULL_NAME_UNQUOTED chosen +#define DT_N_S_chosen_FULL_NAME_TOKEN chosen +#define DT_N_S_chosen_FULL_NAME_UPPER_TOKEN CHOSEN + +/* Node parent (/) identifier: */ +#define DT_N_S_chosen_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_chosen_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_chosen_NODELABEL_NUM 0 +#define DT_N_S_chosen_FOREACH_NODELABEL(fn) +#define DT_N_S_chosen_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_chosen_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_chosen_CHILD_NUM 0 +#define DT_N_S_chosen_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_chosen_FOREACH_CHILD(fn) +#define DT_N_S_chosen_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_chosen_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_chosen_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_chosen_HASH qNExeeLInzqaWpm1KroyYDk4lRIxVO2ig78mq_hOnA8 + +/* Node's dependency ordinal: */ +#define DT_N_S_chosen_ORD 2 +#define DT_N_S_chosen_ORD_STR_SORTABLE 00002 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_chosen_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_chosen_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_chosen_REG_NUM 0 +#define DT_N_S_chosen_FOREACH_REG(fn) +#define DT_N_S_chosen_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_chosen_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_chosen_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_chosen_RANGES_NUM 0 +#define DT_N_S_chosen_FOREACH_RANGE(fn) +#define DT_N_S_chosen_IRQ_NUM 0 +#define DT_N_S_chosen_IRQ_LEVEL 0 +#define DT_N_S_chosen_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_chosen_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /connector + * + * Node identifier: DT_N_S_connector + * + * Binding (compatible = arduino-header-r3): + * $ZEPHYR_BASE/dts/bindings/gpio/arduino-header-r3.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_connector_PATH "/connector" + +/* Node's name with unit-address: */ +#define DT_N_S_connector_FULL_NAME "connector" +#define DT_N_S_connector_FULL_NAME_UNQUOTED connector +#define DT_N_S_connector_FULL_NAME_TOKEN connector +#define DT_N_S_connector_FULL_NAME_UPPER_TOKEN CONNECTOR + +/* Node parent (/) identifier: */ +#define DT_N_S_connector_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_connector_CHILD_IDX 13 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_connector_NODELABEL_NUM 1 +#define DT_N_S_connector_FOREACH_NODELABEL(fn) fn(arduino_header) +#define DT_N_S_connector_FOREACH_NODELABEL_VARGS(fn, ...) fn(arduino_header, __VA_ARGS__) +#define DT_N_S_connector_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_connector_CHILD_NUM 0 +#define DT_N_S_connector_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_connector_FOREACH_CHILD(fn) +#define DT_N_S_connector_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_connector_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_connector_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_connector_HASH 1hNYiTso4N65bku_L_0pzRcHL_5NCz8DqiXd1i5KK7Q + +/* Node's dependency ordinal: */ +#define DT_N_S_connector_ORD 3 +#define DT_N_S_connector_ORD_STR_SORTABLE 00003 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_connector_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_connector_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_connector_EXISTS 1 +#define DT_N_INST_0_arduino_header_r3 DT_N_S_connector +#define DT_N_NODELABEL_arduino_header DT_N_S_connector + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_connector_REG_NUM 0 +#define DT_N_S_connector_FOREACH_REG(fn) +#define DT_N_S_connector_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_connector_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_connector_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_connector_RANGES_NUM 0 +#define DT_N_S_connector_FOREACH_RANGE(fn) +#define DT_N_S_connector_IRQ_NUM 0 +#define DT_N_S_connector_IRQ_LEVEL 0 +#define DT_N_S_connector_COMPAT_MATCHES_arduino_header_r3 1 +#define DT_N_S_connector_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_connector_PINCTRL_NUM 0 + +/* Map properties: */ +#define DT_N_S_connector_P_gpio_map_LEN 22 +#define DT_N_S_connector_P_gpio_map_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_0 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_0 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_0 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_0 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_0 4 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_0 3 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_0 4 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_0 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_0 5 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_0 6 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_0 5 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_0 7 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_0 4 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_0 8 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_0 10 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_0 9 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_0 3 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_0 10 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_0 5 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_0 11 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_0 4 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_0 12 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_0 10 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_0 13 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_0 8 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_0 14 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_0 9 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_0 15 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_0 7 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_0 16 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_0 6 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_0 17 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_0 7 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_0 18 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_0 6 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_0 19 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_0 5 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_0 20 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_0 9 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_CHILD_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_0 21 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT_ADDRESS_LEN 0 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_0 8 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_connector_P_gpio_map_FOREACH_MAP_ENTRY(fn) fn(DT_N_S_connector, gpio_map, 0) \ + fn(DT_N_S_connector, gpio_map, 1) \ + fn(DT_N_S_connector, gpio_map, 2) \ + fn(DT_N_S_connector, gpio_map, 3) \ + fn(DT_N_S_connector, gpio_map, 4) \ + fn(DT_N_S_connector, gpio_map, 5) \ + fn(DT_N_S_connector, gpio_map, 6) \ + fn(DT_N_S_connector, gpio_map, 7) \ + fn(DT_N_S_connector, gpio_map, 8) \ + fn(DT_N_S_connector, gpio_map, 9) \ + fn(DT_N_S_connector, gpio_map, 10) \ + fn(DT_N_S_connector, gpio_map, 11) \ + fn(DT_N_S_connector, gpio_map, 12) \ + fn(DT_N_S_connector, gpio_map, 13) \ + fn(DT_N_S_connector, gpio_map, 14) \ + fn(DT_N_S_connector, gpio_map, 15) \ + fn(DT_N_S_connector, gpio_map, 16) \ + fn(DT_N_S_connector, gpio_map, 17) \ + fn(DT_N_S_connector, gpio_map, 18) \ + fn(DT_N_S_connector, gpio_map, 19) \ + fn(DT_N_S_connector, gpio_map, 20) \ + fn(DT_N_S_connector, gpio_map, 21) +#define DT_N_S_connector_P_gpio_map_FOREACH_MAP_ENTRY_SEP(fn, sep) fn(DT_N_S_connector, gpio_map, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 11) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 12) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 13) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 14) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 15) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 16) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 17) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 18) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 19) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 20) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 21) +#define DT_N_S_connector_P_gpio_map_FOREACH_MAP_ENTRY_VARGS(fn, ...) fn(DT_N_S_connector, gpio_map, 0, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 1, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 2, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 3, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 4, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 5, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 6, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 7, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 8, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 9, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 10, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 11, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 12, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 13, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 14, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 15, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 16, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 17, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 18, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 19, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 20, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map, 21, __VA_ARGS__) +#define DT_N_S_connector_P_gpio_map_FOREACH_MAP_ENTRY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_connector, gpio_map, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 16, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 17, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 19, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 20, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map, 21, __VA_ARGS__) + +/* Generic property macros: */ +#define DT_N_S_connector_P_gpio_map_mask {4294967295 /* 0xffffffff */, 4294967232 /* 0xffffffc0 */} +#define DT_N_S_connector_P_gpio_map_mask_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_mask_IDX_0 4294967295 +#define DT_N_S_connector_P_gpio_map_mask_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_mask_IDX_1 4294967232 +#define DT_N_S_connector_P_gpio_map_mask_FOREACH_PROP_ELEM(fn) fn(DT_N_S_connector, gpio_map_mask, 0) \ + fn(DT_N_S_connector, gpio_map_mask, 1) +#define DT_N_S_connector_P_gpio_map_mask_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_connector, gpio_map_mask, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map_mask, 1) +#define DT_N_S_connector_P_gpio_map_mask_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_connector, gpio_map_mask, 0, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map_mask, 1, __VA_ARGS__) +#define DT_N_S_connector_P_gpio_map_mask_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_connector, gpio_map_mask, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map_mask, 1, __VA_ARGS__) +#define DT_N_S_connector_P_gpio_map_mask_LEN 2 +#define DT_N_S_connector_P_gpio_map_mask_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_pass_thru {0 /* 0x0 */, 63 /* 0x3f */} +#define DT_N_S_connector_P_gpio_map_pass_thru_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_pass_thru_IDX_0 0 +#define DT_N_S_connector_P_gpio_map_pass_thru_IDX_1_EXISTS 1 +#define DT_N_S_connector_P_gpio_map_pass_thru_IDX_1 63 +#define DT_N_S_connector_P_gpio_map_pass_thru_FOREACH_PROP_ELEM(fn) fn(DT_N_S_connector, gpio_map_pass_thru, 0) \ + fn(DT_N_S_connector, gpio_map_pass_thru, 1) +#define DT_N_S_connector_P_gpio_map_pass_thru_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_connector, gpio_map_pass_thru, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map_pass_thru, 1) +#define DT_N_S_connector_P_gpio_map_pass_thru_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_connector, gpio_map_pass_thru, 0, __VA_ARGS__) \ + fn(DT_N_S_connector, gpio_map_pass_thru, 1, __VA_ARGS__) +#define DT_N_S_connector_P_gpio_map_pass_thru_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_connector, gpio_map_pass_thru, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_connector, gpio_map_pass_thru, 1, __VA_ARGS__) +#define DT_N_S_connector_P_gpio_map_pass_thru_LEN 2 +#define DT_N_S_connector_P_gpio_map_pass_thru_EXISTS 1 +#define DT_N_S_connector_P_compatible {"arduino-header-r3"} +#define DT_N_S_connector_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_compatible_IDX_0 "arduino-header-r3" +#define DT_N_S_connector_P_compatible_IDX_0_STRING_UNQUOTED arduino-header-r3 +#define DT_N_S_connector_P_compatible_IDX_0_STRING_TOKEN arduino_header_r3 +#define DT_N_S_connector_P_compatible_IDX_0_STRING_UPPER_TOKEN ARDUINO_HEADER_R3 +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_connector, compatible, 0) +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_connector, compatible, 0) +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_connector, compatible, 0, __VA_ARGS__) +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_connector, compatible, 0, __VA_ARGS__) +#define DT_N_S_connector_P_compatible_LEN 1 +#define DT_N_S_connector_P_compatible_EXISTS 1 +#define DT_N_S_connector_P_dma_coherent 0 +#define DT_N_S_connector_P_dma_coherent_EXISTS 1 +#define DT_N_S_connector_P_zephyr_deferred_init 0 +#define DT_N_S_connector_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_connector_P_wakeup_source 0 +#define DT_N_S_connector_P_wakeup_source_EXISTS 1 +#define DT_N_S_connector_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_connector_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc + * + * Node identifier: DT_N_S_soc + */ + +/* Node's full path: */ +#define DT_N_S_soc_PATH "/soc" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_FULL_NAME "soc" +#define DT_N_S_soc_FULL_NAME_UNQUOTED soc +#define DT_N_S_soc_FULL_NAME_TOKEN soc +#define DT_N_S_soc_FULL_NAME_UPPER_TOKEN SOC + +/* Node parent (/) identifier: */ +#define DT_N_S_soc_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_NODELABEL_NUM 0 +#define DT_N_S_soc_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_CHILD_NUM 50 +#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 18 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_3758153984 DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_3758153744 DT_N_S_soc_S_timer_e000e010 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1342177280 DT_N_S_soc_S_adc_50000000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1342177536 DT_N_S_soc_S_adc_50000100 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1342179328 DT_N_S_soc_S_dac_50000800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1342181376 DT_N_S_soc_S_dac_50001000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073881088 DT_N_S_soc_S_flash_controller_40022000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073876992 DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073808384 DT_N_S_soc_S_interrupt_controller_40010400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1207959552 DT_N_S_soc_S_pin_controller_48000000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073821696 DT_N_S_soc_S_serial_40013800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073759232 DT_N_S_soc_S_serial_40004400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073760256 DT_N_S_soc_S_serial_40004800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073761280 DT_N_S_soc_S_serial_40004c00 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073774592 DT_N_S_soc_S_serial_40008000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073754112 DT_N_S_soc_S_watchdog_40003000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073753088 DT_N_S_soc_S_watchdog_40002c00 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073763328 DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073764352 DT_N_S_soc_S_i2c_40005800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073772544 DT_N_S_soc_S_i2c_40007800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073819648 DT_N_S_soc_S_spi_40013000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073756160 DT_N_S_soc_S_spi_40003800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073757184 DT_N_S_soc_S_spi_40003c00 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073767424 DT_N_S_soc_S_can_40006400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073773568 DT_N_S_soc_S_timers_40007c00 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073818624 DT_N_S_soc_S_timers_40012c00 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073741824 DT_N_S_soc_S_timers_40000000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073742848 DT_N_S_soc_S_timers_40000400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073743872 DT_N_S_soc_S_timers_40000800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073745920 DT_N_S_soc_S_timers_40001000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073746944 DT_N_S_soc_S_timers_40001400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073820672 DT_N_S_soc_S_timers_40013400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073823744 DT_N_S_soc_S_timers_40014000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073824768 DT_N_S_soc_S_timers_40014400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073825792 DT_N_S_soc_S_timers_40014800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073752064 DT_N_S_soc_S_rtc_40002800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1342572544 DT_N_S_soc_S_rng_50060800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073765376 DT_N_S_soc_S_usb_40005c00 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073872896 DT_N_S_soc_S_dma_40020000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073873920 DT_N_S_soc_S_dma_40020400 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073874944 DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073782784 DT_N_S_soc_S_ucpd_4000a000 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073828868 DT_N_S_soc_S_sai1_40015404 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073828900 DT_N_S_soc_S_sai1_40015424 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073808128 DT_N_S_soc_S_opamp1_40010300 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073808132 DT_N_S_soc_S_opamp2_40010304 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073808136 DT_N_S_soc_S_opamp3_40010308 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073807872 DT_N_S_soc_S_comparator_40010200 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073807876 DT_N_S_soc_S_comparator_40010204 +#define DT_N_S_soc_CHILD_UNIT_ADDR_INT_1073885184 DT_N_S_soc_S_crc_40023000 +#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_adc_50000000) fn(DT_N_S_soc_S_adc_50000100) fn(DT_N_S_soc_S_dac_50000800) fn(DT_N_S_soc_S_dac_50001000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc_S_rcc_40021000) fn(DT_N_S_soc_S_interrupt_controller_40010400) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc_S_serial_40013800) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40008000) fn(DT_N_S_soc_S_watchdog_40003000) fn(DT_N_S_soc_S_watchdog_40002c00) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40007800) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_can_40006400) fn(DT_N_S_soc_S_timers_40007c00) fn(DT_N_S_soc_S_timers_40012c00) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40013400) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_rtc_40002800) fn(DT_N_S_soc_S_rng_50060800) fn(DT_N_S_soc_S_usb_40005c00) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_ucpd_4000a000) fn(DT_N_S_soc_S_sai1_40015404) fn(DT_N_S_soc_S_sai1_40015424) fn(DT_N_S_soc_S_opamp1_40010300) fn(DT_N_S_soc_S_opamp2_40010304) fn(DT_N_S_soc_S_opamp3_40010308) fn(DT_N_S_soc_S_comparator_40010200) fn(DT_N_S_soc_S_comparator_40010204) fn(DT_N_S_soc_S_crc_40023000) +#define DT_N_S_soc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_50000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_50000100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_50000800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_50001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_40021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_40010400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40013800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40008000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40002c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40007800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_40006400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40007c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40012c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40013400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40002800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_50060800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40005c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_40020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ucpd_4000a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sai1_40015404) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sai1_40015424) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_opamp1_40010300) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_opamp2_40010304) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_opamp3_40010308) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_comparator_40010200) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_comparator_40010204) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crc_40023000) +#define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_adc_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_50000100, __VA_ARGS__) fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) fn(DT_N_S_soc_S_dac_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40002c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_40006400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_ucpd_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_sai1_40015404, __VA_ARGS__) fn(DT_N_S_soc_S_sai1_40015424, __VA_ARGS__) fn(DT_N_S_soc_S_opamp1_40010300, __VA_ARGS__) fn(DT_N_S_soc_S_opamp2_40010304, __VA_ARGS__) fn(DT_N_S_soc_S_opamp3_40010308, __VA_ARGS__) fn(DT_N_S_soc_S_comparator_40010200, __VA_ARGS__) fn(DT_N_S_soc_S_comparator_40010204, __VA_ARGS__) fn(DT_N_S_soc_S_crc_40023000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_50000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_50000100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_50001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40002c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40007800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_40006400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40012c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40013400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40005c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ucpd_4000a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sai1_40015404, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sai1_40015424, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_opamp1_40010300, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_opamp2_40010304, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_opamp3_40010308, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_comparator_40010200, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_comparator_40010204, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crc_40023000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_dac_50000800) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc_S_rcc_40021000) fn(DT_N_S_soc_S_interrupt_controller_40010400) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc_S_serial_40013800) fn(DT_N_S_soc_S_serial_40008000) fn(DT_N_S_soc_S_watchdog_40003000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_timers_40007c00) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_rtc_40002800) fn(DT_N_S_soc_S_rng_50060800) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_50000800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_40021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_40010400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40013800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40008000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40007c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40002800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_50060800) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_HASH DcVqqq9YzG86l3_Hk7pNncUh2rnHG8USjbVY6wBdFts + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_ORD 4 +#define DT_N_S_soc_ORD_STR_SORTABLE 00004 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_SUPPORTS_ORDS \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 10, /* /soc/adc@50000000 */ \ + 11, /* /soc/flash-controller@40022000 */ \ + 18, /* /soc/pin-controller@48000000 */ \ + 21, /* /soc/i2c@40005400 */ \ + 23, /* /soc/i2c@40005800 */ \ + 25, /* /soc/i2c@40007800 */ \ + 47, /* /soc/timers@40000000 */ \ + 52, /* /soc/adc@50000100 */ \ + 53, /* /soc/can@40006400 */ \ + 54, /* /soc/comparator@40010200 */ \ + 55, /* /soc/comparator@40010204 */ \ + 56, /* /soc/crc@40023000 */ \ + 58, /* /soc/dac@50000800 */ \ + 59, /* /soc/dac@50001000 */ \ + 60, /* /soc/dma@40020400 */ \ + 61, /* /soc/dmamux@40020800 */ \ + 62, /* /soc/interrupt-controller@40010400 */ \ + 63, /* /soc/opamp1@40010300 */ \ + 64, /* /soc/opamp2@40010304 */ \ + 65, /* /soc/opamp3@40010308 */ \ + 66, /* /soc/rng@50060800 */ \ + 67, /* /soc/rtc@40002800 */ \ + 68, /* /soc/dma@40020000 */ \ + 69, /* /soc/sai1@40015404 */ \ + 70, /* /soc/sai1@40015424 */ \ + 71, /* /soc/serial@40004400 */ \ + 72, /* /soc/serial@40004800 */ \ + 73, /* /soc/serial@40004c00 */ \ + 76, /* /soc/serial@40008000 */ \ + 79, /* /soc/serial@40013800 */ \ + 84, /* /soc/spi@40003800 */ \ + 89, /* /soc/spi@40003c00 */ \ + 94, /* /soc/spi@40013000 */ \ + 95, /* /soc/timer@e000e010 */ \ + 96, /* /soc/timers@40007c00 */ \ + 97, /* /soc/ucpd@4000a000 */ \ + 99, /* /soc/usb@40005c00 */ \ + 100, /* /soc/watchdog@40002c00 */ \ + 101, /* /soc/watchdog@40003000 */ \ + 115, /* /soc/timers@40000400 */ \ + 119, /* /soc/timers@40000800 */ \ + 123, /* /soc/timers@40001000 */ \ + 125, /* /soc/timers@40001400 */ \ + 127, /* /soc/timers@40012c00 */ \ + 131, /* /soc/timers@40013400 */ \ + 135, /* /soc/timers@40014000 */ \ + 138, /* /soc/timers@40014400 */ \ + 141, /* /soc/timers@40014800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_EXISTS 1 +#define DT_N_INST_0_st_stm32g431 DT_N_S_soc +#define DT_N_INST_0_st_stm32g4 DT_N_S_soc +#define DT_N_INST_0_simple_bus DT_N_S_soc + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_REG_NUM 0 +#define DT_N_S_soc_FOREACH_REG(fn) +#define DT_N_S_soc_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_RANGES_NUM 0 +#define DT_N_S_soc_FOREACH_RANGE(fn) +#define DT_N_S_soc_IRQ_NUM 0 +#define DT_N_S_soc_IRQ_LEVEL 0 +#define DT_N_S_soc_COMPAT_MATCHES_st_stm32g431 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_COMPAT_MODEL_IDX_0 "stm32g431" +#define DT_N_S_soc_COMPAT_MATCHES_st_stm32g4 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_COMPAT_MODEL_IDX_1 "stm32g4" +#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1 +#define DT_N_S_soc_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_P_ranges_EXISTS 1 +#define DT_N_S_soc_P_compatible {"st,stm32g431", "st,stm32g4", "simple-bus"} +#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_P_compatible_IDX_0 "st,stm32g431" +#define DT_N_S_soc_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g431 +#define DT_N_S_soc_P_compatible_IDX_0_STRING_TOKEN st_stm32g431 +#define DT_N_S_soc_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G431 +#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_P_compatible_IDX_1 "st,stm32g4" +#define DT_N_S_soc_P_compatible_IDX_1_STRING_UNQUOTED st,stm32g4 +#define DT_N_S_soc_P_compatible_IDX_1_STRING_TOKEN st_stm32g4 +#define DT_N_S_soc_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32G4 +#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_P_compatible_IDX_2 "simple-bus" +#define DT_N_S_soc_P_compatible_IDX_2_STRING_UNQUOTED simple-bus +#define DT_N_S_soc_P_compatible_IDX_2_STRING_TOKEN simple_bus +#define DT_N_S_soc_P_compatible_IDX_2_STRING_UPPER_TOKEN SIMPLE_BUS +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \ + fn(DT_N_S_soc, compatible, 1) \ + fn(DT_N_S_soc, compatible, 2) +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 2) +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_P_compatible_LEN 3 +#define DT_N_S_soc_P_compatible_EXISTS 1 + +/* + * Devicetree node: /soc/interrupt-controller@e000e100 + * + * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100 + * + * Binding (compatible = arm,v7m-nvic): + * $ZEPHYR_BASE/dts/bindings/interrupt-controller/arm,v7m-nvic.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100" +#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME_UNQUOTED interrupt-controller@e000e100 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME_TOKEN interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME_UPPER_TOKEN INTERRUPT_CONTROLLER_E000E100 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_NODELABEL_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_NODELABEL(fn) fn(nvic) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_NODELABEL_VARGS(fn, ...) fn(nvic, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_HASH MNKByYDCdVxyLwiy4A_bv2jZfVhfDT01mZ2_1uEhUYQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 5 +#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD_STR_SORTABLE 00005 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \ + 4, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \ + 10, /* /soc/adc@50000000 */ \ + 11, /* /soc/flash-controller@40022000 */ \ + 21, /* /soc/i2c@40005400 */ \ + 23, /* /soc/i2c@40005800 */ \ + 25, /* /soc/i2c@40007800 */ \ + 47, /* /soc/timers@40000000 */ \ + 52, /* /soc/adc@50000100 */ \ + 53, /* /soc/can@40006400 */ \ + 54, /* /soc/comparator@40010200 */ \ + 55, /* /soc/comparator@40010204 */ \ + 60, /* /soc/dma@40020400 */ \ + 61, /* /soc/dmamux@40020800 */ \ + 62, /* /soc/interrupt-controller@40010400 */ \ + 66, /* /soc/rng@50060800 */ \ + 67, /* /soc/rtc@40002800 */ \ + 68, /* /soc/dma@40020000 */ \ + 71, /* /soc/serial@40004400 */ \ + 72, /* /soc/serial@40004800 */ \ + 73, /* /soc/serial@40004c00 */ \ + 76, /* /soc/serial@40008000 */ \ + 79, /* /soc/serial@40013800 */ \ + 84, /* /soc/spi@40003800 */ \ + 89, /* /soc/spi@40003c00 */ \ + 94, /* /soc/spi@40013000 */ \ + 96, /* /soc/timers@40007c00 */ \ + 97, /* /soc/ucpd@4000a000 */ \ + 99, /* /soc/usb@40005c00 */ \ + 100, /* /soc/watchdog@40002c00 */ \ + 115, /* /soc/timers@40000400 */ \ + 119, /* /soc/timers@40000800 */ \ + 123, /* /soc/timers@40001000 */ \ + 125, /* /soc/timers@40001400 */ \ + 127, /* /soc/timers@40012c00 */ \ + 131, /* /soc/timers@40013400 */ \ + 135, /* /soc/timers@40014000 */ \ + 138, /* /soc/timers@40014400 */ \ + 141, /* /soc/timers@40014800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1 +#define DT_N_INST_0_arm_v7m_nvic DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_NODELABEL_nvic DT_N_S_soc_S_interrupt_controller_e000e100 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_REG(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, 0) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100, 0) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_RANGES_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_LEVEL 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v7m_nvic 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0 "v7m-nvic" +#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */} +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 4 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v7m-nvic"} +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v7m-nvic" +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UNQUOTED arm,v7m-nvic +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_TOKEN arm_v7m_nvic +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_V7M_NVIC +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_dma_coherent 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks + * + * Node identifier: DT_N_S_clocks + */ + +/* Node's full path: */ +#define DT_N_S_clocks_PATH "/clocks" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_FULL_NAME "clocks" +#define DT_N_S_clocks_FULL_NAME_UNQUOTED clocks +#define DT_N_S_clocks_FULL_NAME_TOKEN clocks +#define DT_N_S_clocks_FULL_NAME_UPPER_TOKEN CLOCKS + +/* Node parent (/) identifier: */ +#define DT_N_S_clocks_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_NODELABEL_NUM 0 +#define DT_N_S_clocks_FOREACH_NODELABEL(fn) +#define DT_N_S_clocks_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_clocks_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_CHILD_NUM 6 +#define DT_N_S_clocks_CHILD_NUM_STATUS_OKAY 5 +#define DT_N_S_clocks_FOREACH_CHILD(fn) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll) +#define DT_N_S_clocks_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hse) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_hsi) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_hsi48) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lse) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lsi) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_pll) +#define DT_N_S_clocks_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll, __VA_ARGS__) +#define DT_N_S_clocks_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_pll, __VA_ARGS__) +#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll) +#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hse) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_hsi48) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lse) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lsi) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_pll) +#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll, __VA_ARGS__) +#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks_S_pll, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_clocks_HASH 3P3fmk_q5wPvaymGA6NeomHHBb_cCfQX2PaKw_k1t_w + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_ORD 6 +#define DT_N_S_clocks_ORD_STR_SORTABLE 00006 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_SUPPORTS_ORDS \ + 7, /* /clocks/clk-hse */ \ + 8, /* /clocks/pll */ \ + 31, /* /clocks/clk-hsi */ \ + 32, /* /clocks/clk-hsi48 */ \ + 33, /* /clocks/clk-lse */ \ + 34, /* /clocks/clk-lsi */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_REG_NUM 0 +#define DT_N_S_clocks_FOREACH_REG(fn) +#define DT_N_S_clocks_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_RANGES_NUM 0 +#define DT_N_S_clocks_FOREACH_RANGE(fn) +#define DT_N_S_clocks_IRQ_NUM 0 +#define DT_N_S_clocks_IRQ_LEVEL 0 +#define DT_N_S_clocks_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /clocks/clk-hse + * + * Node identifier: DT_N_S_clocks_S_clk_hse + * + * Binding (compatible = st,stm32-hse-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-hse-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_hse_PATH "/clocks/clk-hse" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_hse_FULL_NAME "clk-hse" +#define DT_N_S_clocks_S_clk_hse_FULL_NAME_UNQUOTED clk-hse +#define DT_N_S_clocks_S_clk_hse_FULL_NAME_TOKEN clk_hse +#define DT_N_S_clocks_S_clk_hse_FULL_NAME_UPPER_TOKEN CLK_HSE + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_hse_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_hse_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_hse_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_hse_FOREACH_NODELABEL(fn) fn(clk_hse) +#define DT_N_S_clocks_S_clk_hse_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hse, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hse_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_hse_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_hse_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hse_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_hse_HASH CHg50lhzojbh1fYYqBOhbjZFQvgn2_C8kiV4EgV0j3Y + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_hse_ORD 7 +#define DT_N_S_clocks_S_clk_hse_ORD_STR_SORTABLE 00007 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_hse_REQUIRES_ORDS \ + 6, /* /clocks */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_hse_SUPPORTS_ORDS \ + 8, /* /clocks/pll */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_hse_EXISTS 1 +#define DT_N_INST_0_st_stm32_hse_clock DT_N_S_clocks_S_clk_hse +#define DT_N_NODELABEL_clk_hse DT_N_S_clocks_S_clk_hse + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_hse_REG_NUM 0 +#define DT_N_S_clocks_S_clk_hse_FOREACH_REG(fn) +#define DT_N_S_clocks_S_clk_hse_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hse_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hse_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hse_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_hse_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_hse_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_hse_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_hse_COMPAT_MATCHES_st_stm32_hse_clock 1 +#define DT_N_S_clocks_S_clk_hse_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_clk_hse_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_COMPAT_MODEL_IDX_0 "stm32-hse-clock" +#define DT_N_S_clocks_S_clk_hse_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_hse_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_hse_P_hse_bypass 0 +#define DT_N_S_clocks_S_clk_hse_P_hse_bypass_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_css_enabled 0 +#define DT_N_S_clocks_S_clk_hse_P_css_enabled_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_clock_frequency 24000000 +#define DT_N_S_clocks_S_clk_hse_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_status "okay" +#define DT_N_S_clocks_S_clk_hse_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_hse_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_hse_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_hse_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_hse_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_hse_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hse, status, 0) +#define DT_N_S_clocks_S_clk_hse_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hse, status, 0) +#define DT_N_S_clocks_S_clk_hse_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hse, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hse_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hse, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hse_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_hse_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_compatible {"st,stm32-hse-clock"} +#define DT_N_S_clocks_S_clk_hse_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_compatible_IDX_0 "st,stm32-hse-clock" +#define DT_N_S_clocks_S_clk_hse_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-hse-clock +#define DT_N_S_clocks_S_clk_hse_P_compatible_IDX_0_STRING_TOKEN st_stm32_hse_clock +#define DT_N_S_clocks_S_clk_hse_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_HSE_CLOCK +#define DT_N_S_clocks_S_clk_hse_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hse, compatible, 0) +#define DT_N_S_clocks_S_clk_hse_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hse, compatible, 0) +#define DT_N_S_clocks_S_clk_hse_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hse, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hse_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hse, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hse_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_hse_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_dma_coherent 0 +#define DT_N_S_clocks_S_clk_hse_P_dma_coherent_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_hse_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_hse_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_hse_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_hse_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/pll + * + * Node identifier: DT_N_S_clocks_S_pll + * + * Binding (compatible = st,stm32g4-pll-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32g4-pll-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_pll_PATH "/clocks/pll" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_pll_FULL_NAME "pll" +#define DT_N_S_clocks_S_pll_FULL_NAME_UNQUOTED pll +#define DT_N_S_clocks_S_pll_FULL_NAME_TOKEN pll +#define DT_N_S_clocks_S_pll_FULL_NAME_UPPER_TOKEN PLL + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_pll_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_pll_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_pll_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_pll_FOREACH_NODELABEL(fn) fn(pll) +#define DT_N_S_clocks_S_pll_FOREACH_NODELABEL_VARGS(fn, ...) fn(pll, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_pll_CHILD_NUM 0 +#define DT_N_S_clocks_S_pll_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_pll_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_pll_HASH MENiPNxcjOF6dwaYSdS9Iq0tqHDbWKghVscDDRncn0o + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_pll_ORD 8 +#define DT_N_S_clocks_S_pll_ORD_STR_SORTABLE 00008 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_pll_REQUIRES_ORDS \ + 6, /* /clocks */ \ + 7, /* /clocks/clk-hse */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_pll_SUPPORTS_ORDS \ + 9, /* /soc/rcc@40021000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_pll_EXISTS 1 +#define DT_N_INST_0_st_stm32g4_pll_clock DT_N_S_clocks_S_pll +#define DT_N_NODELABEL_pll DT_N_S_clocks_S_pll + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_pll_REG_NUM 0 +#define DT_N_S_clocks_S_pll_FOREACH_REG(fn) +#define DT_N_S_clocks_S_pll_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_pll_RANGES_NUM 0 +#define DT_N_S_clocks_S_pll_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_pll_IRQ_NUM 0 +#define DT_N_S_clocks_S_pll_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_pll_COMPAT_MATCHES_st_stm32g4_pll_clock 1 +#define DT_N_S_clocks_S_pll_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_pll_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_COMPAT_MODEL_IDX_0 "stm32g4-pll-clock" +#define DT_N_S_clocks_S_pll_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_pll_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_pll_P_div_m 6 +#define DT_N_S_clocks_S_pll_P_div_m_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_mul_n 85 +#define DT_N_S_clocks_S_pll_P_mul_n_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_p 7 +#define DT_N_S_clocks_S_pll_P_div_p_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_clocks_IDX_0_PH DT_N_S_clocks_S_clk_hse +#define DT_N_S_clocks_S_pll_P_clocks_IDX_0_FOREACH_CELL(fn) +#define DT_N_S_clocks_S_pll_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_P_clocks_IDX_0_NUM_CELLS 0 +#define DT_N_S_clocks_S_pll_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll, clocks, 0) +#define DT_N_S_clocks_S_pll_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll, clocks, 0) +#define DT_N_S_clocks_S_pll_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll, clocks, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll, clocks, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_P_clocks_LEN 1 +#define DT_N_S_clocks_S_pll_P_clocks_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_q 2 +#define DT_N_S_clocks_S_pll_P_div_q_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_pll_P_div_q_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_q_IDX_0_ENUM_VAL_2_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_q_ENUM_VAL_2_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_q_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_r 2 +#define DT_N_S_clocks_S_pll_P_div_r_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_pll_P_div_r_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_r_IDX_0_ENUM_VAL_2_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_r_ENUM_VAL_2_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_div_r_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_status "okay" +#define DT_N_S_clocks_S_pll_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_pll_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_pll_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_pll_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_pll_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_pll_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll, status, 0) +#define DT_N_S_clocks_S_pll_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll, status, 0) +#define DT_N_S_clocks_S_pll_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_P_status_LEN 1 +#define DT_N_S_clocks_S_pll_P_status_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_compatible {"st,stm32g4-pll-clock"} +#define DT_N_S_clocks_S_pll_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_compatible_IDX_0 "st,stm32g4-pll-clock" +#define DT_N_S_clocks_S_pll_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g4-pll-clock +#define DT_N_S_clocks_S_pll_P_compatible_IDX_0_STRING_TOKEN st_stm32g4_pll_clock +#define DT_N_S_clocks_S_pll_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G4_PLL_CLOCK +#define DT_N_S_clocks_S_pll_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll, compatible, 0) +#define DT_N_S_clocks_S_pll_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll, compatible, 0) +#define DT_N_S_clocks_S_pll_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_P_compatible_LEN 1 +#define DT_N_S_clocks_S_pll_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_dma_coherent 0 +#define DT_N_S_clocks_S_pll_P_dma_coherent_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_pll_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_wakeup_source 0 +#define DT_N_S_clocks_S_pll_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_pll_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_pll_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/rcc@40021000 + * + * Node identifier: DT_N_S_soc_S_rcc_40021000 + * + * Binding (compatible = st,stm32-rcc): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-rcc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_rcc_40021000_PATH "/soc/rcc@40021000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_rcc_40021000_FULL_NAME "rcc@40021000" +#define DT_N_S_soc_S_rcc_40021000_FULL_NAME_UNQUOTED rcc@40021000 +#define DT_N_S_soc_S_rcc_40021000_FULL_NAME_TOKEN rcc_40021000 +#define DT_N_S_soc_S_rcc_40021000_FULL_NAME_UPPER_TOKEN RCC_40021000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_rcc_40021000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_rcc_40021000_CHILD_IDX 7 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_rcc_40021000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_rcc_40021000_FOREACH_NODELABEL(fn) fn(rcc) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rcc, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_rcc_40021000_CHILD_NUM 1 +#define DT_N_S_soc_S_rcc_40021000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_rcc_40021000_HASH 9dpgZGnFDhzfr3szN5sIDHeylLss1yadXzhaTcERMgU + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_rcc_40021000_ORD 9 +#define DT_N_S_soc_S_rcc_40021000_ORD_STR_SORTABLE 00009 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_rcc_40021000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 8, /* /clocks/pll */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_rcc_40021000_SUPPORTS_ORDS \ + 10, /* /soc/adc@50000000 */ \ + 11, /* /soc/flash-controller@40022000 */ \ + 21, /* /soc/i2c@40005400 */ \ + 23, /* /soc/i2c@40005800 */ \ + 25, /* /soc/i2c@40007800 */ \ + 40, /* /soc/pin-controller@48000000/gpio@48000800 */ \ + 43, /* /soc/pin-controller@48000000/gpio@48000000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ \ + 47, /* /soc/timers@40000000 */ \ + 52, /* /soc/adc@50000100 */ \ + 53, /* /soc/can@40006400 */ \ + 54, /* /soc/comparator@40010200 */ \ + 55, /* /soc/comparator@40010204 */ \ + 56, /* /soc/crc@40023000 */ \ + 58, /* /soc/dac@50000800 */ \ + 59, /* /soc/dac@50001000 */ \ + 60, /* /soc/dma@40020400 */ \ + 61, /* /soc/dmamux@40020800 */ \ + 62, /* /soc/interrupt-controller@40010400 */ \ + 63, /* /soc/opamp1@40010300 */ \ + 64, /* /soc/opamp2@40010304 */ \ + 65, /* /soc/opamp3@40010308 */ \ + 66, /* /soc/rng@50060800 */ \ + 67, /* /soc/rtc@40002800 */ \ + 68, /* /soc/dma@40020000 */ \ + 69, /* /soc/sai1@40015404 */ \ + 70, /* /soc/sai1@40015424 */ \ + 71, /* /soc/serial@40004400 */ \ + 72, /* /soc/serial@40004800 */ \ + 73, /* /soc/serial@40004c00 */ \ + 76, /* /soc/serial@40008000 */ \ + 79, /* /soc/serial@40013800 */ \ + 84, /* /soc/spi@40003800 */ \ + 89, /* /soc/spi@40003c00 */ \ + 90, /* /soc/pin-controller@48000000/gpio@48000400 */ \ + 94, /* /soc/spi@40013000 */ \ + 96, /* /soc/timers@40007c00 */ \ + 97, /* /soc/ucpd@4000a000 */ \ + 99, /* /soc/usb@40005c00 */ \ + 100, /* /soc/watchdog@40002c00 */ \ + 109, /* /soc/pin-controller@48000000/gpio@48000c00 */ \ + 110, /* /soc/pin-controller@48000000/gpio@48001000 */ \ + 111, /* /soc/pin-controller@48000000/gpio@48001400 */ \ + 112, /* /soc/pin-controller@48000000/gpio@48001800 */ \ + 115, /* /soc/timers@40000400 */ \ + 119, /* /soc/timers@40000800 */ \ + 123, /* /soc/timers@40001000 */ \ + 125, /* /soc/timers@40001400 */ \ + 127, /* /soc/timers@40012c00 */ \ + 131, /* /soc/timers@40013400 */ \ + 135, /* /soc/timers@40014000 */ \ + 138, /* /soc/timers@40014400 */ \ + 141, /* /soc/timers@40014800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_rcc_40021000_EXISTS 1 +#define DT_N_INST_0_st_stm32_rcc DT_N_S_soc_S_rcc_40021000 +#define DT_N_NODELABEL_rcc DT_N_S_soc_S_rcc_40021000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_rcc_40021000_REG_NUM 1 +#define DT_N_S_soc_S_rcc_40021000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_REG_IDX_0_VAL_ADDRESS 1073876992 /* 0x40021000 */ +#define DT_N_S_soc_S_rcc_40021000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_rcc_40021000_FOREACH_REG(fn) fn(DT_N_S_soc_S_rcc_40021000, 0) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_40021000, 0) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_40021000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_40021000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_RANGES_NUM 0 +#define DT_N_S_soc_S_rcc_40021000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_rcc_40021000_IRQ_NUM 0 +#define DT_N_S_soc_S_rcc_40021000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_rcc_40021000_COMPAT_MATCHES_st_stm32_rcc 1 +#define DT_N_S_soc_S_rcc_40021000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_rcc_40021000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_COMPAT_MODEL_IDX_0 "stm32-rcc" +#define DT_N_S_soc_S_rcc_40021000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_rcc_40021000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_rcc_40021000_P_reg {1073876992 /* 0x40021000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_rcc_40021000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_reg_IDX_0 1073876992 +#define DT_N_S_soc_S_rcc_40021000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_rcc_40021000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_clock_frequency 170000000 +#define DT_N_S_soc_S_rcc_40021000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_ahb_prescaler 1 +#define DT_N_S_soc_S_rcc_40021000_P_ahb_prescaler_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_rcc_40021000_P_ahb_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_ahb_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_ahb_prescaler_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_ahb_prescaler_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb1_prescaler 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb1_prescaler_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_rcc_40021000_P_apb1_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb1_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb1_prescaler_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb1_prescaler_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb2_prescaler 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb2_prescaler_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_rcc_40021000_P_apb2_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb2_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb2_prescaler_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_apb2_prescaler_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_undershoot_prevention 1 +#define DT_N_S_soc_S_rcc_40021000_P_undershoot_prevention_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_compatible {"st,stm32-rcc"} +#define DT_N_S_soc_S_rcc_40021000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_compatible_IDX_0 "st,stm32-rcc" +#define DT_N_S_soc_S_rcc_40021000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rcc +#define DT_N_S_soc_S_rcc_40021000_P_compatible_IDX_0_STRING_TOKEN st_stm32_rcc +#define DT_N_S_soc_S_rcc_40021000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RCC +#define DT_N_S_soc_S_rcc_40021000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rcc_40021000, compatible, 0) +#define DT_N_S_soc_S_rcc_40021000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_40021000, compatible, 0) +#define DT_N_S_soc_S_rcc_40021000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_40021000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_40021000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_P_compatible_LEN 1 +#define DT_N_S_soc_S_rcc_40021000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_clocks_IDX_0_PH DT_N_S_clocks_S_pll +#define DT_N_S_soc_S_rcc_40021000_P_clocks_IDX_0_FOREACH_CELL(fn) +#define DT_N_S_soc_S_rcc_40021000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_soc_S_rcc_40021000_P_clocks_IDX_0_NUM_CELLS 0 +#define DT_N_S_soc_S_rcc_40021000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rcc_40021000, clocks, 0) +#define DT_N_S_soc_S_rcc_40021000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_40021000, clocks, 0) +#define DT_N_S_soc_S_rcc_40021000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_40021000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_40021000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_P_clocks_LEN 1 +#define DT_N_S_soc_S_rcc_40021000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_dma_coherent 0 +#define DT_N_S_soc_S_rcc_40021000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_rcc_40021000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_wakeup_source 0 +#define DT_N_S_soc_S_rcc_40021000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_rcc_40021000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/adc@50000000 + * + * Node identifier: DT_N_S_soc_S_adc_50000000 + * + * Binding (compatible = st,stm32-adc): + * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_adc_50000000_PATH "/soc/adc@50000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_adc_50000000_FULL_NAME "adc@50000000" +#define DT_N_S_soc_S_adc_50000000_FULL_NAME_UNQUOTED adc@50000000 +#define DT_N_S_soc_S_adc_50000000_FULL_NAME_TOKEN adc_50000000 +#define DT_N_S_soc_S_adc_50000000_FULL_NAME_UPPER_TOKEN ADC_50000000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_adc_50000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_adc_50000000_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_adc_50000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_adc_50000000_FOREACH_NODELABEL(fn) fn(adc1) +#define DT_N_S_soc_S_adc_50000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_adc_50000000_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_50000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_adc_50000000_HASH sG6HR49ljr8TIUKEqdvb5cF7Fn342vIm_9put_XU4Bw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_adc_50000000_ORD 10 +#define DT_N_S_soc_S_adc_50000000_ORD_STR_SORTABLE 00010 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_adc_50000000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_adc_50000000_SUPPORTS_ORDS \ + 16, /* /dietemp */ \ + 28, /* /vbat */ \ + 30, /* /vref */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_50000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_adc DT_N_S_soc_S_adc_50000000 +#define DT_N_NODELABEL_adc1 DT_N_S_soc_S_adc_50000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_50000000_REG_NUM 1 +#define DT_N_S_soc_S_adc_50000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 /* 0x50000000 */ +#define DT_N_S_soc_S_adc_50000000_REG_IDX_0_VAL_SIZE 256 /* 0x100 */ +#define DT_N_S_soc_S_adc_50000000_FOREACH_REG(fn) fn(DT_N_S_soc_S_adc_50000000, 0) +#define DT_N_S_soc_S_adc_50000000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, 0) +#define DT_N_S_soc_S_adc_50000000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_50000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_50000000_IRQ_NUM 1 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_VAL_irq 18 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_adc_50000000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_adc_50000000_COMPAT_MATCHES_st_stm32_adc 1 +#define DT_N_S_soc_S_adc_50000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_adc_50000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_COMPAT_MODEL_IDX_0 "stm32-adc" +#define DT_N_S_soc_S_adc_50000000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_50000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_50000000_P_reg {1342177280 /* 0x50000000 */, 256 /* 0x100 */} +#define DT_N_S_soc_S_adc_50000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_reg_IDX_0 1342177280 +#define DT_N_S_soc_S_adc_50000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_reg_IDX_1 256 +#define DT_N_S_soc_S_adc_50000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_VAL_bits 8192 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_adc_50000000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_adc_50000000, clocks, 0, bits) +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, clocks, 0, bits) +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_NAME "adcx" +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_IDX 0 +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_FOREACH_CELL(fn) fn(DT_N_S_soc_S_adc_50000000, clocks, adcx, bus) \ + fn(DT_N_S_soc_S_adc_50000000, clocks, adcx, bits) +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, clocks, adcx, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, clocks, adcx, bits) +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_NUM_CELLS 2 +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_VAL_bus DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_VAL_bus +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_VAL_bits DT_N_S_soc_S_adc_50000000_P_clocks_IDX_0_VAL_bits +#define DT_N_S_soc_S_adc_50000000_P_clocks_NAME_adcx_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, clocks, 0) +#define DT_N_S_soc_S_adc_50000000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, clocks, 0) +#define DT_N_S_soc_S_adc_50000000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_clocks_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clock_names {"adcx"} +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0_ENUM_VAL_adcx_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clock_names_ENUM_VAL_adcx_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0 "adcx" +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0_STRING_UNQUOTED adcx +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0_STRING_TOKEN adcx +#define DT_N_S_soc_S_adc_50000000_P_clock_names_IDX_0_STRING_UPPER_TOKEN ADCX +#define DT_N_S_soc_S_adc_50000000_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, clock_names, 0) +#define DT_N_S_soc_S_adc_50000000_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, clock_names, 0) +#define DT_N_S_soc_S_adc_50000000_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_clock_names_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_clock_names_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_interrupts {18 /* 0x12 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_adc_50000000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_interrupts_IDX_0 18 +#define DT_N_S_soc_S_adc_50000000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_adc_50000000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_vref_mv 3300 +#define DT_N_S_soc_S_adc_50000000_P_vref_mv_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions {12 /* 0xc */, 10 /* 0xa */, 8 /* 0x8 */, 6 /* 0x6 */} +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_0 12 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_1 10 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_2 8 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_IDX_3 6 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 0) \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 1) \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 2) \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 3) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 3) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 3, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, st_adc_resolutions, 3, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_LEN 4 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_resolutions_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times {3 /* 0x3 */, 7 /* 0x7 */, 13 /* 0xd */, 25 /* 0x19 */, 48 /* 0x30 */, 93 /* 0x5d */, 248 /* 0xf8 */, 641 /* 0x281 */} +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_0 3 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_1 7 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_2 13 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_3 25 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_4 48 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_5 93 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_6 248 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_IDX_7 641 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, sampling_times, 0) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 1) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 2) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 3) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 4) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 5) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 6) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 7) +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 7) +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, sampling_times, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000000, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_LEN 8 +#define DT_N_S_soc_S_adc_50000000_P_sampling_times_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer "programmable" +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_STRING_UNQUOTED programmable +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_STRING_TOKEN programmable +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_STRING_UPPER_TOKEN PROGRAMMABLE +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_IDX_0 "programmable" +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_IDX_0_ENUM_VAL_programmable_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_ENUM_VAL_programmable_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_sequencer_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler "minimal" +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_STRING_UNQUOTED minimal +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_STRING_TOKEN minimal +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_STRING_UPPER_TOKEN MINIMAL +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_IDX_0 "minimal" +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_IDX_0_ENUM_VAL_minimal_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_ENUM_VAL_minimal_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_oversampler_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator "startup-sw-delay" +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_STRING_UNQUOTED startup-sw-delay +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_STRING_TOKEN startup_sw_delay +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_STRING_UPPER_TOKEN STARTUP_SW_DELAY +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_IDX_0 "startup-sw-delay" +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_IDX_0_ENUM_VAL_startup_sw_delay_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_ENUM_VAL_startup_sw_delay_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, st_adc_internal_regulator, 0) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, st_adc_internal_regulator, 0) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_internal_regulator, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, st_adc_internal_regulator, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_internal_regulator_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_deep_powerdown 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_deep_powerdown_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_channel_preselection 0 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_channel_preselection_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_differential_support 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_differential_support_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_injected_support 1 +#define DT_N_S_soc_S_adc_50000000_P_st_adc_has_injected_support_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_status "disabled" +#define DT_N_S_soc_S_adc_50000000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_adc_50000000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_adc_50000000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_adc_50000000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_adc_50000000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, status, 0) +#define DT_N_S_soc_S_adc_50000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, status, 0) +#define DT_N_S_soc_S_adc_50000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_status_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_status_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_compatible {"st,stm32-adc"} +#define DT_N_S_soc_S_adc_50000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_compatible_IDX_0 "st,stm32-adc" +#define DT_N_S_soc_S_adc_50000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc +#define DT_N_S_soc_S_adc_50000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc +#define DT_N_S_soc_S_adc_50000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC +#define DT_N_S_soc_S_adc_50000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000000, compatible, 0) +#define DT_N_S_soc_S_adc_50000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000000, compatible, 0) +#define DT_N_S_soc_S_adc_50000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_adc_50000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_dma_coherent 0 +#define DT_N_S_soc_S_adc_50000000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_adc_50000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_wakeup_source 0 +#define DT_N_S_soc_S_adc_50000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_adc_50000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_adc_50000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000 + * + * Binding (compatible = st,stm32-flash-controller): + * $ZEPHYR_BASE/dts/bindings/flash_controller/st,stm32-flash-controller.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_PATH "/soc/flash-controller@40022000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_FULL_NAME "flash-controller@40022000" +#define DT_N_S_soc_S_flash_controller_40022000_FULL_NAME_UNQUOTED flash-controller@40022000 +#define DT_N_S_soc_S_flash_controller_40022000_FULL_NAME_TOKEN flash_controller_40022000 +#define DT_N_S_soc_S_flash_controller_40022000_FULL_NAME_UPPER_TOKEN FLASH_CONTROLLER_40022000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_CHILD_IDX 6 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_NODELABEL(fn) fn(flash) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_NODELABEL_VARGS(fn, ...) fn(flash, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_CHILD_NUM 3 +#define DT_N_S_soc_S_flash_controller_40022000_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_soc_S_flash_controller_40022000_CHILD_UNIT_ADDR_INT_134217728 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_N_S_soc_S_flash_controller_40022000_CHILD_UNIT_ADDR_INT_536834048 DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000 +#define DT_N_S_soc_S_flash_controller_40022000_CHILD_UNIT_ADDR_INT_536835328 DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500 +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_HASH zbmvNSGM4VOJM0v0g9IYHqSKWvouTrb8IP0EW85xJrs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_ORD 11 +#define DT_N_S_soc_S_flash_controller_40022000_ORD_STR_SORTABLE 00011 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_SUPPORTS_ORDS \ + 12, /* /soc/flash-controller@40022000/flash@1fff7500 */ \ + 102, /* /soc/flash-controller@40022000/flash@1fff7000 */ \ + 103, /* /soc/flash-controller@40022000/flash@8000000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_EXISTS 1 +#define DT_N_INST_0_st_stm32_flash_controller DT_N_S_soc_S_flash_controller_40022000 +#define DT_N_INST_0_st_stm32g4_flash_controller DT_N_S_soc_S_flash_controller_40022000 +#define DT_N_NODELABEL_flash DT_N_S_soc_S_flash_controller_40022000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_REG_IDX_0_VAL_ADDRESS 1073881088 /* 0x40022000 */ +#define DT_N_S_soc_S_flash_controller_40022000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_VAL_irq 3 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_flash_controller_40022000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_MATCHES_st_stm32_flash_controller 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_MODEL_IDX_0 "stm32-flash-controller" +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_MATCHES_st_stm32g4_flash_controller 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_COMPAT_MODEL_IDX_1 "stm32g4-flash-controller" +#define DT_N_S_soc_S_flash_controller_40022000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_P_st_rdp1_enable_byte 85 +#define DT_N_S_soc_S_flash_controller_40022000_P_st_rdp1_enable_byte_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_reg {1073881088 /* 0x40022000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_flash_controller_40022000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_reg_IDX_0 1073881088 +#define DT_N_S_soc_S_flash_controller_40022000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_flash_controller_40022000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible {"st,stm32-flash-controller", "st,stm32g4-flash-controller"} +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_0 "st,stm32-flash-controller" +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-flash-controller +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_0_STRING_TOKEN st_stm32_flash_controller +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_FLASH_CONTROLLER +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_1 "st,stm32g4-flash-controller" +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32g4-flash-controller +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_1_STRING_TOKEN st_stm32g4_flash_controller +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32G4_FLASH_CONTROLLER +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 0) \ + fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 1) +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 1) +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_flash_controller_40022000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_LEN 2 +#define DT_N_S_soc_S_flash_controller_40022000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_interrupts {3 /* 0x3 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_flash_controller_40022000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_interrupts_IDX_0 3 +#define DT_N_S_soc_S_flash_controller_40022000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_flash_controller_40022000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_VAL_bus 72 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_VAL_bits 256 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0, bits) +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0, bits) +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0) +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0) +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@1fff7500 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500 + * + * Binding (compatible = st,stm32-nvm-otp): + * $ZEPHYR_BASE/dts/bindings/otp/st,stm32-nvm-otp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_PATH "/soc/flash-controller@40022000/flash@1fff7500" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FULL_NAME "flash@1fff7500" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FULL_NAME_UNQUOTED flash@1fff7500 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FULL_NAME_TOKEN flash_1fff7500 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FULL_NAME_UPPER_TOKEN FLASH_1FFF7500 + +/* Node parent (/soc/flash-controller@40022000) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_PARENT DT_N_S_soc_S_flash_controller_40022000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_NODELABEL_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_CHILD_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_HASH yP8msK3Icm6hp_oROIPFyvpacEBcgNz1h7OlgsvRmfA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_ORD 12 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_ORD_STR_SORTABLE 00012 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_REQUIRES_ORDS \ + 11, /* /soc/flash-controller@40022000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_SUPPORTS_ORDS \ + 13, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_EXISTS 1 +#define DT_N_INST_0_st_stm32_nvm_otp DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_REG_IDX_0_VAL_ADDRESS 536835328 /* 0x1fff7500 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_REG_IDX_0_VAL_SIZE 768 /* 0x300 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_COMPAT_MATCHES_st_stm32_nvm_otp 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_COMPAT_MODEL_IDX_0 "stm32-nvm-otp" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_reg {536835328 /* 0x1fff7500 */, 768 /* 0x300 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_reg_IDX_0 536835328 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_reg_IDX_1 768 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible {"st,stm32-nvm-otp"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_IDX_0 "st,stm32-nvm-otp" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-nvm-otp +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_IDX_0_STRING_TOKEN st_stm32_nvm_otp +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_NVM_OTP +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout + * + * Binding (compatible = fixed-layout): + * $ZEPHYR_BASE/dts/bindings/nvmem/fixed-layout.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_PATH "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FULL_NAME "nvmem-layout" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FULL_NAME_UNQUOTED nvmem-layout +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FULL_NAME_TOKEN nvmem_layout +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FULL_NAME_UPPER_TOKEN NVMEM_LAYOUT + +/* Node parent (/soc/flash-controller@40022000/flash@1fff7500) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_NODELABEL_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_CHILD_NUM 3 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_CHILD_NUM_STATUS_OKAY 3 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_CHILD_UNIT_ADDR_INT_168 DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_CHILD_UNIT_ADDR_INT_170 DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_CHILD_UNIT_ADDR_INT_202 DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_HASH d1P5penkKk2AjpB_MM7SstkYtJQgU_bilAjk8Xpdchs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_ORD 13 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_ORD_STR_SORTABLE 00013 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_REQUIRES_ORDS \ + 12, /* /soc/flash-controller@40022000/flash@1fff7500 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_SUPPORTS_ORDS \ + 14, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8 */ \ + 15, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca */ \ + 29, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_EXISTS 1 +#define DT_N_INST_0_fixed_layout DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_REG_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_REG(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_COMPAT_MATCHES_fixed_layout 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_PATH "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FULL_NAME "ts-cal1@a8" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FULL_NAME_UNQUOTED ts-cal1@a8 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FULL_NAME_TOKEN ts_cal1_a8 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FULL_NAME_UPPER_TOKEN TS_CAL1_A8 + +/* Node parent (/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_NODELABEL(fn) fn(ts_cal1_otp) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_NODELABEL_VARGS(fn, ...) fn(ts_cal1_otp, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_HASH IKf3UX_kp_ZY4j43xdbgTdgq6ftv7iEZ_U_qkaGAj_c + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_ORD 14 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_ORD_STR_SORTABLE 00014 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_REQUIRES_ORDS \ + 13, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_SUPPORTS_ORDS \ + 16, /* /dietemp */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_EXISTS 1 +#define DT_N_NODELABEL_ts_cal1_otp DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_REG_IDX_0_VAL_ADDRESS 168 /* 0xa8 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_REG_IDX_0_VAL_SIZE 2 /* 0x2 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_reg {168 /* 0xa8 */, 2 /* 0x2 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_reg_IDX_0 168 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_reg_IDX_1 2 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_read_only 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8_P_read_only_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_PATH "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FULL_NAME "ts-cal2@ca" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FULL_NAME_UNQUOTED ts-cal2@ca +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FULL_NAME_TOKEN ts_cal2_ca +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FULL_NAME_UPPER_TOKEN TS_CAL2_CA + +/* Node parent (/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_NODELABEL(fn) fn(ts_cal2_otp) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_NODELABEL_VARGS(fn, ...) fn(ts_cal2_otp, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_HASH MfhVDbSyzL_psu19u8q667uA_vvrq_DGXdK_gFm4F4s + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_ORD 15 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_ORD_STR_SORTABLE 00015 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_REQUIRES_ORDS \ + 13, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_SUPPORTS_ORDS \ + 16, /* /dietemp */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_EXISTS 1 +#define DT_N_NODELABEL_ts_cal2_otp DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_REG_IDX_0_VAL_ADDRESS 202 /* 0xca */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_REG_IDX_0_VAL_SIZE 2 /* 0x2 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_reg {202 /* 0xca */, 2 /* 0x2 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_reg_IDX_0 202 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_reg_IDX_1 2 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_read_only 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca_P_read_only_EXISTS 1 + +/* + * Devicetree node: /dietemp + * + * Node identifier: DT_N_S_dietemp + * + * Binding (compatible = st,stm32-temp-cal): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-temp-cal.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_dietemp_PATH "/dietemp" + +/* Node's name with unit-address: */ +#define DT_N_S_dietemp_FULL_NAME "dietemp" +#define DT_N_S_dietemp_FULL_NAME_UNQUOTED dietemp +#define DT_N_S_dietemp_FULL_NAME_TOKEN dietemp +#define DT_N_S_dietemp_FULL_NAME_UPPER_TOKEN DIETEMP + +/* Node parent (/) identifier: */ +#define DT_N_S_dietemp_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_dietemp_CHILD_IDX 6 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_dietemp_NODELABEL_NUM 1 +#define DT_N_S_dietemp_FOREACH_NODELABEL(fn) fn(die_temp) +#define DT_N_S_dietemp_FOREACH_NODELABEL_VARGS(fn, ...) fn(die_temp, __VA_ARGS__) +#define DT_N_S_dietemp_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_dietemp_CHILD_NUM 0 +#define DT_N_S_dietemp_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_dietemp_FOREACH_CHILD(fn) +#define DT_N_S_dietemp_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_dietemp_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_dietemp_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_dietemp_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_dietemp_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_dietemp_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_dietemp_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_dietemp_HASH 1P3ft3QMjkFq1eBnbB6dz9pZsoSMwhVrPGe82Fpxz6c + +/* Node's dependency ordinal: */ +#define DT_N_S_dietemp_ORD 16 +#define DT_N_S_dietemp_ORD_STR_SORTABLE 00016 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_dietemp_REQUIRES_ORDS \ + 0, /* / */ \ + 10, /* /soc/adc@50000000 */ \ + 14, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal1@a8 */ \ + 15, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/ts-cal2@ca */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_dietemp_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_dietemp_EXISTS 1 +#define DT_N_INST_0_st_stm32_temp_cal DT_N_S_dietemp +#define DT_N_NODELABEL_die_temp DT_N_S_dietemp + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_dietemp_REG_NUM 0 +#define DT_N_S_dietemp_FOREACH_REG(fn) +#define DT_N_S_dietemp_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_dietemp_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_dietemp_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_dietemp_RANGES_NUM 0 +#define DT_N_S_dietemp_FOREACH_RANGE(fn) +#define DT_N_S_dietemp_IRQ_NUM 0 +#define DT_N_S_dietemp_IRQ_LEVEL 0 +#define DT_N_S_dietemp_COMPAT_MATCHES_st_stm32_temp_cal 1 +#define DT_N_S_dietemp_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_dietemp_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_COMPAT_MODEL_IDX_0 "stm32-temp-cal" +#define DT_N_S_dietemp_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_dietemp_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_dietemp_P_nvmem_cell_names {"TS_CAL1", "TS_CAL2"} +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0_ENUM_IDX 0 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1_ENUM_IDX 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0_ENUM_VAL_ts_cal1_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_ENUM_VAL_ts_cal1_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1_ENUM_VAL_ts_cal2_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_ENUM_VAL_ts_cal2_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0 "TS_CAL1" +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0_STRING_UNQUOTED TS_CAL1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0_STRING_TOKEN TS_CAL1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_0_STRING_UPPER_TOKEN TS_CAL1 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1 "TS_CAL2" +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1_STRING_UNQUOTED TS_CAL2 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1_STRING_TOKEN TS_CAL2 +#define DT_N_S_dietemp_P_nvmem_cell_names_IDX_1_STRING_UPPER_TOKEN TS_CAL2 +#define DT_N_S_dietemp_P_nvmem_cell_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_dietemp, nvmem_cell_names, 0) \ + fn(DT_N_S_dietemp, nvmem_cell_names, 1) +#define DT_N_S_dietemp_P_nvmem_cell_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_dietemp, nvmem_cell_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_dietemp, nvmem_cell_names, 1) +#define DT_N_S_dietemp_P_nvmem_cell_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_dietemp, nvmem_cell_names, 0, __VA_ARGS__) \ + fn(DT_N_S_dietemp, nvmem_cell_names, 1, __VA_ARGS__) +#define DT_N_S_dietemp_P_nvmem_cell_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_dietemp, nvmem_cell_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_dietemp, nvmem_cell_names, 1, __VA_ARGS__) +#define DT_N_S_dietemp_P_nvmem_cell_names_LEN 2 +#define DT_N_S_dietemp_P_nvmem_cell_names_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal2_temp 130 +#define DT_N_S_dietemp_P_ts_cal2_temp_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_0_PH DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_0_FOREACH_CELL(fn) +#define DT_N_S_dietemp_P_nvmem_cells_IDX_0_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_dietemp_P_nvmem_cells_IDX_0_NUM_CELLS 0 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_0_NAME "TS_CAL1" +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal1_IDX 0 +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal1_FOREACH_CELL(fn) +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal1_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal1_NUM_CELLS 0 +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal1_PH DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8 +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal1_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_1_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_1_PH DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca +#define DT_N_S_dietemp_P_nvmem_cells_IDX_1_FOREACH_CELL(fn) +#define DT_N_S_dietemp_P_nvmem_cells_IDX_1_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_dietemp_P_nvmem_cells_IDX_1_NUM_CELLS 0 +#define DT_N_S_dietemp_P_nvmem_cells_IDX_1_NAME "TS_CAL2" +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal2_IDX 1 +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal2_FOREACH_CELL(fn) +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal2_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal2_NUM_CELLS 0 +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal2_PH DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca +#define DT_N_S_dietemp_P_nvmem_cells_NAME_ts_cal2_EXISTS 1 +#define DT_N_S_dietemp_P_nvmem_cells_FOREACH_PROP_ELEM(fn) fn(DT_N_S_dietemp, nvmem_cells, 0) \ + fn(DT_N_S_dietemp, nvmem_cells, 1) +#define DT_N_S_dietemp_P_nvmem_cells_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_dietemp, nvmem_cells, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_dietemp, nvmem_cells, 1) +#define DT_N_S_dietemp_P_nvmem_cells_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_dietemp, nvmem_cells, 0, __VA_ARGS__) \ + fn(DT_N_S_dietemp, nvmem_cells, 1, __VA_ARGS__) +#define DT_N_S_dietemp_P_nvmem_cells_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_dietemp, nvmem_cells, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_dietemp, nvmem_cells, 1, __VA_ARGS__) +#define DT_N_S_dietemp_P_nvmem_cells_LEN 2 +#define DT_N_S_dietemp_P_nvmem_cells_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal1_temp 30 +#define DT_N_S_dietemp_P_ts_cal1_temp_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal_vrefanalog 3000 +#define DT_N_S_dietemp_P_ts_cal_vrefanalog_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal_resolution 12 +#define DT_N_S_dietemp_P_ts_cal_resolution_IDX_0_ENUM_IDX 0 +#define DT_N_S_dietemp_P_ts_cal_resolution_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal_resolution_IDX_0_ENUM_VAL_12_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal_resolution_ENUM_VAL_12_EXISTS 1 +#define DT_N_S_dietemp_P_ts_cal_resolution_EXISTS 1 +#define DT_N_S_dietemp_P_status "disabled" +#define DT_N_S_dietemp_P_status_STRING_UNQUOTED disabled +#define DT_N_S_dietemp_P_status_STRING_TOKEN disabled +#define DT_N_S_dietemp_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_dietemp_P_status_IDX_0 "disabled" +#define DT_N_S_dietemp_P_status_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_dietemp_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_dietemp_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_dietemp_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_dietemp, status, 0) +#define DT_N_S_dietemp_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_dietemp, status, 0) +#define DT_N_S_dietemp_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_dietemp, status, 0, __VA_ARGS__) +#define DT_N_S_dietemp_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_dietemp, status, 0, __VA_ARGS__) +#define DT_N_S_dietemp_P_status_LEN 1 +#define DT_N_S_dietemp_P_status_EXISTS 1 +#define DT_N_S_dietemp_P_compatible {"st,stm32-temp-cal"} +#define DT_N_S_dietemp_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_P_compatible_IDX_0 "st,stm32-temp-cal" +#define DT_N_S_dietemp_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-temp-cal +#define DT_N_S_dietemp_P_compatible_IDX_0_STRING_TOKEN st_stm32_temp_cal +#define DT_N_S_dietemp_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TEMP_CAL +#define DT_N_S_dietemp_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_dietemp, compatible, 0) +#define DT_N_S_dietemp_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_dietemp, compatible, 0) +#define DT_N_S_dietemp_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_dietemp, compatible, 0, __VA_ARGS__) +#define DT_N_S_dietemp_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_dietemp, compatible, 0, __VA_ARGS__) +#define DT_N_S_dietemp_P_compatible_LEN 1 +#define DT_N_S_dietemp_P_compatible_EXISTS 1 +#define DT_N_S_dietemp_P_dma_coherent 0 +#define DT_N_S_dietemp_P_dma_coherent_EXISTS 1 +#define DT_N_S_dietemp_P_io_channels_IDX_0_EXISTS 1 +#define DT_N_S_dietemp_P_io_channels_IDX_0_PH DT_N_S_soc_S_adc_50000000 +#define DT_N_S_dietemp_P_io_channels_IDX_0_VAL_input 16 +#define DT_N_S_dietemp_P_io_channels_IDX_0_VAL_input_EXISTS 1 +#define DT_N_S_dietemp_P_io_channels_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_dietemp, io_channels, 0, input) +#define DT_N_S_dietemp_P_io_channels_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_dietemp, io_channels, 0, input) +#define DT_N_S_dietemp_P_io_channels_IDX_0_NUM_CELLS 1 +#define DT_N_S_dietemp_P_io_channels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_dietemp, io_channels, 0) +#define DT_N_S_dietemp_P_io_channels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_dietemp, io_channels, 0) +#define DT_N_S_dietemp_P_io_channels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_dietemp, io_channels, 0, __VA_ARGS__) +#define DT_N_S_dietemp_P_io_channels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_dietemp, io_channels, 0, __VA_ARGS__) +#define DT_N_S_dietemp_P_io_channels_LEN 1 +#define DT_N_S_dietemp_P_io_channels_EXISTS 1 +#define DT_N_S_dietemp_P_zephyr_deferred_init 0 +#define DT_N_S_dietemp_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_dietemp_P_wakeup_source 0 +#define DT_N_S_dietemp_P_wakeup_source_EXISTS 1 +#define DT_N_S_dietemp_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_dietemp_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /memory@20000000 + * + * Node identifier: DT_N_S_memory_20000000 + * + * Binding (compatible = zephyr,memory-region): + * $ZEPHYR_BASE/dts/bindings/base/zephyr,memory-region.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_memory_20000000_PATH "/memory@20000000" + +/* Node's name with unit-address: */ +#define DT_N_S_memory_20000000_FULL_NAME "memory@20000000" +#define DT_N_S_memory_20000000_FULL_NAME_UNQUOTED memory@20000000 +#define DT_N_S_memory_20000000_FULL_NAME_TOKEN memory_20000000 +#define DT_N_S_memory_20000000_FULL_NAME_UPPER_TOKEN MEMORY_20000000 + +/* Node parent (/) identifier: */ +#define DT_N_S_memory_20000000_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_memory_20000000_CHILD_IDX 4 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_memory_20000000_NODELABEL_NUM 1 +#define DT_N_S_memory_20000000_FOREACH_NODELABEL(fn) fn(sram0) +#define DT_N_S_memory_20000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sram0, __VA_ARGS__) +#define DT_N_S_memory_20000000_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_memory_20000000_CHILD_NUM 0 +#define DT_N_S_memory_20000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_memory_20000000_FOREACH_CHILD(fn) +#define DT_N_S_memory_20000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_memory_20000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_memory_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_memory_20000000_HASH Ppv28MrjF0V_ocFctWWy62TJJRdbnlSCTerwKpAvZ6U + +/* Node's dependency ordinal: */ +#define DT_N_S_memory_20000000_ORD 17 +#define DT_N_S_memory_20000000_ORD_STR_SORTABLE 00017 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_memory_20000000_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_memory_20000000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_memory_20000000_EXISTS 1 +#define DT_N_INST_0_zephyr_memory_region DT_N_S_memory_20000000 +#define DT_N_INST_0_mmio_sram DT_N_S_memory_20000000 +#define DT_N_NODELABEL_sram0 DT_N_S_memory_20000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_memory_20000000_REG_NUM 1 +#define DT_N_S_memory_20000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */ +#define DT_N_S_memory_20000000_REG_IDX_0_VAL_SIZE 32768 /* 0x8000 */ +#define DT_N_S_memory_20000000_FOREACH_REG(fn) fn(DT_N_S_memory_20000000, 0) +#define DT_N_S_memory_20000000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_memory_20000000, 0) +#define DT_N_S_memory_20000000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_memory_20000000, 0, __VA_ARGS__) +#define DT_N_S_memory_20000000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_memory_20000000, 0, __VA_ARGS__) +#define DT_N_S_memory_20000000_RANGES_NUM 0 +#define DT_N_S_memory_20000000_FOREACH_RANGE(fn) +#define DT_N_S_memory_20000000_IRQ_NUM 0 +#define DT_N_S_memory_20000000_IRQ_LEVEL 0 +#define DT_N_S_memory_20000000_COMPAT_MATCHES_zephyr_memory_region 1 +#define DT_N_S_memory_20000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_memory_20000000_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_memory_20000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_memory_20000000_COMPAT_MODEL_IDX_0 "memory-region" +#define DT_N_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1 +#define DT_N_S_memory_20000000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_memory_20000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_memory_20000000_P_zephyr_memory_region "SRAM0" +#define DT_N_S_memory_20000000_P_zephyr_memory_region_STRING_UNQUOTED SRAM0 +#define DT_N_S_memory_20000000_P_zephyr_memory_region_STRING_TOKEN SRAM0 +#define DT_N_S_memory_20000000_P_zephyr_memory_region_STRING_UPPER_TOKEN SRAM0 +#define DT_N_S_memory_20000000_P_zephyr_memory_region_IDX_0 "SRAM0" +#define DT_N_S_memory_20000000_P_zephyr_memory_region_IDX_0_EXISTS 1 +#define DT_N_S_memory_20000000_P_zephyr_memory_region_FOREACH_PROP_ELEM(fn) fn(DT_N_S_memory_20000000, zephyr_memory_region, 0) +#define DT_N_S_memory_20000000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_memory_20000000, zephyr_memory_region, 0) +#define DT_N_S_memory_20000000_P_zephyr_memory_region_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_memory_20000000, zephyr_memory_region, 0, __VA_ARGS__) +#define DT_N_S_memory_20000000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_memory_20000000, zephyr_memory_region, 0, __VA_ARGS__) +#define DT_N_S_memory_20000000_P_zephyr_memory_region_LEN 1 +#define DT_N_S_memory_20000000_P_zephyr_memory_region_EXISTS 1 +#define DT_N_S_memory_20000000_P_compatible {"zephyr,memory-region", "mmio-sram"} +#define DT_N_S_memory_20000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_memory_20000000_P_compatible_IDX_0 "zephyr,memory-region" +#define DT_N_S_memory_20000000_P_compatible_IDX_0_STRING_UNQUOTED zephyr,memory-region +#define DT_N_S_memory_20000000_P_compatible_IDX_0_STRING_TOKEN zephyr_memory_region +#define DT_N_S_memory_20000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MEMORY_REGION +#define DT_N_S_memory_20000000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_memory_20000000_P_compatible_IDX_1 "mmio-sram" +#define DT_N_S_memory_20000000_P_compatible_IDX_1_STRING_UNQUOTED mmio-sram +#define DT_N_S_memory_20000000_P_compatible_IDX_1_STRING_TOKEN mmio_sram +#define DT_N_S_memory_20000000_P_compatible_IDX_1_STRING_UPPER_TOKEN MMIO_SRAM +#define DT_N_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_memory_20000000, compatible, 0) \ + fn(DT_N_S_memory_20000000, compatible, 1) +#define DT_N_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_memory_20000000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_memory_20000000, compatible, 1) +#define DT_N_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_memory_20000000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_memory_20000000, compatible, 1, __VA_ARGS__) +#define DT_N_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_memory_20000000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_memory_20000000, compatible, 1, __VA_ARGS__) +#define DT_N_S_memory_20000000_P_compatible_LEN 2 +#define DT_N_S_memory_20000000_P_compatible_EXISTS 1 +#define DT_N_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 32768 /* 0x8000 */} +#define DT_N_S_memory_20000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_memory_20000000_P_reg_IDX_0 536870912 +#define DT_N_S_memory_20000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_memory_20000000_P_reg_IDX_1 32768 +#define DT_N_S_memory_20000000_P_reg_EXISTS 1 +#define DT_N_S_memory_20000000_P_dma_coherent 0 +#define DT_N_S_memory_20000000_P_dma_coherent_EXISTS 1 +#define DT_N_S_memory_20000000_P_zephyr_deferred_init 0 +#define DT_N_S_memory_20000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_memory_20000000_P_wakeup_source 0 +#define DT_N_S_memory_20000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_memory_20000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_memory_20000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000 + * + * Binding (compatible = st,stm32-pinctrl): + * $ZEPHYR_BASE/dts/bindings/pinctrl/st,stm32-pinctrl.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_PATH "/soc/pin-controller@48000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_FULL_NAME "pin-controller@48000000" +#define DT_N_S_soc_S_pin_controller_48000000_FULL_NAME_UNQUOTED pin-controller@48000000 +#define DT_N_S_soc_S_pin_controller_48000000_FULL_NAME_TOKEN pin_controller_48000000 +#define DT_N_S_soc_S_pin_controller_48000000_FULL_NAME_UPPER_TOKEN PIN_CONTROLLER_48000000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_IDX 9 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_NODELABEL(fn) fn(pinctrl) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pinctrl, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_NUM 26 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_NUM_STATUS_OKAY 26 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207959552 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207960576 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207961600 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207962624 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207963648 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207964672 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400 +#define DT_N_S_soc_S_pin_controller_48000000_CHILD_UNIT_ADDR_INT_1207965696 DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800 +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_HASH t9nOZVnIU1TMOZorPnXPYV59gij_PefzrEfm0_7N_5g + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_ORD 18 +#define DT_N_S_soc_S_pin_controller_48000000_ORD_STR_SORTABLE 00018 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_REQUIRES_ORDS \ + 4, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_SUPPORTS_ORDS \ + 19, /* /soc/pin-controller@48000000/i2c1_scl_pb8 */ \ + 20, /* /soc/pin-controller@48000000/i2c1_sda_pb9 */ \ + 40, /* /soc/pin-controller@48000000/gpio@48000800 */ \ + 43, /* /soc/pin-controller@48000000/gpio@48000000 */ \ + 48, /* /soc/pin-controller@48000000/tim2_ch1_pa5 */ \ + 57, /* /soc/pin-controller@48000000/dac1_out1_pa4 */ \ + 74, /* /soc/pin-controller@48000000/lpuart1_rx_pa3 */ \ + 75, /* /soc/pin-controller@48000000/lpuart1_tx_pa2 */ \ + 77, /* /soc/pin-controller@48000000/usart1_rx_pc5 */ \ + 78, /* /soc/pin-controller@48000000/usart1_tx_pc4 */ \ + 80, /* /soc/pin-controller@48000000/spi2_miso_pb14 */ \ + 81, /* /soc/pin-controller@48000000/spi2_mosi_pb15 */ \ + 82, /* /soc/pin-controller@48000000/spi2_nss_pb12 */ \ + 83, /* /soc/pin-controller@48000000/spi2_sck_pb13 */ \ + 85, /* /soc/pin-controller@48000000/spi3_miso_pc11 */ \ + 86, /* /soc/pin-controller@48000000/spi3_mosi_pc12 */ \ + 87, /* /soc/pin-controller@48000000/spi3_nss_pa15 */ \ + 88, /* /soc/pin-controller@48000000/spi3_sck_pc10 */ \ + 90, /* /soc/pin-controller@48000000/gpio@48000400 */ \ + 91, /* /soc/pin-controller@48000000/spi1_miso_pa6 */ \ + 92, /* /soc/pin-controller@48000000/spi1_mosi_pa7 */ \ + 93, /* /soc/pin-controller@48000000/spi1_sck_pa5 */ \ + 109, /* /soc/pin-controller@48000000/gpio@48000c00 */ \ + 110, /* /soc/pin-controller@48000000/gpio@48001000 */ \ + 111, /* /soc/pin-controller@48000000/gpio@48001400 */ \ + 112, /* /soc/pin-controller@48000000/gpio@48001800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_pinctrl DT_N_S_soc_S_pin_controller_48000000 +#define DT_N_NODELABEL_pinctrl DT_N_S_soc_S_pin_controller_48000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_REG_IDX_0_VAL_ADDRESS 1207959552 /* 0x48000000 */ +#define DT_N_S_soc_S_pin_controller_48000000_REG_IDX_0_VAL_SIZE 8192 /* 0x2000 */ +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000, 0) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000, 0) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_COMPAT_MATCHES_st_stm32_pinctrl 1 +#define DT_N_S_soc_S_pin_controller_48000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_COMPAT_MODEL_IDX_0 "stm32-pinctrl" +#define DT_N_S_soc_S_pin_controller_48000000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_P_reg {1207959552 /* 0x48000000 */, 8192 /* 0x2000 */} +#define DT_N_S_soc_S_pin_controller_48000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_reg_IDX_0 1207959552 +#define DT_N_S_soc_S_pin_controller_48000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_reg_IDX_1 8192 +#define DT_N_S_soc_S_pin_controller_48000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_remap_pa11 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_remap_pa11_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_remap_pa12 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_remap_pa12_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_remap_pa11_pa12 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_remap_pa11_pa12_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible {"st,stm32-pinctrl"} +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_IDX_0 "st,stm32-pinctrl" +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pinctrl +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_pinctrl +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PINCTRL +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/i2c1_scl_pb8 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_PATH "/soc/pin-controller@48000000/i2c1_scl_pb8" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FULL_NAME "i2c1_scl_pb8" +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FULL_NAME_UNQUOTED i2c1_scl_pb8 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FULL_NAME_TOKEN i2c1_scl_pb8 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FULL_NAME_UPPER_TOKEN I2C1_SCL_PB8 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_CHILD_IDX 8 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_NODELABEL(fn) fn(i2c1_scl_pb8) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c1_scl_pb8, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_HASH 0FQ7pQXkOFsPWL84dNECQjIA_ud_vczsOsQ64ys5dkw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_ORD 19 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_ORD_STR_SORTABLE 00019 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_SUPPORTS_ORDS \ + 21, /* /soc/i2c@40005400 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_EXISTS 1 +#define DT_N_NODELABEL_i2c1_scl_pb8 DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_pinmux 772 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_drive_open_drain 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/i2c1_sda_pb9 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_PATH "/soc/pin-controller@48000000/i2c1_sda_pb9" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FULL_NAME "i2c1_sda_pb9" +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FULL_NAME_UNQUOTED i2c1_sda_pb9 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FULL_NAME_TOKEN i2c1_sda_pb9 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FULL_NAME_UPPER_TOKEN I2C1_SDA_PB9 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_CHILD_IDX 9 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_NODELABEL(fn) fn(i2c1_sda_pb9) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c1_sda_pb9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_HASH URBomKZmBax9q1m2LG44r87TSG3tpy9qBVZ5LUCaDrc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_ORD 20 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_ORD_STR_SORTABLE 00020 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_SUPPORTS_ORDS \ + 21, /* /soc/i2c@40005400 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_EXISTS 1 +#define DT_N_NODELABEL_i2c1_sda_pb9 DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_pinmux 804 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_drive_open_drain 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/i2c@40005400 + * + * Node identifier: DT_N_S_soc_S_i2c_40005400 + * + * Binding (compatible = st,stm32-i2c-v2): + * $ZEPHYR_BASE/dts/bindings/i2c/st,stm32-i2c-v2.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2c_40005400_PATH "/soc/i2c@40005400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2c_40005400_FULL_NAME "i2c@40005400" +#define DT_N_S_soc_S_i2c_40005400_FULL_NAME_UNQUOTED i2c@40005400 +#define DT_N_S_soc_S_i2c_40005400_FULL_NAME_TOKEN i2c_40005400 +#define DT_N_S_soc_S_i2c_40005400_FULL_NAME_UPPER_TOKEN I2C_40005400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_i2c_40005400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2c_40005400_CHILD_IDX 17 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2c_40005400_NODELABEL_NUM 2 +#define DT_N_S_soc_S_i2c_40005400_FOREACH_NODELABEL(fn) fn(i2c1) fn(arduino_i2c) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c1, __VA_ARGS__) fn(arduino_i2c, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2c_40005400_CHILD_NUM 0 +#define DT_N_S_soc_S_i2c_40005400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2c_40005400_HASH qdcoGqslkp_qGZ59SAaN4H47YRea2PU_8MI_v34YdEo + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2c_40005400_ORD 21 +#define DT_N_S_soc_S_i2c_40005400_ORD_STR_SORTABLE 00021 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2c_40005400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 19, /* /soc/pin-controller@48000000/i2c1_scl_pb8 */ \ + 20, /* /soc/pin-controller@48000000/i2c1_sda_pb9 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2c_40005400_SUPPORTS_ORDS \ + 22, /* /smbus1 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2c_40005400_EXISTS 1 +#define DT_N_INST_0_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005400 +#define DT_N_NODELABEL_i2c1 DT_N_S_soc_S_i2c_40005400 +#define DT_N_NODELABEL_arduino_i2c DT_N_S_soc_S_i2c_40005400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2c_40005400_REG_NUM 1 +#define DT_N_S_soc_S_i2c_40005400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_REG_IDX_0_VAL_ADDRESS 1073763328 /* 0x40005400 */ +#define DT_N_S_soc_S_i2c_40005400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_i2c_40005400_FOREACH_REG(fn) fn(DT_N_S_soc_S_i2c_40005400, 0) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, 0) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_RANGES_NUM 0 +#define DT_N_S_soc_S_i2c_40005400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2c_40005400_IRQ_NUM 2 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_VAL_irq 31 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_VAL_irq 32 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2c_40005400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_event_VAL_irq DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_event_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_event_VAL_priority DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_event_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_event_CONTROLLER DT_N_S_soc_S_i2c_40005400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_error_VAL_irq DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_error_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_error_VAL_priority DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_error_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_IRQ_NAME_error_CONTROLLER DT_N_S_soc_S_i2c_40005400_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_i2c_40005400_COMPAT_MATCHES_st_stm32_i2c_v2 1 +#define DT_N_S_soc_S_i2c_40005400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_i2c_40005400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_COMPAT_MODEL_IDX_0 "stm32-i2c-v2" +#define DT_N_S_soc_S_i2c_40005400_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_NUM 1 +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8 +#define DT_N_S_soc_S_i2c_40005400_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2c_40005400_P_reg {1073763328 /* 0x40005400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_i2c_40005400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_reg_IDX_0 1073763328 +#define DT_N_S_soc_S_i2c_40005400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_i2c_40005400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts {31 /* 0x1f */, 0 /* 0x0 */, 32 /* 0x20 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_0 31 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_2 32 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_i2c_40005400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 1) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 1) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005400, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_names, 0) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_names, 0) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_i2c_40005400_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_clock_frequency 100000 +#define DT_N_S_soc_S_i2c_40005400_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_sq_size 4 +#define DT_N_S_soc_S_i2c_40005400_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_cq_size 4 +#define DT_N_S_soc_S_i2c_40005400_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_status "okay" +#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_i2c_40005400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_i2c_40005400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, status, 0) +#define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, status, 0) +#define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_status_LEN 1 +#define DT_N_S_soc_S_i2c_40005400_P_status_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_compatible {"st,stm32-i2c-v2"} +#define DT_N_S_soc_S_i2c_40005400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_compatible_IDX_0 "st,stm32-i2c-v2" +#define DT_N_S_soc_S_i2c_40005400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-i2c-v2 +#define DT_N_S_soc_S_i2c_40005400_P_compatible_IDX_0_STRING_TOKEN st_stm32_i2c_v2 +#define DT_N_S_soc_S_i2c_40005400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_I2C_V2 +#define DT_N_S_soc_S_i2c_40005400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, compatible, 0) +#define DT_N_S_soc_S_i2c_40005400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, compatible, 0) +#define DT_N_S_soc_S_i2c_40005400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_compatible_LEN 1 +#define DT_N_S_soc_S_i2c_40005400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names {"event", "error"} +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_0 "event" +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_0_STRING_UNQUOTED event +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_0_STRING_TOKEN event +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EVENT +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_1 "error" +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_1_STRING_UNQUOTED error +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_1_STRING_TOKEN error +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN ERROR +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 0) \ + fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 1) +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 1) +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005400, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_LEN 2 +#define DT_N_S_soc_S_i2c_40005400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_VAL_bits 2097152 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_i2c_40005400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_i2c_40005400, clocks, 0, bits) +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005400, clocks, 0, bits) +#define DT_N_S_soc_S_i2c_40005400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005400, clocks, 0) +#define DT_N_S_soc_S_i2c_40005400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005400, clocks, 0) +#define DT_N_S_soc_S_i2c_40005400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005400_P_clocks_LEN 1 +#define DT_N_S_soc_S_i2c_40005400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_dma_coherent 0 +#define DT_N_S_soc_S_i2c_40005400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2c_40005400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_wakeup_source 0 +#define DT_N_S_soc_S_i2c_40005400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2c_40005400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /smbus1 + * + * Node identifier: DT_N_S_smbus1 + * + * Binding (compatible = st,stm32-smbus): + * $ZEPHYR_BASE/dts/bindings/smbus/st,stm32-smbus.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_smbus1_PATH "/smbus1" + +/* Node's name with unit-address: */ +#define DT_N_S_smbus1_FULL_NAME "smbus1" +#define DT_N_S_smbus1_FULL_NAME_UNQUOTED smbus1 +#define DT_N_S_smbus1_FULL_NAME_TOKEN smbus1 +#define DT_N_S_smbus1_FULL_NAME_UPPER_TOKEN SMBUS1 + +/* Node parent (/) identifier: */ +#define DT_N_S_smbus1_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_smbus1_CHILD_IDX 10 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_smbus1_NODELABEL_NUM 1 +#define DT_N_S_smbus1_FOREACH_NODELABEL(fn) fn(smbus1) +#define DT_N_S_smbus1_FOREACH_NODELABEL_VARGS(fn, ...) fn(smbus1, __VA_ARGS__) +#define DT_N_S_smbus1_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_smbus1_CHILD_NUM 0 +#define DT_N_S_smbus1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_smbus1_FOREACH_CHILD(fn) +#define DT_N_S_smbus1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_smbus1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_smbus1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_smbus1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_smbus1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_smbus1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_smbus1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_smbus1_HASH RRjxCtQo8vEaNES3pUGCHfX2Mp6H0kS5wnsZuRpKBrY + +/* Node's dependency ordinal: */ +#define DT_N_S_smbus1_ORD 22 +#define DT_N_S_smbus1_ORD_STR_SORTABLE 00022 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_smbus1_REQUIRES_ORDS \ + 0, /* / */ \ + 21, /* /soc/i2c@40005400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_smbus1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_smbus1_EXISTS 1 +#define DT_N_INST_0_st_stm32_smbus DT_N_S_smbus1 +#define DT_N_NODELABEL_smbus1 DT_N_S_smbus1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_smbus1_REG_NUM 0 +#define DT_N_S_smbus1_FOREACH_REG(fn) +#define DT_N_S_smbus1_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_smbus1_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_smbus1_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_smbus1_RANGES_NUM 0 +#define DT_N_S_smbus1_FOREACH_RANGE(fn) +#define DT_N_S_smbus1_IRQ_NUM 0 +#define DT_N_S_smbus1_IRQ_LEVEL 0 +#define DT_N_S_smbus1_COMPAT_MATCHES_st_stm32_smbus 1 +#define DT_N_S_smbus1_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_smbus1_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_smbus1_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_smbus1_COMPAT_MODEL_IDX_0 "stm32-smbus" +#define DT_N_S_smbus1_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_smbus1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_smbus1_P_i2c DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_smbus1_P_i2c_IDX_0 DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_smbus1_P_i2c_IDX_0_PH DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_smbus1_P_i2c_IDX_0_EXISTS 1 +#define DT_N_S_smbus1_P_i2c_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus1, i2c, 0) +#define DT_N_S_smbus1_P_i2c_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus1, i2c, 0) +#define DT_N_S_smbus1_P_i2c_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus1, i2c, 0, __VA_ARGS__) +#define DT_N_S_smbus1_P_i2c_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus1, i2c, 0, __VA_ARGS__) +#define DT_N_S_smbus1_P_i2c_LEN 1 +#define DT_N_S_smbus1_P_i2c_EXISTS 1 +#define DT_N_S_smbus1_P_status "disabled" +#define DT_N_S_smbus1_P_status_STRING_UNQUOTED disabled +#define DT_N_S_smbus1_P_status_STRING_TOKEN disabled +#define DT_N_S_smbus1_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_smbus1_P_status_IDX_0 "disabled" +#define DT_N_S_smbus1_P_status_IDX_0_EXISTS 1 +#define DT_N_S_smbus1_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_smbus1_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_smbus1_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_smbus1_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus1, status, 0) +#define DT_N_S_smbus1_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus1, status, 0) +#define DT_N_S_smbus1_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus1, status, 0, __VA_ARGS__) +#define DT_N_S_smbus1_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus1, status, 0, __VA_ARGS__) +#define DT_N_S_smbus1_P_status_LEN 1 +#define DT_N_S_smbus1_P_status_EXISTS 1 +#define DT_N_S_smbus1_P_compatible {"st,stm32-smbus"} +#define DT_N_S_smbus1_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_smbus1_P_compatible_IDX_0 "st,stm32-smbus" +#define DT_N_S_smbus1_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-smbus +#define DT_N_S_smbus1_P_compatible_IDX_0_STRING_TOKEN st_stm32_smbus +#define DT_N_S_smbus1_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SMBUS +#define DT_N_S_smbus1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus1, compatible, 0) +#define DT_N_S_smbus1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus1, compatible, 0) +#define DT_N_S_smbus1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus1, compatible, 0, __VA_ARGS__) +#define DT_N_S_smbus1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus1, compatible, 0, __VA_ARGS__) +#define DT_N_S_smbus1_P_compatible_LEN 1 +#define DT_N_S_smbus1_P_compatible_EXISTS 1 +#define DT_N_S_smbus1_P_dma_coherent 0 +#define DT_N_S_smbus1_P_dma_coherent_EXISTS 1 +#define DT_N_S_smbus1_P_zephyr_deferred_init 0 +#define DT_N_S_smbus1_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_smbus1_P_wakeup_source 0 +#define DT_N_S_smbus1_P_wakeup_source_EXISTS 1 +#define DT_N_S_smbus1_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_smbus1_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/i2c@40005800 + * + * Node identifier: DT_N_S_soc_S_i2c_40005800 + * + * Binding (compatible = st,stm32-i2c-v2): + * $ZEPHYR_BASE/dts/bindings/i2c/st,stm32-i2c-v2.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2c_40005800_PATH "/soc/i2c@40005800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2c_40005800_FULL_NAME "i2c@40005800" +#define DT_N_S_soc_S_i2c_40005800_FULL_NAME_UNQUOTED i2c@40005800 +#define DT_N_S_soc_S_i2c_40005800_FULL_NAME_TOKEN i2c_40005800 +#define DT_N_S_soc_S_i2c_40005800_FULL_NAME_UPPER_TOKEN I2C_40005800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_i2c_40005800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2c_40005800_CHILD_IDX 18 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2c_40005800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2c_40005800_FOREACH_NODELABEL(fn) fn(i2c2) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c2, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2c_40005800_CHILD_NUM 0 +#define DT_N_S_soc_S_i2c_40005800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2c_40005800_HASH eB73TQqq_PUOgKTcnvcwzuS4tWCFU0fUXyPb0bwWGkQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2c_40005800_ORD 23 +#define DT_N_S_soc_S_i2c_40005800_ORD_STR_SORTABLE 00023 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2c_40005800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2c_40005800_SUPPORTS_ORDS \ + 24, /* /smbus2 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2c_40005800_EXISTS 1 +#define DT_N_INST_1_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005800 +#define DT_N_NODELABEL_i2c2 DT_N_S_soc_S_i2c_40005800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2c_40005800_REG_NUM 1 +#define DT_N_S_soc_S_i2c_40005800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_REG_IDX_0_VAL_ADDRESS 1073764352 /* 0x40005800 */ +#define DT_N_S_soc_S_i2c_40005800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_i2c_40005800_FOREACH_REG(fn) fn(DT_N_S_soc_S_i2c_40005800, 0) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, 0) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_RANGES_NUM 0 +#define DT_N_S_soc_S_i2c_40005800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2c_40005800_IRQ_NUM 2 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_VAL_irq 33 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_VAL_irq 34 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2c_40005800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_event_VAL_irq DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_event_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_event_VAL_priority DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_event_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_event_CONTROLLER DT_N_S_soc_S_i2c_40005800_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_error_VAL_irq DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_error_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_error_VAL_priority DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_error_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_IRQ_NAME_error_CONTROLLER DT_N_S_soc_S_i2c_40005800_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_i2c_40005800_COMPAT_MATCHES_st_stm32_i2c_v2 1 +#define DT_N_S_soc_S_i2c_40005800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_i2c_40005800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_COMPAT_MODEL_IDX_0 "stm32-i2c-v2" +#define DT_N_S_soc_S_i2c_40005800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2c_40005800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2c_40005800_P_reg {1073764352 /* 0x40005800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_i2c_40005800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_reg_IDX_0 1073764352 +#define DT_N_S_soc_S_i2c_40005800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_i2c_40005800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts {33 /* 0x21 */, 0 /* 0x0 */, 34 /* 0x22 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_0 33 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_2 34 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_i2c_40005800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_clock_frequency 100000 +#define DT_N_S_soc_S_i2c_40005800_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_sq_size 4 +#define DT_N_S_soc_S_i2c_40005800_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_cq_size 4 +#define DT_N_S_soc_S_i2c_40005800_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_status "disabled" +#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_i2c_40005800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005800, status, 0) +#define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, status, 0) +#define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_status_LEN 1 +#define DT_N_S_soc_S_i2c_40005800_P_status_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_compatible {"st,stm32-i2c-v2"} +#define DT_N_S_soc_S_i2c_40005800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_compatible_IDX_0 "st,stm32-i2c-v2" +#define DT_N_S_soc_S_i2c_40005800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-i2c-v2 +#define DT_N_S_soc_S_i2c_40005800_P_compatible_IDX_0_STRING_TOKEN st_stm32_i2c_v2 +#define DT_N_S_soc_S_i2c_40005800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_I2C_V2 +#define DT_N_S_soc_S_i2c_40005800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005800, compatible, 0) +#define DT_N_S_soc_S_i2c_40005800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, compatible, 0) +#define DT_N_S_soc_S_i2c_40005800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_compatible_LEN 1 +#define DT_N_S_soc_S_i2c_40005800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names {"event", "error"} +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_0 "event" +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_0_STRING_UNQUOTED event +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_0_STRING_TOKEN event +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EVENT +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_1 "error" +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_1_STRING_UNQUOTED error +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_1_STRING_TOKEN error +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN ERROR +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 0) \ + fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 1) +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 1) +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005800, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_LEN 2 +#define DT_N_S_soc_S_i2c_40005800_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_VAL_bits 4194304 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_i2c_40005800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_i2c_40005800, clocks, 0, bits) +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40005800, clocks, 0, bits) +#define DT_N_S_soc_S_i2c_40005800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005800, clocks, 0) +#define DT_N_S_soc_S_i2c_40005800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005800, clocks, 0) +#define DT_N_S_soc_S_i2c_40005800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005800_P_clocks_LEN 1 +#define DT_N_S_soc_S_i2c_40005800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_dma_coherent 0 +#define DT_N_S_soc_S_i2c_40005800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2c_40005800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_wakeup_source 0 +#define DT_N_S_soc_S_i2c_40005800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2c_40005800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /smbus2 + * + * Node identifier: DT_N_S_smbus2 + * + * Binding (compatible = st,stm32-smbus): + * $ZEPHYR_BASE/dts/bindings/smbus/st,stm32-smbus.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_smbus2_PATH "/smbus2" + +/* Node's name with unit-address: */ +#define DT_N_S_smbus2_FULL_NAME "smbus2" +#define DT_N_S_smbus2_FULL_NAME_UNQUOTED smbus2 +#define DT_N_S_smbus2_FULL_NAME_TOKEN smbus2 +#define DT_N_S_smbus2_FULL_NAME_UPPER_TOKEN SMBUS2 + +/* Node parent (/) identifier: */ +#define DT_N_S_smbus2_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_smbus2_CHILD_IDX 11 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_smbus2_NODELABEL_NUM 1 +#define DT_N_S_smbus2_FOREACH_NODELABEL(fn) fn(smbus2) +#define DT_N_S_smbus2_FOREACH_NODELABEL_VARGS(fn, ...) fn(smbus2, __VA_ARGS__) +#define DT_N_S_smbus2_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_smbus2_CHILD_NUM 0 +#define DT_N_S_smbus2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_smbus2_FOREACH_CHILD(fn) +#define DT_N_S_smbus2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_smbus2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_smbus2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_smbus2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_smbus2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_smbus2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_smbus2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_smbus2_HASH CeKsUeBLVHACPFrmleKnxYHTPUYQ02SrNC2w1a_Vmm4 + +/* Node's dependency ordinal: */ +#define DT_N_S_smbus2_ORD 24 +#define DT_N_S_smbus2_ORD_STR_SORTABLE 00024 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_smbus2_REQUIRES_ORDS \ + 0, /* / */ \ + 23, /* /soc/i2c@40005800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_smbus2_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_smbus2_EXISTS 1 +#define DT_N_INST_1_st_stm32_smbus DT_N_S_smbus2 +#define DT_N_NODELABEL_smbus2 DT_N_S_smbus2 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_smbus2_REG_NUM 0 +#define DT_N_S_smbus2_FOREACH_REG(fn) +#define DT_N_S_smbus2_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_smbus2_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_smbus2_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_smbus2_RANGES_NUM 0 +#define DT_N_S_smbus2_FOREACH_RANGE(fn) +#define DT_N_S_smbus2_IRQ_NUM 0 +#define DT_N_S_smbus2_IRQ_LEVEL 0 +#define DT_N_S_smbus2_COMPAT_MATCHES_st_stm32_smbus 1 +#define DT_N_S_smbus2_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_smbus2_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_smbus2_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_smbus2_COMPAT_MODEL_IDX_0 "stm32-smbus" +#define DT_N_S_smbus2_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_smbus2_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_smbus2_P_i2c DT_N_S_soc_S_i2c_40005800 +#define DT_N_S_smbus2_P_i2c_IDX_0 DT_N_S_soc_S_i2c_40005800 +#define DT_N_S_smbus2_P_i2c_IDX_0_PH DT_N_S_soc_S_i2c_40005800 +#define DT_N_S_smbus2_P_i2c_IDX_0_EXISTS 1 +#define DT_N_S_smbus2_P_i2c_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus2, i2c, 0) +#define DT_N_S_smbus2_P_i2c_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus2, i2c, 0) +#define DT_N_S_smbus2_P_i2c_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus2, i2c, 0, __VA_ARGS__) +#define DT_N_S_smbus2_P_i2c_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus2, i2c, 0, __VA_ARGS__) +#define DT_N_S_smbus2_P_i2c_LEN 1 +#define DT_N_S_smbus2_P_i2c_EXISTS 1 +#define DT_N_S_smbus2_P_status "disabled" +#define DT_N_S_smbus2_P_status_STRING_UNQUOTED disabled +#define DT_N_S_smbus2_P_status_STRING_TOKEN disabled +#define DT_N_S_smbus2_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_smbus2_P_status_IDX_0 "disabled" +#define DT_N_S_smbus2_P_status_IDX_0_EXISTS 1 +#define DT_N_S_smbus2_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_smbus2_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_smbus2_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_smbus2_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus2, status, 0) +#define DT_N_S_smbus2_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus2, status, 0) +#define DT_N_S_smbus2_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus2, status, 0, __VA_ARGS__) +#define DT_N_S_smbus2_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus2, status, 0, __VA_ARGS__) +#define DT_N_S_smbus2_P_status_LEN 1 +#define DT_N_S_smbus2_P_status_EXISTS 1 +#define DT_N_S_smbus2_P_compatible {"st,stm32-smbus"} +#define DT_N_S_smbus2_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_smbus2_P_compatible_IDX_0 "st,stm32-smbus" +#define DT_N_S_smbus2_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-smbus +#define DT_N_S_smbus2_P_compatible_IDX_0_STRING_TOKEN st_stm32_smbus +#define DT_N_S_smbus2_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SMBUS +#define DT_N_S_smbus2_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus2, compatible, 0) +#define DT_N_S_smbus2_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus2, compatible, 0) +#define DT_N_S_smbus2_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus2, compatible, 0, __VA_ARGS__) +#define DT_N_S_smbus2_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus2, compatible, 0, __VA_ARGS__) +#define DT_N_S_smbus2_P_compatible_LEN 1 +#define DT_N_S_smbus2_P_compatible_EXISTS 1 +#define DT_N_S_smbus2_P_dma_coherent 0 +#define DT_N_S_smbus2_P_dma_coherent_EXISTS 1 +#define DT_N_S_smbus2_P_zephyr_deferred_init 0 +#define DT_N_S_smbus2_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_smbus2_P_wakeup_source 0 +#define DT_N_S_smbus2_P_wakeup_source_EXISTS 1 +#define DT_N_S_smbus2_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_smbus2_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/i2c@40007800 + * + * Node identifier: DT_N_S_soc_S_i2c_40007800 + * + * Binding (compatible = st,stm32-i2c-v2): + * $ZEPHYR_BASE/dts/bindings/i2c/st,stm32-i2c-v2.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2c_40007800_PATH "/soc/i2c@40007800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2c_40007800_FULL_NAME "i2c@40007800" +#define DT_N_S_soc_S_i2c_40007800_FULL_NAME_UNQUOTED i2c@40007800 +#define DT_N_S_soc_S_i2c_40007800_FULL_NAME_TOKEN i2c_40007800 +#define DT_N_S_soc_S_i2c_40007800_FULL_NAME_UPPER_TOKEN I2C_40007800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_i2c_40007800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2c_40007800_CHILD_IDX 19 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2c_40007800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2c_40007800_FOREACH_NODELABEL(fn) fn(i2c3) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c3, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2c_40007800_CHILD_NUM 0 +#define DT_N_S_soc_S_i2c_40007800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2c_40007800_HASH GbbgBa6P3TV3qThPSZ3To0sobtbjrvg8BOI2phizbh4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2c_40007800_ORD 25 +#define DT_N_S_soc_S_i2c_40007800_ORD_STR_SORTABLE 00025 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2c_40007800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2c_40007800_SUPPORTS_ORDS \ + 26, /* /smbus3 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2c_40007800_EXISTS 1 +#define DT_N_INST_2_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40007800 +#define DT_N_NODELABEL_i2c3 DT_N_S_soc_S_i2c_40007800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2c_40007800_REG_NUM 1 +#define DT_N_S_soc_S_i2c_40007800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_REG_IDX_0_VAL_ADDRESS 1073772544 /* 0x40007800 */ +#define DT_N_S_soc_S_i2c_40007800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_i2c_40007800_FOREACH_REG(fn) fn(DT_N_S_soc_S_i2c_40007800, 0) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40007800, 0) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40007800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40007800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_RANGES_NUM 0 +#define DT_N_S_soc_S_i2c_40007800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2c_40007800_IRQ_NUM 2 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_VAL_irq 92 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_VAL_irq 93 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2c_40007800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_event_VAL_irq DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_event_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_event_VAL_priority DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_event_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_event_CONTROLLER DT_N_S_soc_S_i2c_40007800_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_error_VAL_irq DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_error_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_error_VAL_priority DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_error_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_IRQ_NAME_error_CONTROLLER DT_N_S_soc_S_i2c_40007800_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_i2c_40007800_COMPAT_MATCHES_st_stm32_i2c_v2 1 +#define DT_N_S_soc_S_i2c_40007800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_i2c_40007800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_COMPAT_MODEL_IDX_0 "stm32-i2c-v2" +#define DT_N_S_soc_S_i2c_40007800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2c_40007800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2c_40007800_P_reg {1073772544 /* 0x40007800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_i2c_40007800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_reg_IDX_0 1073772544 +#define DT_N_S_soc_S_i2c_40007800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_i2c_40007800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts {92 /* 0x5c */, 0 /* 0x0 */, 93 /* 0x5d */, 0 /* 0x0 */} +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_0 92 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_2 93 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_i2c_40007800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_clock_frequency 100000 +#define DT_N_S_soc_S_i2c_40007800_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_sq_size 4 +#define DT_N_S_soc_S_i2c_40007800_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_cq_size 4 +#define DT_N_S_soc_S_i2c_40007800_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_status "disabled" +#define DT_N_S_soc_S_i2c_40007800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_i2c_40007800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_i2c_40007800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2c_40007800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2c_40007800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_i2c_40007800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40007800, status, 0) +#define DT_N_S_soc_S_i2c_40007800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40007800, status, 0) +#define DT_N_S_soc_S_i2c_40007800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40007800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40007800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_status_LEN 1 +#define DT_N_S_soc_S_i2c_40007800_P_status_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_compatible {"st,stm32-i2c-v2"} +#define DT_N_S_soc_S_i2c_40007800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_compatible_IDX_0 "st,stm32-i2c-v2" +#define DT_N_S_soc_S_i2c_40007800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-i2c-v2 +#define DT_N_S_soc_S_i2c_40007800_P_compatible_IDX_0_STRING_TOKEN st_stm32_i2c_v2 +#define DT_N_S_soc_S_i2c_40007800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_I2C_V2 +#define DT_N_S_soc_S_i2c_40007800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40007800, compatible, 0) +#define DT_N_S_soc_S_i2c_40007800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40007800, compatible, 0) +#define DT_N_S_soc_S_i2c_40007800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40007800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40007800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_compatible_LEN 1 +#define DT_N_S_soc_S_i2c_40007800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names {"event", "error"} +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_0 "event" +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_0_STRING_UNQUOTED event +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_0_STRING_TOKEN event +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EVENT +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_1 "error" +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_1_STRING_UNQUOTED error +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_1_STRING_TOKEN error +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN ERROR +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 0) \ + fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 1) +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 1) +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40007800, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_LEN 2 +#define DT_N_S_soc_S_i2c_40007800_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_VAL_bits 1073741824 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_i2c_40007800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_i2c_40007800, clocks, 0, bits) +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40007800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2c_40007800, clocks, 0, bits) +#define DT_N_S_soc_S_i2c_40007800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40007800, clocks, 0) +#define DT_N_S_soc_S_i2c_40007800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40007800, clocks, 0) +#define DT_N_S_soc_S_i2c_40007800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40007800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40007800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40007800_P_clocks_LEN 1 +#define DT_N_S_soc_S_i2c_40007800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_dma_coherent 0 +#define DT_N_S_soc_S_i2c_40007800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2c_40007800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_wakeup_source 0 +#define DT_N_S_soc_S_i2c_40007800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2c_40007800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2c_40007800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /smbus3 + * + * Node identifier: DT_N_S_smbus3 + * + * Binding (compatible = st,stm32-smbus): + * $ZEPHYR_BASE/dts/bindings/smbus/st,stm32-smbus.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_smbus3_PATH "/smbus3" + +/* Node's name with unit-address: */ +#define DT_N_S_smbus3_FULL_NAME "smbus3" +#define DT_N_S_smbus3_FULL_NAME_UNQUOTED smbus3 +#define DT_N_S_smbus3_FULL_NAME_TOKEN smbus3 +#define DT_N_S_smbus3_FULL_NAME_UPPER_TOKEN SMBUS3 + +/* Node parent (/) identifier: */ +#define DT_N_S_smbus3_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_smbus3_CHILD_IDX 12 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_smbus3_NODELABEL_NUM 1 +#define DT_N_S_smbus3_FOREACH_NODELABEL(fn) fn(smbus3) +#define DT_N_S_smbus3_FOREACH_NODELABEL_VARGS(fn, ...) fn(smbus3, __VA_ARGS__) +#define DT_N_S_smbus3_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_smbus3_CHILD_NUM 0 +#define DT_N_S_smbus3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_smbus3_FOREACH_CHILD(fn) +#define DT_N_S_smbus3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_smbus3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_smbus3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_smbus3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_smbus3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_smbus3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_smbus3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_smbus3_HASH ZeVI1g__orT_bhXDEMbeNx9PIwW74xB8lEqisMROKVc + +/* Node's dependency ordinal: */ +#define DT_N_S_smbus3_ORD 26 +#define DT_N_S_smbus3_ORD_STR_SORTABLE 00026 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_smbus3_REQUIRES_ORDS \ + 0, /* / */ \ + 25, /* /soc/i2c@40007800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_smbus3_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_smbus3_EXISTS 1 +#define DT_N_INST_2_st_stm32_smbus DT_N_S_smbus3 +#define DT_N_NODELABEL_smbus3 DT_N_S_smbus3 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_smbus3_REG_NUM 0 +#define DT_N_S_smbus3_FOREACH_REG(fn) +#define DT_N_S_smbus3_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_smbus3_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_smbus3_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_smbus3_RANGES_NUM 0 +#define DT_N_S_smbus3_FOREACH_RANGE(fn) +#define DT_N_S_smbus3_IRQ_NUM 0 +#define DT_N_S_smbus3_IRQ_LEVEL 0 +#define DT_N_S_smbus3_COMPAT_MATCHES_st_stm32_smbus 1 +#define DT_N_S_smbus3_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_smbus3_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_smbus3_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_smbus3_COMPAT_MODEL_IDX_0 "stm32-smbus" +#define DT_N_S_smbus3_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_smbus3_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_smbus3_P_i2c DT_N_S_soc_S_i2c_40007800 +#define DT_N_S_smbus3_P_i2c_IDX_0 DT_N_S_soc_S_i2c_40007800 +#define DT_N_S_smbus3_P_i2c_IDX_0_PH DT_N_S_soc_S_i2c_40007800 +#define DT_N_S_smbus3_P_i2c_IDX_0_EXISTS 1 +#define DT_N_S_smbus3_P_i2c_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus3, i2c, 0) +#define DT_N_S_smbus3_P_i2c_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus3, i2c, 0) +#define DT_N_S_smbus3_P_i2c_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus3, i2c, 0, __VA_ARGS__) +#define DT_N_S_smbus3_P_i2c_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus3, i2c, 0, __VA_ARGS__) +#define DT_N_S_smbus3_P_i2c_LEN 1 +#define DT_N_S_smbus3_P_i2c_EXISTS 1 +#define DT_N_S_smbus3_P_status "disabled" +#define DT_N_S_smbus3_P_status_STRING_UNQUOTED disabled +#define DT_N_S_smbus3_P_status_STRING_TOKEN disabled +#define DT_N_S_smbus3_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_smbus3_P_status_IDX_0 "disabled" +#define DT_N_S_smbus3_P_status_IDX_0_EXISTS 1 +#define DT_N_S_smbus3_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_smbus3_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_smbus3_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_smbus3_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus3, status, 0) +#define DT_N_S_smbus3_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus3, status, 0) +#define DT_N_S_smbus3_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus3, status, 0, __VA_ARGS__) +#define DT_N_S_smbus3_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus3, status, 0, __VA_ARGS__) +#define DT_N_S_smbus3_P_status_LEN 1 +#define DT_N_S_smbus3_P_status_EXISTS 1 +#define DT_N_S_smbus3_P_compatible {"st,stm32-smbus"} +#define DT_N_S_smbus3_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_smbus3_P_compatible_IDX_0 "st,stm32-smbus" +#define DT_N_S_smbus3_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-smbus +#define DT_N_S_smbus3_P_compatible_IDX_0_STRING_TOKEN st_stm32_smbus +#define DT_N_S_smbus3_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SMBUS +#define DT_N_S_smbus3_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_smbus3, compatible, 0) +#define DT_N_S_smbus3_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_smbus3, compatible, 0) +#define DT_N_S_smbus3_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_smbus3, compatible, 0, __VA_ARGS__) +#define DT_N_S_smbus3_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_smbus3, compatible, 0, __VA_ARGS__) +#define DT_N_S_smbus3_P_compatible_LEN 1 +#define DT_N_S_smbus3_P_compatible_EXISTS 1 +#define DT_N_S_smbus3_P_dma_coherent 0 +#define DT_N_S_smbus3_P_dma_coherent_EXISTS 1 +#define DT_N_S_smbus3_P_zephyr_deferred_init 0 +#define DT_N_S_smbus3_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_smbus3_P_wakeup_source 0 +#define DT_N_S_smbus3_P_wakeup_source_EXISTS 1 +#define DT_N_S_smbus3_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_smbus3_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /st-morpho-header + * + * Node identifier: DT_N_S_st_morpho_header + * + * Binding (compatible = st-morpho-header): + * $ZEPHYR_BASE/dts/bindings/gpio/st-morpho-header.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_st_morpho_header_PATH "/st-morpho-header" + +/* Node's name with unit-address: */ +#define DT_N_S_st_morpho_header_FULL_NAME "st-morpho-header" +#define DT_N_S_st_morpho_header_FULL_NAME_UNQUOTED st-morpho-header +#define DT_N_S_st_morpho_header_FULL_NAME_TOKEN st_morpho_header +#define DT_N_S_st_morpho_header_FULL_NAME_UPPER_TOKEN ST_MORPHO_HEADER + +/* Node parent (/) identifier: */ +#define DT_N_S_st_morpho_header_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_st_morpho_header_CHILD_IDX 14 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_st_morpho_header_NODELABEL_NUM 1 +#define DT_N_S_st_morpho_header_FOREACH_NODELABEL(fn) fn(st_morpho_header) +#define DT_N_S_st_morpho_header_FOREACH_NODELABEL_VARGS(fn, ...) fn(st_morpho_header, __VA_ARGS__) +#define DT_N_S_st_morpho_header_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_st_morpho_header_CHILD_NUM 0 +#define DT_N_S_st_morpho_header_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_st_morpho_header_FOREACH_CHILD(fn) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_st_morpho_header_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_st_morpho_header_HASH C6Ew8HpPaWbuNGwIwt5R8f6EkxnSDJUUmS562ynELt8 + +/* Node's dependency ordinal: */ +#define DT_N_S_st_morpho_header_ORD 27 +#define DT_N_S_st_morpho_header_ORD_STR_SORTABLE 00027 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_st_morpho_header_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_st_morpho_header_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_st_morpho_header_EXISTS 1 +#define DT_N_INST_0_st_morpho_header DT_N_S_st_morpho_header +#define DT_N_NODELABEL_st_morpho_header DT_N_S_st_morpho_header + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_st_morpho_header_REG_NUM 0 +#define DT_N_S_st_morpho_header_FOREACH_REG(fn) +#define DT_N_S_st_morpho_header_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_st_morpho_header_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_st_morpho_header_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_st_morpho_header_RANGES_NUM 0 +#define DT_N_S_st_morpho_header_FOREACH_RANGE(fn) +#define DT_N_S_st_morpho_header_IRQ_NUM 0 +#define DT_N_S_st_morpho_header_IRQ_LEVEL 0 +#define DT_N_S_st_morpho_header_COMPAT_MATCHES_st_morpho_header 1 +#define DT_N_S_st_morpho_header_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_st_morpho_header_PINCTRL_NUM 0 + +/* Map properties: */ +#define DT_N_S_st_morpho_header_P_gpio_map_LEN 51 +#define DT_N_S_st_morpho_header_P_gpio_map_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_0 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_0 10 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_0_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_0 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_0 11 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_1_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_0 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_0 12 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_2_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_0 3 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_0 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_3_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_0 12 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_0 13 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_4_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_0 14 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_0 14 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_5_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_0 16 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_0 15 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_6_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_0 20 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_0 7 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_7_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_0 22 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_0 13 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_8_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_0 24 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_0 14 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_9_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_0 26 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_0 15 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_10_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_0 27 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_11_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_0 28 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_12_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_0 29 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_0 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_13_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_0 30 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_0 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_14_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_0 31 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_0 4 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_15_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_0 33 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_16_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_0 34 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_0 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_17_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_0 35 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_0 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_18_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_0 36 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_0 3 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_19_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_0 37 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_0 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_20_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_0 72 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_0 9 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_21_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_CHILD_SPECIFIER_IDX_0 73 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT_SPECIFIER_IDX_0 8 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_22_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_CHILD_SPECIFIER_IDX_0 74 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT_SPECIFIER_IDX_0 8 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_23_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_CHILD_SPECIFIER_IDX_0 75 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT_SPECIFIER_IDX_0 6 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_24_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_CHILD_SPECIFIER_IDX_0 76 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT_SPECIFIER_IDX_0 9 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_25_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_CHILD_SPECIFIER_IDX_0 77 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT_SPECIFIER_IDX_0 5 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_26_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_CHILD_SPECIFIER_IDX_0 82 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT_SPECIFIER_IDX_0 13 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_27_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_CHILD_SPECIFIER_IDX_0 83 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT_SPECIFIER_IDX_0 12 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_28_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_CHILD_SPECIFIER_IDX_0 84 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT_SPECIFIER_IDX_0 14 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_29_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_CHILD_SPECIFIER_IDX_0 85 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT_SPECIFIER_IDX_0 11 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_30_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_CHILD_SPECIFIER_IDX_0 86 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT_SPECIFIER_IDX_0 15 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_31_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_CHILD_SPECIFIER_IDX_0 87 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT_SPECIFIER_IDX_0 12 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_32_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_CHILD_SPECIFIER_IDX_0 88 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT_SPECIFIER_IDX_0 6 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_33_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_CHILD_SPECIFIER_IDX_0 89 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT_SPECIFIER_IDX_0 11 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_34_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_CHILD_SPECIFIER_IDX_0 90 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT_SPECIFIER_IDX_0 7 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_35_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_CHILD_SPECIFIER_IDX_0 92 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT_SPECIFIER_IDX_0 9 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_36_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_CHILD_SPECIFIER_IDX_0 93 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT_SPECIFIER_IDX_0 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_37_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_CHILD_SPECIFIER_IDX_0 94 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT_SPECIFIER_IDX_0 8 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_38_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_CHILD_SPECIFIER_IDX_0 95 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT_SPECIFIER_IDX_0 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_39_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_CHILD_SPECIFIER_IDX_0 96 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT_SPECIFIER_IDX_0 10 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_40_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_CHILD_SPECIFIER_IDX_0 97 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT_SPECIFIER_IDX_0 7 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_41_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_CHILD_SPECIFIER_IDX_0 98 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT_SPECIFIER_IDX_0 4 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_42_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_CHILD_SPECIFIER_IDX_0 99 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT_SPECIFIER_IDX_0 6 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_43_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_CHILD_SPECIFIER_IDX_0 100 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT_SPECIFIER_IDX_0 5 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_44_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_CHILD_SPECIFIER_IDX_0 101 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT_SPECIFIER_IDX_0 5 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_45_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_CHILD_SPECIFIER_IDX_0 102 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT_SPECIFIER_IDX_0 3 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_46_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_CHILD_SPECIFIER_IDX_0 104 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT_SPECIFIER_IDX_0 10 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_47_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_CHILD_SPECIFIER_IDX_0 105 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT_SPECIFIER_IDX_0 4 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_48_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_CHILD_SPECIFIER_IDX_0 106 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT_SPECIFIER_IDX_0 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_49_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_CHILD_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_CHILD_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_CHILD_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_CHILD_SPECIFIER_IDX_0 108 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_CHILD_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_CHILD_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT_ADDRESS_LEN 0 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT_SPECIFIER_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT_SPECIFIER_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT_SPECIFIER_IDX_0 3 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT_SPECIFIER_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_MAP_ENTRY_50_PARENT_SPECIFIER_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_FOREACH_MAP_ENTRY(fn) fn(DT_N_S_st_morpho_header, gpio_map, 0) \ + fn(DT_N_S_st_morpho_header, gpio_map, 1) \ + fn(DT_N_S_st_morpho_header, gpio_map, 2) \ + fn(DT_N_S_st_morpho_header, gpio_map, 3) \ + fn(DT_N_S_st_morpho_header, gpio_map, 4) \ + fn(DT_N_S_st_morpho_header, gpio_map, 5) \ + fn(DT_N_S_st_morpho_header, gpio_map, 6) \ + fn(DT_N_S_st_morpho_header, gpio_map, 7) \ + fn(DT_N_S_st_morpho_header, gpio_map, 8) \ + fn(DT_N_S_st_morpho_header, gpio_map, 9) \ + fn(DT_N_S_st_morpho_header, gpio_map, 10) \ + fn(DT_N_S_st_morpho_header, gpio_map, 11) \ + fn(DT_N_S_st_morpho_header, gpio_map, 12) \ + fn(DT_N_S_st_morpho_header, gpio_map, 13) \ + fn(DT_N_S_st_morpho_header, gpio_map, 14) \ + fn(DT_N_S_st_morpho_header, gpio_map, 15) \ + fn(DT_N_S_st_morpho_header, gpio_map, 16) \ + fn(DT_N_S_st_morpho_header, gpio_map, 17) \ + fn(DT_N_S_st_morpho_header, gpio_map, 18) \ + fn(DT_N_S_st_morpho_header, gpio_map, 19) \ + fn(DT_N_S_st_morpho_header, gpio_map, 20) \ + fn(DT_N_S_st_morpho_header, gpio_map, 21) \ + fn(DT_N_S_st_morpho_header, gpio_map, 22) \ + fn(DT_N_S_st_morpho_header, gpio_map, 23) \ + fn(DT_N_S_st_morpho_header, gpio_map, 24) \ + fn(DT_N_S_st_morpho_header, gpio_map, 25) \ + fn(DT_N_S_st_morpho_header, gpio_map, 26) \ + fn(DT_N_S_st_morpho_header, gpio_map, 27) \ + fn(DT_N_S_st_morpho_header, gpio_map, 28) \ + fn(DT_N_S_st_morpho_header, gpio_map, 29) \ + fn(DT_N_S_st_morpho_header, gpio_map, 30) \ + fn(DT_N_S_st_morpho_header, gpio_map, 31) \ + fn(DT_N_S_st_morpho_header, gpio_map, 32) \ + fn(DT_N_S_st_morpho_header, gpio_map, 33) \ + fn(DT_N_S_st_morpho_header, gpio_map, 34) \ + fn(DT_N_S_st_morpho_header, gpio_map, 35) \ + fn(DT_N_S_st_morpho_header, gpio_map, 36) \ + fn(DT_N_S_st_morpho_header, gpio_map, 37) \ + fn(DT_N_S_st_morpho_header, gpio_map, 38) \ + fn(DT_N_S_st_morpho_header, gpio_map, 39) \ + fn(DT_N_S_st_morpho_header, gpio_map, 40) \ + fn(DT_N_S_st_morpho_header, gpio_map, 41) \ + fn(DT_N_S_st_morpho_header, gpio_map, 42) \ + fn(DT_N_S_st_morpho_header, gpio_map, 43) \ + fn(DT_N_S_st_morpho_header, gpio_map, 44) \ + fn(DT_N_S_st_morpho_header, gpio_map, 45) \ + fn(DT_N_S_st_morpho_header, gpio_map, 46) \ + fn(DT_N_S_st_morpho_header, gpio_map, 47) \ + fn(DT_N_S_st_morpho_header, gpio_map, 48) \ + fn(DT_N_S_st_morpho_header, gpio_map, 49) \ + fn(DT_N_S_st_morpho_header, gpio_map, 50) +#define DT_N_S_st_morpho_header_P_gpio_map_FOREACH_MAP_ENTRY_SEP(fn, sep) fn(DT_N_S_st_morpho_header, gpio_map, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 11) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 12) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 13) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 14) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 15) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 16) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 17) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 18) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 19) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 20) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 21) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 22) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 23) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 24) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 25) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 26) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 27) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 28) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 29) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 30) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 31) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 32) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 33) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 34) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 35) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 36) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 37) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 38) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 39) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 40) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 41) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 42) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 43) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 44) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 45) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 46) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 47) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 48) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 49) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 50) +#define DT_N_S_st_morpho_header_P_gpio_map_FOREACH_MAP_ENTRY_VARGS(fn, ...) fn(DT_N_S_st_morpho_header, gpio_map, 0, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 1, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 2, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 3, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 4, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 5, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 6, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 7, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 8, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 9, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 10, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 11, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 12, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 13, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 14, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 15, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 16, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 17, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 18, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 19, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 20, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 21, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 22, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 23, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 24, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 25, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 26, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 27, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 28, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 29, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 30, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 31, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 32, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 33, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 34, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 35, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 36, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 37, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 38, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 39, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 40, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 41, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 42, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 43, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 44, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 45, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 46, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 47, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 48, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 49, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map, 50, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_gpio_map_FOREACH_MAP_ENTRY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_st_morpho_header, gpio_map, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 16, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 17, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 19, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 20, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 21, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 22, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 23, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 24, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 25, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 26, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 27, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 28, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 29, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 30, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 31, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 32, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 33, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 34, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 35, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 36, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 37, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 38, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 39, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 40, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 41, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 42, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 43, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 44, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 45, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 46, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 47, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 48, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 49, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map, 50, __VA_ARGS__) + +/* Generic property macros: */ +#define DT_N_S_st_morpho_header_P_gpio_map_mask {255 /* 0xff */, 0 /* 0x0 */} +#define DT_N_S_st_morpho_header_P_gpio_map_mask_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_mask_IDX_0 255 +#define DT_N_S_st_morpho_header_P_gpio_map_mask_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_mask_IDX_1 0 +#define DT_N_S_st_morpho_header_P_gpio_map_mask_FOREACH_PROP_ELEM(fn) fn(DT_N_S_st_morpho_header, gpio_map_mask, 0) \ + fn(DT_N_S_st_morpho_header, gpio_map_mask, 1) +#define DT_N_S_st_morpho_header_P_gpio_map_mask_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_st_morpho_header, gpio_map_mask, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map_mask, 1) +#define DT_N_S_st_morpho_header_P_gpio_map_mask_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_st_morpho_header, gpio_map_mask, 0, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map_mask, 1, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_gpio_map_mask_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_st_morpho_header, gpio_map_mask, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map_mask, 1, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_gpio_map_mask_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_mask_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru {0 /* 0x0 */, 127 /* 0x7f */} +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_IDX_0 0 +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_IDX_1_EXISTS 1 +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_IDX_1 127 +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_FOREACH_PROP_ELEM(fn) fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 0) \ + fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 1) +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 1) +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 0, __VA_ARGS__) \ + fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 1, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_st_morpho_header, gpio_map_pass_thru, 1, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_LEN 2 +#define DT_N_S_st_morpho_header_P_gpio_map_pass_thru_EXISTS 1 +#define DT_N_S_st_morpho_header_P_compatible {"st-morpho-header"} +#define DT_N_S_st_morpho_header_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_st_morpho_header_P_compatible_IDX_0 "st-morpho-header" +#define DT_N_S_st_morpho_header_P_compatible_IDX_0_STRING_UNQUOTED st-morpho-header +#define DT_N_S_st_morpho_header_P_compatible_IDX_0_STRING_TOKEN st_morpho_header +#define DT_N_S_st_morpho_header_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_MORPHO_HEADER +#define DT_N_S_st_morpho_header_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_st_morpho_header, compatible, 0) +#define DT_N_S_st_morpho_header_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_st_morpho_header, compatible, 0) +#define DT_N_S_st_morpho_header_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_st_morpho_header, compatible, 0, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_st_morpho_header, compatible, 0, __VA_ARGS__) +#define DT_N_S_st_morpho_header_P_compatible_LEN 1 +#define DT_N_S_st_morpho_header_P_compatible_EXISTS 1 +#define DT_N_S_st_morpho_header_P_dma_coherent 0 +#define DT_N_S_st_morpho_header_P_dma_coherent_EXISTS 1 +#define DT_N_S_st_morpho_header_P_zephyr_deferred_init 0 +#define DT_N_S_st_morpho_header_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_st_morpho_header_P_wakeup_source 0 +#define DT_N_S_st_morpho_header_P_wakeup_source_EXISTS 1 +#define DT_N_S_st_morpho_header_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_st_morpho_header_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /vbat + * + * Node identifier: DT_N_S_vbat + * + * Binding (compatible = st,stm32-vbat): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-vbat.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_vbat_PATH "/vbat" + +/* Node's name with unit-address: */ +#define DT_N_S_vbat_FULL_NAME "vbat" +#define DT_N_S_vbat_FULL_NAME_UNQUOTED vbat +#define DT_N_S_vbat_FULL_NAME_TOKEN vbat +#define DT_N_S_vbat_FULL_NAME_UPPER_TOKEN VBAT + +/* Node parent (/) identifier: */ +#define DT_N_S_vbat_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_vbat_CHILD_IDX 8 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_vbat_NODELABEL_NUM 1 +#define DT_N_S_vbat_FOREACH_NODELABEL(fn) fn(vbat) +#define DT_N_S_vbat_FOREACH_NODELABEL_VARGS(fn, ...) fn(vbat, __VA_ARGS__) +#define DT_N_S_vbat_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_vbat_CHILD_NUM 0 +#define DT_N_S_vbat_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_vbat_FOREACH_CHILD(fn) +#define DT_N_S_vbat_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_vbat_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_vbat_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_vbat_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_vbat_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_vbat_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_vbat_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_vbat_HASH 6jTjjWCiokAcWwHDg9DIiUBaK7_R_tkCJ6unpENFBIY + +/* Node's dependency ordinal: */ +#define DT_N_S_vbat_ORD 28 +#define DT_N_S_vbat_ORD_STR_SORTABLE 00028 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_vbat_REQUIRES_ORDS \ + 0, /* / */ \ + 10, /* /soc/adc@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_vbat_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_vbat_EXISTS 1 +#define DT_N_INST_0_st_stm32_vbat DT_N_S_vbat +#define DT_N_NODELABEL_vbat DT_N_S_vbat + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_vbat_REG_NUM 0 +#define DT_N_S_vbat_FOREACH_REG(fn) +#define DT_N_S_vbat_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_vbat_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_vbat_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_vbat_RANGES_NUM 0 +#define DT_N_S_vbat_FOREACH_RANGE(fn) +#define DT_N_S_vbat_IRQ_NUM 0 +#define DT_N_S_vbat_IRQ_LEVEL 0 +#define DT_N_S_vbat_COMPAT_MATCHES_st_stm32_vbat 1 +#define DT_N_S_vbat_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_vbat_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_vbat_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_vbat_COMPAT_MODEL_IDX_0 "stm32-vbat" +#define DT_N_S_vbat_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_vbat_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_vbat_P_io_channels_IDX_0_EXISTS 1 +#define DT_N_S_vbat_P_io_channels_IDX_0_PH DT_N_S_soc_S_adc_50000000 +#define DT_N_S_vbat_P_io_channels_IDX_0_VAL_input 17 +#define DT_N_S_vbat_P_io_channels_IDX_0_VAL_input_EXISTS 1 +#define DT_N_S_vbat_P_io_channels_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_vbat, io_channels, 0, input) +#define DT_N_S_vbat_P_io_channels_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_vbat, io_channels, 0, input) +#define DT_N_S_vbat_P_io_channels_IDX_0_NUM_CELLS 1 +#define DT_N_S_vbat_P_io_channels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vbat, io_channels, 0) +#define DT_N_S_vbat_P_io_channels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vbat, io_channels, 0) +#define DT_N_S_vbat_P_io_channels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vbat, io_channels, 0, __VA_ARGS__) +#define DT_N_S_vbat_P_io_channels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vbat, io_channels, 0, __VA_ARGS__) +#define DT_N_S_vbat_P_io_channels_LEN 1 +#define DT_N_S_vbat_P_io_channels_EXISTS 1 +#define DT_N_S_vbat_P_ratio 3 +#define DT_N_S_vbat_P_ratio_EXISTS 1 +#define DT_N_S_vbat_P_status "disabled" +#define DT_N_S_vbat_P_status_STRING_UNQUOTED disabled +#define DT_N_S_vbat_P_status_STRING_TOKEN disabled +#define DT_N_S_vbat_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_vbat_P_status_IDX_0 "disabled" +#define DT_N_S_vbat_P_status_IDX_0_EXISTS 1 +#define DT_N_S_vbat_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_vbat_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_vbat_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_vbat_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vbat, status, 0) +#define DT_N_S_vbat_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vbat, status, 0) +#define DT_N_S_vbat_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vbat, status, 0, __VA_ARGS__) +#define DT_N_S_vbat_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vbat, status, 0, __VA_ARGS__) +#define DT_N_S_vbat_P_status_LEN 1 +#define DT_N_S_vbat_P_status_EXISTS 1 +#define DT_N_S_vbat_P_compatible {"st,stm32-vbat"} +#define DT_N_S_vbat_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_vbat_P_compatible_IDX_0 "st,stm32-vbat" +#define DT_N_S_vbat_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-vbat +#define DT_N_S_vbat_P_compatible_IDX_0_STRING_TOKEN st_stm32_vbat +#define DT_N_S_vbat_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_VBAT +#define DT_N_S_vbat_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vbat, compatible, 0) +#define DT_N_S_vbat_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vbat, compatible, 0) +#define DT_N_S_vbat_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vbat, compatible, 0, __VA_ARGS__) +#define DT_N_S_vbat_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vbat, compatible, 0, __VA_ARGS__) +#define DT_N_S_vbat_P_compatible_LEN 1 +#define DT_N_S_vbat_P_compatible_EXISTS 1 +#define DT_N_S_vbat_P_dma_coherent 0 +#define DT_N_S_vbat_P_dma_coherent_EXISTS 1 +#define DT_N_S_vbat_P_zephyr_deferred_init 0 +#define DT_N_S_vbat_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_vbat_P_wakeup_source 0 +#define DT_N_S_vbat_P_wakeup_source_EXISTS 1 +#define DT_N_S_vbat_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_vbat_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_PATH "/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FULL_NAME "vrefint@aa" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FULL_NAME_UNQUOTED vrefint@aa +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FULL_NAME_TOKEN vrefint_aa +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FULL_NAME_UPPER_TOKEN VREFINT_AA + +/* Node parent (/soc/flash-controller@40022000/flash@1fff7500/nvmem-layout) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_NODELABEL(fn) fn(vrefint_otp) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_NODELABEL_VARGS(fn, ...) fn(vrefint_otp, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_HASH 15kzbjjp0xPhu39T9qirILipraivWl7Fqkx42ZFtMwU + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_ORD 29 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_ORD_STR_SORTABLE 00029 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_REQUIRES_ORDS \ + 13, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_SUPPORTS_ORDS \ + 30, /* /vref */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_EXISTS 1 +#define DT_N_NODELABEL_vrefint_otp DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_REG_IDX_0_VAL_ADDRESS 170 /* 0xaa */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_REG_IDX_0_VAL_SIZE 2 /* 0x2 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_reg {170 /* 0xaa */, 2 /* 0x2 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_reg_IDX_0 170 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_reg_IDX_1 2 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_read_only 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa_P_read_only_EXISTS 1 + +/* + * Devicetree node: /vref + * + * Node identifier: DT_N_S_vref + * + * Binding (compatible = st,stm32-vref): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-vref.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_vref_PATH "/vref" + +/* Node's name with unit-address: */ +#define DT_N_S_vref_FULL_NAME "vref" +#define DT_N_S_vref_FULL_NAME_UNQUOTED vref +#define DT_N_S_vref_FULL_NAME_TOKEN vref +#define DT_N_S_vref_FULL_NAME_UPPER_TOKEN VREF + +/* Node parent (/) identifier: */ +#define DT_N_S_vref_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_vref_CHILD_IDX 7 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_vref_NODELABEL_NUM 1 +#define DT_N_S_vref_FOREACH_NODELABEL(fn) fn(vref) +#define DT_N_S_vref_FOREACH_NODELABEL_VARGS(fn, ...) fn(vref, __VA_ARGS__) +#define DT_N_S_vref_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_vref_CHILD_NUM 0 +#define DT_N_S_vref_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_vref_FOREACH_CHILD(fn) +#define DT_N_S_vref_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_vref_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_vref_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_vref_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_vref_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_vref_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_vref_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_vref_HASH _KQ_hQT8vlL_HGgSo8B0PN_M_dmG5lMZ2C1aGmWYFog + +/* Node's dependency ordinal: */ +#define DT_N_S_vref_ORD 30 +#define DT_N_S_vref_ORD_STR_SORTABLE 00030 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_vref_REQUIRES_ORDS \ + 0, /* / */ \ + 10, /* /soc/adc@50000000 */ \ + 29, /* /soc/flash-controller@40022000/flash@1fff7500/nvmem-layout/vrefint@aa */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_vref_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_vref_EXISTS 1 +#define DT_N_INST_0_st_stm32_vref DT_N_S_vref +#define DT_N_NODELABEL_vref DT_N_S_vref + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_vref_REG_NUM 0 +#define DT_N_S_vref_FOREACH_REG(fn) +#define DT_N_S_vref_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_vref_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_vref_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_vref_RANGES_NUM 0 +#define DT_N_S_vref_FOREACH_RANGE(fn) +#define DT_N_S_vref_IRQ_NUM 0 +#define DT_N_S_vref_IRQ_LEVEL 0 +#define DT_N_S_vref_COMPAT_MATCHES_st_stm32_vref 1 +#define DT_N_S_vref_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_vref_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_vref_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_vref_COMPAT_MODEL_IDX_0 "stm32-vref" +#define DT_N_S_vref_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_vref_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_vref_P_nvmem_cells_IDX_0_EXISTS 1 +#define DT_N_S_vref_P_nvmem_cells_IDX_0_PH DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa +#define DT_N_S_vref_P_nvmem_cells_IDX_0_FOREACH_CELL(fn) +#define DT_N_S_vref_P_nvmem_cells_IDX_0_FOREACH_CELL_SEP(fn, sep) +#define DT_N_S_vref_P_nvmem_cells_IDX_0_NUM_CELLS 0 +#define DT_N_S_vref_P_nvmem_cells_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vref, nvmem_cells, 0) +#define DT_N_S_vref_P_nvmem_cells_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vref, nvmem_cells, 0) +#define DT_N_S_vref_P_nvmem_cells_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vref, nvmem_cells, 0, __VA_ARGS__) +#define DT_N_S_vref_P_nvmem_cells_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vref, nvmem_cells, 0, __VA_ARGS__) +#define DT_N_S_vref_P_nvmem_cells_LEN 1 +#define DT_N_S_vref_P_nvmem_cells_EXISTS 1 +#define DT_N_S_vref_P_vrefint_cal_mv 3000 +#define DT_N_S_vref_P_vrefint_cal_mv_EXISTS 1 +#define DT_N_S_vref_P_vrefint_cal_resolution 12 +#define DT_N_S_vref_P_vrefint_cal_resolution_IDX_0_ENUM_IDX 0 +#define DT_N_S_vref_P_vrefint_cal_resolution_IDX_0_EXISTS 1 +#define DT_N_S_vref_P_vrefint_cal_resolution_IDX_0_ENUM_VAL_12_EXISTS 1 +#define DT_N_S_vref_P_vrefint_cal_resolution_ENUM_VAL_12_EXISTS 1 +#define DT_N_S_vref_P_vrefint_cal_resolution_EXISTS 1 +#define DT_N_S_vref_P_status "disabled" +#define DT_N_S_vref_P_status_STRING_UNQUOTED disabled +#define DT_N_S_vref_P_status_STRING_TOKEN disabled +#define DT_N_S_vref_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_vref_P_status_IDX_0 "disabled" +#define DT_N_S_vref_P_status_IDX_0_EXISTS 1 +#define DT_N_S_vref_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_vref_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_vref_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_vref_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vref, status, 0) +#define DT_N_S_vref_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vref, status, 0) +#define DT_N_S_vref_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vref, status, 0, __VA_ARGS__) +#define DT_N_S_vref_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vref, status, 0, __VA_ARGS__) +#define DT_N_S_vref_P_status_LEN 1 +#define DT_N_S_vref_P_status_EXISTS 1 +#define DT_N_S_vref_P_compatible {"st,stm32-vref"} +#define DT_N_S_vref_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_vref_P_compatible_IDX_0 "st,stm32-vref" +#define DT_N_S_vref_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-vref +#define DT_N_S_vref_P_compatible_IDX_0_STRING_TOKEN st_stm32_vref +#define DT_N_S_vref_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_VREF +#define DT_N_S_vref_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vref, compatible, 0) +#define DT_N_S_vref_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vref, compatible, 0) +#define DT_N_S_vref_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vref, compatible, 0, __VA_ARGS__) +#define DT_N_S_vref_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vref, compatible, 0, __VA_ARGS__) +#define DT_N_S_vref_P_compatible_LEN 1 +#define DT_N_S_vref_P_compatible_EXISTS 1 +#define DT_N_S_vref_P_dma_coherent 0 +#define DT_N_S_vref_P_dma_coherent_EXISTS 1 +#define DT_N_S_vref_P_io_channels_IDX_0_EXISTS 1 +#define DT_N_S_vref_P_io_channels_IDX_0_PH DT_N_S_soc_S_adc_50000000 +#define DT_N_S_vref_P_io_channels_IDX_0_VAL_input 18 +#define DT_N_S_vref_P_io_channels_IDX_0_VAL_input_EXISTS 1 +#define DT_N_S_vref_P_io_channels_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_vref, io_channels, 0, input) +#define DT_N_S_vref_P_io_channels_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_vref, io_channels, 0, input) +#define DT_N_S_vref_P_io_channels_IDX_0_NUM_CELLS 1 +#define DT_N_S_vref_P_io_channels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vref, io_channels, 0) +#define DT_N_S_vref_P_io_channels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vref, io_channels, 0) +#define DT_N_S_vref_P_io_channels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vref, io_channels, 0, __VA_ARGS__) +#define DT_N_S_vref_P_io_channels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vref, io_channels, 0, __VA_ARGS__) +#define DT_N_S_vref_P_io_channels_LEN 1 +#define DT_N_S_vref_P_io_channels_EXISTS 1 +#define DT_N_S_vref_P_zephyr_deferred_init 0 +#define DT_N_S_vref_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_vref_P_wakeup_source 0 +#define DT_N_S_vref_P_wakeup_source_EXISTS 1 +#define DT_N_S_vref_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_vref_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-hsi + * + * Node identifier: DT_N_S_clocks_S_clk_hsi + * + * Binding (compatible = fixed-clock): + * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_hsi_PATH "/clocks/clk-hsi" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME "clk-hsi" +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_UNQUOTED clk-hsi +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_TOKEN clk_hsi +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_UPPER_TOKEN CLK_HSI + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_hsi_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_hsi_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_hsi_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_NODELABEL(fn) fn(clk_hsi) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hsi, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_hsi_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_hsi_HASH kE6dGnI__HuixEc_o2mPIojHDSoRqqYmExJJycW6WDM + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_hsi_ORD 31 +#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00031 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_hsi_REQUIRES_ORDS \ + 6, /* /clocks */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_hsi_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_hsi_EXISTS 1 +#define DT_N_INST_2_fixed_clock DT_N_S_clocks_S_clk_hsi +#define DT_N_NODELABEL_clk_hsi DT_N_S_clocks_S_clk_hsi + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_hsi_REG_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_REG(fn) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hsi_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_hsi_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_hsi_COMPAT_MATCHES_fixed_clock 1 +#define DT_N_S_clocks_S_clk_hsi_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_hsi_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_hsi_P_clock_frequency 16000000 +#define DT_N_S_clocks_S_clk_hsi_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status "disabled" +#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_UNQUOTED disabled +#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_TOKEN disabled +#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0 "disabled" +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi, status, 0) +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi, status, 0) +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_compatible {"fixed-clock"} +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0 "fixed-clock" +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_TOKEN fixed_clock +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_hsi_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_dma_coherent 0 +#define DT_N_S_clocks_S_clk_hsi_P_dma_coherent_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_hsi_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-hsi48 + * + * Node identifier: DT_N_S_clocks_S_clk_hsi48 + * + * Binding (compatible = fixed-clock): + * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_hsi48_PATH "/clocks/clk-hsi48" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME "clk-hsi48" +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_UNQUOTED clk-hsi48 +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_TOKEN clk_hsi48 +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_UPPER_TOKEN CLK_HSI48 + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_hsi48_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_hsi48_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_hsi48_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_NODELABEL(fn) fn(clk_hsi48) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hsi48, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_hsi48_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_hsi48_HASH m4q2NUiXYm_f1RVl9VGtz8iGJxJSrtVw_lCXFQUVjsw + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_hsi48_ORD 32 +#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00032 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_hsi48_REQUIRES_ORDS \ + 6, /* /clocks */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_hsi48_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_hsi48_EXISTS 1 +#define DT_N_INST_0_fixed_clock DT_N_S_clocks_S_clk_hsi48 +#define DT_N_NODELABEL_clk_hsi48 DT_N_S_clocks_S_clk_hsi48 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_hsi48_REG_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_REG(fn) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hsi48_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_hsi48_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_hsi48_COMPAT_MATCHES_fixed_clock 1 +#define DT_N_S_clocks_S_clk_hsi48_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_hsi48_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_hsi48_P_clock_frequency 48000000 +#define DT_N_S_clocks_S_clk_hsi48_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status "okay" +#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi48, status, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi48, status, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi48, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_compatible {"fixed-clock"} +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0 "fixed-clock" +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_TOKEN fixed_clock +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_dma_coherent 0 +#define DT_N_S_clocks_S_clk_hsi48_P_dma_coherent_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_hsi48_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-lse + * + * Node identifier: DT_N_S_clocks_S_clk_lse + * + * Binding (compatible = st,stm32-lse-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-lse-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_lse_PATH "/clocks/clk-lse" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_lse_FULL_NAME "clk-lse" +#define DT_N_S_clocks_S_clk_lse_FULL_NAME_UNQUOTED clk-lse +#define DT_N_S_clocks_S_clk_lse_FULL_NAME_TOKEN clk_lse +#define DT_N_S_clocks_S_clk_lse_FULL_NAME_UPPER_TOKEN CLK_LSE + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_lse_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_lse_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_lse_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_lse_FOREACH_NODELABEL(fn) fn(clk_lse) +#define DT_N_S_clocks_S_clk_lse_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_lse, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_lse_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_lse_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_lse_HASH RRqOX2XdydrKvwOwHO0Kh3mPfPtUsDJrDySCwF316Ek + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_lse_ORD 33 +#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00033 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_lse_REQUIRES_ORDS \ + 6, /* /clocks */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_lse_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_lse_EXISTS 1 +#define DT_N_INST_0_st_stm32_lse_clock DT_N_S_clocks_S_clk_lse +#define DT_N_NODELABEL_clk_lse DT_N_S_clocks_S_clk_lse + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_lse_REG_NUM 0 +#define DT_N_S_clocks_S_clk_lse_FOREACH_REG(fn) +#define DT_N_S_clocks_S_clk_lse_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lse_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_lse_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_lse_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_lse_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_lse_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_lse_COMPAT_MATCHES_st_stm32_lse_clock 1 +#define DT_N_S_clocks_S_clk_lse_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_clk_lse_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_COMPAT_MODEL_IDX_0 "stm32-lse-clock" +#define DT_N_S_clocks_S_clk_lse_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_lse_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_lse_P_driving_capability 0 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_lse_bypass 0 +#define DT_N_S_clocks_S_clk_lse_P_lse_bypass_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_clock_frequency 32768 +#define DT_N_S_clocks_S_clk_lse_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status "okay" +#define DT_N_S_clocks_S_clk_lse_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_lse_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_lse_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lse, status, 0) +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lse, status, 0) +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lse, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lse, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_lse_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_compatible {"st,stm32-lse-clock"} +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0 "st,stm32-lse-clock" +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lse-clock +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_TOKEN st_stm32_lse_clock +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LSE_CLOCK +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lse, compatible, 0) +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lse, compatible, 0) +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lse, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lse, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_lse_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_dma_coherent 0 +#define DT_N_S_clocks_S_clk_lse_P_dma_coherent_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_lse_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-lsi + * + * Node identifier: DT_N_S_clocks_S_clk_lsi + * + * Binding (compatible = fixed-clock): + * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_lsi_PATH "/clocks/clk-lsi" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME "clk-lsi" +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_UNQUOTED clk-lsi +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_TOKEN clk_lsi +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_UPPER_TOKEN CLK_LSI + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_lsi_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_lsi_CHILD_IDX 4 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_lsi_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_NODELABEL(fn) fn(clk_lsi) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_lsi, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_lsi_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_lsi_HASH y39tlAqwOoFHfznEDn2ZnvWSfYGNtJJvOJBnTUmFguY + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_lsi_ORD 34 +#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00034 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_lsi_REQUIRES_ORDS \ + 6, /* /clocks */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_lsi_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_lsi_EXISTS 1 +#define DT_N_INST_1_fixed_clock DT_N_S_clocks_S_clk_lsi +#define DT_N_NODELABEL_clk_lsi DT_N_S_clocks_S_clk_lsi + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_lsi_REG_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_REG(fn) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_lsi_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_lsi_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_lsi_COMPAT_MATCHES_fixed_clock 1 +#define DT_N_S_clocks_S_clk_lsi_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_lsi_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_lsi_P_clock_frequency 32000 +#define DT_N_S_clocks_S_clk_lsi_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status "okay" +#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lsi, status, 0) +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lsi, status, 0) +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_compatible {"fixed-clock"} +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0 "fixed-clock" +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_TOKEN fixed_clock +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_lsi_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_dma_coherent 0 +#define DT_N_S_clocks_S_clk_lsi_P_dma_coherent_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_lsi_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /cpus + * + * Node identifier: DT_N_S_cpus + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_PATH "/cpus" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_FULL_NAME "cpus" +#define DT_N_S_cpus_FULL_NAME_UNQUOTED cpus +#define DT_N_S_cpus_FULL_NAME_TOKEN cpus +#define DT_N_S_cpus_FULL_NAME_UPPER_TOKEN CPUS + +/* Node parent (/) identifier: */ +#define DT_N_S_cpus_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_NODELABEL_NUM 0 +#define DT_N_S_cpus_FOREACH_NODELABEL(fn) +#define DT_N_S_cpus_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_cpus_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_CHILD_NUM 2 +#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_cpus_CHILD_UNIT_ADDR_INT_0 DT_N_S_cpus_S_cpu_0 +#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_power_states) +#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states) +#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_power_states) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_cpus_HASH iL3XRGZVvvtpNJqKV0_jvtuXF7m6kgky4nI2ifizwdg + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_ORD 35 +#define DT_N_S_cpus_ORD_STR_SORTABLE 00035 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_SUPPORTS_ORDS \ + 36, /* /cpus/power-states */ \ + 39, /* /cpus/cpu@0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_REG_NUM 0 +#define DT_N_S_cpus_FOREACH_REG(fn) +#define DT_N_S_cpus_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_cpus_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_cpus_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_RANGES_NUM 0 +#define DT_N_S_cpus_FOREACH_RANGE(fn) +#define DT_N_S_cpus_IRQ_NUM 0 +#define DT_N_S_cpus_IRQ_LEVEL 0 +#define DT_N_S_cpus_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /cpus/power-states + * + * Node identifier: DT_N_S_cpus_S_power_states + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_power_states_PATH "/cpus/power-states" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_power_states_FULL_NAME "power-states" +#define DT_N_S_cpus_S_power_states_FULL_NAME_UNQUOTED power-states +#define DT_N_S_cpus_S_power_states_FULL_NAME_TOKEN power_states +#define DT_N_S_cpus_S_power_states_FULL_NAME_UPPER_TOKEN POWER_STATES + +/* Node parent (/cpus) identifier: */ +#define DT_N_S_cpus_S_power_states_PARENT DT_N_S_cpus + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_power_states_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_S_power_states_NODELABEL_NUM 0 +#define DT_N_S_cpus_S_power_states_FOREACH_NODELABEL(fn) +#define DT_N_S_cpus_S_power_states_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_power_states_CHILD_NUM 2 +#define DT_N_S_cpus_S_power_states_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_power_states_S_state0) fn(DT_N_S_cpus_S_power_states_S_state1) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_power_states_S_state0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states_S_state1) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_power_states_S_state0) fn(DT_N_S_cpus_S_power_states_S_state1) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_power_states_S_state0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states_S_state1) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_cpus_S_power_states_HASH qMexuiO6C_SHOSQQCC_3by3odasm1z5VRx723zYLVgY + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_power_states_ORD 36 +#define DT_N_S_cpus_S_power_states_ORD_STR_SORTABLE 00036 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_power_states_REQUIRES_ORDS \ + 35, /* /cpus */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_power_states_SUPPORTS_ORDS \ + 37, /* /cpus/power-states/state0 */ \ + 38, /* /cpus/power-states/state1 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_power_states_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_power_states_REG_NUM 0 +#define DT_N_S_cpus_S_power_states_FOREACH_REG(fn) +#define DT_N_S_cpus_S_power_states_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_power_states_RANGES_NUM 0 +#define DT_N_S_cpus_S_power_states_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_power_states_IRQ_NUM 0 +#define DT_N_S_cpus_S_power_states_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_power_states_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_power_states_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /cpus/power-states/state0 + * + * Node identifier: DT_N_S_cpus_S_power_states_S_state0 + * + * Binding (compatible = zephyr,power-state): + * $ZEPHYR_BASE/dts/bindings/power/zephyr,power-state.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_power_states_S_state0_PATH "/cpus/power-states/state0" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_power_states_S_state0_FULL_NAME "state0" +#define DT_N_S_cpus_S_power_states_S_state0_FULL_NAME_UNQUOTED state0 +#define DT_N_S_cpus_S_power_states_S_state0_FULL_NAME_TOKEN state0 +#define DT_N_S_cpus_S_power_states_S_state0_FULL_NAME_UPPER_TOKEN STATE0 + +/* Node parent (/cpus/power-states) identifier: */ +#define DT_N_S_cpus_S_power_states_S_state0_PARENT DT_N_S_cpus_S_power_states + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_power_states_S_state0_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_S_power_states_S_state0_NODELABEL_NUM 1 +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_NODELABEL(fn) fn(stop0) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_NODELABEL_VARGS(fn, ...) fn(stop0, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus_S_power_states) fn(DT_N_S_cpus) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_power_states_S_state0_CHILD_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD(fn) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_cpus_S_power_states_S_state0_HASH 7gm1YoDC64qAH_XbCVglhJihgirY8BmBcJS3HmCqr7E + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_power_states_S_state0_ORD 37 +#define DT_N_S_cpus_S_power_states_S_state0_ORD_STR_SORTABLE 00037 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_power_states_S_state0_REQUIRES_ORDS \ + 36, /* /cpus/power-states */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_power_states_S_state0_SUPPORTS_ORDS \ + 39, /* /cpus/cpu@0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_power_states_S_state0_EXISTS 1 +#define DT_N_INST_0_zephyr_power_state DT_N_S_cpus_S_power_states_S_state0 +#define DT_N_NODELABEL_stop0 DT_N_S_cpus_S_power_states_S_state0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_power_states_S_state0_REG_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_REG(fn) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_power_states_S_state0_RANGES_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state0_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_power_states_S_state0_IRQ_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state0_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_power_states_S_state0_COMPAT_MATCHES_zephyr_power_state 1 +#define DT_N_S_cpus_S_power_states_S_state0_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_cpus_S_power_states_S_state0_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_COMPAT_MODEL_IDX_0 "power-state" +#define DT_N_S_cpus_S_power_states_S_state0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_power_states_S_state0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name "suspend-to-idle" +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_STRING_UNQUOTED suspend-to-idle +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_STRING_TOKEN suspend_to_idle +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_STRING_UPPER_TOKEN SUSPEND_TO_IDLE +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_IDX_0 "suspend-to-idle" +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_IDX_0_ENUM_IDX 2 +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_IDX_0_ENUM_VAL_suspend_to_idle_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_ENUM_VAL_suspend_to_idle_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_power_states_S_state0, power_state_name, 0) +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_power_states_S_state0, power_state_name, 0) +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_power_states_S_state0, power_state_name, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_power_states_S_state0, power_state_name, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_LEN 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_power_state_name_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_substate_id 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_substate_id_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_min_residency_us 20 +#define DT_N_S_cpus_S_power_states_S_state0_P_min_residency_us_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state0_P_zephyr_pm_device_disabled 0 +#define DT_N_S_cpus_S_power_states_S_state0_P_zephyr_pm_device_disabled_EXISTS 1 + +/* + * Devicetree node: /cpus/power-states/state1 + * + * Node identifier: DT_N_S_cpus_S_power_states_S_state1 + * + * Binding (compatible = zephyr,power-state): + * $ZEPHYR_BASE/dts/bindings/power/zephyr,power-state.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_power_states_S_state1_PATH "/cpus/power-states/state1" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_power_states_S_state1_FULL_NAME "state1" +#define DT_N_S_cpus_S_power_states_S_state1_FULL_NAME_UNQUOTED state1 +#define DT_N_S_cpus_S_power_states_S_state1_FULL_NAME_TOKEN state1 +#define DT_N_S_cpus_S_power_states_S_state1_FULL_NAME_UPPER_TOKEN STATE1 + +/* Node parent (/cpus/power-states) identifier: */ +#define DT_N_S_cpus_S_power_states_S_state1_PARENT DT_N_S_cpus_S_power_states + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_power_states_S_state1_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_S_power_states_S_state1_NODELABEL_NUM 1 +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_NODELABEL(fn) fn(stop1) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_NODELABEL_VARGS(fn, ...) fn(stop1, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus_S_power_states) fn(DT_N_S_cpus) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_power_states_S_state1_CHILD_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD(fn) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_cpus_S_power_states_S_state1_HASH HNV4Y3tkieq567WGGXTiZXOQ_iS0j5zVpLHTSMEzQPc + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_power_states_S_state1_ORD 38 +#define DT_N_S_cpus_S_power_states_S_state1_ORD_STR_SORTABLE 00038 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_power_states_S_state1_REQUIRES_ORDS \ + 36, /* /cpus/power-states */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_power_states_S_state1_SUPPORTS_ORDS \ + 39, /* /cpus/cpu@0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_power_states_S_state1_EXISTS 1 +#define DT_N_INST_1_zephyr_power_state DT_N_S_cpus_S_power_states_S_state1 +#define DT_N_NODELABEL_stop1 DT_N_S_cpus_S_power_states_S_state1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_power_states_S_state1_REG_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_REG(fn) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_power_states_S_state1_RANGES_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state1_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_power_states_S_state1_IRQ_NUM 0 +#define DT_N_S_cpus_S_power_states_S_state1_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_power_states_S_state1_COMPAT_MATCHES_zephyr_power_state 1 +#define DT_N_S_cpus_S_power_states_S_state1_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_cpus_S_power_states_S_state1_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_COMPAT_MODEL_IDX_0 "power-state" +#define DT_N_S_cpus_S_power_states_S_state1_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_power_states_S_state1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name "suspend-to-idle" +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_STRING_UNQUOTED suspend-to-idle +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_STRING_TOKEN suspend_to_idle +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_STRING_UPPER_TOKEN SUSPEND_TO_IDLE +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_IDX_0 "suspend-to-idle" +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_IDX_0_ENUM_IDX 2 +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_IDX_0_ENUM_VAL_suspend_to_idle_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_ENUM_VAL_suspend_to_idle_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_power_states_S_state1, power_state_name, 0) +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_power_states_S_state1, power_state_name, 0) +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_power_states_S_state1, power_state_name, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_power_states_S_state1, power_state_name, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_LEN 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_power_state_name_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_substate_id 2 +#define DT_N_S_cpus_S_power_states_S_state1_P_substate_id_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_min_residency_us 100 +#define DT_N_S_cpus_S_power_states_S_state1_P_min_residency_us_EXISTS 1 +#define DT_N_S_cpus_S_power_states_S_state1_P_zephyr_pm_device_disabled 0 +#define DT_N_S_cpus_S_power_states_S_state1_P_zephyr_pm_device_disabled_EXISTS 1 + +/* + * Devicetree node: /cpus/cpu@0 + * + * Node identifier: DT_N_S_cpus_S_cpu_0 + * + * Binding (compatible = arm,cortex-m4f): + * $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m4f.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0" +#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UNQUOTED cpu@0 +#define DT_N_S_cpus_S_cpu_0_FULL_NAME_TOKEN cpu_0 +#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UPPER_TOKEN CPU_0 + +/* Node parent (/cpus) identifier: */ +#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_cpu_0_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_S_cpu_0_NODELABEL_NUM 1 +#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL(fn) fn(cpu0) +#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(cpu0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_cpu_0_CHILD_NUM 0 +#define DT_N_S_cpus_S_cpu_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_cpus_S_cpu_0_HASH Su0JBbOtM0QIxe_1ka2Xvgw4rk1QaIlMIj8Rp_v4yVQ + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_cpu_0_ORD 39 +#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00039 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \ + 35, /* /cpus */ \ + 37, /* /cpus/power-states/state0 */ \ + 38, /* /cpus/power-states/state1 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_cpu_0_EXISTS 1 +#define DT_N_INST_0_arm_cortex_m4f DT_N_S_cpus_S_cpu_0 +#define DT_N_NODELABEL_cpu0 DT_N_S_cpus_S_cpu_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_cpu_0_REG_NUM 1 +#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */ +#define DT_N_S_cpus_S_cpu_0_FOREACH_REG(fn) fn(DT_N_S_cpus_S_cpu_0, 0) +#define DT_N_S_cpus_S_cpu_0_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, 0) +#define DT_N_S_cpus_S_cpu_0_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0 +#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0 +#define DT_N_S_cpus_S_cpu_0_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m4f 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0 "cortex-m4f" +#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_IDX_0 DT_N_S_cpus_S_power_states_S_state0 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_IDX_0_PH DT_N_S_cpus_S_power_states_S_state0 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_IDX_1 DT_N_S_cpus_S_power_states_S_state1 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_IDX_1_PH DT_N_S_cpus_S_power_states_S_state1 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_IDX_1_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 0) \ + fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 1) +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 1) +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 0, __VA_ARGS__) \ + fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 1, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_cpus_S_cpu_0, cpu_power_states, 1, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_LEN 2 +#define DT_N_S_cpus_S_cpu_0_P_cpu_power_states_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m4f"} +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m4f" +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m4f +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m4f +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M4F +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */} +#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0 +#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_dma_coherent 0 +#define DT_N_S_cpus_S_cpu_0_P_dma_coherent_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init 0 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0 +#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48000800 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_PATH "/soc/pin-controller@48000000/gpio@48000800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FULL_NAME "gpio@48000800" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FULL_NAME_UNQUOTED gpio@48000800 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FULL_NAME_TOKEN gpio_48000800 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FULL_NAME_UPPER_TOKEN GPIO_48000800 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_NODELABEL(fn) fn(gpioc) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioc, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_HASH n93nuZdYqflv0mYVUTrRbgKodqnVfp68rXG3AhQJioc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_ORD 40 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_ORD_STR_SORTABLE 00040 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_SUPPORTS_ORDS \ + 41, /* /gpio_keys */ \ + 42, /* /gpio_keys/button */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_EXISTS 1 +#define DT_N_INST_2_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_NODELABEL_gpioc DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_REG_IDX_0_VAL_ADDRESS 1207961600 /* 0x48000800 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_reg {1207961600 /* 0x48000800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_reg_IDX_0 1207961600 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_VAL_bits 4 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /gpio_keys + * + * Node identifier: DT_N_S_gpio_keys + * + * Binding (compatible = gpio-keys): + * $ZEPHYR_BASE/dts/bindings/input/gpio-keys.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_gpio_keys_PATH "/gpio_keys" + +/* Node's name with unit-address: */ +#define DT_N_S_gpio_keys_FULL_NAME "gpio_keys" +#define DT_N_S_gpio_keys_FULL_NAME_UNQUOTED gpio_keys +#define DT_N_S_gpio_keys_FULL_NAME_TOKEN gpio_keys +#define DT_N_S_gpio_keys_FULL_NAME_UPPER_TOKEN GPIO_KEYS + +/* Node parent (/) identifier: */ +#define DT_N_S_gpio_keys_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_gpio_keys_CHILD_IDX 17 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_gpio_keys_NODELABEL_NUM 0 +#define DT_N_S_gpio_keys_FOREACH_NODELABEL(fn) +#define DT_N_S_gpio_keys_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_gpio_keys_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_gpio_keys_CHILD_NUM 1 +#define DT_N_S_gpio_keys_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_gpio_keys_FOREACH_CHILD(fn) fn(DT_N_S_gpio_keys_S_button) +#define DT_N_S_gpio_keys_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_gpio_keys_S_button) +#define DT_N_S_gpio_keys_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_gpio_keys_S_button, __VA_ARGS__) +#define DT_N_S_gpio_keys_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys_S_button, __VA_ARGS__) +#define DT_N_S_gpio_keys_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_gpio_keys_S_button) +#define DT_N_S_gpio_keys_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_gpio_keys_S_button) +#define DT_N_S_gpio_keys_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_gpio_keys_S_button, __VA_ARGS__) +#define DT_N_S_gpio_keys_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys_S_button, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_gpio_keys_HASH o_cyM_1oGxkDdZvjWwmF_qWSV_TFQR0RmVqGE69cQ78 + +/* Node's dependency ordinal: */ +#define DT_N_S_gpio_keys_ORD 41 +#define DT_N_S_gpio_keys_ORD_STR_SORTABLE 00041 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_gpio_keys_REQUIRES_ORDS \ + 0, /* / */ \ + 40, /* /soc/pin-controller@48000000/gpio@48000800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_gpio_keys_SUPPORTS_ORDS \ + 42, /* /gpio_keys/button */ + +/* Existence and alternate IDs: */ +#define DT_N_S_gpio_keys_EXISTS 1 +#define DT_N_INST_0_gpio_keys DT_N_S_gpio_keys + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_gpio_keys_REG_NUM 0 +#define DT_N_S_gpio_keys_FOREACH_REG(fn) +#define DT_N_S_gpio_keys_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_gpio_keys_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_gpio_keys_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_gpio_keys_RANGES_NUM 0 +#define DT_N_S_gpio_keys_FOREACH_RANGE(fn) +#define DT_N_S_gpio_keys_IRQ_NUM 0 +#define DT_N_S_gpio_keys_IRQ_LEVEL 0 +#define DT_N_S_gpio_keys_COMPAT_MATCHES_gpio_keys 1 +#define DT_N_S_gpio_keys_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_gpio_keys_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_gpio_keys_P_debounce_interval_ms 30 +#define DT_N_S_gpio_keys_P_debounce_interval_ms_EXISTS 1 +#define DT_N_S_gpio_keys_P_polling_mode 0 +#define DT_N_S_gpio_keys_P_polling_mode_EXISTS 1 +#define DT_N_S_gpio_keys_P_zephyr_suspend_action "disconnect-with-pupd" +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_STRING_UNQUOTED disconnect-with-pupd +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_STRING_TOKEN disconnect_with_pupd +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_STRING_UPPER_TOKEN DISCONNECT_WITH_PUPD +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_IDX_0 "disconnect-with-pupd" +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_IDX_0_EXISTS 1 +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_IDX_0_ENUM_IDX 1 +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_IDX_0_ENUM_VAL_disconnect_with_pupd_EXISTS 1 +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_ENUM_VAL_disconnect_with_pupd_EXISTS 1 +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_keys, zephyr_suspend_action, 0) +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_keys, zephyr_suspend_action, 0) +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_keys, zephyr_suspend_action, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys, zephyr_suspend_action, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_LEN 1 +#define DT_N_S_gpio_keys_P_zephyr_suspend_action_EXISTS 1 +#define DT_N_S_gpio_keys_P_compatible {"gpio-keys"} +#define DT_N_S_gpio_keys_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_gpio_keys_P_compatible_IDX_0 "gpio-keys" +#define DT_N_S_gpio_keys_P_compatible_IDX_0_STRING_UNQUOTED gpio-keys +#define DT_N_S_gpio_keys_P_compatible_IDX_0_STRING_TOKEN gpio_keys +#define DT_N_S_gpio_keys_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_KEYS +#define DT_N_S_gpio_keys_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_keys, compatible, 0) +#define DT_N_S_gpio_keys_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_keys, compatible, 0) +#define DT_N_S_gpio_keys_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_keys, compatible, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys, compatible, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_P_compatible_LEN 1 +#define DT_N_S_gpio_keys_P_compatible_EXISTS 1 +#define DT_N_S_gpio_keys_P_dma_coherent 0 +#define DT_N_S_gpio_keys_P_dma_coherent_EXISTS 1 +#define DT_N_S_gpio_keys_P_zephyr_deferred_init 0 +#define DT_N_S_gpio_keys_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_gpio_keys_P_wakeup_source 0 +#define DT_N_S_gpio_keys_P_wakeup_source_EXISTS 1 +#define DT_N_S_gpio_keys_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_gpio_keys_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /gpio_keys/button + * + * Node identifier: DT_N_S_gpio_keys_S_button + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_gpio_keys_S_button_PATH "/gpio_keys/button" + +/* Node's name with unit-address: */ +#define DT_N_S_gpio_keys_S_button_FULL_NAME "button" +#define DT_N_S_gpio_keys_S_button_FULL_NAME_UNQUOTED button +#define DT_N_S_gpio_keys_S_button_FULL_NAME_TOKEN button +#define DT_N_S_gpio_keys_S_button_FULL_NAME_UPPER_TOKEN BUTTON + +/* Node parent (/gpio_keys) identifier: */ +#define DT_N_S_gpio_keys_S_button_PARENT DT_N_S_gpio_keys + +/* Node's index in its parent's list of children: */ +#define DT_N_S_gpio_keys_S_button_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_gpio_keys_S_button_NODELABEL_NUM 1 +#define DT_N_S_gpio_keys_S_button_FOREACH_NODELABEL(fn) fn(user_button) +#define DT_N_S_gpio_keys_S_button_FOREACH_NODELABEL_VARGS(fn, ...) fn(user_button, __VA_ARGS__) +#define DT_N_S_gpio_keys_S_button_FOREACH_ANCESTOR(fn) fn(DT_N_S_gpio_keys) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_gpio_keys_S_button_CHILD_NUM 0 +#define DT_N_S_gpio_keys_S_button_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD(fn) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_gpio_keys_S_button_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_gpio_keys_S_button_HASH xGyp172f7ymL2kzXZ3NEGIppYDK1YGb1Ay3RG1U6EkA + +/* Node's dependency ordinal: */ +#define DT_N_S_gpio_keys_S_button_ORD 42 +#define DT_N_S_gpio_keys_S_button_ORD_STR_SORTABLE 00042 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_gpio_keys_S_button_REQUIRES_ORDS \ + 40, /* /soc/pin-controller@48000000/gpio@48000800 */ \ + 41, /* /gpio_keys */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_gpio_keys_S_button_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_gpio_keys_S_button_EXISTS 1 +#define DT_N_ALIAS_sw0 DT_N_S_gpio_keys_S_button +#define DT_N_NODELABEL_user_button DT_N_S_gpio_keys_S_button + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_gpio_keys_S_button_REG_NUM 0 +#define DT_N_S_gpio_keys_S_button_FOREACH_REG(fn) +#define DT_N_S_gpio_keys_S_button_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_gpio_keys_S_button_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_gpio_keys_S_button_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_gpio_keys_S_button_RANGES_NUM 0 +#define DT_N_S_gpio_keys_S_button_FOREACH_RANGE(fn) +#define DT_N_S_gpio_keys_S_button_IRQ_NUM 0 +#define DT_N_S_gpio_keys_S_button_IRQ_LEVEL 0 +#define DT_N_S_gpio_keys_S_button_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_gpio_keys_S_button_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800 +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_VAL_pin 13 +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_gpio_keys_S_button, gpios, 0, pin) \ + fn(DT_N_S_gpio_keys_S_button, gpios, 0, flags) +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_gpio_keys_S_button, gpios, 0, pin) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_gpio_keys_S_button, gpios, 0, flags) +#define DT_N_S_gpio_keys_S_button_P_gpios_IDX_0_NUM_CELLS 2 +#define DT_N_S_gpio_keys_S_button_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_keys_S_button, gpios, 0) +#define DT_N_S_gpio_keys_S_button_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_keys_S_button, gpios, 0) +#define DT_N_S_gpio_keys_S_button_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_keys_S_button, gpios, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_S_button_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys_S_button, gpios, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_S_button_P_gpios_LEN 1 +#define DT_N_S_gpio_keys_S_button_P_gpios_EXISTS 1 +#define DT_N_S_gpio_keys_S_button_P_label "User" +#define DT_N_S_gpio_keys_S_button_P_label_STRING_UNQUOTED User +#define DT_N_S_gpio_keys_S_button_P_label_STRING_TOKEN User +#define DT_N_S_gpio_keys_S_button_P_label_STRING_UPPER_TOKEN USER +#define DT_N_S_gpio_keys_S_button_P_label_IDX_0 "User" +#define DT_N_S_gpio_keys_S_button_P_label_IDX_0_EXISTS 1 +#define DT_N_S_gpio_keys_S_button_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_keys_S_button, label, 0) +#define DT_N_S_gpio_keys_S_button_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_keys_S_button, label, 0) +#define DT_N_S_gpio_keys_S_button_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_keys_S_button, label, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_S_button_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_keys_S_button, label, 0, __VA_ARGS__) +#define DT_N_S_gpio_keys_S_button_P_label_LEN 1 +#define DT_N_S_gpio_keys_S_button_P_label_EXISTS 1 +#define DT_N_S_gpio_keys_S_button_P_zephyr_code 11 +#define DT_N_S_gpio_keys_S_button_P_zephyr_code_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48000000 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_PATH "/soc/pin-controller@48000000/gpio@48000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FULL_NAME "gpio@48000000" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FULL_NAME_UNQUOTED gpio@48000000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FULL_NAME_TOKEN gpio_48000000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FULL_NAME_UPPER_TOKEN GPIO_48000000 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_NODELABEL(fn) fn(gpioa) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioa, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_HASH ktVyE2z0pcWLY1c5JP3x222NkMrJWrY5pPGg8ffd9nE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_ORD 43 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_ORD_STR_SORTABLE 00043 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_SUPPORTS_ORDS \ + 44, /* /leds */ \ + 45, /* /leds/led_0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_NODELABEL_gpioa DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_REG_IDX_0_VAL_ADDRESS 1207959552 /* 0x48000000 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_reg {1207959552 /* 0x48000000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_reg_IDX_0 1207959552 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /leds + * + * Node identifier: DT_N_S_leds + * + * Binding (compatible = gpio-leds): + * $ZEPHYR_BASE/dts/bindings/led/gpio-leds.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_PATH "/leds" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_FULL_NAME "leds" +#define DT_N_S_leds_FULL_NAME_UNQUOTED leds +#define DT_N_S_leds_FULL_NAME_TOKEN leds +#define DT_N_S_leds_FULL_NAME_UPPER_TOKEN LEDS + +/* Node parent (/) identifier: */ +#define DT_N_S_leds_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_CHILD_IDX 15 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_leds_NODELABEL_NUM 1 +#define DT_N_S_leds_FOREACH_NODELABEL(fn) fn(leds) +#define DT_N_S_leds_FOREACH_NODELABEL_VARGS(fn, ...) fn(leds, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_CHILD_NUM 1 +#define DT_N_S_leds_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_leds_HASH bMroFUocDdjE3kJ38dK18mDvlCOPoyya5kIIs76irj8 + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_ORD 44 +#define DT_N_S_leds_ORD_STR_SORTABLE 00044 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_REQUIRES_ORDS \ + 0, /* / */ \ + 43, /* /soc/pin-controller@48000000/gpio@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_SUPPORTS_ORDS \ + 45, /* /leds/led_0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_EXISTS 1 +#define DT_N_INST_0_gpio_leds DT_N_S_leds +#define DT_N_NODELABEL_leds DT_N_S_leds + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_REG_NUM 0 +#define DT_N_S_leds_FOREACH_REG(fn) +#define DT_N_S_leds_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_leds_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_leds_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_RANGES_NUM 0 +#define DT_N_S_leds_FOREACH_RANGE(fn) +#define DT_N_S_leds_IRQ_NUM 0 +#define DT_N_S_leds_IRQ_LEVEL 0 +#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1 +#define DT_N_S_leds_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_leds_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_P_compatible {"gpio-leds"} +#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds" +#define DT_N_S_leds_P_compatible_IDX_0_STRING_UNQUOTED gpio-leds +#define DT_N_S_leds_P_compatible_IDX_0_STRING_TOKEN gpio_leds +#define DT_N_S_leds_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_LEDS +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds, compatible, 0) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) +#define DT_N_S_leds_P_compatible_LEN 1 +#define DT_N_S_leds_P_compatible_EXISTS 1 + +/* + * Devicetree node: /leds/led_0 + * + * Node identifier: DT_N_S_leds_S_led_0 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_S_led_0_PATH "/leds/led_0" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_S_led_0_FULL_NAME "led_0" +#define DT_N_S_leds_S_led_0_FULL_NAME_UNQUOTED led_0 +#define DT_N_S_leds_S_led_0_FULL_NAME_TOKEN led_0 +#define DT_N_S_leds_S_led_0_FULL_NAME_UPPER_TOKEN LED_0 + +/* Node parent (/leds) identifier: */ +#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_S_led_0_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_leds_S_led_0_NODELABEL_NUM 1 +#define DT_N_S_leds_S_led_0_FOREACH_NODELABEL(fn) fn(green_led) +#define DT_N_S_leds_S_led_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(green_led, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_S_led_0_CHILD_NUM 0 +#define DT_N_S_leds_S_led_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_leds_S_led_0_HASH kqSZv01Dnr_1hPdmxPVlr9u8kLMk_UWHIyVHG3GknSY + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_S_led_0_ORD 45 +#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00045 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \ + 43, /* /soc/pin-controller@48000000/gpio@48000000 */ \ + 44, /* /leds */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_S_led_0_EXISTS 1 +#define DT_N_ALIAS_led0 DT_N_S_leds_S_led_0 +#define DT_N_ALIAS_mcuboot_led0 DT_N_S_leds_S_led_0 +#define DT_N_NODELABEL_green_led DT_N_S_leds_S_led_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_S_led_0_REG_NUM 0 +#define DT_N_S_leds_S_led_0_FOREACH_REG(fn) +#define DT_N_S_leds_S_led_0_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_S_led_0_RANGES_NUM 0 +#define DT_N_S_leds_S_led_0_FOREACH_RANGE(fn) +#define DT_N_S_leds_S_led_0_IRQ_NUM 0 +#define DT_N_S_leds_S_led_0_IRQ_LEVEL 0 +#define DT_N_S_leds_S_led_0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_leds_S_led_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 5 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_leds_S_led_0, gpios, 0, pin) \ + fn(DT_N_S_leds_S_led_0, gpios, 0, flags) +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, gpios, 0, pin) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_leds_S_led_0, gpios, 0, flags) +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_NUM_CELLS 2 +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, gpios, 0) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, gpios, 0) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_gpios_LEN 1 +#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_label "User LD2" +#define DT_N_S_leds_S_led_0_P_label_STRING_UNQUOTED User LD2 +#define DT_N_S_leds_S_led_0_P_label_STRING_TOKEN User_LD2 +#define DT_N_S_leds_S_led_0_P_label_STRING_UPPER_TOKEN USER_LD2 +#define DT_N_S_leds_S_led_0_P_label_IDX_0 "User LD2" +#define DT_N_S_leds_S_led_0_P_label_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, label, 0) +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, label, 0) +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, label, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, label, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_label_LEN 1 +#define DT_N_S_leds_S_led_0_P_label_EXISTS 1 + +/* + * Devicetree node: /soc/rcc@40021000/reset-controller + * + * Node identifier: DT_N_S_soc_S_rcc_40021000_S_reset_controller + * + * Binding (compatible = st,stm32-rcc-rctl): + * $ZEPHYR_BASE/dts/bindings/reset/st,stm32-rcc-rctl.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_PATH "/soc/rcc@40021000/reset-controller" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FULL_NAME "reset-controller" +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FULL_NAME_UNQUOTED reset-controller +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FULL_NAME_TOKEN reset_controller +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FULL_NAME_UPPER_TOKEN RESET_CONTROLLER + +/* Node parent (/soc/rcc@40021000) identifier: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_PARENT DT_N_S_soc_S_rcc_40021000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_NODELABEL_NUM 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_NODELABEL(fn) fn(rctl) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(rctl, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_rcc_40021000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_CHILD_NUM 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_HASH IG1ObzgWVlEiYIYYv8tGMqRz03UFbMoci7_3L65c4dQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_ORD 46 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_ORD_STR_SORTABLE 00046 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_SUPPORTS_ORDS \ + 47, /* /soc/timers@40000000 */ \ + 56, /* /soc/crc@40023000 */ \ + 71, /* /soc/serial@40004400 */ \ + 72, /* /soc/serial@40004800 */ \ + 73, /* /soc/serial@40004c00 */ \ + 76, /* /soc/serial@40008000 */ \ + 79, /* /soc/serial@40013800 */ \ + 96, /* /soc/timers@40007c00 */ \ + 115, /* /soc/timers@40000400 */ \ + 119, /* /soc/timers@40000800 */ \ + 123, /* /soc/timers@40001000 */ \ + 125, /* /soc/timers@40001400 */ \ + 127, /* /soc/timers@40012c00 */ \ + 131, /* /soc/timers@40013400 */ \ + 135, /* /soc/timers@40014000 */ \ + 138, /* /soc/timers@40014400 */ \ + 141, /* /soc/timers@40014800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_EXISTS 1 +#define DT_N_INST_0_st_stm32_rcc_rctl DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_NODELABEL_rctl DT_N_S_soc_S_rcc_40021000_S_reset_controller + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_REG_NUM 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_REG(fn) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_RANGES_NUM 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_IRQ_NUM 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_IRQ_LEVEL 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_COMPAT_MATCHES_st_stm32_rcc_rctl 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_COMPAT_MODEL_IDX_0 "stm32-rcc-rctl" +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_set_bit_to_deassert 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_set_bit_to_deassert_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible {"st,stm32-rcc-rctl"} +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_IDX_0 "st,stm32-rcc-rctl" +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rcc-rctl +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_IDX_0_STRING_TOKEN st_stm32_rcc_rctl +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RCC_RCTL +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, compatible, 0) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, compatible, 0) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_LEN 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_dma_coherent 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_wakeup_source 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_rcc_40021000_S_reset_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000000 + * + * Node identifier: DT_N_S_soc_S_timers_40000000 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000000_PATH "/soc/timers@40000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000000_FULL_NAME "timers@40000000" +#define DT_N_S_soc_S_timers_40000000_FULL_NAME_UNQUOTED timers@40000000 +#define DT_N_S_soc_S_timers_40000000_FULL_NAME_TOKEN timers_40000000 +#define DT_N_S_soc_S_timers_40000000_FULL_NAME_UPPER_TOKEN TIMERS_40000000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000000_CHILD_IDX 26 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40000000_FOREACH_NODELABEL(fn) fn(timers2) +#define DT_N_S_soc_S_timers_40000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers2, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000000_CHILD_NUM 3 +#define DT_N_S_soc_S_timers_40000000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40000000_S_counter) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_timers_40000000_S_qdec) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_counter) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000_S_qdec) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_timers_40000000_S_pwm) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_pwm) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000000_HASH EG81bdVGBcHLEHOWL0pmGPFAUziNY8yKUHEsHXKaWCc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000000_ORD 47 +#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00047 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000000_SUPPORTS_ORDS \ + 49, /* /soc/timers@40000000/pwm */ \ + 113, /* /soc/timers@40000000/counter */ \ + 114, /* /soc/timers@40000000/qdec */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_timers DT_N_S_soc_S_timers_40000000 +#define DT_N_NODELABEL_timers2 DT_N_S_soc_S_timers_40000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000000_REG_NUM 1 +#define DT_N_S_soc_S_timers_40000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */ +#define DT_N_S_soc_S_timers_40000000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40000000_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40000000, 0) +#define DT_N_S_soc_S_timers_40000000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, 0) +#define DT_N_S_soc_S_timers_40000000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000000_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_VAL_irq 28 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40000000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40000000_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40000000_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40000000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40000000_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40000000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000000_P_reg {1073741824 /* 0x40000000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_reg_IDX_0 1073741824 +#define DT_N_S_soc_S_timers_40000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000000, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40000000_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40000000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 1) +#define DT_N_S_soc_S_timers_40000000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 1) +#define DT_N_S_soc_S_timers_40000000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40000000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_VAL_id 1792 +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000000, resets, 0, id) +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, resets, 0, id) +#define DT_N_S_soc_S_timers_40000000_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40000000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000, resets, 0) +#define DT_N_S_soc_S_timers_40000000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, resets, 0) +#define DT_N_S_soc_S_timers_40000000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40000000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40000000_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40000000_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40000000_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40000000_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_status "okay" +#define DT_N_S_soc_S_timers_40000000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40000000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40000000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40000000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40000000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000, status, 0) +#define DT_N_S_soc_S_timers_40000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, status, 0) +#define DT_N_S_soc_S_timers_40000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000000_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_interrupts {28 /* 0x1c */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40000000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_interrupts_IDX_0 28 +#define DT_N_S_soc_S_timers_40000000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40000000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40000000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/tim2_ch1_pa5 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_PATH "/soc/pin-controller@48000000/tim2_ch1_pa5" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FULL_NAME "tim2_ch1_pa5" +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FULL_NAME_UNQUOTED tim2_ch1_pa5 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FULL_NAME_TOKEN tim2_ch1_pa5 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FULL_NAME_UPPER_TOKEN TIM2_CH1_PA5 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_CHILD_IDX 21 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_NODELABEL(fn) fn(tim2_ch1_pa5) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim2_ch1_pa5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_HASH mA84Wc8dcieFtrWdrFiCS6N7UK7LDXfKx2TB_WXPvrc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_ORD 48 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_ORD_STR_SORTABLE 00048 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_SUPPORTS_ORDS \ + 49, /* /soc/timers@40000000/pwm */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_EXISTS 1 +#define DT_N_NODELABEL_tim2_ch1_pa5 DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_pinmux 161 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000000/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40000000_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_PATH "/soc/timers@40000000/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40000000_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40000000_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40000000_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40000000) identifier: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_PARENT DT_N_S_soc_S_timers_40000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_NODELABEL(fn) fn(pwm2) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm2, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_HASH EPAdjmCelZ_p_2x7j2JfW0691g5_Ul9BLhqJG9tnJMk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 49 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00049 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_REQUIRES_ORDS \ + 47, /* /soc/timers@40000000 */ \ + 48, /* /soc/pin-controller@48000000/tim2_ch1_pa5 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_SUPPORTS_ORDS \ + 50, /* /pwmleds */ \ + 51, /* /pwmleds/green_pwm_led */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_EXISTS 1 +#define DT_N_INST_0_st_stm32_pwm DT_N_S_soc_S_timers_40000000_S_pwm +#define DT_N_NODELABEL_pwm2 DT_N_S_soc_S_timers_40000000_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000000_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000000_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000000_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40000000_S_pwm_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_NUM 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_0, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_0, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status "okay" +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /pwmleds + * + * Node identifier: DT_N_S_pwmleds + * + * Binding (compatible = pwm-leds): + * $ZEPHYR_BASE/dts/bindings/led/pwm-leds.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pwmleds_PATH "/pwmleds" + +/* Node's name with unit-address: */ +#define DT_N_S_pwmleds_FULL_NAME "pwmleds" +#define DT_N_S_pwmleds_FULL_NAME_UNQUOTED pwmleds +#define DT_N_S_pwmleds_FULL_NAME_TOKEN pwmleds +#define DT_N_S_pwmleds_FULL_NAME_UPPER_TOKEN PWMLEDS + +/* Node parent (/) identifier: */ +#define DT_N_S_pwmleds_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pwmleds_CHILD_IDX 16 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_pwmleds_NODELABEL_NUM 0 +#define DT_N_S_pwmleds_FOREACH_NODELABEL(fn) +#define DT_N_S_pwmleds_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_pwmleds_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pwmleds_CHILD_NUM 1 +#define DT_N_S_pwmleds_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pwmleds_FOREACH_CHILD(fn) fn(DT_N_S_pwmleds_S_green_pwm_led) +#define DT_N_S_pwmleds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pwmleds_S_green_pwm_led) +#define DT_N_S_pwmleds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_green_pwm_led, __VA_ARGS__) +#define DT_N_S_pwmleds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_green_pwm_led, __VA_ARGS__) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pwmleds_S_green_pwm_led) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pwmleds_S_green_pwm_led) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_green_pwm_led, __VA_ARGS__) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_green_pwm_led, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_pwmleds_HASH LAVLDxln4k2d8rWkHY5gWY_V_wbRKRVUOItR1NgXPw4 + +/* Node's dependency ordinal: */ +#define DT_N_S_pwmleds_ORD 50 +#define DT_N_S_pwmleds_ORD_STR_SORTABLE 00050 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pwmleds_REQUIRES_ORDS \ + 0, /* / */ \ + 49, /* /soc/timers@40000000/pwm */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pwmleds_SUPPORTS_ORDS \ + 51, /* /pwmleds/green_pwm_led */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pwmleds_EXISTS 1 +#define DT_N_INST_0_pwm_leds DT_N_S_pwmleds + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pwmleds_REG_NUM 0 +#define DT_N_S_pwmleds_FOREACH_REG(fn) +#define DT_N_S_pwmleds_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_pwmleds_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_pwmleds_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pwmleds_RANGES_NUM 0 +#define DT_N_S_pwmleds_FOREACH_RANGE(fn) +#define DT_N_S_pwmleds_IRQ_NUM 0 +#define DT_N_S_pwmleds_IRQ_LEVEL 0 +#define DT_N_S_pwmleds_COMPAT_MATCHES_pwm_leds 1 +#define DT_N_S_pwmleds_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_pwmleds_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pwmleds_P_compatible {"pwm-leds"} +#define DT_N_S_pwmleds_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_pwmleds_P_compatible_IDX_0 "pwm-leds" +#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_UNQUOTED pwm-leds +#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_TOKEN pwm_leds +#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_UPPER_TOKEN PWM_LEDS +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds, compatible, 0) +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pwmleds, compatible, 0) +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pwmleds, compatible, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds, compatible, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_P_compatible_LEN 1 +#define DT_N_S_pwmleds_P_compatible_EXISTS 1 +#define DT_N_S_pwmleds_P_dma_coherent 0 +#define DT_N_S_pwmleds_P_dma_coherent_EXISTS 1 +#define DT_N_S_pwmleds_P_zephyr_deferred_init 0 +#define DT_N_S_pwmleds_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_pwmleds_P_wakeup_source 0 +#define DT_N_S_pwmleds_P_wakeup_source_EXISTS 1 +#define DT_N_S_pwmleds_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_pwmleds_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /pwmleds/green_pwm_led + * + * Node identifier: DT_N_S_pwmleds_S_green_pwm_led + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pwmleds_S_green_pwm_led_PATH "/pwmleds/green_pwm_led" + +/* Node's name with unit-address: */ +#define DT_N_S_pwmleds_S_green_pwm_led_FULL_NAME "green_pwm_led" +#define DT_N_S_pwmleds_S_green_pwm_led_FULL_NAME_UNQUOTED green_pwm_led +#define DT_N_S_pwmleds_S_green_pwm_led_FULL_NAME_TOKEN green_pwm_led +#define DT_N_S_pwmleds_S_green_pwm_led_FULL_NAME_UPPER_TOKEN GREEN_PWM_LED + +/* Node parent (/pwmleds) identifier: */ +#define DT_N_S_pwmleds_S_green_pwm_led_PARENT DT_N_S_pwmleds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pwmleds_S_green_pwm_led_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_pwmleds_S_green_pwm_led_NODELABEL_NUM 1 +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_NODELABEL(fn) fn(green_pwm_led) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_NODELABEL_VARGS(fn, ...) fn(green_pwm_led, __VA_ARGS__) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_ANCESTOR(fn) fn(DT_N_S_pwmleds) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pwmleds_S_green_pwm_led_CHILD_NUM 0 +#define DT_N_S_pwmleds_S_green_pwm_led_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD(fn) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_pwmleds_S_green_pwm_led_HASH FeHwFSz5luXjNRyyYg8WsSnP1L7j7jAP0FZZFckLuZw + +/* Node's dependency ordinal: */ +#define DT_N_S_pwmleds_S_green_pwm_led_ORD 51 +#define DT_N_S_pwmleds_S_green_pwm_led_ORD_STR_SORTABLE 00051 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pwmleds_S_green_pwm_led_REQUIRES_ORDS \ + 49, /* /soc/timers@40000000/pwm */ \ + 50, /* /pwmleds */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pwmleds_S_green_pwm_led_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pwmleds_S_green_pwm_led_EXISTS 1 +#define DT_N_ALIAS_pwm_led0 DT_N_S_pwmleds_S_green_pwm_led +#define DT_N_NODELABEL_green_pwm_led DT_N_S_pwmleds_S_green_pwm_led + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pwmleds_S_green_pwm_led_REG_NUM 0 +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_REG(fn) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pwmleds_S_green_pwm_led_RANGES_NUM 0 +#define DT_N_S_pwmleds_S_green_pwm_led_FOREACH_RANGE(fn) +#define DT_N_S_pwmleds_S_green_pwm_led_IRQ_NUM 0 +#define DT_N_S_pwmleds_S_green_pwm_led_IRQ_LEVEL 0 +#define DT_N_S_pwmleds_S_green_pwm_led_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_pwmleds_S_green_pwm_led_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_EXISTS 1 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_PH DT_N_S_soc_S_timers_40000000_S_pwm +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_VAL_channel 1 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_VAL_period 20000000 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_VAL_period_EXISTS 1 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_VAL_flags 0 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, channel) \ + fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, period) \ + fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, flags) +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, channel) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, period) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, flags) +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_IDX_0_NUM_CELLS 3 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0) +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0) +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_green_pwm_led, pwms, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_LEN 1 +#define DT_N_S_pwmleds_S_green_pwm_led_P_pwms_EXISTS 1 + +/* + * Devicetree node: /soc/adc@50000100 + * + * Node identifier: DT_N_S_soc_S_adc_50000100 + * + * Binding (compatible = st,stm32-adc): + * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_adc_50000100_PATH "/soc/adc@50000100" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_adc_50000100_FULL_NAME "adc@50000100" +#define DT_N_S_soc_S_adc_50000100_FULL_NAME_UNQUOTED adc@50000100 +#define DT_N_S_soc_S_adc_50000100_FULL_NAME_TOKEN adc_50000100 +#define DT_N_S_soc_S_adc_50000100_FULL_NAME_UPPER_TOKEN ADC_50000100 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_adc_50000100_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_adc_50000100_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_adc_50000100_NODELABEL_NUM 1 +#define DT_N_S_soc_S_adc_50000100_FOREACH_NODELABEL(fn) fn(adc2) +#define DT_N_S_soc_S_adc_50000100_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc2, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_adc_50000100_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_50000100_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_50000100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_adc_50000100_HASH LxdlXLvfJsb4AiPhCfDuYI0eWnvRy_vK_dwAyrNtWKo + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_adc_50000100_ORD 52 +#define DT_N_S_soc_S_adc_50000100_ORD_STR_SORTABLE 00052 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_adc_50000100_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_adc_50000100_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_50000100_EXISTS 1 +#define DT_N_INST_1_st_stm32_adc DT_N_S_soc_S_adc_50000100 +#define DT_N_NODELABEL_adc2 DT_N_S_soc_S_adc_50000100 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_50000100_REG_NUM 1 +#define DT_N_S_soc_S_adc_50000100_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_REG_IDX_0_VAL_ADDRESS 1342177536 /* 0x50000100 */ +#define DT_N_S_soc_S_adc_50000100_REG_IDX_0_VAL_SIZE 256 /* 0x100 */ +#define DT_N_S_soc_S_adc_50000100_FOREACH_REG(fn) fn(DT_N_S_soc_S_adc_50000100, 0) +#define DT_N_S_soc_S_adc_50000100_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, 0) +#define DT_N_S_soc_S_adc_50000100_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_50000100_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_50000100_IRQ_NUM 1 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_VAL_irq 18 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_adc_50000100_IRQ_LEVEL 1 +#define DT_N_S_soc_S_adc_50000100_COMPAT_MATCHES_st_stm32_adc 1 +#define DT_N_S_soc_S_adc_50000100_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_adc_50000100_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_COMPAT_MODEL_IDX_0 "stm32-adc" +#define DT_N_S_soc_S_adc_50000100_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_50000100_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_50000100_P_reg {1342177536 /* 0x50000100 */, 256 /* 0x100 */} +#define DT_N_S_soc_S_adc_50000100_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_reg_IDX_0 1342177536 +#define DT_N_S_soc_S_adc_50000100_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_reg_IDX_1 256 +#define DT_N_S_soc_S_adc_50000100_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_VAL_bits 8192 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_adc_50000100, clocks, 0, bus) \ + fn(DT_N_S_soc_S_adc_50000100, clocks, 0, bits) +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, clocks, 0, bits) +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_NAME "adcx" +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_IDX 0 +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_FOREACH_CELL(fn) fn(DT_N_S_soc_S_adc_50000100, clocks, adcx, bus) \ + fn(DT_N_S_soc_S_adc_50000100, clocks, adcx, bits) +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, clocks, adcx, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, clocks, adcx, bits) +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_NUM_CELLS 2 +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_VAL_bus DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_VAL_bus +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_VAL_bits DT_N_S_soc_S_adc_50000100_P_clocks_IDX_0_VAL_bits +#define DT_N_S_soc_S_adc_50000100_P_clocks_NAME_adcx_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, clocks, 0) +#define DT_N_S_soc_S_adc_50000100_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, clocks, 0) +#define DT_N_S_soc_S_adc_50000100_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_clocks_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clock_names {"adcx"} +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0_ENUM_VAL_adcx_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clock_names_ENUM_VAL_adcx_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0 "adcx" +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0_STRING_UNQUOTED adcx +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0_STRING_TOKEN adcx +#define DT_N_S_soc_S_adc_50000100_P_clock_names_IDX_0_STRING_UPPER_TOKEN ADCX +#define DT_N_S_soc_S_adc_50000100_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, clock_names, 0) +#define DT_N_S_soc_S_adc_50000100_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, clock_names, 0) +#define DT_N_S_soc_S_adc_50000100_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_clock_names_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_clock_names_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_interrupts {18 /* 0x12 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_adc_50000100_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_interrupts_IDX_0 18 +#define DT_N_S_soc_S_adc_50000100_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_adc_50000100_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_vref_mv 3300 +#define DT_N_S_soc_S_adc_50000100_P_vref_mv_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions {12 /* 0xc */, 10 /* 0xa */, 8 /* 0x8 */, 6 /* 0x6 */} +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_0 12 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_1 10 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_2 8 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_IDX_3 6 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 0) \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 1) \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 2) \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 3) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 3) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 3, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, st_adc_resolutions, 3, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_LEN 4 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_resolutions_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times {3 /* 0x3 */, 7 /* 0x7 */, 13 /* 0xd */, 25 /* 0x19 */, 48 /* 0x30 */, 93 /* 0x5d */, 248 /* 0xf8 */, 641 /* 0x281 */} +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_0 3 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_1 7 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_2 13 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_3 25 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_4 48 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_5 93 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_6 248 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_IDX_7 641 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, sampling_times, 0) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 1) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 2) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 3) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 4) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 5) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 6) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 7) +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 7) +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, sampling_times, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_50000100, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_LEN 8 +#define DT_N_S_soc_S_adc_50000100_P_sampling_times_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer "programmable" +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_STRING_UNQUOTED programmable +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_STRING_TOKEN programmable +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_STRING_UPPER_TOKEN PROGRAMMABLE +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_IDX_0 "programmable" +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_IDX_0_ENUM_VAL_programmable_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_ENUM_VAL_programmable_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_sequencer_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler "minimal" +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_STRING_UNQUOTED minimal +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_STRING_TOKEN minimal +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_STRING_UPPER_TOKEN MINIMAL +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_IDX_0 "minimal" +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_IDX_0_ENUM_VAL_minimal_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_ENUM_VAL_minimal_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_oversampler_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator "startup-sw-delay" +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_STRING_UNQUOTED startup-sw-delay +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_STRING_TOKEN startup_sw_delay +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_STRING_UPPER_TOKEN STARTUP_SW_DELAY +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_IDX_0 "startup-sw-delay" +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_IDX_0_ENUM_VAL_startup_sw_delay_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_ENUM_VAL_startup_sw_delay_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, st_adc_internal_regulator, 0) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, st_adc_internal_regulator, 0) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_internal_regulator, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, st_adc_internal_regulator, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_internal_regulator_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_deep_powerdown 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_deep_powerdown_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_channel_preselection 0 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_channel_preselection_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_differential_support 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_differential_support_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_injected_support 1 +#define DT_N_S_soc_S_adc_50000100_P_st_adc_has_injected_support_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_status "disabled" +#define DT_N_S_soc_S_adc_50000100_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_adc_50000100_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_adc_50000100_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_adc_50000100_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_adc_50000100_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_50000100_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, status, 0) +#define DT_N_S_soc_S_adc_50000100_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, status, 0) +#define DT_N_S_soc_S_adc_50000100_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_status_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_status_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_compatible {"st,stm32-adc"} +#define DT_N_S_soc_S_adc_50000100_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_compatible_IDX_0 "st,stm32-adc" +#define DT_N_S_soc_S_adc_50000100_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc +#define DT_N_S_soc_S_adc_50000100_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc +#define DT_N_S_soc_S_adc_50000100_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC +#define DT_N_S_soc_S_adc_50000100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_50000100, compatible, 0) +#define DT_N_S_soc_S_adc_50000100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_50000100, compatible, 0) +#define DT_N_S_soc_S_adc_50000100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_50000100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_50000100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_50000100_P_compatible_LEN 1 +#define DT_N_S_soc_S_adc_50000100_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_dma_coherent 0 +#define DT_N_S_soc_S_adc_50000100_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_adc_50000100_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_wakeup_source 0 +#define DT_N_S_soc_S_adc_50000100_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_adc_50000100_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_adc_50000100_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/can@40006400 + * + * Node identifier: DT_N_S_soc_S_can_40006400 + * + * Binding (compatible = st,stm32-fdcan): + * $ZEPHYR_BASE/dts/bindings/can/st,stm32-fdcan.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_can_40006400_PATH "/soc/can@40006400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_can_40006400_FULL_NAME "can@40006400" +#define DT_N_S_soc_S_can_40006400_FULL_NAME_UNQUOTED can@40006400 +#define DT_N_S_soc_S_can_40006400_FULL_NAME_TOKEN can_40006400 +#define DT_N_S_soc_S_can_40006400_FULL_NAME_UPPER_TOKEN CAN_40006400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_can_40006400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_can_40006400_CHILD_IDX 23 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_can_40006400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_can_40006400_FOREACH_NODELABEL(fn) fn(fdcan1) +#define DT_N_S_soc_S_can_40006400_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_can_40006400_CHILD_NUM 0 +#define DT_N_S_soc_S_can_40006400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_can_40006400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_can_40006400_HASH val_iOcNyNmh6jx1XoeAlpOC9DwQRToiiXS2PS43mJQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_can_40006400_ORD 53 +#define DT_N_S_soc_S_can_40006400_ORD_STR_SORTABLE 00053 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_can_40006400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_can_40006400_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_can_40006400_EXISTS 1 +#define DT_N_INST_0_st_stm32_fdcan DT_N_S_soc_S_can_40006400 +#define DT_N_NODELABEL_fdcan1 DT_N_S_soc_S_can_40006400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_can_40006400_REG_NUM 2 +#define DT_N_S_soc_S_can_40006400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_REG_IDX_0_VAL_ADDRESS 1073767424 /* 0x40006400 */ +#define DT_N_S_soc_S_can_40006400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_can_40006400_REG_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_REG_IDX_1_VAL_ADDRESS 1073783808 /* 0x4000a400 */ +#define DT_N_S_soc_S_can_40006400_REG_IDX_1_VAL_SIZE 848 /* 0x350 */ +#define DT_N_S_soc_S_can_40006400_REG_NAME_m_can_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_REG_NAME_m_can_VAL_ADDRESS DT_N_S_soc_S_can_40006400_REG_IDX_0_VAL_ADDRESS +#define DT_N_S_soc_S_can_40006400_REG_NAME_m_can_VAL_SIZE DT_N_S_soc_S_can_40006400_REG_IDX_0_VAL_SIZE +#define DT_N_S_soc_S_can_40006400_REG_NAME_message_ram_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_REG_NAME_message_ram_VAL_ADDRESS DT_N_S_soc_S_can_40006400_REG_IDX_1_VAL_ADDRESS +#define DT_N_S_soc_S_can_40006400_REG_NAME_message_ram_VAL_SIZE DT_N_S_soc_S_can_40006400_REG_IDX_1_VAL_SIZE +#define DT_N_S_soc_S_can_40006400_FOREACH_REG(fn) fn(DT_N_S_soc_S_can_40006400, 0) fn(DT_N_S_soc_S_can_40006400, 1) +#define DT_N_S_soc_S_can_40006400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, 0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_40006400, 1) +#define DT_N_S_soc_S_can_40006400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, 0, __VA_ARGS__) fn(DT_N_S_soc_S_can_40006400, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_40006400, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_RANGES_NUM 0 +#define DT_N_S_soc_S_can_40006400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_can_40006400_IRQ_NUM 2 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_VAL_irq 21 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_VAL_irq 22 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_40006400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int0_VAL_irq DT_N_S_soc_S_can_40006400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int0_VAL_priority DT_N_S_soc_S_can_40006400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int0_CONTROLLER DT_N_S_soc_S_can_40006400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int1_VAL_irq DT_N_S_soc_S_can_40006400_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int1_VAL_priority DT_N_S_soc_S_can_40006400_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_IRQ_NAME_int1_CONTROLLER DT_N_S_soc_S_can_40006400_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_can_40006400_COMPAT_MATCHES_st_stm32_fdcan 1 +#define DT_N_S_soc_S_can_40006400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_can_40006400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_COMPAT_MODEL_IDX_0 "stm32-fdcan" +#define DT_N_S_soc_S_can_40006400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_can_40006400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_VAL_bits 33554432 +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_can_40006400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_can_40006400, clocks, 0, bits) +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, clocks, 0, bits) +#define DT_N_S_soc_S_can_40006400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_can_40006400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_40006400, clocks, 0) +#define DT_N_S_soc_S_can_40006400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, clocks, 0) +#define DT_N_S_soc_S_can_40006400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_clocks_LEN 1 +#define DT_N_S_soc_S_can_40006400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg {1073767424 /* 0x40006400 */, 1024 /* 0x400 */, 1073783808 /* 0x4000a400 */, 848 /* 0x350 */} +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_0 1073767424 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_2 1073783808 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_IDX_3 848 +#define DT_N_S_soc_S_can_40006400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupts {21 /* 0x15 */, 0 /* 0x0 */, 22 /* 0x16 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_0 21 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_2 22 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_can_40006400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names {"int0", "int1"} +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_0 "int0" +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_0_STRING_UNQUOTED int0 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_0_STRING_TOKEN int0 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN INT0 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_1 "int1" +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_1_STRING_UNQUOTED int1 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_1_STRING_TOKEN int1 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN INT1 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_40006400, interrupt_names, 0) \ + fn(DT_N_S_soc_S_can_40006400, interrupt_names, 1) +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, interrupt_names, 1) +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_LEN 2 +#define DT_N_S_soc_S_can_40006400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg {0 /* 0x0 */, 28 /* 0x1c */, 8 /* 0x8 */, 3 /* 0x3 */, 3 /* 0x3 */, 0 /* 0x0 */, 3 /* 0x3 */, 3 /* 0x3 */} +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_0 0 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_1 28 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_2 8 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_3 3 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_4 3 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_5 0 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_6 3 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_IDX_7 3 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 0) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 1) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 2) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 3) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 4) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 5) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 6) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 7) +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 7) +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 7, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, bosch_mram_cfg, 7, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_LEN 8 +#define DT_N_S_soc_S_can_40006400_P_bosch_mram_cfg_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_timestamp_counter_prescaler 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_timestamp_counter_prescaler_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_can_40006400_P_bosch_timestamp_counter_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_timestamp_counter_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_timestamp_counter_prescaler_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_bosch_timestamp_counter_prescaler_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_status "disabled" +#define DT_N_S_soc_S_can_40006400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_can_40006400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_can_40006400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_can_40006400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_can_40006400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_can_40006400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_40006400, status, 0) +#define DT_N_S_soc_S_can_40006400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, status, 0) +#define DT_N_S_soc_S_can_40006400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_status_LEN 1 +#define DT_N_S_soc_S_can_40006400_P_status_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_compatible {"st,stm32-fdcan"} +#define DT_N_S_soc_S_can_40006400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_compatible_IDX_0 "st,stm32-fdcan" +#define DT_N_S_soc_S_can_40006400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-fdcan +#define DT_N_S_soc_S_can_40006400_P_compatible_IDX_0_STRING_TOKEN st_stm32_fdcan +#define DT_N_S_soc_S_can_40006400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_FDCAN +#define DT_N_S_soc_S_can_40006400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_40006400, compatible, 0) +#define DT_N_S_soc_S_can_40006400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, compatible, 0) +#define DT_N_S_soc_S_can_40006400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_compatible_LEN 1 +#define DT_N_S_soc_S_can_40006400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_names {"m_can", "message_ram"} +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_0 "m_can" +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_0_STRING_UNQUOTED m_can +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_0_STRING_TOKEN m_can +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_0_STRING_UPPER_TOKEN M_CAN +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_1 "message_ram" +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_1_STRING_UNQUOTED message_ram +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_1_STRING_TOKEN message_ram +#define DT_N_S_soc_S_can_40006400_P_reg_names_IDX_1_STRING_UPPER_TOKEN MESSAGE_RAM +#define DT_N_S_soc_S_can_40006400_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_40006400, reg_names, 0) \ + fn(DT_N_S_soc_S_can_40006400, reg_names, 1) +#define DT_N_S_soc_S_can_40006400_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_40006400, reg_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, reg_names, 1) +#define DT_N_S_soc_S_can_40006400_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_40006400, reg_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_40006400, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_40006400, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_40006400, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_40006400_P_reg_names_LEN 2 +#define DT_N_S_soc_S_can_40006400_P_reg_names_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_dma_coherent 0 +#define DT_N_S_soc_S_can_40006400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_can_40006400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_wakeup_source 0 +#define DT_N_S_soc_S_can_40006400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_can_40006400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_can_40006400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/comparator@40010200 + * + * Node identifier: DT_N_S_soc_S_comparator_40010200 + * + * Binding (compatible = st,stm32g4-comp): + * $ZEPHYR_BASE/dts/bindings/comparator/st,stm32g4-comp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_comparator_40010200_PATH "/soc/comparator@40010200" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_comparator_40010200_FULL_NAME "comparator@40010200" +#define DT_N_S_soc_S_comparator_40010200_FULL_NAME_UNQUOTED comparator@40010200 +#define DT_N_S_soc_S_comparator_40010200_FULL_NAME_TOKEN comparator_40010200 +#define DT_N_S_soc_S_comparator_40010200_FULL_NAME_UPPER_TOKEN COMPARATOR_40010200 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_comparator_40010200_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_comparator_40010200_CHILD_IDX 47 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_comparator_40010200_NODELABEL_NUM 1 +#define DT_N_S_soc_S_comparator_40010200_FOREACH_NODELABEL(fn) fn(comp1) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_NODELABEL_VARGS(fn, ...) fn(comp1, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_comparator_40010200_CHILD_NUM 0 +#define DT_N_S_soc_S_comparator_40010200_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_comparator_40010200_HASH QQlS8U1q4k2cc_mxFE9mS2KdQ3JbSk9gb6s_zOtqCi8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_comparator_40010200_ORD 54 +#define DT_N_S_soc_S_comparator_40010200_ORD_STR_SORTABLE 00054 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_comparator_40010200_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_comparator_40010200_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_comparator_40010200_EXISTS 1 +#define DT_N_INST_0_st_stm32g4_comp DT_N_S_soc_S_comparator_40010200 +#define DT_N_INST_0_st_stm32_comp DT_N_S_soc_S_comparator_40010200 +#define DT_N_NODELABEL_comp1 DT_N_S_soc_S_comparator_40010200 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_comparator_40010200_REG_NUM 1 +#define DT_N_S_soc_S_comparator_40010200_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_REG_IDX_0_VAL_ADDRESS 1073807872 /* 0x40010200 */ +#define DT_N_S_soc_S_comparator_40010200_REG_IDX_0_VAL_SIZE 4 /* 0x4 */ +#define DT_N_S_soc_S_comparator_40010200_FOREACH_REG(fn) fn(DT_N_S_soc_S_comparator_40010200, 0) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, 0) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_RANGES_NUM 0 +#define DT_N_S_soc_S_comparator_40010200_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_comparator_40010200_IRQ_NUM 1 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_VAL_irq 64 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_comparator_40010200_IRQ_LEVEL 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_MATCHES_st_stm32g4_comp 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_comparator_40010200_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_MODEL_IDX_0 "stm32g4-comp" +#define DT_N_S_soc_S_comparator_40010200_COMPAT_MATCHES_st_stm32_comp 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_comparator_40010200_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_COMPAT_MODEL_IDX_1 "stm32-comp" +#define DT_N_S_soc_S_comparator_40010200_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_comparator_40010200_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis "NONE" +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_STRING_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_IDX_0 "NONE" +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010200, hysteresis, 0) +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, hysteresis, 0) +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, hysteresis, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, hysteresis, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_LEN 1 +#define DT_N_S_soc_S_comparator_40010200_P_hysteresis_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel "NONE" +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_STRING_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_IDX_0 "NONE" +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010200, st_blank_sel, 0) +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, st_blank_sel, 0) +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, st_blank_sel, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, st_blank_sel, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_LEN 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_blank_sel_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_miller_effect_hold_disable 0 +#define DT_N_S_soc_S_comparator_40010200_P_st_miller_effect_hold_disable_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_reg {1073807872 /* 0x40010200 */, 4 /* 0x4 */} +#define DT_N_S_soc_S_comparator_40010200_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_reg_IDX_0 1073807872 +#define DT_N_S_soc_S_comparator_40010200_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_reg_IDX_1 4 +#define DT_N_S_soc_S_comparator_40010200_P_reg_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_interrupts {64 /* 0x40 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_comparator_40010200_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_interrupts_IDX_0 64 +#define DT_N_S_soc_S_comparator_40010200_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_comparator_40010200_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_comparator_40010200, clocks, 0, bus) \ + fn(DT_N_S_soc_S_comparator_40010200, clocks, 0, bits) +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_comparator_40010200, clocks, 0, bits) +#define DT_N_S_soc_S_comparator_40010200_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010200, clocks, 0) +#define DT_N_S_soc_S_comparator_40010200_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, clocks, 0) +#define DT_N_S_soc_S_comparator_40010200_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_clocks_LEN 1 +#define DT_N_S_soc_S_comparator_40010200_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_invert_output "NONINVERTED" +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_STRING_UNQUOTED NONINVERTED +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_STRING_TOKEN NONINVERTED +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_STRING_UPPER_TOKEN NONINVERTED +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_IDX_0 "NONINVERTED" +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_IDX_0_ENUM_VAL_noninverted_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_ENUM_VAL_noninverted_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010200, invert_output, 0) +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, invert_output, 0) +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, invert_output, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, invert_output, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_LEN 1 +#define DT_N_S_soc_S_comparator_40010200_P_invert_output_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_exti_line 21 +#define DT_N_S_soc_S_comparator_40010200_P_st_exti_line_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_st_lock_enable 0 +#define DT_N_S_soc_S_comparator_40010200_P_st_lock_enable_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_status "disabled" +#define DT_N_S_soc_S_comparator_40010200_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_comparator_40010200_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_comparator_40010200_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_comparator_40010200_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_comparator_40010200_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_comparator_40010200_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010200, status, 0) +#define DT_N_S_soc_S_comparator_40010200_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, status, 0) +#define DT_N_S_soc_S_comparator_40010200_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_status_LEN 1 +#define DT_N_S_soc_S_comparator_40010200_P_status_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_compatible {"st,stm32g4-comp", "st,stm32-comp"} +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_0 "st,stm32g4-comp" +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g4-comp +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_0_STRING_TOKEN st_stm32g4_comp +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G4_COMP +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_1 "st,stm32-comp" +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-comp +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_1_STRING_TOKEN st_stm32_comp +#define DT_N_S_soc_S_comparator_40010200_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_COMP +#define DT_N_S_soc_S_comparator_40010200_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010200, compatible, 0) \ + fn(DT_N_S_soc_S_comparator_40010200, compatible, 1) +#define DT_N_S_soc_S_comparator_40010200_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010200, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_comparator_40010200, compatible, 1) +#define DT_N_S_soc_S_comparator_40010200_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010200, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_comparator_40010200, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010200, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_comparator_40010200, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010200_P_compatible_LEN 2 +#define DT_N_S_soc_S_comparator_40010200_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_dma_coherent 0 +#define DT_N_S_soc_S_comparator_40010200_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_comparator_40010200_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_wakeup_source 0 +#define DT_N_S_soc_S_comparator_40010200_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010200_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_comparator_40010200_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/comparator@40010204 + * + * Node identifier: DT_N_S_soc_S_comparator_40010204 + * + * Binding (compatible = st,stm32g4-comp): + * $ZEPHYR_BASE/dts/bindings/comparator/st,stm32g4-comp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_comparator_40010204_PATH "/soc/comparator@40010204" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_comparator_40010204_FULL_NAME "comparator@40010204" +#define DT_N_S_soc_S_comparator_40010204_FULL_NAME_UNQUOTED comparator@40010204 +#define DT_N_S_soc_S_comparator_40010204_FULL_NAME_TOKEN comparator_40010204 +#define DT_N_S_soc_S_comparator_40010204_FULL_NAME_UPPER_TOKEN COMPARATOR_40010204 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_comparator_40010204_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_comparator_40010204_CHILD_IDX 48 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_comparator_40010204_NODELABEL_NUM 1 +#define DT_N_S_soc_S_comparator_40010204_FOREACH_NODELABEL(fn) fn(comp2) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_NODELABEL_VARGS(fn, ...) fn(comp2, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_comparator_40010204_CHILD_NUM 0 +#define DT_N_S_soc_S_comparator_40010204_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_comparator_40010204_HASH XCEWs4kKtzCfz4hpYp1eSp7j4PMbqXMmBFYzyVJU9ko + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_comparator_40010204_ORD 55 +#define DT_N_S_soc_S_comparator_40010204_ORD_STR_SORTABLE 00055 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_comparator_40010204_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_comparator_40010204_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_comparator_40010204_EXISTS 1 +#define DT_N_INST_1_st_stm32g4_comp DT_N_S_soc_S_comparator_40010204 +#define DT_N_INST_1_st_stm32_comp DT_N_S_soc_S_comparator_40010204 +#define DT_N_NODELABEL_comp2 DT_N_S_soc_S_comparator_40010204 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_comparator_40010204_REG_NUM 1 +#define DT_N_S_soc_S_comparator_40010204_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_REG_IDX_0_VAL_ADDRESS 1073807876 /* 0x40010204 */ +#define DT_N_S_soc_S_comparator_40010204_REG_IDX_0_VAL_SIZE 4 /* 0x4 */ +#define DT_N_S_soc_S_comparator_40010204_FOREACH_REG(fn) fn(DT_N_S_soc_S_comparator_40010204, 0) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, 0) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_RANGES_NUM 0 +#define DT_N_S_soc_S_comparator_40010204_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_comparator_40010204_IRQ_NUM 1 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_VAL_irq 64 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_comparator_40010204_IRQ_LEVEL 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_MATCHES_st_stm32g4_comp 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_comparator_40010204_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_MODEL_IDX_0 "stm32g4-comp" +#define DT_N_S_soc_S_comparator_40010204_COMPAT_MATCHES_st_stm32_comp 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_comparator_40010204_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_COMPAT_MODEL_IDX_1 "stm32-comp" +#define DT_N_S_soc_S_comparator_40010204_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_comparator_40010204_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis "NONE" +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_STRING_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_IDX_0 "NONE" +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010204, hysteresis, 0) +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, hysteresis, 0) +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, hysteresis, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, hysteresis, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_LEN 1 +#define DT_N_S_soc_S_comparator_40010204_P_hysteresis_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel "NONE" +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_STRING_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_IDX_0 "NONE" +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010204, st_blank_sel, 0) +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, st_blank_sel, 0) +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, st_blank_sel, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, st_blank_sel, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_LEN 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_blank_sel_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_miller_effect_hold_disable 0 +#define DT_N_S_soc_S_comparator_40010204_P_st_miller_effect_hold_disable_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_reg {1073807876 /* 0x40010204 */, 4 /* 0x4 */} +#define DT_N_S_soc_S_comparator_40010204_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_reg_IDX_0 1073807876 +#define DT_N_S_soc_S_comparator_40010204_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_reg_IDX_1 4 +#define DT_N_S_soc_S_comparator_40010204_P_reg_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_interrupts {64 /* 0x40 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_comparator_40010204_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_interrupts_IDX_0 64 +#define DT_N_S_soc_S_comparator_40010204_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_comparator_40010204_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_comparator_40010204, clocks, 0, bus) \ + fn(DT_N_S_soc_S_comparator_40010204, clocks, 0, bits) +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_comparator_40010204, clocks, 0, bits) +#define DT_N_S_soc_S_comparator_40010204_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010204, clocks, 0) +#define DT_N_S_soc_S_comparator_40010204_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, clocks, 0) +#define DT_N_S_soc_S_comparator_40010204_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_clocks_LEN 1 +#define DT_N_S_soc_S_comparator_40010204_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_invert_output "NONINVERTED" +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_STRING_UNQUOTED NONINVERTED +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_STRING_TOKEN NONINVERTED +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_STRING_UPPER_TOKEN NONINVERTED +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_IDX_0 "NONINVERTED" +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_IDX_0_ENUM_VAL_noninverted_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_ENUM_VAL_noninverted_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010204, invert_output, 0) +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, invert_output, 0) +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, invert_output, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, invert_output, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_LEN 1 +#define DT_N_S_soc_S_comparator_40010204_P_invert_output_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_exti_line 22 +#define DT_N_S_soc_S_comparator_40010204_P_st_exti_line_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_st_lock_enable 0 +#define DT_N_S_soc_S_comparator_40010204_P_st_lock_enable_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_status "disabled" +#define DT_N_S_soc_S_comparator_40010204_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_comparator_40010204_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_comparator_40010204_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_comparator_40010204_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_comparator_40010204_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_comparator_40010204_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010204, status, 0) +#define DT_N_S_soc_S_comparator_40010204_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, status, 0) +#define DT_N_S_soc_S_comparator_40010204_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_status_LEN 1 +#define DT_N_S_soc_S_comparator_40010204_P_status_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_compatible {"st,stm32g4-comp", "st,stm32-comp"} +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_0 "st,stm32g4-comp" +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g4-comp +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_0_STRING_TOKEN st_stm32g4_comp +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G4_COMP +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_1 "st,stm32-comp" +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-comp +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_1_STRING_TOKEN st_stm32_comp +#define DT_N_S_soc_S_comparator_40010204_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_COMP +#define DT_N_S_soc_S_comparator_40010204_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40010204, compatible, 0) \ + fn(DT_N_S_soc_S_comparator_40010204, compatible, 1) +#define DT_N_S_soc_S_comparator_40010204_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40010204, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_comparator_40010204, compatible, 1) +#define DT_N_S_soc_S_comparator_40010204_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40010204, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_comparator_40010204, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40010204, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_comparator_40010204, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_comparator_40010204_P_compatible_LEN 2 +#define DT_N_S_soc_S_comparator_40010204_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_dma_coherent 0 +#define DT_N_S_soc_S_comparator_40010204_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_comparator_40010204_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_wakeup_source 0 +#define DT_N_S_soc_S_comparator_40010204_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_comparator_40010204_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_comparator_40010204_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/crc@40023000 + * + * Node identifier: DT_N_S_soc_S_crc_40023000 + * + * Binding (compatible = st,stm32-crc): + * $ZEPHYR_BASE/dts/bindings/crc/st,stm32-crc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_crc_40023000_PATH "/soc/crc@40023000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_crc_40023000_FULL_NAME "crc@40023000" +#define DT_N_S_soc_S_crc_40023000_FULL_NAME_UNQUOTED crc@40023000 +#define DT_N_S_soc_S_crc_40023000_FULL_NAME_TOKEN crc_40023000 +#define DT_N_S_soc_S_crc_40023000_FULL_NAME_UPPER_TOKEN CRC_40023000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_crc_40023000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_crc_40023000_CHILD_IDX 49 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_crc_40023000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_crc_40023000_FOREACH_NODELABEL(fn) fn(crc) +#define DT_N_S_soc_S_crc_40023000_FOREACH_NODELABEL_VARGS(fn, ...) fn(crc, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_crc_40023000_CHILD_NUM 0 +#define DT_N_S_soc_S_crc_40023000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_crc_40023000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_crc_40023000_HASH AHAfoacZs4JRE8pA4wgH8Dgc30qQVb4epHOyLB_o7Aw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_crc_40023000_ORD 56 +#define DT_N_S_soc_S_crc_40023000_ORD_STR_SORTABLE 00056 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_crc_40023000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_crc_40023000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_crc_40023000_EXISTS 1 +#define DT_N_INST_0_st_stm32_crc DT_N_S_soc_S_crc_40023000 +#define DT_N_NODELABEL_crc DT_N_S_soc_S_crc_40023000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_crc_40023000_REG_NUM 1 +#define DT_N_S_soc_S_crc_40023000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_REG_IDX_0_VAL_ADDRESS 1073885184 /* 0x40023000 */ +#define DT_N_S_soc_S_crc_40023000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_crc_40023000_FOREACH_REG(fn) fn(DT_N_S_soc_S_crc_40023000, 0) +#define DT_N_S_soc_S_crc_40023000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, 0) +#define DT_N_S_soc_S_crc_40023000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_crc_40023000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crc_40023000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_RANGES_NUM 0 +#define DT_N_S_soc_S_crc_40023000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_crc_40023000_IRQ_NUM 0 +#define DT_N_S_soc_S_crc_40023000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_crc_40023000_COMPAT_MATCHES_st_stm32_crc 1 +#define DT_N_S_soc_S_crc_40023000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_crc_40023000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_COMPAT_MODEL_IDX_0 "stm32-crc" +#define DT_N_S_soc_S_crc_40023000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_crc_40023000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_crc_40023000_P_reg {1073885184 /* 0x40023000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_crc_40023000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_reg_IDX_0 1073885184 +#define DT_N_S_soc_S_crc_40023000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_crc_40023000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_VAL_bus 72 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_VAL_bits 4096 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_crc_40023000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_crc_40023000, clocks, 0, bits) +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_crc_40023000, clocks, 0, bits) +#define DT_N_S_soc_S_crc_40023000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_crc_40023000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crc_40023000, clocks, 0) +#define DT_N_S_soc_S_crc_40023000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, clocks, 0) +#define DT_N_S_soc_S_crc_40023000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crc_40023000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crc_40023000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_clocks_LEN 1 +#define DT_N_S_soc_S_crc_40023000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_status "disabled" +#define DT_N_S_soc_S_crc_40023000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_crc_40023000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_crc_40023000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_crc_40023000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_crc_40023000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_crc_40023000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crc_40023000, status, 0) +#define DT_N_S_soc_S_crc_40023000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, status, 0) +#define DT_N_S_soc_S_crc_40023000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crc_40023000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crc_40023000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_status_LEN 1 +#define DT_N_S_soc_S_crc_40023000_P_status_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_compatible {"st,stm32-crc"} +#define DT_N_S_soc_S_crc_40023000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_compatible_IDX_0 "st,stm32-crc" +#define DT_N_S_soc_S_crc_40023000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-crc +#define DT_N_S_soc_S_crc_40023000_P_compatible_IDX_0_STRING_TOKEN st_stm32_crc +#define DT_N_S_soc_S_crc_40023000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CRC +#define DT_N_S_soc_S_crc_40023000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crc_40023000, compatible, 0) +#define DT_N_S_soc_S_crc_40023000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, compatible, 0) +#define DT_N_S_soc_S_crc_40023000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crc_40023000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crc_40023000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_compatible_LEN 1 +#define DT_N_S_soc_S_crc_40023000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_dma_coherent 0 +#define DT_N_S_soc_S_crc_40023000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_crc_40023000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_wakeup_source 0 +#define DT_N_S_soc_S_crc_40023000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_crc_40023000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_VAL_id 1292 +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_crc_40023000, resets, 0, id) +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, resets, 0, id) +#define DT_N_S_soc_S_crc_40023000_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_crc_40023000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crc_40023000, resets, 0) +#define DT_N_S_soc_S_crc_40023000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crc_40023000, resets, 0) +#define DT_N_S_soc_S_crc_40023000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crc_40023000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crc_40023000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crc_40023000_P_resets_LEN 1 +#define DT_N_S_soc_S_crc_40023000_P_resets_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/dac1_out1_pa4 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_PATH "/soc/pin-controller@48000000/dac1_out1_pa4" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FULL_NAME "dac1_out1_pa4" +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FULL_NAME_UNQUOTED dac1_out1_pa4 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FULL_NAME_TOKEN dac1_out1_pa4 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FULL_NAME_UPPER_TOKEN DAC1_OUT1_PA4 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_CHILD_IDX 7 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_NODELABEL(fn) fn(dac1_out1_pa4) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_NODELABEL_VARGS(fn, ...) fn(dac1_out1_pa4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_HASH Xk_AsWAUvpV6bDiRJkg5_xU9REWhrbnp1WhyYTpGkXs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_ORD 57 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_ORD_STR_SORTABLE 00057 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_SUPPORTS_ORDS \ + 58, /* /soc/dac@50000800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_EXISTS 1 +#define DT_N_NODELABEL_dac1_out1_pa4 DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_pinmux 144 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/dac@50000800 + * + * Node identifier: DT_N_S_soc_S_dac_50000800 + * + * Binding (compatible = st,stm32-dac): + * $ZEPHYR_BASE/dts/bindings/dac/st,stm32-dac.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dac_50000800_PATH "/soc/dac@50000800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dac_50000800_FULL_NAME "dac@50000800" +#define DT_N_S_soc_S_dac_50000800_FULL_NAME_UNQUOTED dac@50000800 +#define DT_N_S_soc_S_dac_50000800_FULL_NAME_TOKEN dac_50000800 +#define DT_N_S_soc_S_dac_50000800_FULL_NAME_UPPER_TOKEN DAC_50000800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dac_50000800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dac_50000800_CHILD_IDX 4 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dac_50000800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dac_50000800_FOREACH_NODELABEL(fn) fn(dac1) +#define DT_N_S_soc_S_dac_50000800_FOREACH_NODELABEL_VARGS(fn, ...) fn(dac1, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dac_50000800_CHILD_NUM 0 +#define DT_N_S_soc_S_dac_50000800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dac_50000800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dac_50000800_HASH 9VsAq9JmFP9e7AffHjoM1_sIKPrSz_IklcHnWvAZYrk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dac_50000800_ORD 58 +#define DT_N_S_soc_S_dac_50000800_ORD_STR_SORTABLE 00058 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dac_50000800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ \ + 57, /* /soc/pin-controller@48000000/dac1_out1_pa4 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dac_50000800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dac_50000800_EXISTS 1 +#define DT_N_INST_0_st_stm32_dac DT_N_S_soc_S_dac_50000800 +#define DT_N_NODELABEL_dac1 DT_N_S_soc_S_dac_50000800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dac_50000800_REG_NUM 1 +#define DT_N_S_soc_S_dac_50000800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_REG_IDX_0_VAL_ADDRESS 1342179328 /* 0x50000800 */ +#define DT_N_S_soc_S_dac_50000800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_dac_50000800_FOREACH_REG(fn) fn(DT_N_S_soc_S_dac_50000800, 0) +#define DT_N_S_soc_S_dac_50000800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, 0) +#define DT_N_S_soc_S_dac_50000800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50000800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50000800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_RANGES_NUM 0 +#define DT_N_S_soc_S_dac_50000800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dac_50000800_IRQ_NUM 0 +#define DT_N_S_soc_S_dac_50000800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_dac_50000800_COMPAT_MATCHES_st_stm32_dac 1 +#define DT_N_S_soc_S_dac_50000800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dac_50000800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_COMPAT_MODEL_IDX_0 "stm32-dac" +#define DT_N_S_soc_S_dac_50000800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dac_50000800_PINCTRL_NUM 1 +#define DT_N_S_soc_S_dac_50000800_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_dac_50000800_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_dac_50000800_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_dac_50000800_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dac_50000800_P_reg {1342179328 /* 0x50000800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_dac_50000800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_reg_IDX_0 1342179328 +#define DT_N_S_soc_S_dac_50000800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dac_50000800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_VAL_bits 65536 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_dac_50000800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_dac_50000800, clocks, 0, bits) +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dac_50000800, clocks, 0, bits) +#define DT_N_S_soc_S_dac_50000800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_dac_50000800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50000800, clocks, 0) +#define DT_N_S_soc_S_dac_50000800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, clocks, 0) +#define DT_N_S_soc_S_dac_50000800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50000800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50000800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_clocks_LEN 1 +#define DT_N_S_soc_S_dac_50000800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_status "okay" +#define DT_N_S_soc_S_dac_50000800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_dac_50000800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_dac_50000800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_dac_50000800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_dac_50000800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_dac_50000800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50000800, status, 0) +#define DT_N_S_soc_S_dac_50000800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, status, 0) +#define DT_N_S_soc_S_dac_50000800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50000800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50000800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_status_LEN 1 +#define DT_N_S_soc_S_dac_50000800_P_status_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_compatible {"st,stm32-dac"} +#define DT_N_S_soc_S_dac_50000800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_compatible_IDX_0 "st,stm32-dac" +#define DT_N_S_soc_S_dac_50000800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dac +#define DT_N_S_soc_S_dac_50000800_P_compatible_IDX_0_STRING_TOKEN st_stm32_dac +#define DT_N_S_soc_S_dac_50000800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DAC +#define DT_N_S_soc_S_dac_50000800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50000800, compatible, 0) +#define DT_N_S_soc_S_dac_50000800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, compatible, 0) +#define DT_N_S_soc_S_dac_50000800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50000800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50000800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_compatible_LEN 1 +#define DT_N_S_soc_S_dac_50000800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_dma_coherent 0 +#define DT_N_S_soc_S_dac_50000800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dac_50000800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_wakeup_source 0 +#define DT_N_S_soc_S_dac_50000800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dac_50000800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50000800, pinctrl_0, 0) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, pinctrl_0, 0) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50000800, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50000800, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50000800, pinctrl_names, 0) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50000800, pinctrl_names, 0) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50000800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50000800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_dac_50000800_P_pinctrl_names_EXISTS 1 + +/* + * Devicetree node: /soc/dac@50001000 + * + * Node identifier: DT_N_S_soc_S_dac_50001000 + * + * Binding (compatible = st,stm32-dac): + * $ZEPHYR_BASE/dts/bindings/dac/st,stm32-dac.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dac_50001000_PATH "/soc/dac@50001000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dac_50001000_FULL_NAME "dac@50001000" +#define DT_N_S_soc_S_dac_50001000_FULL_NAME_UNQUOTED dac@50001000 +#define DT_N_S_soc_S_dac_50001000_FULL_NAME_TOKEN dac_50001000 +#define DT_N_S_soc_S_dac_50001000_FULL_NAME_UPPER_TOKEN DAC_50001000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dac_50001000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dac_50001000_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dac_50001000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dac_50001000_FOREACH_NODELABEL(fn) fn(dac3) +#define DT_N_S_soc_S_dac_50001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dac3, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dac_50001000_CHILD_NUM 0 +#define DT_N_S_soc_S_dac_50001000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dac_50001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dac_50001000_HASH txQsX3nA2GYV7oL_iUQuKB4FDJj1OgdbcKTIQR2tHFs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dac_50001000_ORD 59 +#define DT_N_S_soc_S_dac_50001000_ORD_STR_SORTABLE 00059 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dac_50001000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dac_50001000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dac_50001000_EXISTS 1 +#define DT_N_INST_1_st_stm32_dac DT_N_S_soc_S_dac_50001000 +#define DT_N_NODELABEL_dac3 DT_N_S_soc_S_dac_50001000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dac_50001000_REG_NUM 1 +#define DT_N_S_soc_S_dac_50001000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_REG_IDX_0_VAL_ADDRESS 1342181376 /* 0x50001000 */ +#define DT_N_S_soc_S_dac_50001000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_dac_50001000_FOREACH_REG(fn) fn(DT_N_S_soc_S_dac_50001000, 0) +#define DT_N_S_soc_S_dac_50001000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50001000, 0) +#define DT_N_S_soc_S_dac_50001000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50001000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50001000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_RANGES_NUM 0 +#define DT_N_S_soc_S_dac_50001000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dac_50001000_IRQ_NUM 0 +#define DT_N_S_soc_S_dac_50001000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_dac_50001000_COMPAT_MATCHES_st_stm32_dac 1 +#define DT_N_S_soc_S_dac_50001000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dac_50001000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_COMPAT_MODEL_IDX_0 "stm32-dac" +#define DT_N_S_soc_S_dac_50001000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dac_50001000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dac_50001000_P_reg {1342181376 /* 0x50001000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_dac_50001000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_reg_IDX_0 1342181376 +#define DT_N_S_soc_S_dac_50001000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dac_50001000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_VAL_bits 262144 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_dac_50001000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_dac_50001000, clocks, 0, bits) +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50001000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dac_50001000, clocks, 0, bits) +#define DT_N_S_soc_S_dac_50001000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_dac_50001000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50001000, clocks, 0) +#define DT_N_S_soc_S_dac_50001000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50001000, clocks, 0) +#define DT_N_S_soc_S_dac_50001000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50001000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50001000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_P_clocks_LEN 1 +#define DT_N_S_soc_S_dac_50001000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_status "disabled" +#define DT_N_S_soc_S_dac_50001000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dac_50001000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dac_50001000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dac_50001000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dac_50001000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dac_50001000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50001000, status, 0) +#define DT_N_S_soc_S_dac_50001000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50001000, status, 0) +#define DT_N_S_soc_S_dac_50001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50001000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50001000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_P_status_LEN 1 +#define DT_N_S_soc_S_dac_50001000_P_status_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_compatible {"st,stm32-dac"} +#define DT_N_S_soc_S_dac_50001000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_compatible_IDX_0 "st,stm32-dac" +#define DT_N_S_soc_S_dac_50001000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dac +#define DT_N_S_soc_S_dac_50001000_P_compatible_IDX_0_STRING_TOKEN st_stm32_dac +#define DT_N_S_soc_S_dac_50001000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DAC +#define DT_N_S_soc_S_dac_50001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_50001000, compatible, 0) +#define DT_N_S_soc_S_dac_50001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_50001000, compatible, 0) +#define DT_N_S_soc_S_dac_50001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_50001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_50001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_50001000_P_compatible_LEN 1 +#define DT_N_S_soc_S_dac_50001000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_dma_coherent 0 +#define DT_N_S_soc_S_dac_50001000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dac_50001000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_wakeup_source 0 +#define DT_N_S_soc_S_dac_50001000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dac_50001000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dac_50001000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dma@40020400 + * + * Node identifier: DT_N_S_soc_S_dma_40020400 + * + * Binding (compatible = st,stm32-dma-v2): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dma-v2.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dma_40020400_PATH "/soc/dma@40020400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dma_40020400_FULL_NAME "dma@40020400" +#define DT_N_S_soc_S_dma_40020400_FULL_NAME_UNQUOTED dma@40020400 +#define DT_N_S_soc_S_dma_40020400_FULL_NAME_TOKEN dma_40020400 +#define DT_N_S_soc_S_dma_40020400_FULL_NAME_UPPER_TOKEN DMA_40020400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dma_40020400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dma_40020400_CHILD_IDX 39 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dma_40020400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dma_40020400_FOREACH_NODELABEL(fn) fn(dma2) +#define DT_N_S_soc_S_dma_40020400_FOREACH_NODELABEL_VARGS(fn, ...) fn(dma2, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dma_40020400_CHILD_NUM 0 +#define DT_N_S_soc_S_dma_40020400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dma_40020400_HASH 6M2mn87tCKiqdKtfbifYbjloijPkEmcQ0zczmKi97Y8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dma_40020400_ORD 60 +#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00060 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dma_40020400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dma_40020400_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dma_40020400_EXISTS 1 +#define DT_N_INST_1_st_stm32_dma_v2 DT_N_S_soc_S_dma_40020400 +#define DT_N_NODELABEL_dma2 DT_N_S_soc_S_dma_40020400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dma_40020400_REG_NUM 1 +#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_VAL_ADDRESS 1073873920 /* 0x40020400 */ +#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_dma_40020400_FOREACH_REG(fn) fn(DT_N_S_soc_S_dma_40020400, 0) +#define DT_N_S_soc_S_dma_40020400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, 0) +#define DT_N_S_soc_S_dma_40020400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_RANGES_NUM 0 +#define DT_N_S_soc_S_dma_40020400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dma_40020400_IRQ_NUM 6 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_irq 56 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_irq 57 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_irq 58 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_irq 59 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_irq 60 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_irq 97 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_MATCHES_st_stm32_dma_v2 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dma_40020400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_MODEL_IDX_0 "stm32-dma-v2" +#define DT_N_S_soc_S_dma_40020400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dma_40020400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dma_40020400_P_reg {1073873920 /* 0x40020400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_0 1073873920 +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dma_40020400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts {56 /* 0x38 */, 0 /* 0x0 */, 57 /* 0x39 */, 0 /* 0x0 */, 58 /* 0x3a */, 0 /* 0x0 */, 59 /* 0x3b */, 0 /* 0x0 */, 60 /* 0x3c */, 0 /* 0x0 */, 97 /* 0x61 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_0 56 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_2 57 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_4 58 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_6 59 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_8 60 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_10 97 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_st_mem2mem 0 +#define DT_N_S_soc_S_dma_40020400_P_st_mem2mem_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_dma_offset 6 +#define DT_N_S_soc_S_dma_40020400_P_dma_offset_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_dma_requests 6 +#define DT_N_S_soc_S_dma_40020400_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status "disabled" +#define DT_N_S_soc_S_dma_40020400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dma_40020400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dma_40020400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, status, 0) +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, status, 0) +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_status_LEN 1 +#define DT_N_S_soc_S_dma_40020400_P_status_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_compatible {"st,stm32-dma-v2"} +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0 "st,stm32-dma-v2" +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dma-v2 +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_TOKEN st_stm32_dma_v2 +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMA_V2 +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, compatible, 0) +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, compatible, 0) +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_compatible_LEN 1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bus 72 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_dma_40020400, clocks, 0, bits) +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dma_40020400, clocks, 0, bits) +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, clocks, 0) +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, clocks, 0) +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_clocks_LEN 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_dma_coherent 0 +#define DT_N_S_soc_S_dma_40020400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_wakeup_source 0 +#define DT_N_S_soc_S_dma_40020400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dmamux@40020800 + * + * Node identifier: DT_N_S_soc_S_dmamux_40020800 + * + * Binding (compatible = st,stm32-dmamux): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dmamux.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dmamux_40020800_PATH "/soc/dmamux@40020800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME "dmamux@40020800" +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_UNQUOTED dmamux@40020800 +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_TOKEN dmamux_40020800 +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_UPPER_TOKEN DMAMUX_40020800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dmamux_40020800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dmamux_40020800_CHILD_IDX 40 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dmamux_40020800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_NODELABEL(fn) fn(dmamux1) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_NODELABEL_VARGS(fn, ...) fn(dmamux1, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dmamux_40020800_CHILD_NUM 0 +#define DT_N_S_soc_S_dmamux_40020800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dmamux_40020800_HASH jGulMrGrDMjffC0jOcX9YAYtoaIaoNYHlAm2EvPJs_w + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dmamux_40020800_ORD 61 +#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00061 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dmamux_40020800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dmamux_40020800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dmamux_40020800_EXISTS 1 +#define DT_N_INST_0_st_stm32_dmamux DT_N_S_soc_S_dmamux_40020800 +#define DT_N_NODELABEL_dmamux1 DT_N_S_soc_S_dmamux_40020800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dmamux_40020800_REG_NUM 1 +#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_VAL_ADDRESS 1073874944 /* 0x40020800 */ +#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_REG(fn) fn(DT_N_S_soc_S_dmamux_40020800, 0) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, 0) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_RANGES_NUM 0 +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dmamux_40020800_IRQ_NUM 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_irq 94 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MATCHES_st_stm32_dmamux 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MODEL_IDX_0 "stm32-dmamux" +#define DT_N_S_soc_S_dmamux_40020800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dmamux_40020800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dmamux_40020800_P_reg {1073874944 /* 0x40020800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_0 1073874944 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_channels 12 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_channels_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_generators 4 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_generators_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_requests 111 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status "disabled" +#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, status, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, status, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_status_LEN 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_compatible {"st,stm32-dmamux"} +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0 "st,stm32-dmamux" +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dmamux +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_TOKEN st_stm32_dmamux +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMAMUX +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_LEN 1 +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts {94 /* 0x5e */, 0 /* 0x0 */} +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_0 94 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bus 72 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bits 4 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, bits) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, bits) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_LEN 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_coherent 0 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_wakeup_source 0 +#define DT_N_S_soc_S_dmamux_40020800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/interrupt-controller@40010400 + * + * Node identifier: DT_N_S_soc_S_interrupt_controller_40010400 + * + * Binding (compatible = st,stm32-exti): + * $ZEPHYR_BASE/dts/bindings/interrupt-controller/st,stm32-exti.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_PATH "/soc/interrupt-controller@40010400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_FULL_NAME "interrupt-controller@40010400" +#define DT_N_S_soc_S_interrupt_controller_40010400_FULL_NAME_UNQUOTED interrupt-controller@40010400 +#define DT_N_S_soc_S_interrupt_controller_40010400_FULL_NAME_TOKEN interrupt_controller_40010400 +#define DT_N_S_soc_S_interrupt_controller_40010400_FULL_NAME_UPPER_TOKEN INTERRUPT_CONTROLLER_40010400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_CHILD_IDX 8 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_NODELABEL(fn) fn(exti) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_NODELABEL_VARGS(fn, ...) fn(exti, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_interrupt_controller_40010400_CHILD_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_HASH e_jpSkD_2HRRVwDpnnAQSjqS4ZdVHIcY8woRSWkf10Q + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_ORD 62 +#define DT_N_S_soc_S_interrupt_controller_40010400_ORD_STR_SORTABLE 00062 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_EXISTS 1 +#define DT_N_INST_0_st_stm32_exti DT_N_S_soc_S_interrupt_controller_40010400 +#define DT_N_NODELABEL_exti DT_N_S_soc_S_interrupt_controller_40010400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_REG_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_REG_IDX_0_VAL_ADDRESS 1073808384 /* 0x40010400 */ +#define DT_N_S_soc_S_interrupt_controller_40010400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_REG(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400, 0) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_40010400, 0) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_RANGES_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NUM 7 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_VAL_irq 6 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_VAL_irq 7 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_VAL_irq 8 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_VAL_irq 9 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_VAL_irq 10 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_VAL_irq 23 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_VAL_irq 40 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line0_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line0_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line0_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line1_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line1_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line1_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line2_tsc_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line2_tsc_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line2_tsc_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line2_tsc_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line2_tsc_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line3_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line3_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line3_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line4_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line4_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line4_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_4_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line5_9_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line5_9_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line5_9_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line5_9_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line5_9_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_5_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line10_15_VAL_irq DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line10_15_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line10_15_VAL_priority DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line10_15_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_IRQ_NAME_line10_15_CONTROLLER DT_N_S_soc_S_interrupt_controller_40010400_IRQ_IDX_6_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_40010400_COMPAT_MATCHES_st_stm32_exti 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_interrupt_controller_40010400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_COMPAT_MODEL_IDX_0 "stm32-exti" +#define DT_N_S_soc_S_interrupt_controller_40010400_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_interrupt_controller_40010400_P_reg {1073808384 /* 0x40010400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_interrupt_controller_40010400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_reg_IDX_0 1073808384 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts {6 /* 0x6 */, 0 /* 0x0 */, 7 /* 0x7 */, 0 /* 0x0 */, 8 /* 0x8 */, 0 /* 0x0 */, 9 /* 0x9 */, 0 /* 0x0 */, 10 /* 0xa */, 0 /* 0x0 */, 23 /* 0x17 */, 0 /* 0x0 */, 40 /* 0x28 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_0 6 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_2 7 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_4 8 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_6 9 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_8 10 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_10 23 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_12 40 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_IDX_13 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names {"line0", "line1", "line2-TSC", "line3", "line4", "line5-9", "line10-15"} +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_0 "line0" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_0_STRING_UNQUOTED line0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_0_STRING_TOKEN line0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN LINE0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_1 "line1" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_1_STRING_UNQUOTED line1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_1_STRING_TOKEN line1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN LINE1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_2 "line2-TSC" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_2_STRING_UNQUOTED line2-TSC +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_2_STRING_TOKEN line2_TSC +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN LINE2_TSC +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_3 "line3" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_3_STRING_UNQUOTED line3 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_3_STRING_TOKEN line3 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN LINE3 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_4 "line4" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_4_STRING_UNQUOTED line4 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_4_STRING_TOKEN line4 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_4_STRING_UPPER_TOKEN LINE4 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_5 "line5-9" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_5_STRING_UNQUOTED line5-9 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_5_STRING_TOKEN line5_9 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_5_STRING_UPPER_TOKEN LINE5_9 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_6 "line10-15" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_6_STRING_UNQUOTED line10-15 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_6_STRING_TOKEN line10_15 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_IDX_6_STRING_UPPER_TOKEN LINE10_15 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 0) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 1) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 2) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 3) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 4) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 5) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 6) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 6) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 6, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, interrupt_names, 6, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_LEN 7 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_num_lines 64 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_num_lines_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_num_gpio_lines 16 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_num_gpio_lines_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges {0 /* 0x0 */, 1 /* 0x1 */, 1 /* 0x1 */, 1 /* 0x1 */, 2 /* 0x2 */, 1 /* 0x1 */, 3 /* 0x3 */, 1 /* 0x1 */, 4 /* 0x4 */, 1 /* 0x1 */, 5 /* 0x5 */, 5 /* 0x5 */, 10 /* 0xa */, 6 /* 0x6 */} +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_0 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_1 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_2 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_3 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_4 2 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_5 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_6 3 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_7 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_8 4 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_9 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_10 5 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_11 5 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_12 10 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_IDX_13 6 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 0) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 1) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 2) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 3) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 4) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 5) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 6) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 7) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 8) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 9) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 10) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 11) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 12) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 13) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 11) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 12) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 13) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 11, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 12, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 13, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, line_ranges, 13, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_LEN 14 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_line_ranges_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible {"st,stm32-exti"} +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_IDX_0 "st,stm32-exti" +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-exti +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_IDX_0_STRING_TOKEN st_stm32_exti +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_EXTI +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_40010400, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_LEN 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0, bits) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0, bits) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_LEN 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_dma_coherent 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_wakeup_source 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_controller 1 +#define DT_N_S_soc_S_interrupt_controller_40010400_P_interrupt_controller_EXISTS 1 + +/* + * Devicetree node: /soc/opamp1@40010300 + * + * Node identifier: DT_N_S_soc_S_opamp1_40010300 + * + * Binding (compatible = st,stm32g4-opamp): + * $ZEPHYR_BASE/dts/bindings/opamp/st,stm32g4-opamp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_opamp1_40010300_PATH "/soc/opamp1@40010300" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_opamp1_40010300_FULL_NAME "opamp1@40010300" +#define DT_N_S_soc_S_opamp1_40010300_FULL_NAME_UNQUOTED opamp1@40010300 +#define DT_N_S_soc_S_opamp1_40010300_FULL_NAME_TOKEN opamp1_40010300 +#define DT_N_S_soc_S_opamp1_40010300_FULL_NAME_UPPER_TOKEN OPAMP1_40010300 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_opamp1_40010300_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_opamp1_40010300_CHILD_IDX 44 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_opamp1_40010300_NODELABEL_NUM 1 +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_NODELABEL(fn) fn(opamp1) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_NODELABEL_VARGS(fn, ...) fn(opamp1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_opamp1_40010300_CHILD_NUM 0 +#define DT_N_S_soc_S_opamp1_40010300_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_opamp1_40010300_HASH aCXNiTfhFhJfAbkt6Jfx73W2ZbtZ_qCtU9RdWmSBUHU + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_opamp1_40010300_ORD 63 +#define DT_N_S_soc_S_opamp1_40010300_ORD_STR_SORTABLE 00063 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_opamp1_40010300_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_opamp1_40010300_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_opamp1_40010300_EXISTS 1 +#define DT_N_INST_0_st_stm32g4_opamp DT_N_S_soc_S_opamp1_40010300 +#define DT_N_INST_0_st_stm32_opamp DT_N_S_soc_S_opamp1_40010300 +#define DT_N_NODELABEL_opamp1 DT_N_S_soc_S_opamp1_40010300 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_opamp1_40010300_REG_NUM 1 +#define DT_N_S_soc_S_opamp1_40010300_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_REG_IDX_0_VAL_ADDRESS 1073808128 /* 0x40010300 */ +#define DT_N_S_soc_S_opamp1_40010300_REG_IDX_0_VAL_SIZE 24 /* 0x18 */ +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_REG(fn) fn(DT_N_S_soc_S_opamp1_40010300, 0) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, 0) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_RANGES_NUM 0 +#define DT_N_S_soc_S_opamp1_40010300_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_opamp1_40010300_IRQ_NUM 0 +#define DT_N_S_soc_S_opamp1_40010300_IRQ_LEVEL 0 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_MATCHES_st_stm32g4_opamp 1 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_MODEL_IDX_0 "stm32g4-opamp" +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_MATCHES_st_stm32_opamp 1 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_COMPAT_MODEL_IDX_1 "stm32-opamp" +#define DT_N_S_soc_S_opamp1_40010300_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_opamp1_40010300_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode "NORMAL" +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_STRING_UNQUOTED NORMAL +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_STRING_TOKEN NORMAL +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_STRING_UPPER_TOKEN NORMAL +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_IDX_0 "NORMAL" +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_IDX_0_ENUM_VAL_normal_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_ENUM_VAL_normal_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, st_power_mode, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, st_power_mode, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, st_power_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, st_power_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_LEN 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_power_mode_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_lock_enable 0 +#define DT_N_S_soc_S_opamp1_40010300_P_st_lock_enable_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_enable_self_calibration 0 +#define DT_N_S_soc_S_opamp1_40010300_P_st_enable_self_calibration_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering "NONE" +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_STRING_TOKEN NONE +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_IDX_0 "NONE" +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, st_inm_filtering, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, st_inm_filtering, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, st_inm_filtering, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, st_inm_filtering, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_LEN 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inm_filtering_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode "DISABLE" +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_STRING_UNQUOTED DISABLE +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_STRING_TOKEN DISABLE +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_STRING_UPPER_TOKEN DISABLE +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_IDX_0 "DISABLE" +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_IDX_0_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, st_inputs_mux_mode, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, st_inputs_mux_mode, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, st_inputs_mux_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, st_inputs_mux_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_LEN 1 +#define DT_N_S_soc_S_opamp1_40010300_P_st_inputs_mux_mode_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_reg {1073808128 /* 0x40010300 */, 24 /* 0x18 */} +#define DT_N_S_soc_S_opamp1_40010300_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_reg_IDX_0 1073808128 +#define DT_N_S_soc_S_opamp1_40010300_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_reg_IDX_1 24 +#define DT_N_S_soc_S_opamp1_40010300_P_reg_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0, bus) \ + fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0, bits) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0, bits) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_NAME "opampx" +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_IDX 0 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_FOREACH_CELL(fn) fn(DT_N_S_soc_S_opamp1_40010300, clocks, opampx, bus) \ + fn(DT_N_S_soc_S_opamp1_40010300, clocks, opampx, bits) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, clocks, opampx, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, clocks, opampx, bits) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_NUM_CELLS 2 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_VAL_bus DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_VAL_bus +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_VAL_bits DT_N_S_soc_S_opamp1_40010300_P_clocks_IDX_0_VAL_bits +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_NAME_opampx_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_LEN 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names {"opampx"} +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_IDX_0 "opampx" +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_IDX_0_STRING_UNQUOTED opampx +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_IDX_0_STRING_TOKEN opampx +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_IDX_0_STRING_UPPER_TOKEN OPAMPX +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, clock_names, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, clock_names, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_LEN 1 +#define DT_N_S_soc_S_opamp1_40010300_P_clock_names_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain {"OPAMP_GAIN_1", "OPAMP_GAIN_2", "OPAMP_GAIN_3", "OPAMP_GAIN_4", "OPAMP_GAIN_7", "OPAMP_GAIN_8", "OPAMP_GAIN_15", "OPAMP_GAIN_16", "OPAMP_GAIN_31", "OPAMP_GAIN_32", "OPAMP_GAIN_63", "OPAMP_GAIN_64"} +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1_ENUM_IDX 4 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2_ENUM_IDX 6 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3_ENUM_IDX 7 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4_ENUM_IDX 9 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5_ENUM_IDX 10 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6_ENUM_IDX 11 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7_ENUM_IDX 12 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8_ENUM_IDX 13 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9_ENUM_IDX 14 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10_ENUM_IDX 16 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11_ENUM_IDX 17 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0_ENUM_VAL_opamp_gain_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1_ENUM_VAL_opamp_gain_2_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_2_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2_ENUM_VAL_opamp_gain_3_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_3_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3_ENUM_VAL_opamp_gain_4_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_4_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4_ENUM_VAL_opamp_gain_7_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_7_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5_ENUM_VAL_opamp_gain_8_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_8_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6_ENUM_VAL_opamp_gain_15_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_15_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7_ENUM_VAL_opamp_gain_16_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_16_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8_ENUM_VAL_opamp_gain_31_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_31_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9_ENUM_VAL_opamp_gain_32_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_32_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10_ENUM_VAL_opamp_gain_63_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_63_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11_ENUM_VAL_opamp_gain_64_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_ENUM_VAL_opamp_gain_64_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0 "OPAMP_GAIN_1" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0_STRING_UNQUOTED OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0_STRING_TOKEN OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_0_STRING_UPPER_TOKEN OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1 "OPAMP_GAIN_2" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1_STRING_UNQUOTED OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1_STRING_TOKEN OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_1_STRING_UPPER_TOKEN OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2 "OPAMP_GAIN_3" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2_STRING_UNQUOTED OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2_STRING_TOKEN OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_2_STRING_UPPER_TOKEN OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3 "OPAMP_GAIN_4" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3_STRING_UNQUOTED OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3_STRING_TOKEN OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_3_STRING_UPPER_TOKEN OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4 "OPAMP_GAIN_7" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4_STRING_UNQUOTED OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4_STRING_TOKEN OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_4_STRING_UPPER_TOKEN OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5 "OPAMP_GAIN_8" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5_STRING_UNQUOTED OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5_STRING_TOKEN OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_5_STRING_UPPER_TOKEN OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6 "OPAMP_GAIN_15" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6_STRING_UNQUOTED OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6_STRING_TOKEN OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_6_STRING_UPPER_TOKEN OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7 "OPAMP_GAIN_16" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7_STRING_UNQUOTED OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7_STRING_TOKEN OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_7_STRING_UPPER_TOKEN OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8 "OPAMP_GAIN_31" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8_STRING_UNQUOTED OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8_STRING_TOKEN OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_8_STRING_UPPER_TOKEN OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9 "OPAMP_GAIN_32" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9_STRING_UNQUOTED OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9_STRING_TOKEN OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_9_STRING_UPPER_TOKEN OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10 "OPAMP_GAIN_63" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10_STRING_UNQUOTED OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10_STRING_TOKEN OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_10_STRING_UPPER_TOKEN OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11 "OPAMP_GAIN_64" +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11_STRING_UNQUOTED OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11_STRING_TOKEN OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_IDX_11_STRING_UPPER_TOKEN OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 0) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 1) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 2) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 3) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 4) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 5) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 6) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 7) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 8) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 9) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 10) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 11) +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 11) +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 11, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, programmable_gain, 11, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_LEN 12 +#define DT_N_S_soc_S_opamp1_40010300_P_programmable_gain_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_status "disabled" +#define DT_N_S_soc_S_opamp1_40010300_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_opamp1_40010300_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_opamp1_40010300_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_opamp1_40010300_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_opamp1_40010300_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_opamp1_40010300_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, status, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, status, 0) +#define DT_N_S_soc_S_opamp1_40010300_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_status_LEN 1 +#define DT_N_S_soc_S_opamp1_40010300_P_status_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_compatible {"st,stm32g4-opamp", "st,stm32-opamp"} +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_0 "st,stm32g4-opamp" +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g4-opamp +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_0_STRING_TOKEN st_stm32g4_opamp +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G4_OPAMP +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_1 "st,stm32-opamp" +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-opamp +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_1_STRING_TOKEN st_stm32_opamp +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_OPAMP +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp1_40010300, compatible, 0) \ + fn(DT_N_S_soc_S_opamp1_40010300, compatible, 1) +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp1_40010300, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, compatible, 1) +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp1_40010300, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp1_40010300, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp1_40010300, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp1_40010300, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_LEN 2 +#define DT_N_S_soc_S_opamp1_40010300_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_dma_coherent 0 +#define DT_N_S_soc_S_opamp1_40010300_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_opamp1_40010300_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_wakeup_source 0 +#define DT_N_S_soc_S_opamp1_40010300_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_opamp1_40010300_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_opamp1_40010300_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/opamp2@40010304 + * + * Node identifier: DT_N_S_soc_S_opamp2_40010304 + * + * Binding (compatible = st,stm32g4-opamp): + * $ZEPHYR_BASE/dts/bindings/opamp/st,stm32g4-opamp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_opamp2_40010304_PATH "/soc/opamp2@40010304" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_opamp2_40010304_FULL_NAME "opamp2@40010304" +#define DT_N_S_soc_S_opamp2_40010304_FULL_NAME_UNQUOTED opamp2@40010304 +#define DT_N_S_soc_S_opamp2_40010304_FULL_NAME_TOKEN opamp2_40010304 +#define DT_N_S_soc_S_opamp2_40010304_FULL_NAME_UPPER_TOKEN OPAMP2_40010304 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_opamp2_40010304_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_opamp2_40010304_CHILD_IDX 45 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_opamp2_40010304_NODELABEL_NUM 1 +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_NODELABEL(fn) fn(opamp2) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_NODELABEL_VARGS(fn, ...) fn(opamp2, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_opamp2_40010304_CHILD_NUM 0 +#define DT_N_S_soc_S_opamp2_40010304_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_opamp2_40010304_HASH ckim8RZj5_Q3nSyk6mDYnK5krFNwlh6M5jrnAEWaPiw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_opamp2_40010304_ORD 64 +#define DT_N_S_soc_S_opamp2_40010304_ORD_STR_SORTABLE 00064 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_opamp2_40010304_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_opamp2_40010304_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_opamp2_40010304_EXISTS 1 +#define DT_N_INST_1_st_stm32g4_opamp DT_N_S_soc_S_opamp2_40010304 +#define DT_N_INST_1_st_stm32_opamp DT_N_S_soc_S_opamp2_40010304 +#define DT_N_NODELABEL_opamp2 DT_N_S_soc_S_opamp2_40010304 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_opamp2_40010304_REG_NUM 1 +#define DT_N_S_soc_S_opamp2_40010304_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_REG_IDX_0_VAL_ADDRESS 1073808132 /* 0x40010304 */ +#define DT_N_S_soc_S_opamp2_40010304_REG_IDX_0_VAL_SIZE 24 /* 0x18 */ +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_REG(fn) fn(DT_N_S_soc_S_opamp2_40010304, 0) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, 0) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_RANGES_NUM 0 +#define DT_N_S_soc_S_opamp2_40010304_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_opamp2_40010304_IRQ_NUM 0 +#define DT_N_S_soc_S_opamp2_40010304_IRQ_LEVEL 0 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_MATCHES_st_stm32g4_opamp 1 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_MODEL_IDX_0 "stm32g4-opamp" +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_MATCHES_st_stm32_opamp 1 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_COMPAT_MODEL_IDX_1 "stm32-opamp" +#define DT_N_S_soc_S_opamp2_40010304_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_opamp2_40010304_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode "NORMAL" +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_STRING_UNQUOTED NORMAL +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_STRING_TOKEN NORMAL +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_STRING_UPPER_TOKEN NORMAL +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_IDX_0 "NORMAL" +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_IDX_0_ENUM_VAL_normal_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_ENUM_VAL_normal_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, st_power_mode, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, st_power_mode, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, st_power_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, st_power_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_LEN 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_power_mode_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_lock_enable 0 +#define DT_N_S_soc_S_opamp2_40010304_P_st_lock_enable_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_enable_self_calibration 0 +#define DT_N_S_soc_S_opamp2_40010304_P_st_enable_self_calibration_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering "NONE" +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_STRING_TOKEN NONE +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_IDX_0 "NONE" +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, st_inm_filtering, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, st_inm_filtering, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, st_inm_filtering, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, st_inm_filtering, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_LEN 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inm_filtering_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode "DISABLE" +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_STRING_UNQUOTED DISABLE +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_STRING_TOKEN DISABLE +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_STRING_UPPER_TOKEN DISABLE +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_IDX_0 "DISABLE" +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_IDX_0_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, st_inputs_mux_mode, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, st_inputs_mux_mode, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, st_inputs_mux_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, st_inputs_mux_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_LEN 1 +#define DT_N_S_soc_S_opamp2_40010304_P_st_inputs_mux_mode_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_reg {1073808132 /* 0x40010304 */, 24 /* 0x18 */} +#define DT_N_S_soc_S_opamp2_40010304_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_reg_IDX_0 1073808132 +#define DT_N_S_soc_S_opamp2_40010304_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_reg_IDX_1 24 +#define DT_N_S_soc_S_opamp2_40010304_P_reg_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0, bus) \ + fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0, bits) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0, bits) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_NAME "opampx" +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_IDX 0 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_FOREACH_CELL(fn) fn(DT_N_S_soc_S_opamp2_40010304, clocks, opampx, bus) \ + fn(DT_N_S_soc_S_opamp2_40010304, clocks, opampx, bits) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, clocks, opampx, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, clocks, opampx, bits) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_NUM_CELLS 2 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_VAL_bus DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_VAL_bus +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_VAL_bits DT_N_S_soc_S_opamp2_40010304_P_clocks_IDX_0_VAL_bits +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_NAME_opampx_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_LEN 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names {"opampx"} +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_IDX_0 "opampx" +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_IDX_0_STRING_UNQUOTED opampx +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_IDX_0_STRING_TOKEN opampx +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_IDX_0_STRING_UPPER_TOKEN OPAMPX +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, clock_names, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, clock_names, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_LEN 1 +#define DT_N_S_soc_S_opamp2_40010304_P_clock_names_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain {"OPAMP_GAIN_1", "OPAMP_GAIN_2", "OPAMP_GAIN_3", "OPAMP_GAIN_4", "OPAMP_GAIN_7", "OPAMP_GAIN_8", "OPAMP_GAIN_15", "OPAMP_GAIN_16", "OPAMP_GAIN_31", "OPAMP_GAIN_32", "OPAMP_GAIN_63", "OPAMP_GAIN_64"} +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1_ENUM_IDX 4 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2_ENUM_IDX 6 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3_ENUM_IDX 7 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4_ENUM_IDX 9 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5_ENUM_IDX 10 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6_ENUM_IDX 11 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7_ENUM_IDX 12 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8_ENUM_IDX 13 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9_ENUM_IDX 14 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10_ENUM_IDX 16 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11_ENUM_IDX 17 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0_ENUM_VAL_opamp_gain_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1_ENUM_VAL_opamp_gain_2_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_2_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2_ENUM_VAL_opamp_gain_3_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_3_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3_ENUM_VAL_opamp_gain_4_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_4_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4_ENUM_VAL_opamp_gain_7_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_7_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5_ENUM_VAL_opamp_gain_8_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_8_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6_ENUM_VAL_opamp_gain_15_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_15_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7_ENUM_VAL_opamp_gain_16_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_16_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8_ENUM_VAL_opamp_gain_31_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_31_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9_ENUM_VAL_opamp_gain_32_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_32_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10_ENUM_VAL_opamp_gain_63_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_63_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11_ENUM_VAL_opamp_gain_64_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_ENUM_VAL_opamp_gain_64_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0 "OPAMP_GAIN_1" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0_STRING_UNQUOTED OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0_STRING_TOKEN OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_0_STRING_UPPER_TOKEN OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1 "OPAMP_GAIN_2" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1_STRING_UNQUOTED OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1_STRING_TOKEN OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_1_STRING_UPPER_TOKEN OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2 "OPAMP_GAIN_3" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2_STRING_UNQUOTED OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2_STRING_TOKEN OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_2_STRING_UPPER_TOKEN OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3 "OPAMP_GAIN_4" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3_STRING_UNQUOTED OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3_STRING_TOKEN OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_3_STRING_UPPER_TOKEN OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4 "OPAMP_GAIN_7" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4_STRING_UNQUOTED OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4_STRING_TOKEN OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_4_STRING_UPPER_TOKEN OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5 "OPAMP_GAIN_8" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5_STRING_UNQUOTED OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5_STRING_TOKEN OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_5_STRING_UPPER_TOKEN OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6 "OPAMP_GAIN_15" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6_STRING_UNQUOTED OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6_STRING_TOKEN OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_6_STRING_UPPER_TOKEN OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7 "OPAMP_GAIN_16" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7_STRING_UNQUOTED OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7_STRING_TOKEN OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_7_STRING_UPPER_TOKEN OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8 "OPAMP_GAIN_31" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8_STRING_UNQUOTED OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8_STRING_TOKEN OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_8_STRING_UPPER_TOKEN OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9 "OPAMP_GAIN_32" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9_STRING_UNQUOTED OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9_STRING_TOKEN OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_9_STRING_UPPER_TOKEN OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10 "OPAMP_GAIN_63" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10_STRING_UNQUOTED OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10_STRING_TOKEN OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_10_STRING_UPPER_TOKEN OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11 "OPAMP_GAIN_64" +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11_STRING_UNQUOTED OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11_STRING_TOKEN OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_IDX_11_STRING_UPPER_TOKEN OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 0) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 1) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 2) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 3) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 4) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 5) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 6) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 7) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 8) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 9) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 10) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 11) +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 11) +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 11, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, programmable_gain, 11, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_LEN 12 +#define DT_N_S_soc_S_opamp2_40010304_P_programmable_gain_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_status "disabled" +#define DT_N_S_soc_S_opamp2_40010304_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_opamp2_40010304_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_opamp2_40010304_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_opamp2_40010304_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_opamp2_40010304_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_opamp2_40010304_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, status, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, status, 0) +#define DT_N_S_soc_S_opamp2_40010304_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_status_LEN 1 +#define DT_N_S_soc_S_opamp2_40010304_P_status_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_compatible {"st,stm32g4-opamp", "st,stm32-opamp"} +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_0 "st,stm32g4-opamp" +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g4-opamp +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_0_STRING_TOKEN st_stm32g4_opamp +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G4_OPAMP +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_1 "st,stm32-opamp" +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-opamp +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_1_STRING_TOKEN st_stm32_opamp +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_OPAMP +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp2_40010304, compatible, 0) \ + fn(DT_N_S_soc_S_opamp2_40010304, compatible, 1) +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp2_40010304, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, compatible, 1) +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp2_40010304, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp2_40010304, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp2_40010304, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp2_40010304, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_LEN 2 +#define DT_N_S_soc_S_opamp2_40010304_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_dma_coherent 0 +#define DT_N_S_soc_S_opamp2_40010304_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_opamp2_40010304_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_wakeup_source 0 +#define DT_N_S_soc_S_opamp2_40010304_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_opamp2_40010304_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_opamp2_40010304_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/opamp3@40010308 + * + * Node identifier: DT_N_S_soc_S_opamp3_40010308 + * + * Binding (compatible = st,stm32g4-opamp): + * $ZEPHYR_BASE/dts/bindings/opamp/st,stm32g4-opamp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_opamp3_40010308_PATH "/soc/opamp3@40010308" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_opamp3_40010308_FULL_NAME "opamp3@40010308" +#define DT_N_S_soc_S_opamp3_40010308_FULL_NAME_UNQUOTED opamp3@40010308 +#define DT_N_S_soc_S_opamp3_40010308_FULL_NAME_TOKEN opamp3_40010308 +#define DT_N_S_soc_S_opamp3_40010308_FULL_NAME_UPPER_TOKEN OPAMP3_40010308 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_opamp3_40010308_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_opamp3_40010308_CHILD_IDX 46 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_opamp3_40010308_NODELABEL_NUM 1 +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_NODELABEL(fn) fn(opamp3) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_NODELABEL_VARGS(fn, ...) fn(opamp3, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_opamp3_40010308_CHILD_NUM 0 +#define DT_N_S_soc_S_opamp3_40010308_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_opamp3_40010308_HASH ipHNN3tjmXTPhEKG4Q1KM0oSK0qlxT8pZq_uY3Ty_3o + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_opamp3_40010308_ORD 65 +#define DT_N_S_soc_S_opamp3_40010308_ORD_STR_SORTABLE 00065 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_opamp3_40010308_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_opamp3_40010308_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_opamp3_40010308_EXISTS 1 +#define DT_N_INST_2_st_stm32g4_opamp DT_N_S_soc_S_opamp3_40010308 +#define DT_N_INST_2_st_stm32_opamp DT_N_S_soc_S_opamp3_40010308 +#define DT_N_NODELABEL_opamp3 DT_N_S_soc_S_opamp3_40010308 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_opamp3_40010308_REG_NUM 1 +#define DT_N_S_soc_S_opamp3_40010308_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_REG_IDX_0_VAL_ADDRESS 1073808136 /* 0x40010308 */ +#define DT_N_S_soc_S_opamp3_40010308_REG_IDX_0_VAL_SIZE 24 /* 0x18 */ +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_REG(fn) fn(DT_N_S_soc_S_opamp3_40010308, 0) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, 0) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_RANGES_NUM 0 +#define DT_N_S_soc_S_opamp3_40010308_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_opamp3_40010308_IRQ_NUM 0 +#define DT_N_S_soc_S_opamp3_40010308_IRQ_LEVEL 0 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_MATCHES_st_stm32g4_opamp 1 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_MODEL_IDX_0 "stm32g4-opamp" +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_MATCHES_st_stm32_opamp 1 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_COMPAT_MODEL_IDX_1 "stm32-opamp" +#define DT_N_S_soc_S_opamp3_40010308_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_opamp3_40010308_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode "NORMAL" +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_STRING_UNQUOTED NORMAL +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_STRING_TOKEN NORMAL +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_STRING_UPPER_TOKEN NORMAL +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_IDX_0 "NORMAL" +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_IDX_0_ENUM_VAL_normal_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_ENUM_VAL_normal_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, st_power_mode, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, st_power_mode, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, st_power_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, st_power_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_LEN 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_power_mode_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_lock_enable 0 +#define DT_N_S_soc_S_opamp3_40010308_P_st_lock_enable_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_enable_self_calibration 0 +#define DT_N_S_soc_S_opamp3_40010308_P_st_enable_self_calibration_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering "NONE" +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_STRING_UNQUOTED NONE +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_STRING_TOKEN NONE +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_IDX_0 "NONE" +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, st_inm_filtering, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, st_inm_filtering, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, st_inm_filtering, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, st_inm_filtering, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_LEN 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inm_filtering_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode "DISABLE" +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_STRING_UNQUOTED DISABLE +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_STRING_TOKEN DISABLE +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_STRING_UPPER_TOKEN DISABLE +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_IDX_0 "DISABLE" +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_IDX_0_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, st_inputs_mux_mode, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, st_inputs_mux_mode, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, st_inputs_mux_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, st_inputs_mux_mode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_LEN 1 +#define DT_N_S_soc_S_opamp3_40010308_P_st_inputs_mux_mode_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_reg {1073808136 /* 0x40010308 */, 24 /* 0x18 */} +#define DT_N_S_soc_S_opamp3_40010308_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_reg_IDX_0 1073808136 +#define DT_N_S_soc_S_opamp3_40010308_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_reg_IDX_1 24 +#define DT_N_S_soc_S_opamp3_40010308_P_reg_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0, bus) \ + fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0, bits) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0, bits) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_NAME "opampx" +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_IDX 0 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_FOREACH_CELL(fn) fn(DT_N_S_soc_S_opamp3_40010308, clocks, opampx, bus) \ + fn(DT_N_S_soc_S_opamp3_40010308, clocks, opampx, bits) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, clocks, opampx, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, clocks, opampx, bits) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_NUM_CELLS 2 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_VAL_bus DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_VAL_bus +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_VAL_bits DT_N_S_soc_S_opamp3_40010308_P_clocks_IDX_0_VAL_bits +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_NAME_opampx_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_LEN 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names {"opampx"} +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_IDX_0 "opampx" +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_IDX_0_STRING_UNQUOTED opampx +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_IDX_0_STRING_TOKEN opampx +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_IDX_0_STRING_UPPER_TOKEN OPAMPX +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, clock_names, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, clock_names, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, clock_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_LEN 1 +#define DT_N_S_soc_S_opamp3_40010308_P_clock_names_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain {"OPAMP_GAIN_1", "OPAMP_GAIN_2", "OPAMP_GAIN_3", "OPAMP_GAIN_4", "OPAMP_GAIN_7", "OPAMP_GAIN_8", "OPAMP_GAIN_15", "OPAMP_GAIN_16", "OPAMP_GAIN_31", "OPAMP_GAIN_32", "OPAMP_GAIN_63", "OPAMP_GAIN_64"} +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1_ENUM_IDX 4 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2_ENUM_IDX 6 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3_ENUM_IDX 7 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4_ENUM_IDX 9 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5_ENUM_IDX 10 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6_ENUM_IDX 11 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7_ENUM_IDX 12 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8_ENUM_IDX 13 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9_ENUM_IDX 14 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10_ENUM_IDX 16 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11_ENUM_IDX 17 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0_ENUM_VAL_opamp_gain_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1_ENUM_VAL_opamp_gain_2_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_2_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2_ENUM_VAL_opamp_gain_3_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_3_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3_ENUM_VAL_opamp_gain_4_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_4_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4_ENUM_VAL_opamp_gain_7_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_7_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5_ENUM_VAL_opamp_gain_8_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_8_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6_ENUM_VAL_opamp_gain_15_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_15_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7_ENUM_VAL_opamp_gain_16_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_16_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8_ENUM_VAL_opamp_gain_31_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_31_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9_ENUM_VAL_opamp_gain_32_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_32_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10_ENUM_VAL_opamp_gain_63_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_63_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11_ENUM_VAL_opamp_gain_64_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_ENUM_VAL_opamp_gain_64_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0 "OPAMP_GAIN_1" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0_STRING_UNQUOTED OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0_STRING_TOKEN OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_0_STRING_UPPER_TOKEN OPAMP_GAIN_1 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1 "OPAMP_GAIN_2" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1_STRING_UNQUOTED OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1_STRING_TOKEN OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_1_STRING_UPPER_TOKEN OPAMP_GAIN_2 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2 "OPAMP_GAIN_3" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2_STRING_UNQUOTED OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2_STRING_TOKEN OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_2_STRING_UPPER_TOKEN OPAMP_GAIN_3 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3 "OPAMP_GAIN_4" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3_STRING_UNQUOTED OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3_STRING_TOKEN OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_3_STRING_UPPER_TOKEN OPAMP_GAIN_4 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4 "OPAMP_GAIN_7" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4_STRING_UNQUOTED OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4_STRING_TOKEN OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_4_STRING_UPPER_TOKEN OPAMP_GAIN_7 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5 "OPAMP_GAIN_8" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5_STRING_UNQUOTED OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5_STRING_TOKEN OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_5_STRING_UPPER_TOKEN OPAMP_GAIN_8 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6 "OPAMP_GAIN_15" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6_STRING_UNQUOTED OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6_STRING_TOKEN OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_6_STRING_UPPER_TOKEN OPAMP_GAIN_15 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7 "OPAMP_GAIN_16" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7_STRING_UNQUOTED OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7_STRING_TOKEN OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_7_STRING_UPPER_TOKEN OPAMP_GAIN_16 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8 "OPAMP_GAIN_31" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8_STRING_UNQUOTED OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8_STRING_TOKEN OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_8_STRING_UPPER_TOKEN OPAMP_GAIN_31 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9 "OPAMP_GAIN_32" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9_STRING_UNQUOTED OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9_STRING_TOKEN OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_9_STRING_UPPER_TOKEN OPAMP_GAIN_32 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10 "OPAMP_GAIN_63" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10_STRING_UNQUOTED OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10_STRING_TOKEN OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_10_STRING_UPPER_TOKEN OPAMP_GAIN_63 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11 "OPAMP_GAIN_64" +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11_STRING_UNQUOTED OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11_STRING_TOKEN OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_IDX_11_STRING_UPPER_TOKEN OPAMP_GAIN_64 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 0) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 1) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 2) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 3) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 4) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 5) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 6) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 7) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 8) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 9) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 10) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 11) +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 11) +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 11, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, programmable_gain, 11, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_LEN 12 +#define DT_N_S_soc_S_opamp3_40010308_P_programmable_gain_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_status "disabled" +#define DT_N_S_soc_S_opamp3_40010308_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_opamp3_40010308_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_opamp3_40010308_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_opamp3_40010308_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_opamp3_40010308_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_opamp3_40010308_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, status, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, status, 0) +#define DT_N_S_soc_S_opamp3_40010308_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_status_LEN 1 +#define DT_N_S_soc_S_opamp3_40010308_P_status_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_compatible {"st,stm32g4-opamp", "st,stm32-opamp"} +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_0 "st,stm32g4-opamp" +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_0_STRING_UNQUOTED st,stm32g4-opamp +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_0_STRING_TOKEN st_stm32g4_opamp +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32G4_OPAMP +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_1 "st,stm32-opamp" +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-opamp +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_1_STRING_TOKEN st_stm32_opamp +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_OPAMP +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_opamp3_40010308, compatible, 0) \ + fn(DT_N_S_soc_S_opamp3_40010308, compatible, 1) +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_opamp3_40010308, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, compatible, 1) +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_opamp3_40010308, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_opamp3_40010308, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_opamp3_40010308, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_opamp3_40010308, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_LEN 2 +#define DT_N_S_soc_S_opamp3_40010308_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_dma_coherent 0 +#define DT_N_S_soc_S_opamp3_40010308_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_opamp3_40010308_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_wakeup_source 0 +#define DT_N_S_soc_S_opamp3_40010308_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_opamp3_40010308_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_opamp3_40010308_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/rng@50060800 + * + * Node identifier: DT_N_S_soc_S_rng_50060800 + * + * Binding (compatible = st,stm32-rng): + * $ZEPHYR_BASE/dts/bindings/rng/st,stm32-rng.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_rng_50060800_PATH "/soc/rng@50060800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_rng_50060800_FULL_NAME "rng@50060800" +#define DT_N_S_soc_S_rng_50060800_FULL_NAME_UNQUOTED rng@50060800 +#define DT_N_S_soc_S_rng_50060800_FULL_NAME_TOKEN rng_50060800 +#define DT_N_S_soc_S_rng_50060800_FULL_NAME_UPPER_TOKEN RNG_50060800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_rng_50060800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_rng_50060800_CHILD_IDX 36 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_rng_50060800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_rng_50060800_FOREACH_NODELABEL(fn) fn(rng) +#define DT_N_S_soc_S_rng_50060800_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_rng_50060800_CHILD_NUM 0 +#define DT_N_S_soc_S_rng_50060800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_rng_50060800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_rng_50060800_HASH 8eafQpG6YwQpjan2edsqJHU8l7DaDSiLzDM6EGAP_Uc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_rng_50060800_ORD 66 +#define DT_N_S_soc_S_rng_50060800_ORD_STR_SORTABLE 00066 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_rng_50060800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_rng_50060800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_rng_50060800_EXISTS 1 +#define DT_N_INST_0_st_stm32_rng DT_N_S_soc_S_rng_50060800 +#define DT_N_NODELABEL_rng DT_N_S_soc_S_rng_50060800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_rng_50060800_REG_NUM 1 +#define DT_N_S_soc_S_rng_50060800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_REG_IDX_0_VAL_ADDRESS 1342572544 /* 0x50060800 */ +#define DT_N_S_soc_S_rng_50060800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_rng_50060800_FOREACH_REG(fn) fn(DT_N_S_soc_S_rng_50060800, 0) +#define DT_N_S_soc_S_rng_50060800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_rng_50060800, 0) +#define DT_N_S_soc_S_rng_50060800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_50060800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_50060800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_RANGES_NUM 0 +#define DT_N_S_soc_S_rng_50060800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_rng_50060800_IRQ_NUM 1 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_VAL_irq 90 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_rng_50060800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_rng_50060800_COMPAT_MATCHES_st_stm32_rng 1 +#define DT_N_S_soc_S_rng_50060800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_rng_50060800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_COMPAT_MODEL_IDX_0 "stm32-rng" +#define DT_N_S_soc_S_rng_50060800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_rng_50060800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_rng_50060800_P_reg {1342572544 /* 0x50060800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_rng_50060800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_reg_IDX_0 1342572544 +#define DT_N_S_soc_S_rng_50060800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_rng_50060800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_VAL_bits 67108864 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_rng_50060800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 0, bits) +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_rng_50060800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 0, bits) +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_VAL_bus 5 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_VAL_bits 3801224 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_rng_50060800, clocks, 1, bus) \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 1, bits) +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_rng_50060800, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 1, bits) +#define DT_N_S_soc_S_rng_50060800_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_rng_50060800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_50060800, clocks, 0) \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 1) +#define DT_N_S_soc_S_rng_50060800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_50060800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 1) +#define DT_N_S_soc_S_rng_50060800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_50060800, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_50060800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rng_50060800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_P_clocks_LEN 2 +#define DT_N_S_soc_S_rng_50060800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_status "okay" +#define DT_N_S_soc_S_rng_50060800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_rng_50060800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_rng_50060800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_rng_50060800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_rng_50060800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_rng_50060800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_50060800, status, 0) +#define DT_N_S_soc_S_rng_50060800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_50060800, status, 0) +#define DT_N_S_soc_S_rng_50060800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_50060800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_50060800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_P_status_LEN 1 +#define DT_N_S_soc_S_rng_50060800_P_status_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_compatible {"st,stm32-rng"} +#define DT_N_S_soc_S_rng_50060800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_compatible_IDX_0 "st,stm32-rng" +#define DT_N_S_soc_S_rng_50060800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rng +#define DT_N_S_soc_S_rng_50060800_P_compatible_IDX_0_STRING_TOKEN st_stm32_rng +#define DT_N_S_soc_S_rng_50060800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RNG +#define DT_N_S_soc_S_rng_50060800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_50060800, compatible, 0) +#define DT_N_S_soc_S_rng_50060800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_50060800, compatible, 0) +#define DT_N_S_soc_S_rng_50060800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_50060800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_50060800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_50060800_P_compatible_LEN 1 +#define DT_N_S_soc_S_rng_50060800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_interrupts {90 /* 0x5a */, 0 /* 0x0 */} +#define DT_N_S_soc_S_rng_50060800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_interrupts_IDX_0 90 +#define DT_N_S_soc_S_rng_50060800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_rng_50060800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_dma_coherent 0 +#define DT_N_S_soc_S_rng_50060800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_rng_50060800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_wakeup_source 0 +#define DT_N_S_soc_S_rng_50060800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_rng_50060800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_rng_50060800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/rtc@40002800 + * + * Node identifier: DT_N_S_soc_S_rtc_40002800 + * + * Binding (compatible = st,stm32-rtc): + * $ZEPHYR_BASE/dts/bindings/rtc/st,stm32-rtc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_rtc_40002800_PATH "/soc/rtc@40002800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_rtc_40002800_FULL_NAME "rtc@40002800" +#define DT_N_S_soc_S_rtc_40002800_FULL_NAME_UNQUOTED rtc@40002800 +#define DT_N_S_soc_S_rtc_40002800_FULL_NAME_TOKEN rtc_40002800 +#define DT_N_S_soc_S_rtc_40002800_FULL_NAME_UPPER_TOKEN RTC_40002800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_rtc_40002800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_rtc_40002800_CHILD_IDX 35 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_rtc_40002800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_rtc_40002800_FOREACH_NODELABEL(fn) fn(rtc) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_NODELABEL_VARGS(fn, ...) fn(rtc, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_rtc_40002800_CHILD_NUM 0 +#define DT_N_S_soc_S_rtc_40002800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_rtc_40002800_HASH gMDUpS7Ndbl4XKI6XlHTk7n7PIqWK98QhTUf_xffseI + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_rtc_40002800_ORD 67 +#define DT_N_S_soc_S_rtc_40002800_ORD_STR_SORTABLE 00067 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_rtc_40002800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_rtc_40002800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_rtc_40002800_EXISTS 1 +#define DT_N_INST_0_st_stm32_rtc DT_N_S_soc_S_rtc_40002800 +#define DT_N_NODELABEL_rtc DT_N_S_soc_S_rtc_40002800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_rtc_40002800_REG_NUM 1 +#define DT_N_S_soc_S_rtc_40002800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_REG_IDX_0_VAL_ADDRESS 1073752064 /* 0x40002800 */ +#define DT_N_S_soc_S_rtc_40002800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_rtc_40002800_FOREACH_REG(fn) fn(DT_N_S_soc_S_rtc_40002800, 0) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40002800, 0) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40002800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40002800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_RANGES_NUM 0 +#define DT_N_S_soc_S_rtc_40002800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_rtc_40002800_IRQ_NUM 1 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_VAL_irq 41 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_rtc_40002800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_rtc_40002800_COMPAT_MATCHES_st_stm32_rtc 1 +#define DT_N_S_soc_S_rtc_40002800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_rtc_40002800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_COMPAT_MODEL_IDX_0 "stm32-rtc" +#define DT_N_S_soc_S_rtc_40002800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_rtc_40002800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_rtc_40002800_P_reg {1073752064 /* 0x40002800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_rtc_40002800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_reg_IDX_0 1073752064 +#define DT_N_S_soc_S_rtc_40002800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_rtc_40002800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_alarms_count 2 +#define DT_N_S_soc_S_rtc_40002800_P_alarms_count_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_alrm_exti_line 17 +#define DT_N_S_soc_S_rtc_40002800_P_alrm_exti_line_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_interrupts {41 /* 0x29 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_rtc_40002800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_interrupts_IDX_0 41 +#define DT_N_S_soc_S_rtc_40002800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_rtc_40002800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_prescaler 32768 +#define DT_N_S_soc_S_rtc_40002800_P_prescaler_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_status "okay" +#define DT_N_S_soc_S_rtc_40002800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_rtc_40002800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_rtc_40002800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_rtc_40002800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_rtc_40002800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_rtc_40002800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40002800, status, 0) +#define DT_N_S_soc_S_rtc_40002800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40002800, status, 0) +#define DT_N_S_soc_S_rtc_40002800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40002800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40002800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_P_status_LEN 1 +#define DT_N_S_soc_S_rtc_40002800_P_status_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_compatible {"st,stm32-rtc"} +#define DT_N_S_soc_S_rtc_40002800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_compatible_IDX_0 "st,stm32-rtc" +#define DT_N_S_soc_S_rtc_40002800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rtc +#define DT_N_S_soc_S_rtc_40002800_P_compatible_IDX_0_STRING_TOKEN st_stm32_rtc +#define DT_N_S_soc_S_rtc_40002800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RTC +#define DT_N_S_soc_S_rtc_40002800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40002800, compatible, 0) +#define DT_N_S_soc_S_rtc_40002800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40002800, compatible, 0) +#define DT_N_S_soc_S_rtc_40002800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40002800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40002800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_P_compatible_LEN 1 +#define DT_N_S_soc_S_rtc_40002800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_VAL_bits 1024 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_rtc_40002800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 0, bits) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40002800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 0, bits) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_VAL_bus 3 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_VAL_bits 36176016 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_rtc_40002800, clocks, 1, bus) \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 1, bits) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40002800, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 1, bits) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40002800, clocks, 0) \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 1) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40002800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 1) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40002800, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40002800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_rtc_40002800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_rtc_40002800_P_clocks_LEN 2 +#define DT_N_S_soc_S_rtc_40002800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_dma_coherent 0 +#define DT_N_S_soc_S_rtc_40002800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_rtc_40002800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_wakeup_source 0 +#define DT_N_S_soc_S_rtc_40002800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_rtc_40002800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_rtc_40002800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dma@40020000 + * + * Node identifier: DT_N_S_soc_S_dma_40020000 + * + * Binding (compatible = st,stm32-dma-v2): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dma-v2.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dma_40020000_PATH "/soc/dma@40020000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dma_40020000_FULL_NAME "dma@40020000" +#define DT_N_S_soc_S_dma_40020000_FULL_NAME_UNQUOTED dma@40020000 +#define DT_N_S_soc_S_dma_40020000_FULL_NAME_TOKEN dma_40020000 +#define DT_N_S_soc_S_dma_40020000_FULL_NAME_UPPER_TOKEN DMA_40020000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dma_40020000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dma_40020000_CHILD_IDX 38 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dma_40020000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dma_40020000_FOREACH_NODELABEL(fn) fn(dma1) +#define DT_N_S_soc_S_dma_40020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dma1, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dma_40020000_CHILD_NUM 0 +#define DT_N_S_soc_S_dma_40020000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dma_40020000_HASH wrD_czGB0R3hBC1Od9iGdfNbQ3BZqmarPsJAc4MBFAs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dma_40020000_ORD 68 +#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00068 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dma_40020000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dma_40020000_SUPPORTS_ORDS \ + 69, /* /soc/sai1@40015404 */ \ + 70, /* /soc/sai1@40015424 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dma_40020000_EXISTS 1 +#define DT_N_INST_0_st_stm32_dma_v2 DT_N_S_soc_S_dma_40020000 +#define DT_N_NODELABEL_dma1 DT_N_S_soc_S_dma_40020000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dma_40020000_REG_NUM 1 +#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_VAL_ADDRESS 1073872896 /* 0x40020000 */ +#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_dma_40020000_FOREACH_REG(fn) fn(DT_N_S_soc_S_dma_40020000, 0) +#define DT_N_S_soc_S_dma_40020000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, 0) +#define DT_N_S_soc_S_dma_40020000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_RANGES_NUM 0 +#define DT_N_S_soc_S_dma_40020000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dma_40020000_IRQ_NUM 6 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_irq 11 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_irq 12 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_irq 13 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_irq 14 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_irq 15 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_irq 16 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_MATCHES_st_stm32_dma_v2 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dma_40020000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_MODEL_IDX_0 "stm32-dma-v2" +#define DT_N_S_soc_S_dma_40020000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dma_40020000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dma_40020000_P_reg {1073872896 /* 0x40020000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_0 1073872896 +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dma_40020000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts {11 /* 0xb */, 0 /* 0x0 */, 12 /* 0xc */, 0 /* 0x0 */, 13 /* 0xd */, 0 /* 0x0 */, 14 /* 0xe */, 0 /* 0x0 */, 15 /* 0xf */, 0 /* 0x0 */, 16 /* 0x10 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_0 11 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_2 12 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_4 13 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_6 14 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_8 15 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_10 16 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_st_mem2mem 0 +#define DT_N_S_soc_S_dma_40020000_P_st_mem2mem_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_dma_offset 0 +#define DT_N_S_soc_S_dma_40020000_P_dma_offset_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_dma_requests 6 +#define DT_N_S_soc_S_dma_40020000_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status "disabled" +#define DT_N_S_soc_S_dma_40020000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dma_40020000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dma_40020000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, status, 0) +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, status, 0) +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_status_LEN 1 +#define DT_N_S_soc_S_dma_40020000_P_status_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_compatible {"st,stm32-dma-v2"} +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0 "st,stm32-dma-v2" +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dma-v2 +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_dma_v2 +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMA_V2 +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, compatible, 0) +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, compatible, 0) +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_compatible_LEN 1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bus 72 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_dma_40020000, clocks, 0, bits) +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dma_40020000, clocks, 0, bits) +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, clocks, 0) +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, clocks, 0) +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_clocks_LEN 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_dma_coherent 0 +#define DT_N_S_soc_S_dma_40020000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_wakeup_source 0 +#define DT_N_S_soc_S_dma_40020000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/sai1@40015404 + * + * Node identifier: DT_N_S_soc_S_sai1_40015404 + * + * Binding (compatible = st,stm32-sai): + * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32-sai.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_sai1_40015404_PATH "/soc/sai1@40015404" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_sai1_40015404_FULL_NAME "sai1@40015404" +#define DT_N_S_soc_S_sai1_40015404_FULL_NAME_UNQUOTED sai1@40015404 +#define DT_N_S_soc_S_sai1_40015404_FULL_NAME_TOKEN sai1_40015404 +#define DT_N_S_soc_S_sai1_40015404_FULL_NAME_UPPER_TOKEN SAI1_40015404 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_sai1_40015404_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_sai1_40015404_CHILD_IDX 42 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_sai1_40015404_NODELABEL_NUM 1 +#define DT_N_S_soc_S_sai1_40015404_FOREACH_NODELABEL(fn) fn(sai1_a) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_NODELABEL_VARGS(fn, ...) fn(sai1_a, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_sai1_40015404_CHILD_NUM 0 +#define DT_N_S_soc_S_sai1_40015404_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_sai1_40015404_HASH Qeylb4uqfwx89IEioEsHJ7zY_NzeUuHabDztzaQ1AC4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_sai1_40015404_ORD 69 +#define DT_N_S_soc_S_sai1_40015404_ORD_STR_SORTABLE 00069 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_sai1_40015404_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ \ + 68, /* /soc/dma@40020000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_sai1_40015404_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_sai1_40015404_EXISTS 1 +#define DT_N_INST_0_st_stm32_sai DT_N_S_soc_S_sai1_40015404 +#define DT_N_NODELABEL_sai1_a DT_N_S_soc_S_sai1_40015404 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_sai1_40015404_REG_NUM 1 +#define DT_N_S_soc_S_sai1_40015404_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_REG_IDX_0_VAL_ADDRESS 1073828868 /* 0x40015404 */ +#define DT_N_S_soc_S_sai1_40015404_REG_IDX_0_VAL_SIZE 32 /* 0x20 */ +#define DT_N_S_soc_S_sai1_40015404_FOREACH_REG(fn) fn(DT_N_S_soc_S_sai1_40015404, 0) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, 0) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_RANGES_NUM 0 +#define DT_N_S_soc_S_sai1_40015404_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_sai1_40015404_IRQ_NUM 0 +#define DT_N_S_soc_S_sai1_40015404_IRQ_LEVEL 0 +#define DT_N_S_soc_S_sai1_40015404_COMPAT_MATCHES_st_stm32_sai 1 +#define DT_N_S_soc_S_sai1_40015404_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_sai1_40015404_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_COMPAT_MODEL_IDX_0 "stm32-sai" +#define DT_N_S_soc_S_sai1_40015404_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_sai1_40015404_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_sai1_40015404_P_reg {1073828868 /* 0x40015404 */, 32 /* 0x20 */} +#define DT_N_S_soc_S_sai1_40015404_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_reg_IDX_0 1073828868 +#define DT_N_S_soc_S_sai1_40015404_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_reg_IDX_1 32 +#define DT_N_S_soc_S_sai1_40015404_P_reg_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_PH DT_N_S_soc_S_dma_40020000 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_VAL_channel 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_VAL_slot 108 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_VAL_channel_config 141312 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, channel) \ + fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, slot) \ + fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, channel-config) +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, channel) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, slot) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, channel-config) +#define DT_N_S_soc_S_sai1_40015404_P_dmas_IDX_0_NUM_CELLS 3 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015404, dmas, 0) +#define DT_N_S_soc_S_sai1_40015404_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, dmas, 0) +#define DT_N_S_soc_S_sai1_40015404_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, dmas, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_dmas_LEN 1 +#define DT_N_S_soc_S_sai1_40015404_P_dmas_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_enable 0 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_enable_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider "no-div" +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_STRING_UNQUOTED no-div +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_STRING_TOKEN no_div +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_STRING_UPPER_TOKEN NO_DIV +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_IDX_0 "no-div" +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_IDX_0_ENUM_VAL_no_div_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_ENUM_VAL_no_div_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015404, mclk_divider, 0) +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, mclk_divider, 0) +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, mclk_divider, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, mclk_divider, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_LEN 1 +#define DT_N_S_soc_S_sai1_40015404_P_mclk_divider_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_synchronous 0 +#define DT_N_S_soc_S_sai1_40015404_P_synchronous_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold "full" +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_STRING_UNQUOTED full +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_STRING_TOKEN full +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_STRING_UPPER_TOKEN FULL +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_IDX_0 "full" +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_IDX_0_ENUM_VAL_full_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_ENUM_VAL_full_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015404, fifo_threshold, 0) +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, fifo_threshold, 0) +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, fifo_threshold, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, fifo_threshold, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_LEN 1 +#define DT_N_S_soc_S_sai1_40015404_P_fifo_threshold_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_status "disabled" +#define DT_N_S_soc_S_sai1_40015404_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_sai1_40015404_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_sai1_40015404_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_sai1_40015404_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_sai1_40015404_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_sai1_40015404_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015404, status, 0) +#define DT_N_S_soc_S_sai1_40015404_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, status, 0) +#define DT_N_S_soc_S_sai1_40015404_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_status_LEN 1 +#define DT_N_S_soc_S_sai1_40015404_P_status_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_compatible {"st,stm32-sai"} +#define DT_N_S_soc_S_sai1_40015404_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_compatible_IDX_0 "st,stm32-sai" +#define DT_N_S_soc_S_sai1_40015404_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sai +#define DT_N_S_soc_S_sai1_40015404_P_compatible_IDX_0_STRING_TOKEN st_stm32_sai +#define DT_N_S_soc_S_sai1_40015404_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SAI +#define DT_N_S_soc_S_sai1_40015404_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015404, compatible, 0) +#define DT_N_S_soc_S_sai1_40015404_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, compatible, 0) +#define DT_N_S_soc_S_sai1_40015404_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_compatible_LEN 1 +#define DT_N_S_soc_S_sai1_40015404_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_VAL_bits 2097152 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_sai1_40015404, clocks, 0, bus) \ + fn(DT_N_S_soc_S_sai1_40015404, clocks, 0, bits) +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sai1_40015404, clocks, 0, bits) +#define DT_N_S_soc_S_sai1_40015404_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015404, clocks, 0) +#define DT_N_S_soc_S_sai1_40015404_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015404, clocks, 0) +#define DT_N_S_soc_S_sai1_40015404_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015404, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015404, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015404_P_clocks_LEN 1 +#define DT_N_S_soc_S_sai1_40015404_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_dma_coherent 0 +#define DT_N_S_soc_S_sai1_40015404_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_sai1_40015404_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_wakeup_source 0 +#define DT_N_S_soc_S_sai1_40015404_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015404_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_sai1_40015404_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/sai1@40015424 + * + * Node identifier: DT_N_S_soc_S_sai1_40015424 + * + * Binding (compatible = st,stm32-sai): + * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32-sai.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_sai1_40015424_PATH "/soc/sai1@40015424" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_sai1_40015424_FULL_NAME "sai1@40015424" +#define DT_N_S_soc_S_sai1_40015424_FULL_NAME_UNQUOTED sai1@40015424 +#define DT_N_S_soc_S_sai1_40015424_FULL_NAME_TOKEN sai1_40015424 +#define DT_N_S_soc_S_sai1_40015424_FULL_NAME_UPPER_TOKEN SAI1_40015424 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_sai1_40015424_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_sai1_40015424_CHILD_IDX 43 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_sai1_40015424_NODELABEL_NUM 1 +#define DT_N_S_soc_S_sai1_40015424_FOREACH_NODELABEL(fn) fn(sai1_b) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_NODELABEL_VARGS(fn, ...) fn(sai1_b, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_sai1_40015424_CHILD_NUM 0 +#define DT_N_S_soc_S_sai1_40015424_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_sai1_40015424_HASH SB_xxcHcj4kwx_SBJjUxUtYBpvfeKkpofD2o9QYZc5E + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_sai1_40015424_ORD 70 +#define DT_N_S_soc_S_sai1_40015424_ORD_STR_SORTABLE 00070 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_sai1_40015424_REQUIRES_ORDS \ + 4, /* /soc */ \ + 9, /* /soc/rcc@40021000 */ \ + 68, /* /soc/dma@40020000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_sai1_40015424_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_sai1_40015424_EXISTS 1 +#define DT_N_INST_1_st_stm32_sai DT_N_S_soc_S_sai1_40015424 +#define DT_N_NODELABEL_sai1_b DT_N_S_soc_S_sai1_40015424 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_sai1_40015424_REG_NUM 1 +#define DT_N_S_soc_S_sai1_40015424_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_REG_IDX_0_VAL_ADDRESS 1073828900 /* 0x40015424 */ +#define DT_N_S_soc_S_sai1_40015424_REG_IDX_0_VAL_SIZE 32 /* 0x20 */ +#define DT_N_S_soc_S_sai1_40015424_FOREACH_REG(fn) fn(DT_N_S_soc_S_sai1_40015424, 0) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, 0) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_RANGES_NUM 0 +#define DT_N_S_soc_S_sai1_40015424_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_sai1_40015424_IRQ_NUM 0 +#define DT_N_S_soc_S_sai1_40015424_IRQ_LEVEL 0 +#define DT_N_S_soc_S_sai1_40015424_COMPAT_MATCHES_st_stm32_sai 1 +#define DT_N_S_soc_S_sai1_40015424_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_sai1_40015424_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_COMPAT_MODEL_IDX_0 "stm32-sai" +#define DT_N_S_soc_S_sai1_40015424_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_sai1_40015424_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_sai1_40015424_P_reg {1073828900 /* 0x40015424 */, 32 /* 0x20 */} +#define DT_N_S_soc_S_sai1_40015424_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_reg_IDX_0 1073828900 +#define DT_N_S_soc_S_sai1_40015424_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_reg_IDX_1 32 +#define DT_N_S_soc_S_sai1_40015424_P_reg_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_PH DT_N_S_soc_S_dma_40020000 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_VAL_channel 2 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_VAL_slot 109 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_VAL_channel_config 141312 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, channel) \ + fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, slot) \ + fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, channel-config) +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, channel) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, slot) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, channel-config) +#define DT_N_S_soc_S_sai1_40015424_P_dmas_IDX_0_NUM_CELLS 3 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015424, dmas, 0) +#define DT_N_S_soc_S_sai1_40015424_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, dmas, 0) +#define DT_N_S_soc_S_sai1_40015424_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, dmas, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_dmas_LEN 1 +#define DT_N_S_soc_S_sai1_40015424_P_dmas_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_enable 0 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_enable_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider "no-div" +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_STRING_UNQUOTED no-div +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_STRING_TOKEN no_div +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_STRING_UPPER_TOKEN NO_DIV +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_IDX_0 "no-div" +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_IDX_0_ENUM_VAL_no_div_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_ENUM_VAL_no_div_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015424, mclk_divider, 0) +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, mclk_divider, 0) +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, mclk_divider, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, mclk_divider, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_LEN 1 +#define DT_N_S_soc_S_sai1_40015424_P_mclk_divider_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_synchronous 0 +#define DT_N_S_soc_S_sai1_40015424_P_synchronous_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold "full" +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_STRING_UNQUOTED full +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_STRING_TOKEN full +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_STRING_UPPER_TOKEN FULL +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_IDX_0 "full" +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_IDX_0_ENUM_VAL_full_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_ENUM_VAL_full_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015424, fifo_threshold, 0) +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, fifo_threshold, 0) +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, fifo_threshold, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, fifo_threshold, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_LEN 1 +#define DT_N_S_soc_S_sai1_40015424_P_fifo_threshold_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_status "disabled" +#define DT_N_S_soc_S_sai1_40015424_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_sai1_40015424_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_sai1_40015424_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_sai1_40015424_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_sai1_40015424_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_sai1_40015424_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015424, status, 0) +#define DT_N_S_soc_S_sai1_40015424_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, status, 0) +#define DT_N_S_soc_S_sai1_40015424_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_status_LEN 1 +#define DT_N_S_soc_S_sai1_40015424_P_status_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_compatible {"st,stm32-sai"} +#define DT_N_S_soc_S_sai1_40015424_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_compatible_IDX_0 "st,stm32-sai" +#define DT_N_S_soc_S_sai1_40015424_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sai +#define DT_N_S_soc_S_sai1_40015424_P_compatible_IDX_0_STRING_TOKEN st_stm32_sai +#define DT_N_S_soc_S_sai1_40015424_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SAI +#define DT_N_S_soc_S_sai1_40015424_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015424, compatible, 0) +#define DT_N_S_soc_S_sai1_40015424_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, compatible, 0) +#define DT_N_S_soc_S_sai1_40015424_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_compatible_LEN 1 +#define DT_N_S_soc_S_sai1_40015424_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_VAL_bits 2097152 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_sai1_40015424, clocks, 0, bus) \ + fn(DT_N_S_soc_S_sai1_40015424, clocks, 0, bits) +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sai1_40015424, clocks, 0, bits) +#define DT_N_S_soc_S_sai1_40015424_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sai1_40015424, clocks, 0) +#define DT_N_S_soc_S_sai1_40015424_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sai1_40015424, clocks, 0) +#define DT_N_S_soc_S_sai1_40015424_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sai1_40015424, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sai1_40015424, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sai1_40015424_P_clocks_LEN 1 +#define DT_N_S_soc_S_sai1_40015424_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_dma_coherent 0 +#define DT_N_S_soc_S_sai1_40015424_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_sai1_40015424_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_wakeup_source 0 +#define DT_N_S_soc_S_sai1_40015424_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_sai1_40015424_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_sai1_40015424_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40004400 + * + * Node identifier: DT_N_S_soc_S_serial_40004400 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40004400_PATH "/soc/serial@40004400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40004400_FULL_NAME "serial@40004400" +#define DT_N_S_soc_S_serial_40004400_FULL_NAME_UNQUOTED serial@40004400 +#define DT_N_S_soc_S_serial_40004400_FULL_NAME_TOKEN serial_40004400 +#define DT_N_S_soc_S_serial_40004400_FULL_NAME_UPPER_TOKEN SERIAL_40004400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40004400_CHILD_IDX 11 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40004400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL(fn) fn(usart2) +#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40004400_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_serial_40004400_HASH w0whRjCvTBPyVty9dxjB3Bsl1nzzH1xRQTJifgUAAKQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40004400_ORD 71 +#define DT_N_S_soc_S_serial_40004400_ORD_STR_SORTABLE 00071 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40004400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40004400_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40004400_EXISTS 1 +#define DT_N_INST_1_st_stm32_usart DT_N_S_soc_S_serial_40004400 +#define DT_N_INST_2_st_stm32_uart DT_N_S_soc_S_serial_40004400 +#define DT_N_NODELABEL_usart2 DT_N_S_soc_S_serial_40004400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40004400_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_ADDRESS 1073759232 /* 0x40004400 */ +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40004400_FOREACH_REG(fn) fn(DT_N_S_soc_S_serial_40004400, 0) +#define DT_N_S_soc_S_serial_40004400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, 0) +#define DT_N_S_soc_S_serial_40004400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004400_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq 38 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40004400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40004400_P_reg {1073759232 /* 0x40004400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0 1073759232 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits 131072 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_serial_40004400, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id 1809 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40004400, resets, 0, id) +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, resets, 0, id) +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, resets, 0) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, resets, 0) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts {38 /* 0x26 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0 38 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004400_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits 8 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004400_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004400_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004400_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004400_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity "none" +#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, parity, 0) +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, parity, 0) +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status "disabled" +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, status, 0) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, status, 0) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40004400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_dma_coherent 0 +#define DT_N_S_soc_S_serial_40004400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_rx_invert_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40004800 + * + * Node identifier: DT_N_S_soc_S_serial_40004800 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40004800_PATH "/soc/serial@40004800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40004800_FULL_NAME "serial@40004800" +#define DT_N_S_soc_S_serial_40004800_FULL_NAME_UNQUOTED serial@40004800 +#define DT_N_S_soc_S_serial_40004800_FULL_NAME_TOKEN serial_40004800 +#define DT_N_S_soc_S_serial_40004800_FULL_NAME_UPPER_TOKEN SERIAL_40004800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40004800_CHILD_IDX 12 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40004800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004800_FOREACH_NODELABEL(fn) fn(usart3) +#define DT_N_S_soc_S_serial_40004800_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart3, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40004800_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_serial_40004800_HASH zEiuovs75QHyumn1pL5rvTd5x6H1bdnak278L4bYuj0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40004800_ORD 72 +#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00072 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40004800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40004800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40004800_EXISTS 1 +#define DT_N_INST_2_st_stm32_usart DT_N_S_soc_S_serial_40004800 +#define DT_N_INST_3_st_stm32_uart DT_N_S_soc_S_serial_40004800 +#define DT_N_NODELABEL_usart3 DT_N_S_soc_S_serial_40004800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40004800_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_VAL_ADDRESS 1073760256 /* 0x40004800 */ +#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40004800_FOREACH_REG(fn) fn(DT_N_S_soc_S_serial_40004800, 0) +#define DT_N_S_soc_S_serial_40004800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, 0) +#define DT_N_S_soc_S_serial_40004800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004800_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_irq 39 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40004800_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40004800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40004800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40004800_P_reg {1073760256 /* 0x40004800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_0 1073760256 +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bits 262144 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_serial_40004800, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004800, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, clocks, 0) +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, clocks, 0) +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_VAL_id 1810 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40004800, resets, 0, id) +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, resets, 0, id) +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, resets, 0) +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, resets, 0) +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_interrupts {39 /* 0x27 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_0 39 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004800_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits 8 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004800_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004800_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004800_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004800_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004800_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004800_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004800_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004800_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity "none" +#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, parity, 0) +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, parity, 0) +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status "disabled" +#define DT_N_S_soc_S_serial_40004800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40004800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40004800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, status, 0) +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, status, 0) +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1) +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1) +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40004800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_dma_coherent 0 +#define DT_N_S_soc_S_serial_40004800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004800_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004800_P_rx_invert_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40004c00 + * + * Node identifier: DT_N_S_soc_S_serial_40004c00 + * + * Binding (compatible = st,stm32-uart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40004c00_PATH "/soc/serial@40004c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME "serial@40004c00" +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_UNQUOTED serial@40004c00 +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_TOKEN serial_40004c00 +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_UPPER_TOKEN SERIAL_40004C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40004c00_CHILD_IDX 13 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40004c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL(fn) fn(uart4) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_serial_40004c00_HASH qw6sySCqGO4wCPwXm_EFlFNv1NqVYdGrZFXhKaRqK7U + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40004c00_ORD 73 +#define DT_N_S_soc_S_serial_40004c00_ORD_STR_SORTABLE 00073 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40004c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40004c00_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40004c00_EXISTS 1 +#define DT_N_INST_4_st_stm32_uart DT_N_S_soc_S_serial_40004c00 +#define DT_N_NODELABEL_uart4 DT_N_S_soc_S_serial_40004c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40004c00_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_ADDRESS 1073761280 /* 0x40004c00 */ +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40004c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_serial_40004c00, 0) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, 0) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004c00_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq 52 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0 "stm32-uart" +#define DT_N_S_soc_S_serial_40004c00_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40004c00_P_reg {1073761280 /* 0x40004c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0 1073761280 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits 524288 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id 1811 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, id) +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, id) +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts {52 /* 0x34 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0 52 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004c00_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits 8 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004c00_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity "none" +#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, parity, 0) +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, parity, 0) +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status "disabled" +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, status, 0) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, status, 0) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible {"st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_dma_coherent 0 +#define DT_N_S_soc_S_serial_40004c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_rx_invert_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/lpuart1_rx_pa3 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_PATH "/soc/pin-controller@48000000/lpuart1_rx_pa3" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FULL_NAME "lpuart1_rx_pa3" +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FULL_NAME_UNQUOTED lpuart1_rx_pa3 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FULL_NAME_TOKEN lpuart1_rx_pa3 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FULL_NAME_UPPER_TOKEN LPUART1_RX_PA3 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_CHILD_IDX 22 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_NODELABEL(fn) fn(lpuart1_rx_pa3) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_NODELABEL_VARGS(fn, ...) fn(lpuart1_rx_pa3, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_HASH WyQwh28Pr7J_cdzFkBQs8QI_d1PxE3Pm7VJGqLte_Tk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_ORD 74 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_ORD_STR_SORTABLE 00074 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_SUPPORTS_ORDS \ + 76, /* /soc/serial@40008000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_EXISTS 1 +#define DT_N_NODELABEL_lpuart1_rx_pa3 DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_pinmux 108 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/lpuart1_tx_pa2 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_PATH "/soc/pin-controller@48000000/lpuart1_tx_pa2" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FULL_NAME "lpuart1_tx_pa2" +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FULL_NAME_UNQUOTED lpuart1_tx_pa2 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FULL_NAME_TOKEN lpuart1_tx_pa2 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FULL_NAME_UPPER_TOKEN LPUART1_TX_PA2 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_CHILD_IDX 24 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_NODELABEL(fn) fn(lpuart1_tx_pa2) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_NODELABEL_VARGS(fn, ...) fn(lpuart1_tx_pa2, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_HASH xN8qvyYfTBX7qNR9778uABa0MaMxHEEShKRfepH4hSs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_ORD 75 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_ORD_STR_SORTABLE 00075 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_SUPPORTS_ORDS \ + 76, /* /soc/serial@40008000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_EXISTS 1 +#define DT_N_NODELABEL_lpuart1_tx_pa2 DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_pinmux 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40008000 + * + * Node identifier: DT_N_S_soc_S_serial_40008000 + * + * Binding (compatible = st,stm32-lpuart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-lpuart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40008000_PATH "/soc/serial@40008000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40008000_FULL_NAME "serial@40008000" +#define DT_N_S_soc_S_serial_40008000_FULL_NAME_UNQUOTED serial@40008000 +#define DT_N_S_soc_S_serial_40008000_FULL_NAME_TOKEN serial_40008000 +#define DT_N_S_soc_S_serial_40008000_FULL_NAME_UPPER_TOKEN SERIAL_40008000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40008000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40008000_CHILD_IDX 14 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40008000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40008000_FOREACH_NODELABEL(fn) fn(lpuart1) +#define DT_N_S_soc_S_serial_40008000_FOREACH_NODELABEL_VARGS(fn, ...) fn(lpuart1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40008000_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40008000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40008000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_serial_40008000_HASH m3LA5ahuvua6JbY3wkM444Ci5dNOInJTrqWFcetRNbo + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40008000_ORD 76 +#define DT_N_S_soc_S_serial_40008000_ORD_STR_SORTABLE 00076 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40008000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ \ + 74, /* /soc/pin-controller@48000000/lpuart1_rx_pa3 */ \ + 75, /* /soc/pin-controller@48000000/lpuart1_tx_pa2 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40008000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40008000_EXISTS 1 +#define DT_N_INST_0_st_stm32_lpuart DT_N_S_soc_S_serial_40008000 +#define DT_N_INST_1_st_stm32_uart DT_N_S_soc_S_serial_40008000 +#define DT_N_NODELABEL_lpuart1 DT_N_S_soc_S_serial_40008000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40008000_REG_NUM 1 +#define DT_N_S_soc_S_serial_40008000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_REG_IDX_0_VAL_ADDRESS 1073774592 /* 0x40008000 */ +#define DT_N_S_soc_S_serial_40008000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40008000_FOREACH_REG(fn) fn(DT_N_S_soc_S_serial_40008000, 0) +#define DT_N_S_soc_S_serial_40008000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, 0) +#define DT_N_S_soc_S_serial_40008000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40008000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40008000_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_VAL_irq 91 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40008000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_MATCHES_st_stm32_lpuart 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40008000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_MODEL_IDX_0 "stm32-lpuart" +#define DT_N_S_soc_S_serial_40008000_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40008000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40008000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40008000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40008000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40008000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40008000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40008000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2 +#define DT_N_S_soc_S_serial_40008000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40008000_P_reg {1073774592 /* 0x40008000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40008000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_reg_IDX_0 1073774592 +#define DT_N_S_soc_S_serial_40008000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40008000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_VAL_bus 92 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40008000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_serial_40008000, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40008000, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40008000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_serial_40008000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, clocks, 0) +#define DT_N_S_soc_S_serial_40008000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, clocks, 0) +#define DT_N_S_soc_S_serial_40008000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40008000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_VAL_id 1920 +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40008000, resets, 0, id) +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, resets, 0, id) +#define DT_N_S_soc_S_serial_40008000_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_serial_40008000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, resets, 0) +#define DT_N_S_soc_S_serial_40008000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, resets, 0) +#define DT_N_S_soc_S_serial_40008000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40008000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_interrupts {91 /* 0x5b */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40008000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_interrupts_IDX_0 91 +#define DT_N_S_soc_S_serial_40008000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40008000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40008000_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, stop_bits, 0) +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, stop_bits, 0) +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40008000_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_data_bits 8 +#define DT_N_S_soc_S_serial_40008000_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40008000_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_data_bits_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_single_wire 0 +#define DT_N_S_soc_S_serial_40008000_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40008000_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40008000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40008000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_de_enable 0 +#define DT_N_S_soc_S_serial_40008000_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40008000_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40008000_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_de_invert 0 +#define DT_N_S_soc_S_serial_40008000_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40008000_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40008000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_parity "none" +#define DT_N_S_soc_S_serial_40008000_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40008000_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40008000_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40008000_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40008000_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40008000_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_parity_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, parity, 0) +#define DT_N_S_soc_S_serial_40008000_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, parity, 0) +#define DT_N_S_soc_S_serial_40008000_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40008000_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_status "okay" +#define DT_N_S_soc_S_serial_40008000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40008000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40008000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40008000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40008000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40008000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, status, 0) +#define DT_N_S_soc_S_serial_40008000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, status, 0) +#define DT_N_S_soc_S_serial_40008000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40008000_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_compatible {"st,stm32-lpuart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_0 "st,stm32-lpuart" +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lpuart +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_0_STRING_TOKEN st_stm32_lpuart +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LPUART +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40008000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40008000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40008000, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40008000, compatible, 1) +#define DT_N_S_soc_S_serial_40008000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40008000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40008000, compatible, 1) +#define DT_N_S_soc_S_serial_40008000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40008000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40008000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40008000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40008000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40008000_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40008000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_dma_coherent 0 +#define DT_N_S_soc_S_serial_40008000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40008000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40008000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40008000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40008000_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40008000_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40008000_P_rx_invert_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/usart1_rx_pc5 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_PATH "/soc/pin-controller@48000000/usart1_rx_pc5" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FULL_NAME "usart1_rx_pc5" +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FULL_NAME_UNQUOTED usart1_rx_pc5 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FULL_NAME_TOKEN usart1_rx_pc5 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FULL_NAME_UPPER_TOKEN USART1_RX_PC5 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_CHILD_IDX 23 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_NODELABEL(fn) fn(usart1_rx_pc5) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_rx_pc5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_HASH 0dk2RVBCCQexD9H__QpjdsAYkDmF_7b5onxntaqN7pQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_ORD 77 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_ORD_STR_SORTABLE 00077 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_SUPPORTS_ORDS \ + 79, /* /soc/serial@40013800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_EXISTS 1 +#define DT_N_NODELABEL_usart1_rx_pc5 DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_pinmux 1191 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/usart1_tx_pc4 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_PATH "/soc/pin-controller@48000000/usart1_tx_pc4" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FULL_NAME "usart1_tx_pc4" +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FULL_NAME_UNQUOTED usart1_tx_pc4 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FULL_NAME_TOKEN usart1_tx_pc4 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FULL_NAME_UPPER_TOKEN USART1_TX_PC4 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_CHILD_IDX 25 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_NODELABEL(fn) fn(usart1_tx_pc4) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_tx_pc4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_HASH tD4KrmMipAUPPosulSZ7bQ0d5GgJMXQCSkGG_ws_Drg + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_ORD 78 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_ORD_STR_SORTABLE 00078 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_SUPPORTS_ORDS \ + 79, /* /soc/serial@40013800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_EXISTS 1 +#define DT_N_NODELABEL_usart1_tx_pc4 DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_pinmux 1159 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40013800 + * + * Node identifier: DT_N_S_soc_S_serial_40013800 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40013800_PATH "/soc/serial@40013800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40013800_FULL_NAME "serial@40013800" +#define DT_N_S_soc_S_serial_40013800_FULL_NAME_UNQUOTED serial@40013800 +#define DT_N_S_soc_S_serial_40013800_FULL_NAME_TOKEN serial_40013800 +#define DT_N_S_soc_S_serial_40013800_FULL_NAME_UPPER_TOKEN SERIAL_40013800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40013800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40013800_CHILD_IDX 10 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40013800_NODELABEL_NUM 2 +#define DT_N_S_soc_S_serial_40013800_FOREACH_NODELABEL(fn) fn(usart1) fn(arduino_serial) +#define DT_N_S_soc_S_serial_40013800_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1, __VA_ARGS__) fn(arduino_serial, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40013800_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40013800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40013800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_serial_40013800_HASH Ekd_nQjwNx1R3lqiZl1FuXwHyvPZFcfnjksadzf44zc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40013800_ORD 79 +#define DT_N_S_soc_S_serial_40013800_ORD_STR_SORTABLE 00079 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40013800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ \ + 77, /* /soc/pin-controller@48000000/usart1_rx_pc5 */ \ + 78, /* /soc/pin-controller@48000000/usart1_tx_pc4 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40013800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40013800_EXISTS 1 +#define DT_N_INST_0_st_stm32_usart DT_N_S_soc_S_serial_40013800 +#define DT_N_INST_0_st_stm32_uart DT_N_S_soc_S_serial_40013800 +#define DT_N_NODELABEL_usart1 DT_N_S_soc_S_serial_40013800 +#define DT_N_NODELABEL_arduino_serial DT_N_S_soc_S_serial_40013800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40013800_REG_NUM 1 +#define DT_N_S_soc_S_serial_40013800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_REG_IDX_0_VAL_ADDRESS 1073821696 /* 0x40013800 */ +#define DT_N_S_soc_S_serial_40013800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_serial_40013800_FOREACH_REG(fn) fn(DT_N_S_soc_S_serial_40013800, 0) +#define DT_N_S_soc_S_serial_40013800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, 0) +#define DT_N_S_soc_S_serial_40013800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40013800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40013800_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_VAL_irq 37 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40013800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40013800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40013800_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40013800_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40013800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40013800_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40013800_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40013800_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40013800_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40013800_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4 +#define DT_N_S_soc_S_serial_40013800_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40013800_P_reg {1073821696 /* 0x40013800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_serial_40013800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_reg_IDX_0 1073821696 +#define DT_N_S_soc_S_serial_40013800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40013800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_VAL_bits 16384 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40013800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_serial_40013800, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40013800, clocks, 0, bits) +#define DT_N_S_soc_S_serial_40013800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_serial_40013800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, clocks, 0) +#define DT_N_S_soc_S_serial_40013800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, clocks, 0) +#define DT_N_S_soc_S_serial_40013800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40013800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_VAL_id 2062 +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_serial_40013800, resets, 0, id) +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, resets, 0, id) +#define DT_N_S_soc_S_serial_40013800_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_serial_40013800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, resets, 0) +#define DT_N_S_soc_S_serial_40013800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, resets, 0) +#define DT_N_S_soc_S_serial_40013800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40013800_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_interrupts {37 /* 0x25 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_serial_40013800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_interrupts_IDX_0 37 +#define DT_N_S_soc_S_serial_40013800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40013800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40013800_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, stop_bits, 0) +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, stop_bits, 0) +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40013800_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_data_bits 8 +#define DT_N_S_soc_S_serial_40013800_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40013800_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_data_bits_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_single_wire 0 +#define DT_N_S_soc_S_serial_40013800_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40013800_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40013800, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40013800_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_de_enable 0 +#define DT_N_S_soc_S_serial_40013800_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40013800_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40013800_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_de_invert 0 +#define DT_N_S_soc_S_serial_40013800_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40013800_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40013800_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_parity "none" +#define DT_N_S_soc_S_serial_40013800_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40013800_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40013800_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40013800_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40013800_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40013800_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_parity_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, parity, 0) +#define DT_N_S_soc_S_serial_40013800_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, parity, 0) +#define DT_N_S_soc_S_serial_40013800_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40013800_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_status "okay" +#define DT_N_S_soc_S_serial_40013800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40013800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40013800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40013800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40013800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40013800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, status, 0) +#define DT_N_S_soc_S_serial_40013800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, status, 0) +#define DT_N_S_soc_S_serial_40013800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40013800_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40013800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40013800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40013800, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40013800, compatible, 1) +#define DT_N_S_soc_S_serial_40013800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40013800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40013800, compatible, 1) +#define DT_N_S_soc_S_serial_40013800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40013800, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40013800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40013800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40013800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40013800_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40013800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_dma_coherent 0 +#define DT_N_S_soc_S_serial_40013800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40013800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40013800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40013800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40013800_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40013800_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40013800_P_rx_invert_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi2_miso_pb14 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_PATH "/soc/pin-controller@48000000/spi2_miso_pb14" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FULL_NAME "spi2_miso_pb14" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FULL_NAME_UNQUOTED spi2_miso_pb14 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FULL_NAME_TOKEN spi2_miso_pb14 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FULL_NAME_UPPER_TOKEN SPI2_MISO_PB14 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_CHILD_IDX 11 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_NODELABEL(fn) fn(spi2_miso_pb14) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_miso_pb14, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_HASH ah9KZEq8pTbCt8KF_zQQvbrpYogRH_38Brc6hRZs3AY + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_ORD 80 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_ORD_STR_SORTABLE 00080 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_SUPPORTS_ORDS \ + 84, /* /soc/spi@40003800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_EXISTS 1 +#define DT_N_NODELABEL_spi2_miso_pb14 DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_pinmux 965 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi2_mosi_pb15 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_PATH "/soc/pin-controller@48000000/spi2_mosi_pb15" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FULL_NAME "spi2_mosi_pb15" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FULL_NAME_UNQUOTED spi2_mosi_pb15 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FULL_NAME_TOKEN spi2_mosi_pb15 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FULL_NAME_UPPER_TOKEN SPI2_MOSI_PB15 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_CHILD_IDX 14 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_NODELABEL(fn) fn(spi2_mosi_pb15) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_mosi_pb15, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_HASH _uZC7LHAtAeyivvLcEW51gAozg38rwrJ4pZkKUu1Oc4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_ORD 81 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_ORD_STR_SORTABLE 00081 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_SUPPORTS_ORDS \ + 84, /* /soc/spi@40003800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_EXISTS 1 +#define DT_N_NODELABEL_spi2_mosi_pb15 DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_pinmux 997 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi2_nss_pb12 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_PATH "/soc/pin-controller@48000000/spi2_nss_pb12" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FULL_NAME "spi2_nss_pb12" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FULL_NAME_UNQUOTED spi2_nss_pb12 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FULL_NAME_TOKEN spi2_nss_pb12 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FULL_NAME_UPPER_TOKEN SPI2_NSS_PB12 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_CHILD_IDX 16 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_NODELABEL(fn) fn(spi2_nss_pb12) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_nss_pb12, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_HASH xsINVmqP9etKPFQf2W49DGysEh7j4EWHnpoQd2amtbQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_ORD 82 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_ORD_STR_SORTABLE 00082 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_SUPPORTS_ORDS \ + 84, /* /soc/spi@40003800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_EXISTS 1 +#define DT_N_NODELABEL_spi2_nss_pb12 DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_pinmux 901 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi2_sck_pb13 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_PATH "/soc/pin-controller@48000000/spi2_sck_pb13" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FULL_NAME "spi2_sck_pb13" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FULL_NAME_UNQUOTED spi2_sck_pb13 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FULL_NAME_TOKEN spi2_sck_pb13 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FULL_NAME_UPPER_TOKEN SPI2_SCK_PB13 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_CHILD_IDX 19 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_NODELABEL(fn) fn(spi2_sck_pb13) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_sck_pb13, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_HASH ckCtIJToOj4zsF_Iu00LEtdP8BWGtdTkqv1Khj_yGks + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_ORD 83 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_ORD_STR_SORTABLE 00083 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_SUPPORTS_ORDS \ + 84, /* /soc/spi@40003800 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_EXISTS 1 +#define DT_N_NODELABEL_spi2_sck_pb13 DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_pinmux 933 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/spi@40003800 + * + * Node identifier: DT_N_S_soc_S_spi_40003800 + * + * Binding (compatible = st,stm32-spi-fifo): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32-spi-fifo.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_spi_40003800_PATH "/soc/spi@40003800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_spi_40003800_FULL_NAME "spi@40003800" +#define DT_N_S_soc_S_spi_40003800_FULL_NAME_UNQUOTED spi@40003800 +#define DT_N_S_soc_S_spi_40003800_FULL_NAME_TOKEN spi_40003800 +#define DT_N_S_soc_S_spi_40003800_FULL_NAME_UPPER_TOKEN SPI_40003800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_spi_40003800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_spi_40003800_CHILD_IDX 21 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_spi_40003800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40003800_FOREACH_NODELABEL(fn) fn(spi2) +#define DT_N_S_soc_S_spi_40003800_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_spi_40003800_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40003800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_spi_40003800_HASH XKwnj_54XNd9o8CRTIG33G9j_T58zD9aWx_JOqtlec4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_spi_40003800_ORD 84 +#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00084 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_spi_40003800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 80, /* /soc/pin-controller@48000000/spi2_miso_pb14 */ \ + 81, /* /soc/pin-controller@48000000/spi2_mosi_pb15 */ \ + 82, /* /soc/pin-controller@48000000/spi2_nss_pb12 */ \ + 83, /* /soc/pin-controller@48000000/spi2_sck_pb13 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_spi_40003800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_spi_40003800_EXISTS 1 +#define DT_N_INST_1_st_stm32_spi_fifo DT_N_S_soc_S_spi_40003800 +#define DT_N_INST_1_st_stm32_spi DT_N_S_soc_S_spi_40003800 +#define DT_N_NODELABEL_spi2 DT_N_S_soc_S_spi_40003800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_spi_40003800_REG_NUM 1 +#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_VAL_ADDRESS 1073756160 /* 0x40003800 */ +#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_spi_40003800_FOREACH_REG(fn) fn(DT_N_S_soc_S_spi_40003800, 0) +#define DT_N_S_soc_S_spi_40003800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, 0) +#define DT_N_S_soc_S_spi_40003800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40003800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40003800_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_irq 36 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40003800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_0 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_1 "stm32-spi" +#define DT_N_S_soc_S_spi_40003800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NUM 1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15 + +/* Generic property macros: */ +#define DT_N_S_soc_S_spi_40003800_P_reg {1073756160 /* 0x40003800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_0 1073756160 +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40003800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_interrupts {36 /* 0x24 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_0 36 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_LEN 4 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_ioswp 0 +#define DT_N_S_soc_S_spi_40003800_P_ioswp_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width "full-4-to-16-bit" +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_STRING_UNQUOTED full-4-to-16-bit +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_STRING_TOKEN full_4_to_16_bit +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_STRING_UPPER_TOKEN FULL_4_TO_16_BIT +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_IDX_0 "full-4-to-16-bit" +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_IDX_0_ENUM_VAL_full_4_to_16_bit_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_ENUM_VAL_full_4_to_16_bit_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, st_spi_data_width, 0) +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, st_spi_data_width, 0) +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, st_spi_data_width, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, st_spi_data_width, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_LEN 1 +#define DT_N_S_soc_S_spi_40003800_P_st_spi_data_width_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_st_soft_nss 0 +#define DT_N_S_soc_S_spi_40003800_P_st_soft_nss_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status "okay" +#define DT_N_S_soc_S_spi_40003800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_spi_40003800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_spi_40003800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, status, 0) +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, status, 0) +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40003800_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible {"st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1) +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1) +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_compatible_LEN 2 +#define DT_N_S_soc_S_spi_40003800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bits 16384 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_spi_40003800, clocks, 0, bits) +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, clocks, 0, bits) +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, clocks, 0) +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, clocks, 0) +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_clocks_LEN 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_dma_coherent 0 +#define DT_N_S_soc_S_spi_40003800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40003800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi3_miso_pc11 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_PATH "/soc/pin-controller@48000000/spi3_miso_pc11" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FULL_NAME "spi3_miso_pc11" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FULL_NAME_UNQUOTED spi3_miso_pc11 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FULL_NAME_TOKEN spi3_miso_pc11 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FULL_NAME_UPPER_TOKEN SPI3_MISO_PC11 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_CHILD_IDX 12 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_NODELABEL(fn) fn(spi3_miso_pc11) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3_miso_pc11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_HASH FtbFJN6KajFC_Y2Ozvj6bIVerZAMafUQzXHL9vueoco + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_ORD 85 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_ORD_STR_SORTABLE 00085 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_SUPPORTS_ORDS \ + 89, /* /soc/spi@40003c00 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_EXISTS 1 +#define DT_N_NODELABEL_spi3_miso_pc11 DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_pinmux 1382 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi3_mosi_pc12 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_PATH "/soc/pin-controller@48000000/spi3_mosi_pc12" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FULL_NAME "spi3_mosi_pc12" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FULL_NAME_UNQUOTED spi3_mosi_pc12 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FULL_NAME_TOKEN spi3_mosi_pc12 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FULL_NAME_UPPER_TOKEN SPI3_MOSI_PC12 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_CHILD_IDX 15 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_NODELABEL(fn) fn(spi3_mosi_pc12) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3_mosi_pc12, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_HASH zpX8Ga2pHg00q_JMV_4Vnu_WMJmRtmaAxHpI2bxEW7c + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_ORD 86 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_ORD_STR_SORTABLE 00086 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_SUPPORTS_ORDS \ + 89, /* /soc/spi@40003c00 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_EXISTS 1 +#define DT_N_NODELABEL_spi3_mosi_pc12 DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_pinmux 1414 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi3_nss_pa15 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_PATH "/soc/pin-controller@48000000/spi3_nss_pa15" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FULL_NAME "spi3_nss_pa15" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FULL_NAME_UNQUOTED spi3_nss_pa15 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FULL_NAME_TOKEN spi3_nss_pa15 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FULL_NAME_UPPER_TOKEN SPI3_NSS_PA15 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_CHILD_IDX 17 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_NODELABEL(fn) fn(spi3_nss_pa15) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3_nss_pa15, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_HASH mgRgfptxOk1syYQtCCFDmpqSK6WxMogUEzF5GkuvVu4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_ORD 87 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_ORD_STR_SORTABLE 00087 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_SUPPORTS_ORDS \ + 89, /* /soc/spi@40003c00 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_EXISTS 1 +#define DT_N_NODELABEL_spi3_nss_pa15 DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_pinmux 486 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi3_sck_pc10 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_PATH "/soc/pin-controller@48000000/spi3_sck_pc10" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FULL_NAME "spi3_sck_pc10" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FULL_NAME_UNQUOTED spi3_sck_pc10 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FULL_NAME_TOKEN spi3_sck_pc10 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FULL_NAME_UPPER_TOKEN SPI3_SCK_PC10 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_CHILD_IDX 20 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_NODELABEL(fn) fn(spi3_sck_pc10) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3_sck_pc10, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_HASH xxIYyIXBDO5DzjFECQzCM1SMqsk5_1LEGyeE1IyOEL0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_ORD 88 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_ORD_STR_SORTABLE 00088 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_SUPPORTS_ORDS \ + 89, /* /soc/spi@40003c00 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_EXISTS 1 +#define DT_N_NODELABEL_spi3_sck_pc10 DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_pinmux 1350 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/spi@40003c00 + * + * Node identifier: DT_N_S_soc_S_spi_40003c00 + * + * Binding (compatible = st,stm32-spi-fifo): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32-spi-fifo.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_spi_40003c00_PATH "/soc/spi@40003c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME "spi@40003c00" +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_UNQUOTED spi@40003c00 +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_TOKEN spi_40003c00 +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_UPPER_TOKEN SPI_40003C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_spi_40003c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_spi_40003c00_CHILD_IDX 22 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_spi_40003c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_FOREACH_NODELABEL(fn) fn(spi3) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_spi_40003c00_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40003c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_spi_40003c00_HASH 2ZRlHGHWIr4tSgRVkDzDHSiC22m9C4PVNAuFo8LU_0A + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_spi_40003c00_ORD 89 +#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00089 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_spi_40003c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 85, /* /soc/pin-controller@48000000/spi3_miso_pc11 */ \ + 86, /* /soc/pin-controller@48000000/spi3_mosi_pc12 */ \ + 87, /* /soc/pin-controller@48000000/spi3_nss_pa15 */ \ + 88, /* /soc/pin-controller@48000000/spi3_sck_pc10 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_spi_40003c00_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_spi_40003c00_EXISTS 1 +#define DT_N_INST_2_st_stm32_spi_fifo DT_N_S_soc_S_spi_40003c00 +#define DT_N_INST_2_st_stm32_spi DT_N_S_soc_S_spi_40003c00 +#define DT_N_NODELABEL_spi3 DT_N_S_soc_S_spi_40003c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_spi_40003c00_REG_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_VAL_ADDRESS 1073757184 /* 0x40003c00 */ +#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_spi_40003c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_spi_40003c00, 0) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, 0) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40003c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40003c00_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_irq 51 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40003c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_0 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_1 "stm32-spi" +#define DT_N_S_soc_S_spi_40003c00_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12 + +/* Generic property macros: */ +#define DT_N_S_soc_S_spi_40003c00_P_reg {1073757184 /* 0x40003c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_0 1073757184 +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40003c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts {51 /* 0x33 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_0 51 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 2) \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 3) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 3) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 3, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, pinctrl_0, 3, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_LEN 4 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_spi_40003c00_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_ioswp 0 +#define DT_N_S_soc_S_spi_40003c00_P_ioswp_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width "full-4-to-16-bit" +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_STRING_UNQUOTED full-4-to-16-bit +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_STRING_TOKEN full_4_to_16_bit +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_STRING_UPPER_TOKEN FULL_4_TO_16_BIT +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_IDX_0 "full-4-to-16-bit" +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_IDX_0_ENUM_VAL_full_4_to_16_bit_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_ENUM_VAL_full_4_to_16_bit_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, st_spi_data_width, 0) +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, st_spi_data_width, 0) +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, st_spi_data_width, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, st_spi_data_width, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_LEN 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_spi_data_width_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_st_soft_nss 0 +#define DT_N_S_soc_S_spi_40003c00_P_st_soft_nss_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status "okay" +#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, status, 0) +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, status, 0) +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible {"st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_LEN 2 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bits 32768 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, bits) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, bits) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_dma_coherent 0 +#define DT_N_S_soc_S_spi_40003c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40003c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48000400 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_PATH "/soc/pin-controller@48000000/gpio@48000400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FULL_NAME "gpio@48000400" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FULL_NAME_UNQUOTED gpio@48000400 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FULL_NAME_TOKEN gpio_48000400 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FULL_NAME_UPPER_TOKEN GPIO_48000400 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_NODELABEL(fn) fn(gpiob) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiob, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_HASH _ITOixrnsdulY77mYPcfDq4R1DIXVligCgZL7jMBzZg + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_ORD 90 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_ORD_STR_SORTABLE 00090 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_SUPPORTS_ORDS \ + 94, /* /soc/spi@40013000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_EXISTS 1 +#define DT_N_INST_1_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_NODELABEL_gpiob DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_REG_IDX_0_VAL_ADDRESS 1207960576 /* 0x48000400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_reg {1207960576 /* 0x48000400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_reg_IDX_0 1207960576 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi1_miso_pa6 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_PATH "/soc/pin-controller@48000000/spi1_miso_pa6" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FULL_NAME "spi1_miso_pa6" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FULL_NAME_UNQUOTED spi1_miso_pa6 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FULL_NAME_TOKEN spi1_miso_pa6 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FULL_NAME_UPPER_TOKEN SPI1_MISO_PA6 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_CHILD_IDX 10 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_NODELABEL(fn) fn(spi1_miso_pa6) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1_miso_pa6, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_HASH oIzkx4rl5Nz8vPvVzWtwu4yICDyfxXigFKVAM4TV97Y + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_ORD 91 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_ORD_STR_SORTABLE 00091 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_SUPPORTS_ORDS \ + 94, /* /soc/spi@40013000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_EXISTS 1 +#define DT_N_NODELABEL_spi1_miso_pa6 DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_pinmux 197 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi1_mosi_pa7 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_PATH "/soc/pin-controller@48000000/spi1_mosi_pa7" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FULL_NAME "spi1_mosi_pa7" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FULL_NAME_UNQUOTED spi1_mosi_pa7 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FULL_NAME_TOKEN spi1_mosi_pa7 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FULL_NAME_UPPER_TOKEN SPI1_MOSI_PA7 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_CHILD_IDX 13 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_NODELABEL(fn) fn(spi1_mosi_pa7) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1_mosi_pa7, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_HASH D3H8IMt40ZTRaaH4HvFRvGhMIv98zWAp5VYqnK_Yfb0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_ORD 92 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_ORD_STR_SORTABLE 00092 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_SUPPORTS_ORDS \ + 94, /* /soc/spi@40013000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_EXISTS 1 +#define DT_N_NODELABEL_spi1_mosi_pa7 DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_pinmux 229 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/spi1_sck_pa5 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_PATH "/soc/pin-controller@48000000/spi1_sck_pa5" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FULL_NAME "spi1_sck_pa5" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FULL_NAME_UNQUOTED spi1_sck_pa5 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FULL_NAME_TOKEN spi1_sck_pa5 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FULL_NAME_UPPER_TOKEN SPI1_SCK_PA5 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_CHILD_IDX 18 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_NODELABEL(fn) fn(spi1_sck_pa5) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1_sck_pa5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_HASH wPnATtGdEMkO_93Qu180QF012JwegU_R5_0R97wwnqc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_ORD 93 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_ORD_STR_SORTABLE 00093 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_REQUIRES_ORDS \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_SUPPORTS_ORDS \ + 94, /* /soc/spi@40013000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_EXISTS 1 +#define DT_N_NODELABEL_spi1_sck_pa5 DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_REG(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_pinmux 165 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/spi@40013000 + * + * Node identifier: DT_N_S_soc_S_spi_40013000 + * + * Binding (compatible = st,stm32-spi-fifo): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32-spi-fifo.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_spi_40013000_PATH "/soc/spi@40013000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_spi_40013000_FULL_NAME "spi@40013000" +#define DT_N_S_soc_S_spi_40013000_FULL_NAME_UNQUOTED spi@40013000 +#define DT_N_S_soc_S_spi_40013000_FULL_NAME_TOKEN spi_40013000 +#define DT_N_S_soc_S_spi_40013000_FULL_NAME_UPPER_TOKEN SPI_40013000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_spi_40013000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_spi_40013000_CHILD_IDX 20 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_spi_40013000_NODELABEL_NUM 2 +#define DT_N_S_soc_S_spi_40013000_FOREACH_NODELABEL(fn) fn(spi1) fn(arduino_spi) +#define DT_N_S_soc_S_spi_40013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1, __VA_ARGS__) fn(arduino_spi, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_spi_40013000_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40013000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_spi_40013000_HASH q04f3jPcynKDa_9eKR_V34RQn5SAL2iX4yHIC7XGkLs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_spi_40013000_ORD 94 +#define DT_N_S_soc_S_spi_40013000_ORD_STR_SORTABLE 00094 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_spi_40013000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 90, /* /soc/pin-controller@48000000/gpio@48000400 */ \ + 91, /* /soc/pin-controller@48000000/spi1_miso_pa6 */ \ + 92, /* /soc/pin-controller@48000000/spi1_mosi_pa7 */ \ + 93, /* /soc/pin-controller@48000000/spi1_sck_pa5 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_spi_40013000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_spi_40013000_EXISTS 1 +#define DT_N_INST_0_st_stm32_spi_fifo DT_N_S_soc_S_spi_40013000 +#define DT_N_INST_0_st_stm32_spi DT_N_S_soc_S_spi_40013000 +#define DT_N_NODELABEL_spi1 DT_N_S_soc_S_spi_40013000 +#define DT_N_NODELABEL_arduino_spi DT_N_S_soc_S_spi_40013000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_spi_40013000_REG_NUM 1 +#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_VAL_ADDRESS 1073819648 /* 0x40013000 */ +#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_spi_40013000_FOREACH_REG(fn) fn(DT_N_S_soc_S_spi_40013000, 0) +#define DT_N_S_soc_S_spi_40013000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, 0) +#define DT_N_S_soc_S_spi_40013000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40013000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40013000_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_irq 35 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40013000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_0 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_1 "stm32-spi" +#define DT_N_S_soc_S_spi_40013000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_spi_40013000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7 + +/* Generic property macros: */ +#define DT_N_S_soc_S_spi_40013000_P_reg {1073819648 /* 0x40013000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_0 1073819648 +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40013000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_interrupts {35 /* 0x23 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_0 35 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 2) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 2) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, pinctrl_0, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_LEN 3 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_spi_40013000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_ioswp 0 +#define DT_N_S_soc_S_spi_40013000_P_ioswp_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width "full-4-to-16-bit" +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_STRING_UNQUOTED full-4-to-16-bit +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_STRING_TOKEN full_4_to_16_bit +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_STRING_UPPER_TOKEN FULL_4_TO_16_BIT +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_IDX_0 "full-4-to-16-bit" +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_IDX_0_ENUM_VAL_full_4_to_16_bit_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_ENUM_VAL_full_4_to_16_bit_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, st_spi_data_width, 0) +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, st_spi_data_width, 0) +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, st_spi_data_width, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, st_spi_data_width, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_LEN 1 +#define DT_N_S_soc_S_spi_40013000_P_st_spi_data_width_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_st_soft_nss 0 +#define DT_N_S_soc_S_spi_40013000_P_st_soft_nss_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_VAL_pin 6 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_VAL_flags 17 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0, pin) \ + fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0, flags) +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0, pin) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0, flags) +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0) +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0) +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, cs_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_LEN 1 +#define DT_N_S_soc_S_spi_40013000_P_cs_gpios_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status "okay" +#define DT_N_S_soc_S_spi_40013000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_spi_40013000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_spi_40013000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, status, 0) +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, status, 0) +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40013000_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible {"st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1) +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1) +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_compatible_LEN 2 +#define DT_N_S_soc_S_spi_40013000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bits 4096 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_spi_40013000, clocks, 0, bits) +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, clocks, 0, bits) +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, clocks, 0) +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, clocks, 0) +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_clocks_LEN 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_dma_coherent 0 +#define DT_N_S_soc_S_spi_40013000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40013000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timer@e000e010 + * + * Node identifier: DT_N_S_soc_S_timer_e000e010 + * + * Binding (compatible = arm,armv7m-systick): + * $ZEPHYR_BASE/dts/bindings/timer/arm,armv7m-systick.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010" +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UNQUOTED timer@e000e010 +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_TOKEN timer_e000e010 +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UPPER_TOKEN TIMER_E000E010 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timer_e000e010_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL(fn) fn(systick) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL_VARGS(fn, ...) fn(systick, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timer_e000e010_HASH aZrzPLAIRgEwRZJIvTCzJONA6gPgc4QlhkiU5oWGArA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timer_e000e010_ORD 95 +#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00095 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \ + 4, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timer_e000e010_EXISTS 1 +#define DT_N_INST_0_arm_armv7m_systick DT_N_S_soc_S_timer_e000e010 +#define DT_N_NODELABEL_systick DT_N_S_soc_S_timer_e000e010 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */ +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */ +#define DT_N_S_soc_S_timer_e000e010_FOREACH_REG(fn) fn(DT_N_S_soc_S_timer_e000e010, 0) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, 0) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv7m_systick 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv7m-systick" +#define DT_N_S_soc_S_timer_e000e010_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */} +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16 +#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_external_clock_source 0 +#define DT_N_S_soc_S_timer_e000e010_P_external_clock_source_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv7m-systick"} +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv7m-systick" +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-systick +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_systick +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_SYSTICK +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_dma_coherent 0 +#define DT_N_S_soc_S_timer_e000e010_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0 +#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40007c00 + * + * Node identifier: DT_N_S_soc_S_timers_40007c00 + * + * Binding (compatible = st,stm32-lptim): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-lptim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40007c00_PATH "/soc/timers@40007c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40007c00_FULL_NAME "timers@40007c00" +#define DT_N_S_soc_S_timers_40007c00_FULL_NAME_UNQUOTED timers@40007c00 +#define DT_N_S_soc_S_timers_40007c00_FULL_NAME_TOKEN timers_40007c00 +#define DT_N_S_soc_S_timers_40007c00_FULL_NAME_UPPER_TOKEN TIMERS_40007C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40007c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40007c00_CHILD_IDX 24 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40007c00_NODELABEL_NUM 2 +#define DT_N_S_soc_S_timers_40007c00_FOREACH_NODELABEL(fn) fn(lptim1) fn(stm32_lp_tick_source) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(lptim1, __VA_ARGS__) fn(stm32_lp_tick_source, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40007c00_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40007c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40007c00_HASH 0ZbuCp5mjhw6Ls5w9wnMv4hCgy9r4pkUnOw3zpBV8fk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40007c00_ORD 96 +#define DT_N_S_soc_S_timers_40007c00_ORD_STR_SORTABLE 00096 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40007c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40007c00_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40007c00_EXISTS 1 +#define DT_N_INST_0_st_stm32_lptim DT_N_S_soc_S_timers_40007c00 +#define DT_N_NODELABEL_lptim1 DT_N_S_soc_S_timers_40007c00 +#define DT_N_NODELABEL_stm32_lp_tick_source DT_N_S_soc_S_timers_40007c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40007c00_REG_NUM 1 +#define DT_N_S_soc_S_timers_40007c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_REG_IDX_0_VAL_ADDRESS 1073773568 /* 0x40007c00 */ +#define DT_N_S_soc_S_timers_40007c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40007c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40007c00, 0) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, 0) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40007c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40007c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40007c00_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_VAL_irq 49 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40007c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_NAME_wakeup_VAL_irq DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40007c00_IRQ_NAME_wakeup_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_NAME_wakeup_VAL_priority DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40007c00_IRQ_NAME_wakeup_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_IRQ_NAME_wakeup_CONTROLLER DT_N_S_soc_S_timers_40007c00_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40007c00_COMPAT_MATCHES_st_stm32_lptim 1 +#define DT_N_S_soc_S_timers_40007c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40007c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_COMPAT_MODEL_IDX_0 "stm32-lptim" +#define DT_N_S_soc_S_timers_40007c00_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40007c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40007c00_P_st_prescaler 1 +#define DT_N_S_soc_S_timers_40007c00_P_st_prescaler_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40007c00_P_st_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_st_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_st_prescaler_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_reg {1073773568 /* 0x40007c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40007c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_reg_IDX_0 1073773568 +#define DT_N_S_soc_S_timers_40007c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40007c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_VAL_bits 2147483648 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40007c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_VAL_bus 2 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_VAL_bits 53608584 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40007c00, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40007c00, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 1) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 1) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40007c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40007c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40007c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_VAL_id 1823 +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40007c00, resets, 0, id) +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, resets, 0, id) +#define DT_N_S_soc_S_timers_40007c00_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40007c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40007c00, resets, 0) +#define DT_N_S_soc_S_timers_40007c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, resets, 0) +#define DT_N_S_soc_S_timers_40007c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40007c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40007c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40007c00_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_status "okay" +#define DT_N_S_soc_S_timers_40007c00_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40007c00_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40007c00_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40007c00_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40007c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40007c00_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40007c00, status, 0) +#define DT_N_S_soc_S_timers_40007c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, status, 0) +#define DT_N_S_soc_S_timers_40007c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40007c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40007c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_compatible {"st,stm32-lptim"} +#define DT_N_S_soc_S_timers_40007c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_compatible_IDX_0 "st,stm32-lptim" +#define DT_N_S_soc_S_timers_40007c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lptim +#define DT_N_S_soc_S_timers_40007c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_lptim +#define DT_N_S_soc_S_timers_40007c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LPTIM +#define DT_N_S_soc_S_timers_40007c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40007c00, compatible, 0) +#define DT_N_S_soc_S_timers_40007c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, compatible, 0) +#define DT_N_S_soc_S_timers_40007c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40007c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40007c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_interrupts {49 /* 0x31 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40007c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_interrupts_IDX_0 49 +#define DT_N_S_soc_S_timers_40007c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40007c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names {"wakeup"} +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_IDX_0 "wakeup" +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_IDX_0_STRING_UNQUOTED wakeup +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_IDX_0_STRING_TOKEN wakeup +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN WAKEUP +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40007c00, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40007c00, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40007c00, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40007c00_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40007c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40007c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40007c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40007c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40007c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/ucpd@4000a000 + * + * Node identifier: DT_N_S_soc_S_ucpd_4000a000 + * + * Binding (compatible = st,stm32-ucpd): + * $ZEPHYR_BASE/dts/bindings/tcpc/st,stm32-ucpd.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_ucpd_4000a000_PATH "/soc/ucpd@4000a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_ucpd_4000a000_FULL_NAME "ucpd@4000a000" +#define DT_N_S_soc_S_ucpd_4000a000_FULL_NAME_UNQUOTED ucpd@4000a000 +#define DT_N_S_soc_S_ucpd_4000a000_FULL_NAME_TOKEN ucpd_4000a000 +#define DT_N_S_soc_S_ucpd_4000a000_FULL_NAME_UPPER_TOKEN UCPD_4000A000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_ucpd_4000a000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_ucpd_4000a000_CHILD_IDX 41 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_ucpd_4000a000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_NODELABEL(fn) fn(ucpd1) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ucpd1, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_ucpd_4000a000_CHILD_NUM 0 +#define DT_N_S_soc_S_ucpd_4000a000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_ucpd_4000a000_HASH dz71PmBvjUI3KHlHmLFqfpqTyoYXdlXBj5AwJKyEJlk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_ucpd_4000a000_ORD 97 +#define DT_N_S_soc_S_ucpd_4000a000_ORD_STR_SORTABLE 00097 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_ucpd_4000a000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_ucpd_4000a000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_ucpd_4000a000_EXISTS 1 +#define DT_N_INST_0_st_stm32_ucpd DT_N_S_soc_S_ucpd_4000a000 +#define DT_N_NODELABEL_ucpd1 DT_N_S_soc_S_ucpd_4000a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_ucpd_4000a000_REG_NUM 1 +#define DT_N_S_soc_S_ucpd_4000a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 /* 0x4000a000 */ +#define DT_N_S_soc_S_ucpd_4000a000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_REG(fn) fn(DT_N_S_soc_S_ucpd_4000a000, 0) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_ucpd_4000a000, 0) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_ucpd_4000a000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ucpd_4000a000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_RANGES_NUM 0 +#define DT_N_S_soc_S_ucpd_4000a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_NUM 1 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_VAL_irq 63 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_ucpd_4000a000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_ucpd_4000a000_COMPAT_MATCHES_st_stm32_ucpd 1 +#define DT_N_S_soc_S_ucpd_4000a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_ucpd_4000a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_COMPAT_MODEL_IDX_0 "stm32-ucpd" +#define DT_N_S_soc_S_ucpd_4000a000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_ucpd_4000a000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_ucpd_4000a000_P_reg {1073782784 /* 0x4000a000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_ucpd_4000a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_reg_IDX_0 1073782784 +#define DT_N_S_soc_S_ucpd_4000a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_ucpd_4000a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0, bits) +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0, bits) +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0) +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0) +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ucpd_4000a000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_LEN 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_interrupts {63 /* 0x3f */, 0 /* 0x0 */} +#define DT_N_S_soc_S_ucpd_4000a000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_interrupts_IDX_0 63 +#define DT_N_S_soc_S_ucpd_4000a000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_ucpd_4000a000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_psc_ucpdclk 2 +#define DT_N_S_soc_S_ucpd_4000a000_P_psc_ucpdclk_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_psc_ucpdclk_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_psc_ucpdclk_IDX_0_ENUM_VAL_2_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_psc_ucpdclk_ENUM_VAL_2_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_psc_ucpdclk_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_ifrgap 17 +#define DT_N_S_soc_S_ucpd_4000a000_P_ifrgap_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_transwin 8 +#define DT_N_S_soc_S_ucpd_4000a000_P_transwin_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_hbitclkdiv 14 +#define DT_N_S_soc_S_ucpd_4000a000_P_hbitclkdiv_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_dead_battery 0 +#define DT_N_S_soc_S_ucpd_4000a000_P_dead_battery_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_status "disabled" +#define DT_N_S_soc_S_ucpd_4000a000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_ucpd_4000a000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_ucpd_4000a000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_ucpd_4000a000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_ucpd_4000a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ucpd_4000a000, status, 0) +#define DT_N_S_soc_S_ucpd_4000a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ucpd_4000a000, status, 0) +#define DT_N_S_soc_S_ucpd_4000a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ucpd_4000a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ucpd_4000a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_P_status_LEN 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible {"st,stm32-ucpd"} +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_IDX_0 "st,stm32-ucpd" +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-ucpd +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_IDX_0_STRING_TOKEN st_stm32_ucpd +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UCPD +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ucpd_4000a000, compatible, 0) +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ucpd_4000a000, compatible, 0) +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ucpd_4000a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ucpd_4000a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_dma_coherent 0 +#define DT_N_S_soc_S_ucpd_4000a000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_ucpd_4000a000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_wakeup_source 0 +#define DT_N_S_soc_S_ucpd_4000a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_ucpd_4000a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_ucpd_4000a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /usbphy + * + * Node identifier: DT_N_S_usbphy + * + * Binding (compatible = usb-nop-xceiv): + * $ZEPHYR_BASE/dts/bindings/phy/usb-nop-xceiv.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_usbphy_PATH "/usbphy" + +/* Node's name with unit-address: */ +#define DT_N_S_usbphy_FULL_NAME "usbphy" +#define DT_N_S_usbphy_FULL_NAME_UNQUOTED usbphy +#define DT_N_S_usbphy_FULL_NAME_TOKEN usbphy +#define DT_N_S_usbphy_FULL_NAME_UPPER_TOKEN USBPHY + +/* Node parent (/) identifier: */ +#define DT_N_S_usbphy_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_usbphy_CHILD_IDX 9 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_usbphy_NODELABEL_NUM 1 +#define DT_N_S_usbphy_FOREACH_NODELABEL(fn) fn(usb_fs_phy) +#define DT_N_S_usbphy_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_fs_phy, __VA_ARGS__) +#define DT_N_S_usbphy_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_usbphy_CHILD_NUM 0 +#define DT_N_S_usbphy_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_usbphy_FOREACH_CHILD(fn) +#define DT_N_S_usbphy_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_usbphy_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_usbphy_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_usbphy_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_usbphy_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_usbphy_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_usbphy_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_usbphy_HASH E_X5Gkg3DeUJ3IGdQ884eo5YhX8B_NNNcL9cTxe39SI + +/* Node's dependency ordinal: */ +#define DT_N_S_usbphy_ORD 98 +#define DT_N_S_usbphy_ORD_STR_SORTABLE 00098 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_usbphy_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_usbphy_SUPPORTS_ORDS \ + 99, /* /soc/usb@40005c00 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_usbphy_EXISTS 1 +#define DT_N_INST_0_usb_nop_xceiv DT_N_S_usbphy +#define DT_N_NODELABEL_usb_fs_phy DT_N_S_usbphy + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_usbphy_REG_NUM 0 +#define DT_N_S_usbphy_FOREACH_REG(fn) +#define DT_N_S_usbphy_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_usbphy_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_usbphy_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_usbphy_RANGES_NUM 0 +#define DT_N_S_usbphy_FOREACH_RANGE(fn) +#define DT_N_S_usbphy_IRQ_NUM 0 +#define DT_N_S_usbphy_IRQ_LEVEL 0 +#define DT_N_S_usbphy_COMPAT_MATCHES_usb_nop_xceiv 1 +#define DT_N_S_usbphy_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_usbphy_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_usbphy_P_compatible {"usb-nop-xceiv"} +#define DT_N_S_usbphy_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_usbphy_P_compatible_IDX_0 "usb-nop-xceiv" +#define DT_N_S_usbphy_P_compatible_IDX_0_STRING_UNQUOTED usb-nop-xceiv +#define DT_N_S_usbphy_P_compatible_IDX_0_STRING_TOKEN usb_nop_xceiv +#define DT_N_S_usbphy_P_compatible_IDX_0_STRING_UPPER_TOKEN USB_NOP_XCEIV +#define DT_N_S_usbphy_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_usbphy, compatible, 0) +#define DT_N_S_usbphy_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_usbphy, compatible, 0) +#define DT_N_S_usbphy_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_usbphy, compatible, 0, __VA_ARGS__) +#define DT_N_S_usbphy_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_usbphy, compatible, 0, __VA_ARGS__) +#define DT_N_S_usbphy_P_compatible_LEN 1 +#define DT_N_S_usbphy_P_compatible_EXISTS 1 +#define DT_N_S_usbphy_P_dma_coherent 0 +#define DT_N_S_usbphy_P_dma_coherent_EXISTS 1 +#define DT_N_S_usbphy_P_zephyr_deferred_init 0 +#define DT_N_S_usbphy_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_usbphy_P_wakeup_source 0 +#define DT_N_S_usbphy_P_wakeup_source_EXISTS 1 +#define DT_N_S_usbphy_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_usbphy_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/usb@40005c00 + * + * Node identifier: DT_N_S_soc_S_usb_40005c00 + * + * Binding (compatible = st,stm32-usb): + * $ZEPHYR_BASE/dts/bindings/usb/st,stm32-usb.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_usb_40005c00_PATH "/soc/usb@40005c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_usb_40005c00_FULL_NAME "usb@40005c00" +#define DT_N_S_soc_S_usb_40005c00_FULL_NAME_UNQUOTED usb@40005c00 +#define DT_N_S_soc_S_usb_40005c00_FULL_NAME_TOKEN usb_40005c00 +#define DT_N_S_soc_S_usb_40005c00_FULL_NAME_UPPER_TOKEN USB_40005C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_usb_40005c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_usb_40005c00_CHILD_IDX 37 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_usb_40005c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_usb_40005c00_FOREACH_NODELABEL(fn) fn(usb) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_usb_40005c00_CHILD_NUM 0 +#define DT_N_S_soc_S_usb_40005c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_usb_40005c00_HASH 80xV1Zo9Nb21_13c9S9_bF8QGZR2Fp7zcRZfGeZahl0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_usb_40005c00_ORD 99 +#define DT_N_S_soc_S_usb_40005c00_ORD_STR_SORTABLE 00099 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_usb_40005c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 98, /* /usbphy */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_usb_40005c00_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_usb_40005c00_EXISTS 1 +#define DT_N_INST_0_st_stm32_usb DT_N_S_soc_S_usb_40005c00 +#define DT_N_NODELABEL_usb DT_N_S_soc_S_usb_40005c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_usb_40005c00_REG_NUM 1 +#define DT_N_S_soc_S_usb_40005c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_REG_IDX_0_VAL_ADDRESS 1073765376 /* 0x40005c00 */ +#define DT_N_S_soc_S_usb_40005c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_usb_40005c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_usb_40005c00, 0) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, 0) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_RANGES_NUM 0 +#define DT_N_S_soc_S_usb_40005c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_usb_40005c00_IRQ_NUM 2 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_VAL_irq 20 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_VAL_irq 19 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40005c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usb_VAL_irq DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usb_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usb_VAL_priority DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usb_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usb_CONTROLLER DT_N_S_soc_S_usb_40005c00_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usbhp_VAL_irq DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usbhp_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usbhp_VAL_priority DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usbhp_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_IRQ_NAME_usbhp_CONTROLLER DT_N_S_soc_S_usb_40005c00_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_usb_40005c00_COMPAT_MATCHES_st_stm32_usb 1 +#define DT_N_S_soc_S_usb_40005c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_usb_40005c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_COMPAT_MODEL_IDX_0 "stm32-usb" +#define DT_N_S_soc_S_usb_40005c00_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_usb_40005c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_usb_40005c00_P_reg {1073765376 /* 0x40005c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_usb_40005c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_reg_IDX_0 1073765376 +#define DT_N_S_soc_S_usb_40005c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_usb_40005c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts {20 /* 0x14 */, 0 /* 0x0 */, 19 /* 0x13 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_0 20 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_2 19 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_usb_40005c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_ram_size 1024 +#define DT_N_S_soc_S_usb_40005c00_P_ram_size_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_phys DT_N_S_usbphy +#define DT_N_S_soc_S_usb_40005c00_P_phys_IDX_0 DT_N_S_usbphy +#define DT_N_S_soc_S_usb_40005c00_P_phys_IDX_0_PH DT_N_S_usbphy +#define DT_N_S_soc_S_usb_40005c00_P_phys_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_phys_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40005c00, phys, 0) +#define DT_N_S_soc_S_usb_40005c00_P_phys_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, phys, 0) +#define DT_N_S_soc_S_usb_40005c00_P_phys_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, phys, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_phys_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, phys, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_phys_LEN 1 +#define DT_N_S_soc_S_usb_40005c00_P_phys_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_VAL_bits 8388608 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_usb_40005c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 0, bits) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 0, bits) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_VAL_bus 5 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_VAL_bits 3801224 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_usb_40005c00, clocks, 1, bus) \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 1, bits) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 1, bits) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40005c00, clocks, 0) \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 1) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 1) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40005c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_clocks_LEN 2 +#define DT_N_S_soc_S_usb_40005c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_num_bidir_endpoints 8 +#define DT_N_S_soc_S_usb_40005c00_P_num_bidir_endpoints_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed "full-speed" +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_STRING_UNQUOTED full-speed +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_STRING_TOKEN full_speed +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_STRING_UPPER_TOKEN FULL_SPEED +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_IDX_0 "full-speed" +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_IDX_0_ENUM_VAL_full_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_ENUM_VAL_full_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40005c00, maximum_speed, 0) +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, maximum_speed, 0) +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, maximum_speed, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, maximum_speed, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_LEN 1 +#define DT_N_S_soc_S_usb_40005c00_P_maximum_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_status "disabled" +#define DT_N_S_soc_S_usb_40005c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_usb_40005c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_usb_40005c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_usb_40005c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_usb_40005c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_usb_40005c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40005c00, status, 0) +#define DT_N_S_soc_S_usb_40005c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, status, 0) +#define DT_N_S_soc_S_usb_40005c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_status_LEN 1 +#define DT_N_S_soc_S_usb_40005c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_compatible {"st,stm32-usb"} +#define DT_N_S_soc_S_usb_40005c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_compatible_IDX_0 "st,stm32-usb" +#define DT_N_S_soc_S_usb_40005c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usb +#define DT_N_S_soc_S_usb_40005c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_usb +#define DT_N_S_soc_S_usb_40005c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USB +#define DT_N_S_soc_S_usb_40005c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40005c00, compatible, 0) +#define DT_N_S_soc_S_usb_40005c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, compatible, 0) +#define DT_N_S_soc_S_usb_40005c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_usb_40005c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names {"usb", "usbhp"} +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_0 "usb" +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_0_STRING_UNQUOTED usb +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_0_STRING_TOKEN usb +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN USB +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_1 "usbhp" +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_1_STRING_UNQUOTED usbhp +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_1_STRING_TOKEN usbhp +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN USBHP +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 0) \ + fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 1) +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 1) +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40005c00, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_LEN 2 +#define DT_N_S_soc_S_usb_40005c00_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_dma_coherent 0 +#define DT_N_S_soc_S_usb_40005c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_usb_40005c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_wakeup_source 0 +#define DT_N_S_soc_S_usb_40005c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_usb_40005c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_usb_40005c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/watchdog@40002c00 + * + * Node identifier: DT_N_S_soc_S_watchdog_40002c00 + * + * Binding (compatible = st,stm32-window-watchdog): + * $ZEPHYR_BASE/dts/bindings/watchdog/st,stm32-window-watchdog.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_watchdog_40002c00_PATH "/soc/watchdog@40002c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_watchdog_40002c00_FULL_NAME "watchdog@40002c00" +#define DT_N_S_soc_S_watchdog_40002c00_FULL_NAME_UNQUOTED watchdog@40002c00 +#define DT_N_S_soc_S_watchdog_40002c00_FULL_NAME_TOKEN watchdog_40002c00 +#define DT_N_S_soc_S_watchdog_40002c00_FULL_NAME_UPPER_TOKEN WATCHDOG_40002C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_watchdog_40002c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_watchdog_40002c00_CHILD_IDX 16 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_watchdog_40002c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_NODELABEL(fn) fn(wwdg) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(wwdg, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_watchdog_40002c00_CHILD_NUM 0 +#define DT_N_S_soc_S_watchdog_40002c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_watchdog_40002c00_HASH NKEpaR6mtDKOWUZ_R2tC3uFejChIy267XTRT9LC__CA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_watchdog_40002c00_ORD 100 +#define DT_N_S_soc_S_watchdog_40002c00_ORD_STR_SORTABLE 00100 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_watchdog_40002c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_watchdog_40002c00_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_watchdog_40002c00_EXISTS 1 +#define DT_N_INST_0_st_stm32_window_watchdog DT_N_S_soc_S_watchdog_40002c00 +#define DT_N_NODELABEL_wwdg DT_N_S_soc_S_watchdog_40002c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_watchdog_40002c00_REG_NUM 1 +#define DT_N_S_soc_S_watchdog_40002c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_REG_IDX_0_VAL_ADDRESS 1073753088 /* 0x40002c00 */ +#define DT_N_S_soc_S_watchdog_40002c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_watchdog_40002c00, 0) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40002c00, 0) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40002c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40002c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_RANGES_NUM 0 +#define DT_N_S_soc_S_watchdog_40002c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_NUM 1 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_VAL_irq 0 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_watchdog_40002c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_watchdog_40002c00_COMPAT_MATCHES_st_stm32_window_watchdog 1 +#define DT_N_S_soc_S_watchdog_40002c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_watchdog_40002c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_COMPAT_MODEL_IDX_0 "stm32-window-watchdog" +#define DT_N_S_soc_S_watchdog_40002c00_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_watchdog_40002c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_watchdog_40002c00_P_reg {1073753088 /* 0x40002c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_watchdog_40002c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_reg_IDX_0 1073753088 +#define DT_N_S_soc_S_watchdog_40002c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_watchdog_40002c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_VAL_bits 2048 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0, bits) +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0, bits) +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0) +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0) +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40002c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_status "disabled" +#define DT_N_S_soc_S_watchdog_40002c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_watchdog_40002c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_watchdog_40002c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_watchdog_40002c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_watchdog_40002c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40002c00, status, 0) +#define DT_N_S_soc_S_watchdog_40002c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40002c00, status, 0) +#define DT_N_S_soc_S_watchdog_40002c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40002c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40002c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_P_status_LEN 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible {"st,stm32-window-watchdog"} +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_IDX_0 "st,stm32-window-watchdog" +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-window-watchdog +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_window_watchdog +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_WINDOW_WATCHDOG +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40002c00, compatible, 0) +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40002c00, compatible, 0) +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40002c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40002c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_interrupts {0 /* 0x0 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_watchdog_40002c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_interrupts_IDX_0 0 +#define DT_N_S_soc_S_watchdog_40002c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_watchdog_40002c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_dma_coherent 0 +#define DT_N_S_soc_S_watchdog_40002c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_watchdog_40002c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_wakeup_source 0 +#define DT_N_S_soc_S_watchdog_40002c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40002c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_watchdog_40002c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/watchdog@40003000 + * + * Node identifier: DT_N_S_soc_S_watchdog_40003000 + * + * Binding (compatible = st,stm32-watchdog): + * $ZEPHYR_BASE/dts/bindings/watchdog/st,stm32-watchdog.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_watchdog_40003000_PATH "/soc/watchdog@40003000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_watchdog_40003000_FULL_NAME "watchdog@40003000" +#define DT_N_S_soc_S_watchdog_40003000_FULL_NAME_UNQUOTED watchdog@40003000 +#define DT_N_S_soc_S_watchdog_40003000_FULL_NAME_TOKEN watchdog_40003000 +#define DT_N_S_soc_S_watchdog_40003000_FULL_NAME_UPPER_TOKEN WATCHDOG_40003000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_watchdog_40003000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_watchdog_40003000_CHILD_IDX 15 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_watchdog_40003000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_NODELABEL(fn) fn(iwdg) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_NODELABEL_VARGS(fn, ...) fn(iwdg, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_watchdog_40003000_CHILD_NUM 0 +#define DT_N_S_soc_S_watchdog_40003000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_watchdog_40003000_HASH ZgrqJ_c2LlWOgbyPiYriITNa7e_ieqQvmB0duI6_QGU + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_watchdog_40003000_ORD 101 +#define DT_N_S_soc_S_watchdog_40003000_ORD_STR_SORTABLE 00101 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_watchdog_40003000_REQUIRES_ORDS \ + 4, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_watchdog_40003000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_watchdog_40003000_EXISTS 1 +#define DT_N_ALIAS_watchdog0 DT_N_S_soc_S_watchdog_40003000 +#define DT_N_INST_0_st_stm32_watchdog DT_N_S_soc_S_watchdog_40003000 +#define DT_N_NODELABEL_iwdg DT_N_S_soc_S_watchdog_40003000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_watchdog_40003000_REG_NUM 1 +#define DT_N_S_soc_S_watchdog_40003000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */ +#define DT_N_S_soc_S_watchdog_40003000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_REG(fn) fn(DT_N_S_soc_S_watchdog_40003000, 0) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40003000, 0) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40003000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40003000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_RANGES_NUM 0 +#define DT_N_S_soc_S_watchdog_40003000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_watchdog_40003000_IRQ_NUM 0 +#define DT_N_S_soc_S_watchdog_40003000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_watchdog_40003000_COMPAT_MATCHES_st_stm32_watchdog 1 +#define DT_N_S_soc_S_watchdog_40003000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_watchdog_40003000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_COMPAT_MODEL_IDX_0 "stm32-watchdog" +#define DT_N_S_soc_S_watchdog_40003000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_watchdog_40003000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_watchdog_40003000_P_reg {1073754112 /* 0x40003000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_watchdog_40003000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_reg_IDX_0 1073754112 +#define DT_N_S_soc_S_watchdog_40003000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_watchdog_40003000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_status "okay" +#define DT_N_S_soc_S_watchdog_40003000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_watchdog_40003000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_watchdog_40003000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_watchdog_40003000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_watchdog_40003000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_status_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_watchdog_40003000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40003000, status, 0) +#define DT_N_S_soc_S_watchdog_40003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40003000, status, 0) +#define DT_N_S_soc_S_watchdog_40003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40003000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40003000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_P_status_LEN 1 +#define DT_N_S_soc_S_watchdog_40003000_P_status_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_compatible {"st,stm32-watchdog"} +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_IDX_0 "st,stm32-watchdog" +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-watchdog +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_IDX_0_STRING_TOKEN st_stm32_watchdog +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_WATCHDOG +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40003000, compatible, 0) +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40003000, compatible, 0) +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40003000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40003000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_LEN 1 +#define DT_N_S_soc_S_watchdog_40003000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_dma_coherent 0 +#define DT_N_S_soc_S_watchdog_40003000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_watchdog_40003000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_wakeup_source 0 +#define DT_N_S_soc_S_watchdog_40003000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_watchdog_40003000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_watchdog_40003000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@1fff7000 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000 + * + * Binding (compatible = st,stm32-nvm-otp): + * $ZEPHYR_BASE/dts/bindings/otp/st,stm32-nvm-otp.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_PATH "/soc/flash-controller@40022000/flash@1fff7000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FULL_NAME "flash@1fff7000" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FULL_NAME_UNQUOTED flash@1fff7000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FULL_NAME_TOKEN flash_1fff7000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FULL_NAME_UPPER_TOKEN FLASH_1FFF7000 + +/* Node parent (/soc/flash-controller@40022000) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_PARENT DT_N_S_soc_S_flash_controller_40022000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_NODELABEL(fn) fn(st_nvm_user_otp) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_NODELABEL_VARGS(fn, ...) fn(st_nvm_user_otp, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_HASH sts8G9NjmJGhAnV0DhAjkjCpzKJE1fwLSeGkRlUjYnk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_ORD 102 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_ORD_STR_SORTABLE 00102 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_REQUIRES_ORDS \ + 11, /* /soc/flash-controller@40022000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_EXISTS 1 +#define DT_N_INST_1_st_stm32_nvm_otp DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000 +#define DT_N_NODELABEL_st_nvm_user_otp DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_REG_IDX_0_VAL_ADDRESS 536834048 /* 0x1fff7000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_COMPAT_MATCHES_st_stm32_nvm_otp 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_COMPAT_MODEL_IDX_0 "stm32-nvm-otp" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_reg {536834048 /* 0x1fff7000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_reg_IDX_0 536834048 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status "disabled" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, status, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, status, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_status_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible {"st,stm32-nvm-otp"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_IDX_0 "st,stm32-nvm-otp" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-nvm-otp +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_IDX_0_STRING_TOKEN st_stm32_nvm_otp +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_NVM_OTP +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@8000000 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 + * + * Binding (compatible = st,stm32-nv-flash): + * $ZEPHYR_BASE/dts/bindings/mtd/st,stm32-nv-flash.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_PATH "/soc/flash-controller@40022000/flash@8000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FULL_NAME "flash@8000000" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FULL_NAME_UNQUOTED flash@8000000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FULL_NAME_TOKEN flash_8000000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FULL_NAME_UPPER_TOKEN FLASH_8000000 + +/* Node parent (/soc/flash-controller@40022000) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_PARENT DT_N_S_soc_S_flash_controller_40022000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_NODELABEL(fn) fn(flash0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(flash0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_CHILD_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_HASH jS_k3V146QRc4ZjeAWhuWFk9WTzfrFWauJLjP4fPHoc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_ORD 103 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_ORD_STR_SORTABLE 00103 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_REQUIRES_ORDS \ + 11, /* /soc/flash-controller@40022000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_SUPPORTS_ORDS \ + 104, /* /soc/flash-controller@40022000/flash@8000000/partitions */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_nv_flash DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_N_NODELABEL_flash0 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_REG_IDX_0_VAL_ADDRESS 134217728 /* 0x8000000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_REG_IDX_0_VAL_SIZE 131072 /* 0x20000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_RANGES_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_RANGES_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_RANGES_IDX_0_VAL_CHILD_BUS_ADDRESS 0 /* 0x0 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_RANGES_IDX_0_VAL_PARENT_BUS_ADDRESS 134217728 /* 0x8000000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_RANGES_IDX_0_VAL_LENGTH 131072 /* 0x20000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_FOREACH_RANGE(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_COMPAT_MATCHES_st_stm32_nv_flash 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_COMPAT_MODEL_IDX_0 "stm32-nv-flash" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_COMPAT_MATCHES_soc_nv_flash 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_max_erase_time 25 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_max_erase_time_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_erase_block_size 2048 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_erase_block_size_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_write_block_size 8 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_write_block_size_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible {"st,stm32-nv-flash", "soc-nv-flash"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_0 "st,stm32-nv-flash" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-nv-flash +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_nv_flash +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_NV_FLASH +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_1 "soc-nv-flash" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_1_STRING_UNQUOTED soc-nv-flash +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_1_STRING_TOKEN soc_nv_flash +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_IDX_1_STRING_UPPER_TOKEN SOC_NV_FLASH +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 0) \ + fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 1) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 1) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_LEN 2 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_reg {134217728 /* 0x8000000 */, 131072 /* 0x20000 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_reg_IDX_0 134217728 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_reg_IDX_1 131072 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@8000000/partitions + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_PATH "/soc/flash-controller@40022000/flash@8000000/partitions" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FULL_NAME "partitions" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FULL_NAME_UNQUOTED partitions +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FULL_NAME_TOKEN partitions +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FULL_NAME_UPPER_TOKEN PARTITIONS + +/* Node parent (/soc/flash-controller@40022000/flash@8000000) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_NODELABEL_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_NUM 4 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_NUM_STATUS_OKAY 4 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_UNIT_ADDR_INT_134217728 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_UNIT_ADDR_INT_134252544 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_UNIT_ADDR_INT_134301696 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_CHILD_UNIT_ADDR_INT_134344704 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_HASH r8CF6c7oNqk__u_6kUfBaNdcHX6X_OrDziksYhz5Oa8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_ORD 104 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00104 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_REQUIRES_ORDS \ + 103, /* /soc/flash-controller@40022000/flash@8000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_SUPPORTS_ORDS \ + 105, /* /soc/flash-controller@40022000/flash@8000000/partitions/partition@0 */ \ + 106, /* /soc/flash-controller@40022000/flash@8000000/partitions/partition@8800 */ \ + 107, /* /soc/flash-controller@40022000/flash@8000000/partitions/partition@14800 */ \ + 108, /* /soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_REG_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_REG(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_P_ranges_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@8000000/partitions/partition@0 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0 + * + * Binding (compatible = zephyr,mapped-partition): + * $ZEPHYR_BASE/dts/bindings/mtd/zephyr,mapped-partition.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_PATH "/soc/flash-controller@40022000/flash@8000000/partitions/partition@0" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FULL_NAME "partition@0" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FULL_NAME_UNQUOTED partition@0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FULL_NAME_TOKEN partition_0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FULL_NAME_UPPER_TOKEN PARTITION_0 + +/* Node parent (/soc/flash-controller@40022000/flash@8000000/partitions) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_NODELABEL(fn) fn(boot_partition) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(boot_partition, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_HASH 6Sz_ccJ7CngkhSQocJdPkgtWcUey_vlut6fL5MN_ryM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_ORD 105 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00105 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_REQUIRES_ORDS \ + 104, /* /soc/flash-controller@40022000/flash@8000000/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_EXISTS 1 +#define DT_N_INST_0_zephyr_mapped_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0 +#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 134217728 /* 0x8000000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 34816 /* 0x8800 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_COMPAT_MATCHES_zephyr_mapped_partition 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_COMPAT_MODEL_IDX_0 "mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_PARTITION_ID 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label "mcuboot" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_STRING_UNQUOTED mcuboot +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_STRING_TOKEN mcuboot +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_STRING_UPPER_TOKEN MCUBOOT +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_IDX_0 "mcuboot" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_label_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_read_only 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 34816 /* 0x8800 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_reg_IDX_0 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_reg_IDX_1 34816 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible {"zephyr,mapped-partition"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_IDX_0 "zephyr,mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_IDX_0_STRING_UNQUOTED zephyr,mapped-partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_IDX_0_STRING_TOKEN zephyr_mapped_partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MAPPED_PARTITION +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@8000000/partitions/partition@8800 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800 + * + * Binding (compatible = zephyr,mapped-partition): + * $ZEPHYR_BASE/dts/bindings/mtd/zephyr,mapped-partition.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_PATH "/soc/flash-controller@40022000/flash@8000000/partitions/partition@8800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FULL_NAME "partition@8800" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FULL_NAME_UNQUOTED partition@8800 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FULL_NAME_TOKEN partition_8800 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FULL_NAME_UPPER_TOKEN PARTITION_8800 + +/* Node parent (/soc/flash-controller@40022000/flash@8000000/partitions) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_NODELABEL(fn) fn(slot0_partition) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_NODELABEL_VARGS(fn, ...) fn(slot0_partition, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_HASH 0NSLNPI_C5J7e0rJjg6WAF3To89lVfkTnSaSPvForgM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_ORD 106 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_ORD_STR_SORTABLE 00106 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_REQUIRES_ORDS \ + 104, /* /soc/flash-controller@40022000/flash@8000000/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_EXISTS 1 +#define DT_N_INST_1_zephyr_mapped_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800 +#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_REG_IDX_0_VAL_ADDRESS 134252544 /* 0x8008800 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_REG_IDX_0_VAL_SIZE 49152 /* 0xc000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_COMPAT_MATCHES_zephyr_mapped_partition 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_COMPAT_MODEL_IDX_0 "mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_PARTITION_ID 1 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label "image-0" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_STRING_UNQUOTED image-0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_STRING_TOKEN image_0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_STRING_UPPER_TOKEN IMAGE_0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_IDX_0 "image-0" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_label_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_read_only 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_reg {34816 /* 0x8800 */, 49152 /* 0xc000 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_reg_IDX_0 34816 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_reg_IDX_1 49152 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible {"zephyr,mapped-partition"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_IDX_0 "zephyr,mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_IDX_0_STRING_UNQUOTED zephyr,mapped-partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_IDX_0_STRING_TOKEN zephyr_mapped_partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MAPPED_PARTITION +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@8000000/partitions/partition@14800 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800 + * + * Binding (compatible = zephyr,mapped-partition): + * $ZEPHYR_BASE/dts/bindings/mtd/zephyr,mapped-partition.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_PATH "/soc/flash-controller@40022000/flash@8000000/partitions/partition@14800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FULL_NAME "partition@14800" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FULL_NAME_UNQUOTED partition@14800 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FULL_NAME_TOKEN partition_14800 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FULL_NAME_UPPER_TOKEN PARTITION_14800 + +/* Node parent (/soc/flash-controller@40022000/flash@8000000/partitions) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_NODELABEL(fn) fn(slot1_partition) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_NODELABEL_VARGS(fn, ...) fn(slot1_partition, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_HASH fFEnG7KMLrlsRwn5u3cXyqdGR2D26veT9a0cMctkJBc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_ORD 107 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_ORD_STR_SORTABLE 00107 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_REQUIRES_ORDS \ + 104, /* /soc/flash-controller@40022000/flash@8000000/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_EXISTS 1 +#define DT_N_INST_2_zephyr_mapped_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800 +#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_REG_IDX_0_VAL_ADDRESS 134301696 /* 0x8014800 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_REG_IDX_0_VAL_SIZE 43008 /* 0xa800 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_COMPAT_MATCHES_zephyr_mapped_partition 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_COMPAT_MODEL_IDX_0 "mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_PARTITION_ID 2 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label "image-1" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_STRING_UNQUOTED image-1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_STRING_TOKEN image_1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_STRING_UPPER_TOKEN IMAGE_1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_IDX_0 "image-1" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_label_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_read_only 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_reg {83968 /* 0x14800 */, 43008 /* 0xa800 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_reg_IDX_0 83968 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_reg_IDX_1 43008 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible {"zephyr,mapped-partition"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_IDX_0 "zephyr,mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_IDX_0_STRING_UNQUOTED zephyr,mapped-partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_IDX_0_STRING_TOKEN zephyr_mapped_partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MAPPED_PARTITION +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000 + * + * Node identifier: DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000 + * + * Binding (compatible = zephyr,mapped-partition): + * $ZEPHYR_BASE/dts/bindings/mtd/zephyr,mapped-partition.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_PATH "/soc/flash-controller@40022000/flash@8000000/partitions/partition@1f000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FULL_NAME "partition@1f000" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FULL_NAME_UNQUOTED partition@1f000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FULL_NAME_TOKEN partition_1f000 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FULL_NAME_UPPER_TOKEN PARTITION_1F000 + +/* Node parent (/soc/flash-controller@40022000/flash@8000000/partitions) identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_PARENT DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_NODELABEL(fn) fn(storage_partition) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_NODELABEL_VARGS(fn, ...) fn(storage_partition, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_CHILD_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_HASH 9dVwn7PaOgLhrIvdJOzU_LaDxeweWidfPecf57_jiak + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_ORD 108 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_ORD_STR_SORTABLE 00108 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_REQUIRES_ORDS \ + 104, /* /soc/flash-controller@40022000/flash@8000000/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_EXISTS 1 +#define DT_N_INST_3_zephyr_mapped_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000 +#define DT_N_NODELABEL_storage_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_REG_NUM 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_REG_IDX_0_VAL_ADDRESS 134344704 /* 0x801f000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_REG(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_RANGES_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_IRQ_NUM 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_COMPAT_MATCHES_zephyr_mapped_partition 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_COMPAT_VENDOR_IDX_0 "Zephyr Project" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_COMPAT_MODEL_IDX_0 "mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_PARTITION_ID 3 + +/* Generic property macros: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label "storage" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_STRING_UNQUOTED storage +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_STRING_TOKEN storage +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_STRING_UPPER_TOKEN STORAGE +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_IDX_0 "storage" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, label, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_label_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_read_only 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_reg {126976 /* 0x1f000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_reg_IDX_0 126976 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible {"zephyr,mapped-partition"} +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_IDX_0 "zephyr,mapped-partition" +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_IDX_0_STRING_UNQUOTED zephyr,mapped-partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_IDX_0_STRING_TOKEN zephyr_mapped_partition +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MAPPED_PARTITION +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, compatible, 0) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_LEN 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_dma_coherent 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_wakeup_source 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48000c00 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_PATH "/soc/pin-controller@48000000/gpio@48000c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FULL_NAME "gpio@48000c00" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FULL_NAME_UNQUOTED gpio@48000c00 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FULL_NAME_TOKEN gpio_48000c00 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FULL_NAME_UPPER_TOKEN GPIO_48000C00 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_NODELABEL(fn) fn(gpiod) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiod, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_HASH u2DqKzVc8Kgi9iMl9smjExSHInTly4SN9RvuvIXZQe8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_ORD 109 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_ORD_STR_SORTABLE 00109 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_EXISTS 1 +#define DT_N_INST_3_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00 +#define DT_N_NODELABEL_gpiod DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_REG_IDX_0_VAL_ADDRESS 1207962624 /* 0x48000c00 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_reg {1207962624 /* 0x48000c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_reg_IDX_0 1207962624 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_VAL_bits 8 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48001000 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_PATH "/soc/pin-controller@48000000/gpio@48001000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FULL_NAME "gpio@48001000" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FULL_NAME_UNQUOTED gpio@48001000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FULL_NAME_TOKEN gpio_48001000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FULL_NAME_UPPER_TOKEN GPIO_48001000 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_CHILD_IDX 4 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_NODELABEL(fn) fn(gpioe) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioe, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_HASH f_fCfYEtBkeaIc2VCMEHUuaNoFMeL3PBB4lEAkfQY50 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_ORD 110 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_ORD_STR_SORTABLE 00110 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_EXISTS 1 +#define DT_N_INST_4_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000 +#define DT_N_NODELABEL_gpioe DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_REG_IDX_0_VAL_ADDRESS 1207963648 /* 0x48001000 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_reg {1207963648 /* 0x48001000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_reg_IDX_0 1207963648 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48001400 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_PATH "/soc/pin-controller@48000000/gpio@48001400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FULL_NAME "gpio@48001400" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FULL_NAME_UNQUOTED gpio@48001400 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FULL_NAME_TOKEN gpio_48001400 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FULL_NAME_UPPER_TOKEN GPIO_48001400 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_NODELABEL(fn) fn(gpiof) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiof, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_HASH bmSOeZi25YolypCkHDKjLQJ9ODqu57WnBB3t7MFcjqM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_ORD 111 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_ORD_STR_SORTABLE 00111 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_EXISTS 1 +#define DT_N_INST_5_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400 +#define DT_N_NODELABEL_gpiof DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_REG_IDX_0_VAL_ADDRESS 1207964672 /* 0x48001400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_reg {1207964672 /* 0x48001400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_reg_IDX_0 1207964672 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@48000000/gpio@48001800 + * + * Node identifier: DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_PATH "/soc/pin-controller@48000000/gpio@48001800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FULL_NAME "gpio@48001800" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FULL_NAME_UNQUOTED gpio@48001800 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FULL_NAME_TOKEN gpio_48001800 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FULL_NAME_UPPER_TOKEN GPIO_48001800 + +/* Node parent (/soc/pin-controller@48000000) identifier: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_PARENT DT_N_S_soc_S_pin_controller_48000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_CHILD_IDX 6 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_NODELABEL(fn) fn(gpiog) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiog, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_HASH fa9JItnpx2_hWd8DAbfvJcEIMTjV8D3ZTeDufB_vqF0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_ORD 112 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_ORD_STR_SORTABLE 00112 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_REQUIRES_ORDS \ + 9, /* /soc/rcc@40021000 */ \ + 18, /* /soc/pin-controller@48000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_EXISTS 1 +#define DT_N_INST_6_st_stm32_gpio DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800 +#define DT_N_NODELABEL_gpiog DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_REG_IDX_0_VAL_ADDRESS 1207965696 /* 0x48001800 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_REG(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_reg {1207965696 /* 0x48001800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_reg_IDX_0 1207965696 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_VAL_bus 76 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_VAL_bits 64 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0, bits) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_dma_coherent 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000000/counter + * + * Node identifier: DT_N_S_soc_S_timers_40000000_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_PATH "/soc/timers@40000000/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40000000_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40000000_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40000000_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40000000) identifier: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_PARENT DT_N_S_soc_S_timers_40000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000000_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_HASH q1HYCxKR_QqakI62hwcbYK3CrWp5E_XbPwXUySU4se8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_ORD 113 +#define DT_N_S_soc_S_timers_40000000_S_counter_ORD_STR_SORTABLE 00113 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_REQUIRES_ORDS \ + 47, /* /soc/timers@40000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_EXISTS 1 +#define DT_N_INST_1_st_stm32_counter DT_N_S_soc_S_timers_40000000_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000000_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000000_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000000_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40000000_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000000_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000000/qdec + * + * Node identifier: DT_N_S_soc_S_timers_40000000_S_qdec + * + * Binding (compatible = st,stm32-qdec): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-qdec.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_PATH "/soc/timers@40000000/qdec" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_FULL_NAME "qdec" +#define DT_N_S_soc_S_timers_40000000_S_qdec_FULL_NAME_UNQUOTED qdec +#define DT_N_S_soc_S_timers_40000000_S_qdec_FULL_NAME_TOKEN qdec +#define DT_N_S_soc_S_timers_40000000_S_qdec_FULL_NAME_UPPER_TOKEN QDEC + +/* Node parent (/soc/timers@40000000) identifier: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_PARENT DT_N_S_soc_S_timers_40000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_HASH xeDccz_QkMBo6l8_wMCsnsC88OsLpoM_UNpiSWf6rWM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_ORD 114 +#define DT_N_S_soc_S_timers_40000000_S_qdec_ORD_STR_SORTABLE 00114 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_REQUIRES_ORDS \ + 47, /* /soc/timers@40000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_EXISTS 1 +#define DT_N_INST_1_st_stm32_qdec DT_N_S_soc_S_timers_40000000_S_qdec + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000000_S_qdec_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000000_S_qdec_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_COMPAT_MATCHES_st_stm32_qdec 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000000_S_qdec_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_COMPAT_MODEL_IDX_0 "stm32-qdec" +#define DT_N_S_soc_S_timers_40000000_S_qdec_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_encoder_mode 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_encoder_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_encoder_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_encoder_mode_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_encoder_mode_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_encoder_mode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_polarity_inverted 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_polarity_inverted_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_filter_level 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_filter_level_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_filter_level_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_filter_level_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_filter_level_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_st_input_filter_level_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status "disabled" +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible {"st,stm32-qdec"} +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_IDX_0 "st,stm32-qdec" +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-qdec +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_IDX_0_STRING_TOKEN st_stm32_qdec +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_QDEC +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000000_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000000_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000000_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000000_S_qdec_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000400 + * + * Node identifier: DT_N_S_soc_S_timers_40000400 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000400_PATH "/soc/timers@40000400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000400_FULL_NAME "timers@40000400" +#define DT_N_S_soc_S_timers_40000400_FULL_NAME_UNQUOTED timers@40000400 +#define DT_N_S_soc_S_timers_40000400_FULL_NAME_TOKEN timers_40000400 +#define DT_N_S_soc_S_timers_40000400_FULL_NAME_UPPER_TOKEN TIMERS_40000400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40000400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000400_CHILD_IDX 27 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40000400_FOREACH_NODELABEL(fn) fn(timers3) +#define DT_N_S_soc_S_timers_40000400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000400_CHILD_NUM 3 +#define DT_N_S_soc_S_timers_40000400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40000400_S_counter) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_qdec) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_counter) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_qdec) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000400_HASH baeUapzy1gNL2E23NOiz9371NQp1G8KhvyeXIcEPqLk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000400_ORD 115 +#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00115 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000400_SUPPORTS_ORDS \ + 116, /* /soc/timers@40000400/counter */ \ + 117, /* /soc/timers@40000400/pwm */ \ + 118, /* /soc/timers@40000400/qdec */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000400_EXISTS 1 +#define DT_N_INST_2_st_stm32_timers DT_N_S_soc_S_timers_40000400 +#define DT_N_NODELABEL_timers3 DT_N_S_soc_S_timers_40000400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_VAL_ADDRESS 1073742848 /* 0x40000400 */ +#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40000400_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40000400, 0) +#define DT_N_S_soc_S_timers_40000400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, 0) +#define DT_N_S_soc_S_timers_40000400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000400_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq 29 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40000400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40000400_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40000400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40000400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000400_P_reg {1073742848 /* 0x40000400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_0 1073742848 +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40000400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000400, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 1) +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 1) +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40000400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_VAL_id 1793 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000400, resets, 0, id) +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, resets, 0, id) +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, resets, 0) +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, resets, 0) +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40000400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40000400_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40000400_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status "disabled" +#define DT_N_S_soc_S_timers_40000400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, status, 0) +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, status, 0) +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupts {29 /* 0x1d */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_0 29 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000400/counter + * + * Node identifier: DT_N_S_soc_S_timers_40000400_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_PATH "/soc/timers@40000400/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40000400_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40000400_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40000400_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40000400) identifier: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_PARENT DT_N_S_soc_S_timers_40000400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000400_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_HASH JNkHbJAdpxqum04dZjR7ujFGNxo62pj2eB31ikv0Phc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_ORD 116 +#define DT_N_S_soc_S_timers_40000400_S_counter_ORD_STR_SORTABLE 00116 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_REQUIRES_ORDS \ + 115, /* /soc/timers@40000400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_EXISTS 1 +#define DT_N_INST_2_st_stm32_counter DT_N_S_soc_S_timers_40000400_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000400_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000400_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40000400_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000400_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000400/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40000400_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_PATH "/soc/timers@40000400/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40000400) identifier: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_PARENT DT_N_S_soc_S_timers_40000400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_HASH 3XEqw4Q0MqUTTpvQ0Yrht2rVkAAPsKyjdgccEVU8gEE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 117 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00117 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_REQUIRES_ORDS \ + 115, /* /soc/timers@40000400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_EXISTS 1 +#define DT_N_INST_2_st_stm32_pwm DT_N_S_soc_S_timers_40000400_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40000400_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000400/qdec + * + * Node identifier: DT_N_S_soc_S_timers_40000400_S_qdec + * + * Binding (compatible = st,stm32-qdec): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-qdec.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_PATH "/soc/timers@40000400/qdec" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_FULL_NAME "qdec" +#define DT_N_S_soc_S_timers_40000400_S_qdec_FULL_NAME_UNQUOTED qdec +#define DT_N_S_soc_S_timers_40000400_S_qdec_FULL_NAME_TOKEN qdec +#define DT_N_S_soc_S_timers_40000400_S_qdec_FULL_NAME_UPPER_TOKEN QDEC + +/* Node parent (/soc/timers@40000400) identifier: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_PARENT DT_N_S_soc_S_timers_40000400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_HASH XoYaEyYM5OKvrXAYNQJb_KuMBHYcObyudHjfcpXT8_Q + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_ORD 118 +#define DT_N_S_soc_S_timers_40000400_S_qdec_ORD_STR_SORTABLE 00118 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_REQUIRES_ORDS \ + 115, /* /soc/timers@40000400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_EXISTS 1 +#define DT_N_INST_2_st_stm32_qdec DT_N_S_soc_S_timers_40000400_S_qdec + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_qdec_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000400_S_qdec_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_COMPAT_MATCHES_st_stm32_qdec 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000400_S_qdec_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_COMPAT_MODEL_IDX_0 "stm32-qdec" +#define DT_N_S_soc_S_timers_40000400_S_qdec_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_encoder_mode 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_encoder_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_encoder_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_encoder_mode_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_encoder_mode_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_encoder_mode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_polarity_inverted 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_polarity_inverted_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_filter_level 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_filter_level_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_filter_level_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_filter_level_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_filter_level_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_st_input_filter_level_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status "disabled" +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible {"st,stm32-qdec"} +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_IDX_0 "st,stm32-qdec" +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-qdec +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_IDX_0_STRING_TOKEN st_stm32_qdec +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_QDEC +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000400_S_qdec_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000800 + * + * Node identifier: DT_N_S_soc_S_timers_40000800 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000800_PATH "/soc/timers@40000800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000800_FULL_NAME "timers@40000800" +#define DT_N_S_soc_S_timers_40000800_FULL_NAME_UNQUOTED timers@40000800 +#define DT_N_S_soc_S_timers_40000800_FULL_NAME_TOKEN timers_40000800 +#define DT_N_S_soc_S_timers_40000800_FULL_NAME_UPPER_TOKEN TIMERS_40000800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40000800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000800_CHILD_IDX 28 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40000800_FOREACH_NODELABEL(fn) fn(timers4) +#define DT_N_S_soc_S_timers_40000800_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers4, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000800_CHILD_NUM 3 +#define DT_N_S_soc_S_timers_40000800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40000800_S_counter) fn(DT_N_S_soc_S_timers_40000800_S_pwm) fn(DT_N_S_soc_S_timers_40000800_S_qdec) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_counter) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800_S_qdec) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000800_HASH VTBFi6bYiewunKr1vKL59kMmaq2wTI7eroMWbGtK2dw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000800_ORD 119 +#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00119 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000800_SUPPORTS_ORDS \ + 120, /* /soc/timers@40000800/counter */ \ + 121, /* /soc/timers@40000800/pwm */ \ + 122, /* /soc/timers@40000800/qdec */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000800_EXISTS 1 +#define DT_N_INST_3_st_stm32_timers DT_N_S_soc_S_timers_40000800 +#define DT_N_NODELABEL_timers4 DT_N_S_soc_S_timers_40000800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000800_REG_NUM 1 +#define DT_N_S_soc_S_timers_40000800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_REG_IDX_0_VAL_ADDRESS 1073743872 /* 0x40000800 */ +#define DT_N_S_soc_S_timers_40000800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40000800_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40000800, 0) +#define DT_N_S_soc_S_timers_40000800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, 0) +#define DT_N_S_soc_S_timers_40000800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000800_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_VAL_irq 30 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40000800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40000800_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40000800_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40000800_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40000800_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40000800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40000800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000800_P_reg {1073743872 /* 0x40000800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40000800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_reg_IDX_0 1073743872 +#define DT_N_S_soc_S_timers_40000800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40000800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_VAL_bits 4 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000800, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40000800_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40000800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 1) +#define DT_N_S_soc_S_timers_40000800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 1) +#define DT_N_S_soc_S_timers_40000800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40000800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_VAL_id 1794 +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40000800, resets, 0, id) +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, resets, 0, id) +#define DT_N_S_soc_S_timers_40000800_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40000800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800, resets, 0) +#define DT_N_S_soc_S_timers_40000800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, resets, 0) +#define DT_N_S_soc_S_timers_40000800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40000800_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40000800_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40000800_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40000800_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40000800_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_status "disabled" +#define DT_N_S_soc_S_timers_40000800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800, status, 0) +#define DT_N_S_soc_S_timers_40000800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, status, 0) +#define DT_N_S_soc_S_timers_40000800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000800_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40000800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40000800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40000800_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40000800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40000800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_interrupts {30 /* 0x1e */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40000800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_interrupts_IDX_0 30 +#define DT_N_S_soc_S_timers_40000800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40000800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40000800_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000800/counter + * + * Node identifier: DT_N_S_soc_S_timers_40000800_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_PATH "/soc/timers@40000800/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40000800_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40000800_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40000800_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40000800) identifier: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_PARENT DT_N_S_soc_S_timers_40000800 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000800_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_HASH It81r5Kkjm8b1AfJHPW0z0jZ9dof3VW5417OU_gyZtc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_ORD 120 +#define DT_N_S_soc_S_timers_40000800_S_counter_ORD_STR_SORTABLE 00120 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_REQUIRES_ORDS \ + 119, /* /soc/timers@40000800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_EXISTS 1 +#define DT_N_INST_3_st_stm32_counter DT_N_S_soc_S_timers_40000800_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000800_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000800_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000800_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40000800_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000800_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000800/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40000800_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_PATH "/soc/timers@40000800/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40000800_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40000800_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40000800_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40000800) identifier: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_PARENT DT_N_S_soc_S_timers_40000800 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_HASH rmmRd1gBchFTmlpcPkj2kPN2S9h0o7_bVDPViAglyik + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 121 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00121 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_REQUIRES_ORDS \ + 119, /* /soc/timers@40000800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_EXISTS 1 +#define DT_N_INST_3_st_stm32_pwm DT_N_S_soc_S_timers_40000800_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000800_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000800_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000800_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40000800_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000800_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40000800/qdec + * + * Node identifier: DT_N_S_soc_S_timers_40000800_S_qdec + * + * Binding (compatible = st,stm32-qdec): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-qdec.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_PATH "/soc/timers@40000800/qdec" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_FULL_NAME "qdec" +#define DT_N_S_soc_S_timers_40000800_S_qdec_FULL_NAME_UNQUOTED qdec +#define DT_N_S_soc_S_timers_40000800_S_qdec_FULL_NAME_TOKEN qdec +#define DT_N_S_soc_S_timers_40000800_S_qdec_FULL_NAME_UPPER_TOKEN QDEC + +/* Node parent (/soc/timers@40000800) identifier: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_PARENT DT_N_S_soc_S_timers_40000800 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_HASH NyJhopD0plir_yCl3bvK19fzvR7T8hmdf4SgsPGbBRs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_ORD 122 +#define DT_N_S_soc_S_timers_40000800_S_qdec_ORD_STR_SORTABLE 00122 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_REQUIRES_ORDS \ + 119, /* /soc/timers@40000800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_EXISTS 1 +#define DT_N_INST_3_st_stm32_qdec DT_N_S_soc_S_timers_40000800_S_qdec + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000800_S_qdec_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000800_S_qdec_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_COMPAT_MATCHES_st_stm32_qdec 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000800_S_qdec_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_COMPAT_MODEL_IDX_0 "stm32-qdec" +#define DT_N_S_soc_S_timers_40000800_S_qdec_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_encoder_mode 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_encoder_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_encoder_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_encoder_mode_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_encoder_mode_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_encoder_mode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_polarity_inverted 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_polarity_inverted_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_filter_level 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_filter_level_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_filter_level_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_filter_level_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_filter_level_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_st_input_filter_level_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status "disabled" +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible {"st,stm32-qdec"} +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_IDX_0 "st,stm32-qdec" +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-qdec +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_IDX_0_STRING_TOKEN st_stm32_qdec +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_QDEC +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000800_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000800_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000800_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000800_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000800_S_qdec_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40001000 + * + * Node identifier: DT_N_S_soc_S_timers_40001000 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40001000_PATH "/soc/timers@40001000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40001000_FULL_NAME "timers@40001000" +#define DT_N_S_soc_S_timers_40001000_FULL_NAME_UNQUOTED timers@40001000 +#define DT_N_S_soc_S_timers_40001000_FULL_NAME_TOKEN timers_40001000 +#define DT_N_S_soc_S_timers_40001000_FULL_NAME_UPPER_TOKEN TIMERS_40001000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40001000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40001000_CHILD_IDX 29 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40001000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40001000_FOREACH_NODELABEL(fn) fn(timers6) +#define DT_N_S_soc_S_timers_40001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers6, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40001000_CHILD_NUM 1 +#define DT_N_S_soc_S_timers_40001000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40001000_S_counter) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000_S_counter) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40001000_HASH Nsz_iy2H8UvqHZMouFTv3bvFrOuL3LyjaTTN24v0eBQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40001000_ORD 123 +#define DT_N_S_soc_S_timers_40001000_ORD_STR_SORTABLE 00123 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40001000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40001000_SUPPORTS_ORDS \ + 124, /* /soc/timers@40001000/counter */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40001000_EXISTS 1 +#define DT_N_INST_4_st_stm32_timers DT_N_S_soc_S_timers_40001000 +#define DT_N_NODELABEL_timers6 DT_N_S_soc_S_timers_40001000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40001000_REG_NUM 1 +#define DT_N_S_soc_S_timers_40001000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_REG_IDX_0_VAL_ADDRESS 1073745920 /* 0x40001000 */ +#define DT_N_S_soc_S_timers_40001000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40001000_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40001000, 0) +#define DT_N_S_soc_S_timers_40001000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, 0) +#define DT_N_S_soc_S_timers_40001000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40001000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40001000_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_VAL_irq 54 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40001000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40001000_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40001000_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40001000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40001000_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40001000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40001000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40001000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40001000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40001000_P_reg {1073745920 /* 0x40001000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40001000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_reg_IDX_0 1073745920 +#define DT_N_S_soc_S_timers_40001000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40001000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40001000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40001000, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40001000_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40001000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 1) +#define DT_N_S_soc_S_timers_40001000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 1) +#define DT_N_S_soc_S_timers_40001000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40001000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_VAL_id 1796 +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40001000, resets, 0, id) +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, resets, 0, id) +#define DT_N_S_soc_S_timers_40001000_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40001000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000, resets, 0) +#define DT_N_S_soc_S_timers_40001000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, resets, 0) +#define DT_N_S_soc_S_timers_40001000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40001000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40001000_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40001000_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40001000_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40001000_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_status "disabled" +#define DT_N_S_soc_S_timers_40001000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40001000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40001000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40001000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40001000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40001000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000, status, 0) +#define DT_N_S_soc_S_timers_40001000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, status, 0) +#define DT_N_S_soc_S_timers_40001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40001000_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40001000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40001000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40001000_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40001000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000, compatible, 0) +#define DT_N_S_soc_S_timers_40001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, compatible, 0) +#define DT_N_S_soc_S_timers_40001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_interrupts {54 /* 0x36 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40001000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_interrupts_IDX_0 54 +#define DT_N_S_soc_S_timers_40001000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40001000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40001000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40001000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40001000/counter + * + * Node identifier: DT_N_S_soc_S_timers_40001000_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_PATH "/soc/timers@40001000/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40001000_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40001000_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40001000_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40001000) identifier: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_PARENT DT_N_S_soc_S_timers_40001000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40001000_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_HASH kRqNwCO_GFQ9B_IU80aWEsZniZ2xLsueygEKHK_oRqE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_ORD 124 +#define DT_N_S_soc_S_timers_40001000_S_counter_ORD_STR_SORTABLE 00124 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_REQUIRES_ORDS \ + 123, /* /soc/timers@40001000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_EXISTS 1 +#define DT_N_INST_4_st_stm32_counter DT_N_S_soc_S_timers_40001000_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40001000_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40001000_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40001000_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40001000_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001000_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40001400 + * + * Node identifier: DT_N_S_soc_S_timers_40001400 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40001400_PATH "/soc/timers@40001400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40001400_FULL_NAME "timers@40001400" +#define DT_N_S_soc_S_timers_40001400_FULL_NAME_UNQUOTED timers@40001400 +#define DT_N_S_soc_S_timers_40001400_FULL_NAME_TOKEN timers_40001400 +#define DT_N_S_soc_S_timers_40001400_FULL_NAME_UPPER_TOKEN TIMERS_40001400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40001400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40001400_CHILD_IDX 30 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40001400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40001400_FOREACH_NODELABEL(fn) fn(timers7) +#define DT_N_S_soc_S_timers_40001400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers7, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40001400_CHILD_NUM 1 +#define DT_N_S_soc_S_timers_40001400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40001400_S_counter) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400_S_counter) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40001400_HASH NWGZgzDJgqZSuO0DPWROIlkjRWjN3_VzkmbGsEAbECw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40001400_ORD 125 +#define DT_N_S_soc_S_timers_40001400_ORD_STR_SORTABLE 00125 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40001400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40001400_SUPPORTS_ORDS \ + 126, /* /soc/timers@40001400/counter */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40001400_EXISTS 1 +#define DT_N_INST_5_st_stm32_timers DT_N_S_soc_S_timers_40001400 +#define DT_N_NODELABEL_timers7 DT_N_S_soc_S_timers_40001400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40001400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40001400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_REG_IDX_0_VAL_ADDRESS 1073746944 /* 0x40001400 */ +#define DT_N_S_soc_S_timers_40001400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40001400_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40001400, 0) +#define DT_N_S_soc_S_timers_40001400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, 0) +#define DT_N_S_soc_S_timers_40001400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40001400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40001400_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_VAL_irq 55 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40001400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40001400_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40001400_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40001400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40001400_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40001400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40001400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40001400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40001400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40001400_P_reg {1073746944 /* 0x40001400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40001400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_reg_IDX_0 1073746944 +#define DT_N_S_soc_S_timers_40001400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40001400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_VAL_bus 88 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40001400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40001400, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40001400_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40001400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 1) +#define DT_N_S_soc_S_timers_40001400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 1) +#define DT_N_S_soc_S_timers_40001400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40001400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40001400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_VAL_id 1797 +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40001400, resets, 0, id) +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, resets, 0, id) +#define DT_N_S_soc_S_timers_40001400_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40001400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400, resets, 0) +#define DT_N_S_soc_S_timers_40001400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, resets, 0) +#define DT_N_S_soc_S_timers_40001400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40001400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40001400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40001400_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40001400_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40001400_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_status "disabled" +#define DT_N_S_soc_S_timers_40001400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40001400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40001400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40001400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40001400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40001400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400, status, 0) +#define DT_N_S_soc_S_timers_40001400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, status, 0) +#define DT_N_S_soc_S_timers_40001400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40001400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40001400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40001400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40001400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40001400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40001400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400, compatible, 0) +#define DT_N_S_soc_S_timers_40001400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, compatible, 0) +#define DT_N_S_soc_S_timers_40001400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_interrupts {55 /* 0x37 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40001400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_interrupts_IDX_0 55 +#define DT_N_S_soc_S_timers_40001400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40001400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40001400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40001400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40001400/counter + * + * Node identifier: DT_N_S_soc_S_timers_40001400_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_PATH "/soc/timers@40001400/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40001400_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40001400_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40001400_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40001400) identifier: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_PARENT DT_N_S_soc_S_timers_40001400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40001400_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_HASH yUMrsaqgcXElOUnLnHc7vIdLGcToiUBEnmAPHwvJ0BA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_ORD 126 +#define DT_N_S_soc_S_timers_40001400_S_counter_ORD_STR_SORTABLE 00126 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_REQUIRES_ORDS \ + 125, /* /soc/timers@40001400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_EXISTS 1 +#define DT_N_INST_5_st_stm32_counter DT_N_S_soc_S_timers_40001400_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40001400_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40001400_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40001400_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40001400_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001400_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40012c00 + * + * Node identifier: DT_N_S_soc_S_timers_40012c00 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40012c00_PATH "/soc/timers@40012c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40012c00_FULL_NAME "timers@40012c00" +#define DT_N_S_soc_S_timers_40012c00_FULL_NAME_UNQUOTED timers@40012c00 +#define DT_N_S_soc_S_timers_40012c00_FULL_NAME_TOKEN timers_40012c00 +#define DT_N_S_soc_S_timers_40012c00_FULL_NAME_UPPER_TOKEN TIMERS_40012C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40012c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40012c00_CHILD_IDX 25 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40012c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40012c00_FOREACH_NODELABEL(fn) fn(timers1) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40012c00_CHILD_NUM 3 +#define DT_N_S_soc_S_timers_40012c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40012c00_S_pwm) fn(DT_N_S_soc_S_timers_40012c00_S_counter) fn(DT_N_S_soc_S_timers_40012c00_S_qdec) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40012c00_S_counter) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40012c00_S_qdec) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40012c00_S_counter, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40012c00_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40012c00_HASH 3LegaBe_XYAmus4r7JdPqj5bScAsVFzbsAzhohL9Bqc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40012c00_ORD 127 +#define DT_N_S_soc_S_timers_40012c00_ORD_STR_SORTABLE 00127 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40012c00_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40012c00_SUPPORTS_ORDS \ + 128, /* /soc/timers@40012c00/counter */ \ + 129, /* /soc/timers@40012c00/pwm */ \ + 130, /* /soc/timers@40012c00/qdec */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40012c00_EXISTS 1 +#define DT_N_INST_1_st_stm32_timers DT_N_S_soc_S_timers_40012c00 +#define DT_N_NODELABEL_timers1 DT_N_S_soc_S_timers_40012c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40012c00_REG_NUM 1 +#define DT_N_S_soc_S_timers_40012c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_REG_IDX_0_VAL_ADDRESS 1073818624 /* 0x40012c00 */ +#define DT_N_S_soc_S_timers_40012c00_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40012c00_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40012c00, 0) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, 0) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40012c00_IRQ_NUM 4 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_VAL_irq 24 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_VAL_irq 25 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_VAL_irq 26 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_VAL_irq 27 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40012c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_brk_VAL_irq DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_brk_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_brk_VAL_priority DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_brk_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_brk_CONTROLLER DT_N_S_soc_S_timers_40012c00_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_up_VAL_irq DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_up_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_up_VAL_priority DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_up_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_up_CONTROLLER DT_N_S_soc_S_timers_40012c00_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_trgcom_VAL_irq DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_trgcom_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_trgcom_VAL_priority DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_trgcom_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_trgcom_CONTROLLER DT_N_S_soc_S_timers_40012c00_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_cc_VAL_irq DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_cc_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_cc_VAL_priority DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_cc_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_IRQ_NAME_cc_CONTROLLER DT_N_S_soc_S_timers_40012c00_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_timers_40012c00_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40012c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40012c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40012c00_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40012c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40012c00_P_reg {1073818624 /* 0x40012c00 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40012c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_reg_IDX_0 1073818624 +#define DT_N_S_soc_S_timers_40012c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40012c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_VAL_bits 2048 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40012c00, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_VAL_bus 10 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40012c00, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 1) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 1) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40012c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_VAL_id 2059 +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40012c00, resets, 0, id) +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, resets, 0, id) +#define DT_N_S_soc_S_timers_40012c00_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40012c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00, resets, 0) +#define DT_N_S_soc_S_timers_40012c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, resets, 0) +#define DT_N_S_soc_S_timers_40012c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40012c00_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40012c00_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40012c00_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_status "disabled" +#define DT_N_S_soc_S_timers_40012c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40012c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40012c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40012c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40012c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40012c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00, status, 0) +#define DT_N_S_soc_S_timers_40012c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, status, 0) +#define DT_N_S_soc_S_timers_40012c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40012c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40012c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40012c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40012c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40012c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts {24 /* 0x18 */, 0 /* 0x0 */, 25 /* 0x19 */, 0 /* 0x0 */, 26 /* 0x1a */, 0 /* 0x0 */, 27 /* 0x1b */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_0 24 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_2 25 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_4 26 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_6 27 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_timers_40012c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names {"brk", "up", "trgcom", "cc"} +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_0 "brk" +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_0_STRING_UNQUOTED brk +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_0_STRING_TOKEN brk +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN BRK +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_1 "up" +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_1_STRING_UNQUOTED up +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_1_STRING_TOKEN up +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN UP +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_2 "trgcom" +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_2_STRING_UNQUOTED trgcom +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_2_STRING_TOKEN trgcom +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN TRGCOM +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_3 "cc" +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_3_STRING_UNQUOTED cc +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_3_STRING_TOKEN cc +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN CC +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 0) \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 1) \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 2) \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40012c00, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_LEN 4 +#define DT_N_S_soc_S_timers_40012c00_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40012c00_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40012c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40012c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40012c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40012c00/counter + * + * Node identifier: DT_N_S_soc_S_timers_40012c00_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_PATH "/soc/timers@40012c00/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40012c00_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40012c00_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40012c00_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40012c00) identifier: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_PARENT DT_N_S_soc_S_timers_40012c00 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40012c00) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_HASH kIF7VDJJsNJuGIIuZ11LPstYbZBQN94NsUPmNZqCzHg + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_ORD 128 +#define DT_N_S_soc_S_timers_40012c00_S_counter_ORD_STR_SORTABLE 00128 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_REQUIRES_ORDS \ + 127, /* /soc/timers@40012c00 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_EXISTS 1 +#define DT_N_INST_0_st_stm32_counter DT_N_S_soc_S_timers_40012c00_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40012c00_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40012c00_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40012c00_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40012c00_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40012c00_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40012c00/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40012c00_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_PATH "/soc/timers@40012c00/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40012c00) identifier: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_PARENT DT_N_S_soc_S_timers_40012c00 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40012c00) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_HASH g97nbdWpfWs0szJYsIofhjyur31j3pJteaFY2J9NhwY + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_ORD 129 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_ORD_STR_SORTABLE 00129 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_REQUIRES_ORDS \ + 127, /* /soc/timers@40012c00 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_EXISTS 1 +#define DT_N_INST_1_st_stm32_pwm DT_N_S_soc_S_timers_40012c00_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40012c00_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40012c00_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40012c00_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40012c00/qdec + * + * Node identifier: DT_N_S_soc_S_timers_40012c00_S_qdec + * + * Binding (compatible = st,stm32-qdec): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-qdec.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_PATH "/soc/timers@40012c00/qdec" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FULL_NAME "qdec" +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FULL_NAME_UNQUOTED qdec +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FULL_NAME_TOKEN qdec +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FULL_NAME_UPPER_TOKEN QDEC + +/* Node parent (/soc/timers@40012c00) identifier: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_PARENT DT_N_S_soc_S_timers_40012c00 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40012c00) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_HASH qMdLUemeDTQeykyd3YiCtvWbzpMdNSnqnGUKo4PFw_0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_ORD 130 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_ORD_STR_SORTABLE 00130 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_REQUIRES_ORDS \ + 127, /* /soc/timers@40012c00 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_EXISTS 1 +#define DT_N_INST_0_st_stm32_qdec DT_N_S_soc_S_timers_40012c00_S_qdec + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_REG_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_COMPAT_MATCHES_st_stm32_qdec 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40012c00_S_qdec_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_COMPAT_MODEL_IDX_0 "stm32-qdec" +#define DT_N_S_soc_S_timers_40012c00_S_qdec_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_encoder_mode 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_encoder_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_encoder_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_encoder_mode_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_encoder_mode_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_encoder_mode_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_polarity_inverted 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_polarity_inverted_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_filter_level 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_filter_level_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_filter_level_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_filter_level_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_filter_level_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_st_input_filter_level_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status "disabled" +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible {"st,stm32-qdec"} +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_IDX_0 "st,stm32-qdec" +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-qdec +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_IDX_0_STRING_TOKEN st_stm32_qdec +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_QDEC +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40012c00_S_qdec_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40013400 + * + * Node identifier: DT_N_S_soc_S_timers_40013400 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40013400_PATH "/soc/timers@40013400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40013400_FULL_NAME "timers@40013400" +#define DT_N_S_soc_S_timers_40013400_FULL_NAME_UNQUOTED timers@40013400 +#define DT_N_S_soc_S_timers_40013400_FULL_NAME_TOKEN timers_40013400 +#define DT_N_S_soc_S_timers_40013400_FULL_NAME_UPPER_TOKEN TIMERS_40013400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40013400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40013400_CHILD_IDX 31 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40013400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40013400_FOREACH_NODELABEL(fn) fn(timers8) +#define DT_N_S_soc_S_timers_40013400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers8, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40013400_CHILD_NUM 3 +#define DT_N_S_soc_S_timers_40013400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40013400_S_pwm) fn(DT_N_S_soc_S_timers_40013400_S_counter) fn(DT_N_S_soc_S_timers_40013400_S_qdec) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40013400_S_counter) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40013400_S_qdec) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40013400_S_counter, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40013400_S_qdec, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40013400_HASH FF_euBmA_AoGdsnKOZTe7TyZCUD7Zw41dsQG3AFr1KM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40013400_ORD 131 +#define DT_N_S_soc_S_timers_40013400_ORD_STR_SORTABLE 00131 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40013400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40013400_SUPPORTS_ORDS \ + 132, /* /soc/timers@40013400/counter */ \ + 133, /* /soc/timers@40013400/pwm */ \ + 134, /* /soc/timers@40013400/qdec */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40013400_EXISTS 1 +#define DT_N_INST_6_st_stm32_timers DT_N_S_soc_S_timers_40013400 +#define DT_N_NODELABEL_timers8 DT_N_S_soc_S_timers_40013400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40013400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40013400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_REG_IDX_0_VAL_ADDRESS 1073820672 /* 0x40013400 */ +#define DT_N_S_soc_S_timers_40013400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40013400_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40013400, 0) +#define DT_N_S_soc_S_timers_40013400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, 0) +#define DT_N_S_soc_S_timers_40013400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40013400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40013400_IRQ_NUM 4 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_VAL_irq 43 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_VAL_irq 44 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_VAL_irq 45 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_VAL_irq 46 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40013400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_brk_VAL_irq DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_brk_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_brk_VAL_priority DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_brk_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_brk_CONTROLLER DT_N_S_soc_S_timers_40013400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_up_VAL_irq DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_up_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_up_VAL_priority DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_up_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_up_CONTROLLER DT_N_S_soc_S_timers_40013400_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_trgcom_VAL_irq DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_trgcom_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_trgcom_VAL_priority DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_trgcom_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_trgcom_CONTROLLER DT_N_S_soc_S_timers_40013400_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_cc_VAL_irq DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_cc_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_cc_VAL_priority DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_cc_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_IRQ_NAME_cc_CONTROLLER DT_N_S_soc_S_timers_40013400_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_timers_40013400_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40013400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40013400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40013400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40013400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40013400_P_reg {1073820672 /* 0x40013400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40013400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_reg_IDX_0 1073820672 +#define DT_N_S_soc_S_timers_40013400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40013400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_VAL_bits 8192 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40013400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_VAL_bus 10 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40013400, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40013400_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40013400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 1) +#define DT_N_S_soc_S_timers_40013400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 1) +#define DT_N_S_soc_S_timers_40013400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40013400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_VAL_id 2061 +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40013400, resets, 0, id) +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, resets, 0, id) +#define DT_N_S_soc_S_timers_40013400_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40013400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400, resets, 0) +#define DT_N_S_soc_S_timers_40013400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, resets, 0) +#define DT_N_S_soc_S_timers_40013400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40013400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40013400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40013400_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40013400_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40013400_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_status "disabled" +#define DT_N_S_soc_S_timers_40013400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40013400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40013400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40013400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40013400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40013400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400, status, 0) +#define DT_N_S_soc_S_timers_40013400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, status, 0) +#define DT_N_S_soc_S_timers_40013400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40013400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40013400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40013400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40013400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40013400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40013400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40013400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts {43 /* 0x2b */, 0 /* 0x0 */, 44 /* 0x2c */, 0 /* 0x0 */, 45 /* 0x2d */, 0 /* 0x0 */, 46 /* 0x2e */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_0 43 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_2 44 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_4 45 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_6 46 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_timers_40013400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names {"brk", "up", "trgcom", "cc"} +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_0 "brk" +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_0_STRING_UNQUOTED brk +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_0_STRING_TOKEN brk +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN BRK +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_1 "up" +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_1_STRING_UNQUOTED up +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_1_STRING_TOKEN up +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN UP +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_2 "trgcom" +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_2_STRING_UNQUOTED trgcom +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_2_STRING_TOKEN trgcom +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN TRGCOM +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_3 "cc" +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_3_STRING_UNQUOTED cc +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_3_STRING_TOKEN cc +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN CC +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 0) \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 1) \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 2) \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40013400, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_LEN 4 +#define DT_N_S_soc_S_timers_40013400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40013400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40013400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40013400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40013400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40013400/counter + * + * Node identifier: DT_N_S_soc_S_timers_40013400_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_PATH "/soc/timers@40013400/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40013400_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40013400_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40013400_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40013400) identifier: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_PARENT DT_N_S_soc_S_timers_40013400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40013400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40013400_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_HASH Uq1ZlAm_aEQzTHrsxOMDcKgcF4MMnupKoZycdaCT7Oc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_ORD 132 +#define DT_N_S_soc_S_timers_40013400_S_counter_ORD_STR_SORTABLE 00132 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_REQUIRES_ORDS \ + 131, /* /soc/timers@40013400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_EXISTS 1 +#define DT_N_INST_6_st_stm32_counter DT_N_S_soc_S_timers_40013400_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40013400_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40013400_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40013400_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40013400_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40013400_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40013400/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40013400_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_PATH "/soc/timers@40013400/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40013400_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40013400_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40013400_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40013400) identifier: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_PARENT DT_N_S_soc_S_timers_40013400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40013400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_HASH _RxktOOKFZWf2oilmHATi7Qrz3qCO_0xGy1qTQJh3SE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_ORD 133 +#define DT_N_S_soc_S_timers_40013400_S_pwm_ORD_STR_SORTABLE 00133 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_REQUIRES_ORDS \ + 131, /* /soc/timers@40013400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_EXISTS 1 +#define DT_N_INST_4_st_stm32_pwm DT_N_S_soc_S_timers_40013400_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40013400_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40013400_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40013400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40013400_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40013400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40013400/qdec + * + * Node identifier: DT_N_S_soc_S_timers_40013400_S_qdec + * + * Binding (compatible = st,stm32-qdec): + * $ZEPHYR_BASE/dts/bindings/sensor/st,stm32-qdec.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_PATH "/soc/timers@40013400/qdec" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_FULL_NAME "qdec" +#define DT_N_S_soc_S_timers_40013400_S_qdec_FULL_NAME_UNQUOTED qdec +#define DT_N_S_soc_S_timers_40013400_S_qdec_FULL_NAME_TOKEN qdec +#define DT_N_S_soc_S_timers_40013400_S_qdec_FULL_NAME_UPPER_TOKEN QDEC + +/* Node parent (/soc/timers@40013400) identifier: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_PARENT DT_N_S_soc_S_timers_40013400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40013400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_HASH BFDRq_VhlZoMiQzn4wkHhwfPzJOfS8CeuuJpL42mkT8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_ORD 134 +#define DT_N_S_soc_S_timers_40013400_S_qdec_ORD_STR_SORTABLE 00134 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_REQUIRES_ORDS \ + 131, /* /soc/timers@40013400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_EXISTS 1 +#define DT_N_INST_4_st_stm32_qdec DT_N_S_soc_S_timers_40013400_S_qdec + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_REG_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40013400_S_qdec_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40013400_S_qdec_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_COMPAT_MATCHES_st_stm32_qdec 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40013400_S_qdec_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_COMPAT_MODEL_IDX_0 "stm32-qdec" +#define DT_N_S_soc_S_timers_40013400_S_qdec_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_encoder_mode 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_encoder_mode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_encoder_mode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_encoder_mode_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_encoder_mode_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_encoder_mode_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_polarity_inverted 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_polarity_inverted_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_filter_level 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_filter_level_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_filter_level_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_filter_level_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_filter_level_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_st_input_filter_level_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status "disabled" +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_qdec, status, 0) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_qdec, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible {"st,stm32-qdec"} +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_IDX_0 "st,stm32-qdec" +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-qdec +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_IDX_0_STRING_TOKEN st_stm32_qdec +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_QDEC +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40013400_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40013400_S_qdec, compatible, 0) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40013400_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40013400_S_qdec, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40013400_S_qdec_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014000 + * + * Node identifier: DT_N_S_soc_S_timers_40014000 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014000_PATH "/soc/timers@40014000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014000_FULL_NAME "timers@40014000" +#define DT_N_S_soc_S_timers_40014000_FULL_NAME_UNQUOTED timers@40014000 +#define DT_N_S_soc_S_timers_40014000_FULL_NAME_TOKEN timers_40014000 +#define DT_N_S_soc_S_timers_40014000_FULL_NAME_UPPER_TOKEN TIMERS_40014000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40014000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014000_CHILD_IDX 32 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40014000_FOREACH_NODELABEL(fn) fn(timers15) +#define DT_N_S_soc_S_timers_40014000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers15, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014000_CHILD_NUM 2 +#define DT_N_S_soc_S_timers_40014000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40014000_S_pwm) fn(DT_N_S_soc_S_timers_40014000_S_counter) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014000_S_counter) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014000_HASH lq5p3vgPpp0Pc1e97jH3shzpysrGZocBMMy1grfenUs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014000_ORD 135 +#define DT_N_S_soc_S_timers_40014000_ORD_STR_SORTABLE 00135 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014000_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014000_SUPPORTS_ORDS \ + 136, /* /soc/timers@40014000/counter */ \ + 137, /* /soc/timers@40014000/pwm */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014000_EXISTS 1 +#define DT_N_INST_7_st_stm32_timers DT_N_S_soc_S_timers_40014000 +#define DT_N_NODELABEL_timers15 DT_N_S_soc_S_timers_40014000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014000_REG_NUM 1 +#define DT_N_S_soc_S_timers_40014000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_REG_IDX_0_VAL_ADDRESS 1073823744 /* 0x40014000 */ +#define DT_N_S_soc_S_timers_40014000_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40014000_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40014000, 0) +#define DT_N_S_soc_S_timers_40014000_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, 0) +#define DT_N_S_soc_S_timers_40014000_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014000_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_VAL_irq 24 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40014000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40014000_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40014000_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40014000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40014000_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40014000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40014000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014000_P_reg {1073823744 /* 0x40014000 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40014000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_reg_IDX_0 1073823744 +#define DT_N_S_soc_S_timers_40014000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40014000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_VAL_bits 65536 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014000, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_VAL_bus 10 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014000, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40014000_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40014000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 1) +#define DT_N_S_soc_S_timers_40014000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 1) +#define DT_N_S_soc_S_timers_40014000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40014000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_VAL_id 2064 +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014000, resets, 0, id) +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, resets, 0, id) +#define DT_N_S_soc_S_timers_40014000_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40014000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000, resets, 0) +#define DT_N_S_soc_S_timers_40014000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, resets, 0) +#define DT_N_S_soc_S_timers_40014000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40014000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40014000_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40014000_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40014000_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40014000_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_status "disabled" +#define DT_N_S_soc_S_timers_40014000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000, status, 0) +#define DT_N_S_soc_S_timers_40014000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, status, 0) +#define DT_N_S_soc_S_timers_40014000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014000_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40014000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40014000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40014000_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40014000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40014000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000, compatible, 0) +#define DT_N_S_soc_S_timers_40014000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, compatible, 0) +#define DT_N_S_soc_S_timers_40014000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_interrupts {24 /* 0x18 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40014000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_interrupts_IDX_0 24 +#define DT_N_S_soc_S_timers_40014000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40014000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40014000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014000_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014000/counter + * + * Node identifier: DT_N_S_soc_S_timers_40014000_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_PATH "/soc/timers@40014000/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40014000_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40014000_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40014000_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40014000) identifier: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_PARENT DT_N_S_soc_S_timers_40014000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014000_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_HASH HTxmpxrEMdGrjqKzwYEQ3Db8lHf9V4eSc5b5awosPW0 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_ORD 136 +#define DT_N_S_soc_S_timers_40014000_S_counter_ORD_STR_SORTABLE 00136 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_REQUIRES_ORDS \ + 135, /* /soc/timers@40014000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_EXISTS 1 +#define DT_N_INST_7_st_stm32_counter DT_N_S_soc_S_timers_40014000_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014000_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014000_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014000_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40014000_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014000_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014000/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40014000_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_PATH "/soc/timers@40014000/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40014000_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40014000_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40014000_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40014000) identifier: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_PARENT DT_N_S_soc_S_timers_40014000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_HASH kSLo0yu1rvkKjWd1KPNaOZTkLqT1fXRh8ItGZQcov88 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD 137 +#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD_STR_SORTABLE 00137 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_REQUIRES_ORDS \ + 135, /* /soc/timers@40014000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_EXISTS 1 +#define DT_N_INST_5_st_stm32_pwm DT_N_S_soc_S_timers_40014000_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014000_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014000_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014000_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40014000_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014400 + * + * Node identifier: DT_N_S_soc_S_timers_40014400 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014400_PATH "/soc/timers@40014400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014400_FULL_NAME "timers@40014400" +#define DT_N_S_soc_S_timers_40014400_FULL_NAME_UNQUOTED timers@40014400 +#define DT_N_S_soc_S_timers_40014400_FULL_NAME_TOKEN timers_40014400 +#define DT_N_S_soc_S_timers_40014400_FULL_NAME_UPPER_TOKEN TIMERS_40014400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40014400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014400_CHILD_IDX 33 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40014400_FOREACH_NODELABEL(fn) fn(timers16) +#define DT_N_S_soc_S_timers_40014400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers16, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014400_CHILD_NUM 2 +#define DT_N_S_soc_S_timers_40014400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40014400_S_pwm) fn(DT_N_S_soc_S_timers_40014400_S_counter) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014400_S_counter) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014400_HASH LhbzUUvofdpe9RJBdWKw1tw8MqV4XObGHJe29iNM0Lc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014400_ORD 138 +#define DT_N_S_soc_S_timers_40014400_ORD_STR_SORTABLE 00138 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014400_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014400_SUPPORTS_ORDS \ + 139, /* /soc/timers@40014400/counter */ \ + 140, /* /soc/timers@40014400/pwm */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014400_EXISTS 1 +#define DT_N_INST_8_st_stm32_timers DT_N_S_soc_S_timers_40014400 +#define DT_N_NODELABEL_timers16 DT_N_S_soc_S_timers_40014400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40014400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_REG_IDX_0_VAL_ADDRESS 1073824768 /* 0x40014400 */ +#define DT_N_S_soc_S_timers_40014400_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40014400_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40014400, 0) +#define DT_N_S_soc_S_timers_40014400_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, 0) +#define DT_N_S_soc_S_timers_40014400_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014400_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_VAL_irq 25 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40014400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40014400_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40014400_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40014400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40014400_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40014400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40014400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014400_P_reg {1073824768 /* 0x40014400 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40014400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_reg_IDX_0 1073824768 +#define DT_N_S_soc_S_timers_40014400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40014400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_VAL_bits 131072 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014400, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_VAL_bus 10 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014400, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40014400_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40014400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 1) +#define DT_N_S_soc_S_timers_40014400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 1) +#define DT_N_S_soc_S_timers_40014400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40014400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_VAL_id 2065 +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014400, resets, 0, id) +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, resets, 0, id) +#define DT_N_S_soc_S_timers_40014400_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40014400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400, resets, 0) +#define DT_N_S_soc_S_timers_40014400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, resets, 0) +#define DT_N_S_soc_S_timers_40014400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40014400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40014400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40014400_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40014400_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40014400_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_status "disabled" +#define DT_N_S_soc_S_timers_40014400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400, status, 0) +#define DT_N_S_soc_S_timers_40014400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, status, 0) +#define DT_N_S_soc_S_timers_40014400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40014400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40014400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40014400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40014400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40014400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400, compatible, 0) +#define DT_N_S_soc_S_timers_40014400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, compatible, 0) +#define DT_N_S_soc_S_timers_40014400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_interrupts {25 /* 0x19 */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40014400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_interrupts_IDX_0 25 +#define DT_N_S_soc_S_timers_40014400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40014400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40014400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014400_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014400/counter + * + * Node identifier: DT_N_S_soc_S_timers_40014400_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_PATH "/soc/timers@40014400/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40014400_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40014400_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40014400_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40014400) identifier: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_PARENT DT_N_S_soc_S_timers_40014400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014400_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_HASH p37X7wit0iPn8X9v8y4Gj2t07AN6oeaaeHeLb6OojSE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_ORD 139 +#define DT_N_S_soc_S_timers_40014400_S_counter_ORD_STR_SORTABLE 00139 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_REQUIRES_ORDS \ + 138, /* /soc/timers@40014400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_EXISTS 1 +#define DT_N_INST_8_st_stm32_counter DT_N_S_soc_S_timers_40014400_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014400_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014400_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014400_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40014400_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014400_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014400/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40014400_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_PATH "/soc/timers@40014400/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40014400_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40014400_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40014400_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40014400) identifier: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_PARENT DT_N_S_soc_S_timers_40014400 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_HASH qSncIfFrKmBeFCfySGntGi5dvRM62NXtfq0Z60Th_Tw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD 140 +#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD_STR_SORTABLE 00140 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_REQUIRES_ORDS \ + 138, /* /soc/timers@40014400 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_EXISTS 1 +#define DT_N_INST_6_st_stm32_pwm DT_N_S_soc_S_timers_40014400_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014400_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014400_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40014400_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014800 + * + * Node identifier: DT_N_S_soc_S_timers_40014800 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014800_PATH "/soc/timers@40014800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014800_FULL_NAME "timers@40014800" +#define DT_N_S_soc_S_timers_40014800_FULL_NAME_UNQUOTED timers@40014800 +#define DT_N_S_soc_S_timers_40014800_FULL_NAME_TOKEN timers_40014800 +#define DT_N_S_soc_S_timers_40014800_FULL_NAME_UPPER_TOKEN TIMERS_40014800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40014800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014800_CHILD_IDX 34 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40014800_FOREACH_NODELABEL(fn) fn(timers17) +#define DT_N_S_soc_S_timers_40014800_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers17, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014800_CHILD_NUM 2 +#define DT_N_S_soc_S_timers_40014800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40014800_S_pwm) fn(DT_N_S_soc_S_timers_40014800_S_counter) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014800_S_counter) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014800_HASH HFfK32JNDgTzZmhucfswXs63t4LSBAvBFi__WAnpexw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014800_ORD 141 +#define DT_N_S_soc_S_timers_40014800_ORD_STR_SORTABLE 00141 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014800_REQUIRES_ORDS \ + 4, /* /soc */ \ + 5, /* /soc/interrupt-controller@e000e100 */ \ + 9, /* /soc/rcc@40021000 */ \ + 46, /* /soc/rcc@40021000/reset-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014800_SUPPORTS_ORDS \ + 142, /* /soc/timers@40014800/counter */ \ + 143, /* /soc/timers@40014800/pwm */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014800_EXISTS 1 +#define DT_N_INST_9_st_stm32_timers DT_N_S_soc_S_timers_40014800 +#define DT_N_NODELABEL_timers17 DT_N_S_soc_S_timers_40014800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014800_REG_NUM 1 +#define DT_N_S_soc_S_timers_40014800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_REG_IDX_0_VAL_ADDRESS 1073825792 /* 0x40014800 */ +#define DT_N_S_soc_S_timers_40014800_REG_IDX_0_VAL_SIZE 1024 /* 0x400 */ +#define DT_N_S_soc_S_timers_40014800_FOREACH_REG(fn) fn(DT_N_S_soc_S_timers_40014800, 0) +#define DT_N_S_soc_S_timers_40014800_FOREACH_REG_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, 0) +#define DT_N_S_soc_S_timers_40014800_FOREACH_REG_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_FOREACH_REG_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014800_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_VAL_irq 26 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40014800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40014800_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40014800_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40014800_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40014800_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40014800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40014800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014800_P_reg {1073825792 /* 0x40014800 */, 1024 /* 0x400 */} +#define DT_N_S_soc_S_timers_40014800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_reg_IDX_0 1073825792 +#define DT_N_S_soc_S_timers_40014800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40014800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_VAL_bus 96 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_VAL_bits 262144 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014800, clocks, 0, bus) \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, clocks, 0, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 0, bits) +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_0_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_40021000 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_VAL_bus 10 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014800, clocks, 1, bus) \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, clocks, 1, bus) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 1, bits) +#define DT_N_S_soc_S_timers_40014800_P_clocks_IDX_1_NUM_CELLS 2 +#define DT_N_S_soc_S_timers_40014800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800, clocks, 0) \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 1) +#define DT_N_S_soc_S_timers_40014800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 1) +#define DT_N_S_soc_S_timers_40014800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40014800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_clocks_LEN 2 +#define DT_N_S_soc_S_timers_40014800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_40021000_S_reset_controller +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_VAL_id 2066 +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_FOREACH_CELL(fn) fn(DT_N_S_soc_S_timers_40014800, resets, 0, id) +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_FOREACH_CELL_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, resets, 0, id) +#define DT_N_S_soc_S_timers_40014800_P_resets_IDX_0_NUM_CELLS 1 +#define DT_N_S_soc_S_timers_40014800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800, resets, 0) +#define DT_N_S_soc_S_timers_40014800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, resets, 0) +#define DT_N_S_soc_S_timers_40014800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40014800_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40014800_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40014800_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_deadtime 0 +#define DT_N_S_soc_S_timers_40014800_P_st_deadtime_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode "RESET" +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_STRING_UNQUOTED RESET +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_STRING_TOKEN RESET +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_STRING_UPPER_TOKEN RESET +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_IDX_0 "RESET" +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_IDX_0_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_ENUM_VAL_reset_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, st_mastermode, 0) +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, st_mastermode, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_LEN 1 +#define DT_N_S_soc_S_timers_40014800_P_st_mastermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_status "disabled" +#define DT_N_S_soc_S_timers_40014800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800, status, 0) +#define DT_N_S_soc_S_timers_40014800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, status, 0) +#define DT_N_S_soc_S_timers_40014800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014800_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40014800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40014800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40014800_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40014800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40014800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800, compatible, 0) +#define DT_N_S_soc_S_timers_40014800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, compatible, 0) +#define DT_N_S_soc_S_timers_40014800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_interrupts {26 /* 0x1a */, 0 /* 0x0 */} +#define DT_N_S_soc_S_timers_40014800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_interrupts_IDX_0 26 +#define DT_N_S_soc_S_timers_40014800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40014800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40014800_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014800_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014800/counter + * + * Node identifier: DT_N_S_soc_S_timers_40014800_S_counter + * + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_PATH "/soc/timers@40014800/counter" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40014800_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40014800_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40014800_S_counter_FULL_NAME_UPPER_TOKEN COUNTER + +/* Node parent (/soc/timers@40014800) identifier: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_PARENT DT_N_S_soc_S_timers_40014800 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014800_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_HASH S6y2pTOmJHjQSdFjECAm7CIldgBp6UkB1xRx45LXe9E + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_ORD 142 +#define DT_N_S_soc_S_timers_40014800_S_counter_ORD_STR_SORTABLE 00142 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_REQUIRES_ORDS \ + 141, /* /soc/timers@40014800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_EXISTS 1 +#define DT_N_INST_9_st_stm32_counter DT_N_S_soc_S_timers_40014800_S_counter + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014800_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014800_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014800_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40014800_S_counter_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014800_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timers@40014800/pwm + * + * Node identifier: DT_N_S_soc_S_timers_40014800_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_PATH "/soc/timers@40014800/pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40014800_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40014800_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40014800_S_pwm_FULL_NAME_UPPER_TOKEN PWM + +/* Node parent (/soc/timers@40014800) identifier: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_PARENT DT_N_S_soc_S_timers_40014800 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_HASH pP_vpmBmH6Uc99dxi1iL0vcGxl00Y6rTzAdbQLvVodY + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD 143 +#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD_STR_SORTABLE 00143 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_REQUIRES_ORDS \ + 141, /* /soc/timers@40014800 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_EXISTS 1 +#define DT_N_INST_7_st_stm32_pwm DT_N_S_soc_S_timers_40014800_S_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_REG(fn) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_REG_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_REG_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_REG_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40014800_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40014800_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40014800_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40014800_S_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40014800_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40014800_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40014800_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40014800_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_dma_coherent 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_dma_coherent_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40014800_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Chosen nodes + */ +#define DT_CHOSEN_zephyr_crc DT_N_S_soc_S_crc_40023000 +#define DT_CHOSEN_zephyr_crc_EXISTS 1 +#define DT_CHOSEN_zephyr_entropy DT_N_S_soc_S_rng_50060800 +#define DT_CHOSEN_zephyr_entropy_EXISTS 1 +#define DT_CHOSEN_zephyr_flash_controller DT_N_S_soc_S_flash_controller_40022000 +#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1 +#define DT_CHOSEN_zephyr_console DT_N_S_soc_S_serial_40008000 +#define DT_CHOSEN_zephyr_console_EXISTS 1 +#define DT_CHOSEN_zephyr_shell_uart DT_N_S_soc_S_serial_40008000 +#define DT_CHOSEN_zephyr_shell_uart_EXISTS 1 +#define DT_CHOSEN_zephyr_sram DT_N_S_memory_20000000 +#define DT_CHOSEN_zephyr_sram_EXISTS 1 +#define DT_CHOSEN_zephyr_flash DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_CHOSEN_zephyr_flash_EXISTS 1 +#define DT_CHOSEN_zephyr_code_partition DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0 +#define DT_CHOSEN_zephyr_code_partition_EXISTS 1 + +/* Macros for iterating over all nodes and enabled nodes */ +#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_adc_50000000) fn(DT_N_S_soc_S_adc_50000100) fn(DT_N_S_soc_S_dac_50000800) fn(DT_N_S_soc_S_dac_50001000) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca) fn(DT_N_S_soc_S_rcc_40021000) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_40010400) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4) fn(DT_N_S_soc_S_serial_40013800) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40008000) fn(DT_N_S_soc_S_watchdog_40003000) fn(DT_N_S_soc_S_watchdog_40002c00) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40007800) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_can_40006400) fn(DT_N_S_soc_S_timers_40007c00) fn(DT_N_S_soc_S_timers_40012c00) fn(DT_N_S_soc_S_timers_40012c00_S_pwm) fn(DT_N_S_soc_S_timers_40012c00_S_counter) fn(DT_N_S_soc_S_timers_40012c00_S_qdec) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000000_S_counter) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_timers_40000000_S_qdec) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000400_S_counter) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_qdec) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40000800_S_counter) fn(DT_N_S_soc_S_timers_40000800_S_pwm) fn(DT_N_S_soc_S_timers_40000800_S_qdec) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001000_S_counter) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40001400_S_counter) fn(DT_N_S_soc_S_timers_40013400) fn(DT_N_S_soc_S_timers_40013400_S_pwm) fn(DT_N_S_soc_S_timers_40013400_S_counter) fn(DT_N_S_soc_S_timers_40013400_S_qdec) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014000_S_pwm) fn(DT_N_S_soc_S_timers_40014000_S_counter) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014400_S_pwm) fn(DT_N_S_soc_S_timers_40014400_S_counter) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_timers_40014800_S_pwm) fn(DT_N_S_soc_S_timers_40014800_S_counter) fn(DT_N_S_soc_S_rtc_40002800) fn(DT_N_S_soc_S_rng_50060800) fn(DT_N_S_soc_S_usb_40005c00) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_ucpd_4000a000) fn(DT_N_S_soc_S_sai1_40015404) fn(DT_N_S_soc_S_sai1_40015424) fn(DT_N_S_soc_S_opamp1_40010300) fn(DT_N_S_soc_S_opamp2_40010304) fn(DT_N_S_soc_S_opamp3_40010308) fn(DT_N_S_soc_S_comparator_40010200) fn(DT_N_S_soc_S_comparator_40010204) fn(DT_N_S_soc_S_crc_40023000) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_power_states) fn(DT_N_S_cpus_S_power_states_S_state0) fn(DT_N_S_cpus_S_power_states_S_state1) fn(DT_N_S_memory_20000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll) fn(DT_N_S_dietemp) fn(DT_N_S_vref) fn(DT_N_S_vbat) fn(DT_N_S_usbphy) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_connector) fn(DT_N_S_st_morpho_header) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_pwmleds) fn(DT_N_S_pwmleds_S_green_pwm_led) fn(DT_N_S_gpio_keys) fn(DT_N_S_gpio_keys_S_button) +#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_dac_50000800) fn(DT_N_S_soc_S_flash_controller_40022000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca) fn(DT_N_S_soc_S_rcc_40021000) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_40010400) fn(DT_N_S_soc_S_pin_controller_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4) fn(DT_N_S_soc_S_serial_40013800) fn(DT_N_S_soc_S_serial_40008000) fn(DT_N_S_soc_S_watchdog_40003000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_timers_40007c00) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_rtc_40002800) fn(DT_N_S_soc_S_rng_50060800) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_power_states) fn(DT_N_S_cpus_S_power_states_S_state0) fn(DT_N_S_cpus_S_power_states_S_state1) fn(DT_N_S_memory_20000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll) fn(DT_N_S_usbphy) fn(DT_N_S_connector) fn(DT_N_S_st_morpho_header) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_pwmleds) fn(DT_N_S_pwmleds_S_green_pwm_led) fn(DT_N_S_gpio_keys) fn(DT_N_S_gpio_keys_S_button) +#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_adc_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_50000100, __VA_ARGS__) fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) fn(DT_N_S_soc_S_dac_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40002c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_40006400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40012c00_S_qdec, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_qdec, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_qdec, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_qdec, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40013400_S_qdec, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_ucpd_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_sai1_40015404, __VA_ARGS__) fn(DT_N_S_soc_S_sai1_40015424, __VA_ARGS__) fn(DT_N_S_soc_S_opamp1_40010300, __VA_ARGS__) fn(DT_N_S_soc_S_opamp2_40010304, __VA_ARGS__) fn(DT_N_S_soc_S_opamp3_40010308, __VA_ARGS__) fn(DT_N_S_soc_S_comparator_40010200, __VA_ARGS__) fn(DT_N_S_soc_S_comparator_40010204, __VA_ARGS__) fn(DT_N_S_soc_S_crc_40023000, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) fn(DT_N_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_usbphy, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_st_morpho_header, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_pwmleds_S_green_pwm_led, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) fn(DT_N_S_gpio_keys_S_button, __VA_ARGS__) +#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal1_a8, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_vrefint_aa, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout_S_ts_cal2_ca, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_dac1_out1_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_scl_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_i2c1_sda_pb9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_miso_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_miso_pb14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_miso_pc11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_mosi_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_mosi_pb15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_mosi_pc12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_nss_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_nss_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi1_sck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi2_sck_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_spi3_sck_pc10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_tim2_ch1_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_rx_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_rx_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_lpuart1_tx_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_usart1_tx_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) fn(DT_N_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll, __VA_ARGS__) fn(DT_N_S_usbphy, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_st_morpho_header, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_pwmleds_S_green_pwm_led, __VA_ARGS__) fn(DT_N_S_gpio_keys, __VA_ARGS__) fn(DT_N_S_gpio_keys_S_button, __VA_ARGS__) + +/* parent NVM identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0_NVM_DEVICE DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_mcuboot DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_mcuboot_EXISTS 1 + +/* parent NVM identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800_NVM_DEVICE DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_image_0 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_image_0_EXISTS 1 + +/* parent NVM identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800_NVM_DEVICE DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_image_1 DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_image_1_EXISTS 1 + +/* parent NVM identifier: */ +#define DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000_NVM_DEVICE DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_storage DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000 +#define DT_COMPAT_zephyr_mapped_partition_LABEL_storage_EXISTS 1 + +/* + * Macros for compatibles with status "okay" nodes + */ +#define DT_COMPAT_HAS_OKAY_st_stm32g431rb_nucleo 1 +#define DT_COMPAT_HAS_OKAY_st_stm32g431 1 +#define DT_COMPAT_HAS_OKAY_st_stm32g4 1 +#define DT_COMPAT_HAS_OKAY_simple_bus 1 +#define DT_COMPAT_HAS_OKAY_arm_v7m_nvic 1 +#define DT_COMPAT_HAS_OKAY_arm_armv7m_systick 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_dac 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_flash_controller 1 +#define DT_COMPAT_HAS_OKAY_st_stm32g4_flash_controller 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_nv_flash 1 +#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1 +#define DT_COMPAT_HAS_OKAY_zephyr_mapped_partition 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_nvm_otp 1 +#define DT_COMPAT_HAS_OKAY_fixed_layout 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_rcc 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_rcc_rctl 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_exti 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_pinctrl 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_gpio 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_usart 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_uart 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_lpuart 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_watchdog 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_i2c_v2 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_spi_fifo 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_spi 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_lptim 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_timers 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_pwm 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_rtc 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_rng 1 +#define DT_COMPAT_HAS_OKAY_arm_cortex_m4f 1 +#define DT_COMPAT_HAS_OKAY_zephyr_power_state 1 +#define DT_COMPAT_HAS_OKAY_zephyr_memory_region 1 +#define DT_COMPAT_HAS_OKAY_mmio_sram 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_hse_clock 1 +#define DT_COMPAT_HAS_OKAY_fixed_clock 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_lse_clock 1 +#define DT_COMPAT_HAS_OKAY_st_stm32g4_pll_clock 1 +#define DT_COMPAT_HAS_OKAY_usb_nop_xceiv 1 +#define DT_COMPAT_HAS_OKAY_arduino_header_r3 1 +#define DT_COMPAT_HAS_OKAY_st_morpho_header 1 +#define DT_COMPAT_HAS_OKAY_gpio_leds 1 +#define DT_COMPAT_HAS_OKAY_pwm_leds 1 +#define DT_COMPAT_HAS_OKAY_gpio_keys 1 + +/* + * Macros for status "okay" instances of each compatible + */ +#define DT_N_INST_st_stm32g431rb_nucleo_NUM_OKAY 1 +#define DT_N_INST_st_stm32g431_NUM_OKAY 1 +#define DT_N_INST_st_stm32g4_NUM_OKAY 1 +#define DT_N_INST_simple_bus_NUM_OKAY 1 +#define DT_N_INST_arm_v7m_nvic_NUM_OKAY 1 +#define DT_N_INST_arm_armv7m_systick_NUM_OKAY 1 +#define DT_N_INST_st_stm32_dac_NUM_OKAY 1 +#define DT_N_INST_st_stm32_flash_controller_NUM_OKAY 1 +#define DT_N_INST_st_stm32g4_flash_controller_NUM_OKAY 1 +#define DT_N_INST_st_stm32_nv_flash_NUM_OKAY 1 +#define DT_N_INST_soc_nv_flash_NUM_OKAY 1 +#define DT_N_INST_zephyr_mapped_partition_NUM_OKAY 4 +#define DT_N_INST_st_stm32_nvm_otp_NUM_OKAY 1 +#define DT_N_INST_fixed_layout_NUM_OKAY 1 +#define DT_N_INST_st_stm32_rcc_NUM_OKAY 1 +#define DT_N_INST_st_stm32_rcc_rctl_NUM_OKAY 1 +#define DT_N_INST_st_stm32_exti_NUM_OKAY 1 +#define DT_N_INST_st_stm32_pinctrl_NUM_OKAY 1 +#define DT_N_INST_st_stm32_gpio_NUM_OKAY 7 +#define DT_N_INST_st_stm32_usart_NUM_OKAY 1 +#define DT_N_INST_st_stm32_uart_NUM_OKAY 2 +#define DT_N_INST_st_stm32_lpuart_NUM_OKAY 1 +#define DT_N_INST_st_stm32_watchdog_NUM_OKAY 1 +#define DT_N_INST_st_stm32_i2c_v2_NUM_OKAY 1 +#define DT_N_INST_st_stm32_spi_fifo_NUM_OKAY 3 +#define DT_N_INST_st_stm32_spi_NUM_OKAY 3 +#define DT_N_INST_st_stm32_lptim_NUM_OKAY 1 +#define DT_N_INST_st_stm32_timers_NUM_OKAY 1 +#define DT_N_INST_st_stm32_pwm_NUM_OKAY 1 +#define DT_N_INST_st_stm32_rtc_NUM_OKAY 1 +#define DT_N_INST_st_stm32_rng_NUM_OKAY 1 +#define DT_N_INST_arm_cortex_m4f_NUM_OKAY 1 +#define DT_N_INST_zephyr_power_state_NUM_OKAY 2 +#define DT_N_INST_zephyr_memory_region_NUM_OKAY 1 +#define DT_N_INST_mmio_sram_NUM_OKAY 1 +#define DT_N_INST_st_stm32_hse_clock_NUM_OKAY 1 +#define DT_N_INST_fixed_clock_NUM_OKAY 2 +#define DT_N_INST_st_stm32_lse_clock_NUM_OKAY 1 +#define DT_N_INST_st_stm32g4_pll_clock_NUM_OKAY 1 +#define DT_N_INST_usb_nop_xceiv_NUM_OKAY 1 +#define DT_N_INST_arduino_header_r3_NUM_OKAY 1 +#define DT_N_INST_st_morpho_header_NUM_OKAY 1 +#define DT_N_INST_gpio_leds_NUM_OKAY 1 +#define DT_N_INST_pwm_leds_NUM_OKAY 1 +#define DT_N_INST_gpio_keys_NUM_OKAY 1 +#define DT_FOREACH_OKAY_st_stm32g431rb_nucleo(fn) fn(DT_N) +#define DT_FOREACH_OKAY_VARGS_st_stm32g431rb_nucleo(fn, ...) fn(DT_N, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32g431rb_nucleo(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32g431rb_nucleo(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32g431(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_st_stm32g431(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32g431(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32g431(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32g4(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_st_stm32g4(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32g4(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32g4(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_simple_bus(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_simple_bus(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_simple_bus(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_v7m_nvic(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) +#define DT_FOREACH_OKAY_VARGS_arm_v7m_nvic(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_v7m_nvic(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_v7m_nvic(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_armv7m_systick(fn) fn(DT_N_S_soc_S_timer_e000e010) +#define DT_FOREACH_OKAY_VARGS_arm_armv7m_systick(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_armv7m_systick(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_armv7m_systick(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_dac(fn) fn(DT_N_S_soc_S_dac_50000800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_dac(fn, ...) fn(DT_N_S_soc_S_dac_50000800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_dac(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_dac(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_flash_controller(fn) fn(DT_N_S_soc_S_flash_controller_40022000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_flash_controller(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_flash_controller(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_flash_controller(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32g4_flash_controller(fn) fn(DT_N_S_soc_S_flash_controller_40022000) +#define DT_FOREACH_OKAY_VARGS_st_stm32g4_flash_controller(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32g4_flash_controller(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32g4_flash_controller(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_nv_flash(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_nv_flash(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_nv_flash(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_nv_flash(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_soc_nv_flash(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000) +#define DT_FOREACH_OKAY_VARGS_soc_nv_flash(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_soc_nv_flash(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_zephyr_mapped_partition(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000) +#define DT_FOREACH_OKAY_VARGS_zephyr_mapped_partition(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_8800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_14800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_8000000_S_partitions_S_partition_1f000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_zephyr_mapped_partition(fn) fn(0) fn(1) fn(2) fn(3) +#define DT_FOREACH_OKAY_INST_VARGS_zephyr_mapped_partition(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_nvm_otp(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500) +#define DT_FOREACH_OKAY_VARGS_st_stm32_nvm_otp(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_nvm_otp(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_nvm_otp(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_fixed_layout(fn) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout) +#define DT_FOREACH_OKAY_VARGS_fixed_layout(fn, ...) fn(DT_N_S_soc_S_flash_controller_40022000_S_flash_1fff7500_S_nvmem_layout, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_fixed_layout(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_fixed_layout(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_rcc(fn) fn(DT_N_S_soc_S_rcc_40021000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_rcc(fn, ...) fn(DT_N_S_soc_S_rcc_40021000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_rcc(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_rcc(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_rcc_rctl(fn) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller) +#define DT_FOREACH_OKAY_VARGS_st_stm32_rcc_rctl(fn, ...) fn(DT_N_S_soc_S_rcc_40021000_S_reset_controller, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_rcc_rctl(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_rcc_rctl(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_exti(fn) fn(DT_N_S_soc_S_interrupt_controller_40010400) +#define DT_FOREACH_OKAY_VARGS_st_stm32_exti(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_40010400, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_exti(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_exti(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_pinctrl(fn) fn(DT_N_S_soc_S_pin_controller_48000000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_pinctrl(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_pinctrl(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_pinctrl(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_gpio(fn) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_gpio(fn, ...) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_48000000_S_gpio_48001800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_gpio(fn) fn(0) fn(1) fn(2) fn(3) fn(4) fn(5) fn(6) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_gpio(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) fn(5, __VA_ARGS__) fn(6, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_usart(fn) fn(DT_N_S_soc_S_serial_40013800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_usart(fn, ...) fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_usart(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_usart(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_uart(fn) fn(DT_N_S_soc_S_serial_40013800) fn(DT_N_S_soc_S_serial_40008000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_uart(fn, ...) fn(DT_N_S_soc_S_serial_40013800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_uart(fn) fn(0) fn(1) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_uart(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_lpuart(fn) fn(DT_N_S_soc_S_serial_40008000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_lpuart(fn, ...) fn(DT_N_S_soc_S_serial_40008000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_lpuart(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_lpuart(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_watchdog(fn) fn(DT_N_S_soc_S_watchdog_40003000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_watchdog(fn, ...) fn(DT_N_S_soc_S_watchdog_40003000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_watchdog(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_watchdog(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_i2c_v2(fn) fn(DT_N_S_soc_S_i2c_40005400) +#define DT_FOREACH_OKAY_VARGS_st_stm32_i2c_v2(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_i2c_v2(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_i2c_v2(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_spi_fifo(fn) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) +#define DT_FOREACH_OKAY_VARGS_st_stm32_spi_fifo(fn, ...) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_spi_fifo(fn) fn(0) fn(1) fn(2) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_spi_fifo(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_spi(fn) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) +#define DT_FOREACH_OKAY_VARGS_st_stm32_spi(fn, ...) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_spi(fn) fn(0) fn(1) fn(2) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_spi(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_lptim(fn) fn(DT_N_S_soc_S_timers_40007c00) +#define DT_FOREACH_OKAY_VARGS_st_stm32_lptim(fn, ...) fn(DT_N_S_soc_S_timers_40007c00, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_lptim(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_lptim(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_timers(fn) fn(DT_N_S_soc_S_timers_40000000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_timers(fn, ...) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_timers(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_timers(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_pwm(fn) fn(DT_N_S_soc_S_timers_40000000_S_pwm) +#define DT_FOREACH_OKAY_VARGS_st_stm32_pwm(fn, ...) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_pwm(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_pwm(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_rtc(fn) fn(DT_N_S_soc_S_rtc_40002800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_rtc(fn, ...) fn(DT_N_S_soc_S_rtc_40002800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_rtc(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_rtc(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_rng(fn) fn(DT_N_S_soc_S_rng_50060800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_rng(fn, ...) fn(DT_N_S_soc_S_rng_50060800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_rng(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_rng(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_cortex_m4f(fn) fn(DT_N_S_cpus_S_cpu_0) +#define DT_FOREACH_OKAY_VARGS_arm_cortex_m4f(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_cortex_m4f(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_cortex_m4f(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_zephyr_power_state(fn) fn(DT_N_S_cpus_S_power_states_S_state0) fn(DT_N_S_cpus_S_power_states_S_state1) +#define DT_FOREACH_OKAY_VARGS_zephyr_power_state(fn, ...) fn(DT_N_S_cpus_S_power_states_S_state0, __VA_ARGS__) fn(DT_N_S_cpus_S_power_states_S_state1, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_zephyr_power_state(fn) fn(0) fn(1) +#define DT_FOREACH_OKAY_INST_VARGS_zephyr_power_state(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_zephyr_memory_region(fn) fn(DT_N_S_memory_20000000) +#define DT_FOREACH_OKAY_VARGS_zephyr_memory_region(fn, ...) fn(DT_N_S_memory_20000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_zephyr_memory_region(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_zephyr_memory_region(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_mmio_sram(fn) fn(DT_N_S_memory_20000000) +#define DT_FOREACH_OKAY_VARGS_mmio_sram(fn, ...) fn(DT_N_S_memory_20000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_mmio_sram(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_hse_clock(fn) fn(DT_N_S_clocks_S_clk_hse) +#define DT_FOREACH_OKAY_VARGS_st_stm32_hse_clock(fn, ...) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_hse_clock(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_hse_clock(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_fixed_clock(fn) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lsi) +#define DT_FOREACH_OKAY_VARGS_fixed_clock(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_fixed_clock(fn) fn(0) fn(1) +#define DT_FOREACH_OKAY_INST_VARGS_fixed_clock(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_lse_clock(fn) fn(DT_N_S_clocks_S_clk_lse) +#define DT_FOREACH_OKAY_VARGS_st_stm32_lse_clock(fn, ...) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_lse_clock(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_lse_clock(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32g4_pll_clock(fn) fn(DT_N_S_clocks_S_pll) +#define DT_FOREACH_OKAY_VARGS_st_stm32g4_pll_clock(fn, ...) fn(DT_N_S_clocks_S_pll, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32g4_pll_clock(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32g4_pll_clock(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_usb_nop_xceiv(fn) fn(DT_N_S_usbphy) +#define DT_FOREACH_OKAY_VARGS_usb_nop_xceiv(fn, ...) fn(DT_N_S_usbphy, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_usb_nop_xceiv(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_usb_nop_xceiv(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arduino_header_r3(fn) fn(DT_N_S_connector) +#define DT_FOREACH_OKAY_VARGS_arduino_header_r3(fn, ...) fn(DT_N_S_connector, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arduino_header_r3(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arduino_header_r3(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_morpho_header(fn) fn(DT_N_S_st_morpho_header) +#define DT_FOREACH_OKAY_VARGS_st_morpho_header(fn, ...) fn(DT_N_S_st_morpho_header, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_morpho_header(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_morpho_header(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_gpio_leds(fn) fn(DT_N_S_leds) +#define DT_FOREACH_OKAY_VARGS_gpio_leds(fn, ...) fn(DT_N_S_leds, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_gpio_leds(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_gpio_leds(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_pwm_leds(fn) fn(DT_N_S_pwmleds) +#define DT_FOREACH_OKAY_VARGS_pwm_leds(fn, ...) fn(DT_N_S_pwmleds, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_pwm_leds(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_pwm_leds(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_gpio_keys(fn) fn(DT_N_S_gpio_keys) +#define DT_FOREACH_OKAY_VARGS_gpio_keys(fn, ...) fn(DT_N_S_gpio_keys, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_gpio_keys(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_gpio_keys(fn, ...) fn(0, __VA_ARGS__) + +/* + * Bus information for status "okay" nodes of each compatible + */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/driver-validation.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/driver-validation.h new file mode 100644 index 0000000..86042e8 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/driver-validation.h @@ -0,0 +1,192 @@ +#ifndef DRIVER_VALIDATION_GEN_H +#define DRIVER_VALIDATION_GEN_H +#define K_SYSCALL_DRIVER_GEN(ptr, op, driver_lower_case, driver_upper_case) \ + (K_SYSCALL_OBJ(ptr, K_OBJ_DRIVER_##driver_upper_case) || \ + K_SYSCALL_DRIVER_OP(ptr, driver_lower_case##_driver_api, op)) + +#define K_SYSCALL_DRIVER_FLASH(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, flash, FLASH) + +#define K_SYSCALL_DRIVER_SHARED_IRQ(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, shared_irq, SHARED_IRQ) + +#define K_SYSCALL_DRIVER_DMIC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dmic, DMIC) + +#define K_SYSCALL_DRIVER_CRYPTO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, crypto, CRYPTO) + +#define K_SYSCALL_DRIVER_ADC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, adc, ADC) + +#define K_SYSCALL_DRIVER_AUXDISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, auxdisplay, AUXDISPLAY) + +#define K_SYSCALL_DRIVER_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bbram, BBRAM) + +#define K_SYSCALL_DRIVER_BIOMETRIC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, biometric, BIOMETRIC) + +#define K_SYSCALL_DRIVER_BT_HCI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bt_hci, BT_HCI) + +#define K_SYSCALL_DRIVER_CAN(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, can, CAN) + +#define K_SYSCALL_DRIVER_CELLULAR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, cellular, CELLULAR) + +#define K_SYSCALL_DRIVER_CHARGER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, charger, CHARGER) + +#define K_SYSCALL_DRIVER_CLOCK_CONTROL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, clock_control, CLOCK_CONTROL) + +#define K_SYSCALL_DRIVER_COMPARATOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, comparator, COMPARATOR) + +#define K_SYSCALL_DRIVER_COREDUMP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, coredump, COREDUMP) + +#define K_SYSCALL_DRIVER_COUNTER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, counter, COUNTER) + +#define K_SYSCALL_DRIVER_CRC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, crc, CRC) + +#define K_SYSCALL_DRIVER_DAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dac, DAC) + +#define K_SYSCALL_DRIVER_DAI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dai, DAI) + +#define K_SYSCALL_DRIVER_DISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, display, DISPLAY) + +#define K_SYSCALL_DRIVER_DMA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dma, DMA) + +#define K_SYSCALL_DRIVER_EDAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, edac, EDAC) + +#define K_SYSCALL_DRIVER_EEPROM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, eeprom, EEPROM) + +#define K_SYSCALL_DRIVER_EMUL_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, emul_bbram, EMUL_BBRAM) + +#define K_SYSCALL_DRIVER_FUEL_GAUGE_EMUL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fuel_gauge_emul, FUEL_GAUGE_EMUL) + +#define K_SYSCALL_DRIVER_EMUL_SENSOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, emul_sensor, EMUL_SENSOR) + +#define K_SYSCALL_DRIVER_ENTROPY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, entropy, ENTROPY) + +#define K_SYSCALL_DRIVER_ESPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, espi, ESPI) + +#define K_SYSCALL_DRIVER_ESPI_SAF(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, espi_saf, ESPI_SAF) + +#define K_SYSCALL_DRIVER_FPGA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fpga, FPGA) + +#define K_SYSCALL_DRIVER_FUEL_GAUGE(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fuel_gauge, FUEL_GAUGE) + +#define K_SYSCALL_DRIVER_GNSS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, gnss, GNSS) + +#define K_SYSCALL_DRIVER_GPIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, gpio, GPIO) + +#define K_SYSCALL_DRIVER_HAPTICS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, haptics, HAPTICS) + +#define K_SYSCALL_DRIVER_HWSPINLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, hwspinlock, HWSPINLOCK) + +#define K_SYSCALL_DRIVER_I2C(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c, I2C) + +#define K_SYSCALL_DRIVER_I2C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c_target, I2C_TARGET) + +#define K_SYSCALL_DRIVER_I2S(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2s, I2S) + +#define K_SYSCALL_DRIVER_I3C(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i3c, I3C) + +#define K_SYSCALL_DRIVER_IPM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ipm, IPM) + +#define K_SYSCALL_DRIVER_LED(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, led, LED) + +#define K_SYSCALL_DRIVER_LED_STRIP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, led_strip, LED_STRIP) + +#define K_SYSCALL_DRIVER_LORA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, lora, LORA) + +#define K_SYSCALL_DRIVER_MBOX(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mbox, MBOX) + +#define K_SYSCALL_DRIVER_MDIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mdio, MDIO) + +#define K_SYSCALL_DRIVER_MIPI_DBI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mipi_dbi, MIPI_DBI) + +#define K_SYSCALL_DRIVER_MIPI_DSI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mipi_dsi, MIPI_DSI) + +#define K_SYSCALL_DRIVER_MSPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mspi, MSPI) + +#define K_SYSCALL_DRIVER_OPAMP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, opamp, OPAMP) + +#define K_SYSCALL_DRIVER_OTP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, otp, OTP) + +#define K_SYSCALL_DRIVER_PECI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, peci, PECI) + +#define K_SYSCALL_DRIVER_PS2(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ps2, PS2) + +#define K_SYSCALL_DRIVER_PTP_CLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ptp_clock, PTP_CLOCK) + +#define K_SYSCALL_DRIVER_PWM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pwm, PWM) + +#define K_SYSCALL_DRIVER_REGULATOR_PARENT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator_parent, REGULATOR_PARENT) + +#define K_SYSCALL_DRIVER_REGULATOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator, REGULATOR) + +#define K_SYSCALL_DRIVER_RESET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, reset, RESET) + +#define K_SYSCALL_DRIVER_RETAINED_MEM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, retained_mem, RETAINED_MEM) + +#define K_SYSCALL_DRIVER_RTC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, rtc, RTC) + +#define K_SYSCALL_DRIVER_SDHC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sdhc, SDHC) + +#define K_SYSCALL_DRIVER_SENSOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sensor, SENSOR) + +#define K_SYSCALL_DRIVER_SMBUS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, smbus, SMBUS) + +#define K_SYSCALL_DRIVER_SPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, spi, SPI) + +#define K_SYSCALL_DRIVER_SYSCON(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, syscon, SYSCON) + +#define K_SYSCALL_DRIVER_TEE(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tee, TEE) + +#define K_SYSCALL_DRIVER_TGPIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tgpio, TGPIO) + +#define K_SYSCALL_DRIVER_UAOL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, uaol, UAOL) + +#define K_SYSCALL_DRIVER_VIDEO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, video, VIDEO) + +#define K_SYSCALL_DRIVER_VIRTIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, virtio, VIRTIO) + +#define K_SYSCALL_DRIVER_W1(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, w1, W1) + +#define K_SYSCALL_DRIVER_WDT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, wdt, WDT) + +#define K_SYSCALL_DRIVER_WUC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, wuc, WUC) + +#define K_SYSCALL_DRIVER_CAN_TRANSCEIVER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, can_transceiver, CAN_TRANSCEIVER) + +#define K_SYSCALL_DRIVER_NRF_CLOCK_CONTROL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, nrf_clock_control, NRF_CLOCK_CONTROL) + +#define K_SYSCALL_DRIVER_I3C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i3c_target, I3C_TARGET) + +#define K_SYSCALL_DRIVER_ITS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, its, ITS) + +#define K_SYSCALL_DRIVER_VTD(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, vtd, VTD) + +#define K_SYSCALL_DRIVER_RENESAS_ELC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, renesas_elc, RENESAS_ELC) + +#define K_SYSCALL_DRIVER_PCIE_CTRL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pcie_ctrl, PCIE_CTRL) + +#define K_SYSCALL_DRIVER_PCIE_EP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pcie_ep, PCIE_EP) + +#define K_SYSCALL_DRIVER_PSI5(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, psi5, PSI5) + +#define K_SYSCALL_DRIVER_SENT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sent, SENT) + +#define K_SYSCALL_DRIVER_SVC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, svc, SVC) + +#define K_SYSCALL_DRIVER_STEPPER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, stepper, STEPPER) + +#define K_SYSCALL_DRIVER_STEPPER_CTRL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, stepper_ctrl, STEPPER_CTRL) + +#define K_SYSCALL_DRIVER_UART(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, uart, UART) + +#define K_SYSCALL_DRIVER_BC12_EMUL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bc12_emul, BC12_EMUL) + +#define K_SYSCALL_DRIVER_BC12(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bc12, BC12) + +#define K_SYSCALL_DRIVER_USBC_PPC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, usbc_ppc, USBC_PPC) + +#define K_SYSCALL_DRIVER_TCPC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tcpc, TCPC) + +#define K_SYSCALL_DRIVER_USBC_VBUS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, usbc_vbus, USBC_VBUS) + +#define K_SYSCALL_DRIVER_IVSHMEM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ivshmem, IVSHMEM) + +#define K_SYSCALL_DRIVER_ETHPHY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ethphy, ETHPHY) +#endif /* DRIVER_VALIDATION_GEN_H */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/heap_constants.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/heap_constants.h new file mode 100644 index 0000000..a861400 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/heap_constants.h @@ -0,0 +1,19 @@ +/* THIS FILE IS AUTO GENERATED. PLEASE DO NOT EDIT. + * + * This header file provides macros for the offsets of various structure + * members. These offset macros are primarily intended to be used in + * assembly code. + */ + +#ifndef __GEN_HEAP_CONSTANTS_H__ +#define __GEN_HEAP_CONSTANTS_H__ + +#define ___z_heap_struct_SIZEOF 0x10 +#define ___z_heap_bucket_SIZEOF 0x4 +#define ___z_heap_chunk_unit_SIZEOF 0x8 +#define ___z_heap_hdr_SIZEOF 0x4 +#define ___z_heap_ftr_SIZEOF 0x4 +#define ___z_heap_trailer_SIZEOF 0x0 +#define ___z_heap_min_chunk_SIZEOF 0x1 + +#endif /* __GEN_HEAP_CONSTANTS_H__ */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/kobj-types-enum.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/kobj-types-enum.h new file mode 100644 index 0000000..c7e3608 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/kobj-types-enum.h @@ -0,0 +1,141 @@ +/* Core kernel objects */ +K_OBJ_MEM_SLAB, +K_OBJ_MSGQ, +K_OBJ_MUTEX, +K_OBJ_PIPE, +K_OBJ_QUEUE, +K_OBJ_POLL_SIGNAL, +K_OBJ_SEM, +K_OBJ_STACK, +K_OBJ_THREAD, +K_OBJ_TIMER, +K_OBJ_THREAD_STACK_ELEMENT, +K_OBJ_NET_SOCKET, +K_OBJ_NET_IF, +K_OBJ_SYS_MUTEX, +K_OBJ_FUTEX, +K_OBJ_CONDVAR, +#ifdef CONFIG_EVENTS +K_OBJ_EVENT, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_SUITE_NODE, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_SUITE_STATS, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_UNIT_TEST, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_TEST_RULE, +#endif +#ifdef CONFIG_RTIO +K_OBJ_RTIO, +#endif +#ifdef CONFIG_RTIO +K_OBJ_RTIO_IODEV, +#endif +#ifdef CONFIG_RTIO +K_OBJ_RTIO_POOL, +#endif +#ifdef CONFIG_ADC_STREAM +K_OBJ_ADC_DECODER_API, +#endif +#ifdef CONFIG_SENSOR_ASYNC_API +K_OBJ_SENSOR_DECODER_API, +#endif +/* Driver subsystems */ +K_OBJ_DRIVER_FLASH, +K_OBJ_DRIVER_SHARED_IRQ, +K_OBJ_DRIVER_DMIC, +K_OBJ_DRIVER_CRYPTO, +K_OBJ_DRIVER_ADC, +K_OBJ_DRIVER_AUXDISPLAY, +K_OBJ_DRIVER_BBRAM, +K_OBJ_DRIVER_BIOMETRIC, +K_OBJ_DRIVER_BT_HCI, +K_OBJ_DRIVER_CAN, +K_OBJ_DRIVER_CELLULAR, +K_OBJ_DRIVER_CHARGER, +K_OBJ_DRIVER_CLOCK_CONTROL, +K_OBJ_DRIVER_COMPARATOR, +K_OBJ_DRIVER_COREDUMP, +K_OBJ_DRIVER_COUNTER, +K_OBJ_DRIVER_CRC, +K_OBJ_DRIVER_DAC, +K_OBJ_DRIVER_DAI, +K_OBJ_DRIVER_DISPLAY, +K_OBJ_DRIVER_DMA, +K_OBJ_DRIVER_EDAC, +K_OBJ_DRIVER_EEPROM, +K_OBJ_DRIVER_EMUL_BBRAM, +K_OBJ_DRIVER_FUEL_GAUGE_EMUL, +K_OBJ_DRIVER_EMUL_SENSOR, +K_OBJ_DRIVER_ENTROPY, +K_OBJ_DRIVER_ESPI, +K_OBJ_DRIVER_ESPI_SAF, +K_OBJ_DRIVER_FPGA, +K_OBJ_DRIVER_FUEL_GAUGE, +K_OBJ_DRIVER_GNSS, +K_OBJ_DRIVER_GPIO, +K_OBJ_DRIVER_HAPTICS, +K_OBJ_DRIVER_HWSPINLOCK, +K_OBJ_DRIVER_I2C, +K_OBJ_DRIVER_I2C_TARGET, +K_OBJ_DRIVER_I2S, +K_OBJ_DRIVER_I3C, +K_OBJ_DRIVER_IPM, +K_OBJ_DRIVER_LED, +K_OBJ_DRIVER_LED_STRIP, +K_OBJ_DRIVER_LORA, +K_OBJ_DRIVER_MBOX, +K_OBJ_DRIVER_MDIO, +K_OBJ_DRIVER_MIPI_DBI, +K_OBJ_DRIVER_MIPI_DSI, +K_OBJ_DRIVER_MSPI, +K_OBJ_DRIVER_OPAMP, +K_OBJ_DRIVER_OTP, +K_OBJ_DRIVER_PECI, +K_OBJ_DRIVER_PS2, +K_OBJ_DRIVER_PTP_CLOCK, +K_OBJ_DRIVER_PWM, +K_OBJ_DRIVER_REGULATOR_PARENT, +K_OBJ_DRIVER_REGULATOR, +K_OBJ_DRIVER_RESET, +K_OBJ_DRIVER_RETAINED_MEM, +K_OBJ_DRIVER_RTC, +K_OBJ_DRIVER_SDHC, +K_OBJ_DRIVER_SENSOR, +K_OBJ_DRIVER_SMBUS, +K_OBJ_DRIVER_SPI, +K_OBJ_DRIVER_SYSCON, +K_OBJ_DRIVER_TEE, +K_OBJ_DRIVER_TGPIO, +K_OBJ_DRIVER_UAOL, +K_OBJ_DRIVER_VIDEO, +K_OBJ_DRIVER_VIRTIO, +K_OBJ_DRIVER_W1, +K_OBJ_DRIVER_WDT, +K_OBJ_DRIVER_WUC, +K_OBJ_DRIVER_CAN_TRANSCEIVER, +K_OBJ_DRIVER_NRF_CLOCK_CONTROL, +K_OBJ_DRIVER_I3C_TARGET, +K_OBJ_DRIVER_ITS, +K_OBJ_DRIVER_VTD, +K_OBJ_DRIVER_RENESAS_ELC, +K_OBJ_DRIVER_PCIE_CTRL, +K_OBJ_DRIVER_PCIE_EP, +K_OBJ_DRIVER_PSI5, +K_OBJ_DRIVER_SENT, +K_OBJ_DRIVER_SVC, +K_OBJ_DRIVER_STEPPER, +K_OBJ_DRIVER_STEPPER_CTRL, +K_OBJ_DRIVER_UART, +K_OBJ_DRIVER_BC12_EMUL, +K_OBJ_DRIVER_BC12, +K_OBJ_DRIVER_USBC_PPC, +K_OBJ_DRIVER_TCPC, +K_OBJ_DRIVER_USBC_VBUS, +K_OBJ_DRIVER_IVSHMEM, +K_OBJ_DRIVER_ETHPHY, diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/offsets.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/offsets.h new file mode 100644 index 0000000..56354ee --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/offsets.h @@ -0,0 +1,35 @@ +/* THIS FILE IS AUTO GENERATED. PLEASE DO NOT EDIT. + * + * This header file provides macros for the offsets of various structure + * members. These offset macros are primarily intended to be used in + * assembly code. + */ + +#ifndef __GEN_OFFSETS_H__ +#define __GEN_OFFSETS_H__ + +#define ___cpu_t_current_OFFSET 0x8 +#define ___cpu_t_nested_OFFSET 0x0 +#define ___cpu_t_irq_stack_OFFSET 0x4 +#define ___cpu_t_arch_OFFSET 0x11 +#define ___kernel_t_cpus_OFFSET 0x0 +#define ___kernel_t_ready_q_OFFSET 0x14 +#define ___ready_q_t_cache_OFFSET 0x0 +#define ___thread_base_t_user_options_OFFSET 0xc +#define ___thread_t_base_OFFSET 0x0 +#define ___thread_t_callee_saved_OFFSET 0x30 +#define ___thread_t_arch_OFFSET 0x74 +#define ___thread_t_stack_info_OFFSET 0x60 +#define ___thread_t_tls_OFFSET 0x70 +#define __z_interrupt_stack_SIZEOF 0x840 +#define __z_interrupt_all_stacks_SIZEOF 0x840 +#define _PM_DEVICE_STRUCT_FLAGS_OFFSET 0x0 +#define ___thread_arch_t_basepri_OFFSET 0x0 +#define ___thread_arch_t_swap_return_value_OFFSET 0x4 +#define ___basic_sf_t_pc_OFFSET 0x18 +#define ___basic_sf_t_xpsr_OFFSET 0x1c +#define ___esf_t_SIZEOF 0x20 +#define ___callee_saved_t_SIZEOF 0x24 +#define ___thread_stack_info_t_start_OFFSET 0x0 + +#endif /* __GEN_OFFSETS_H__ */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-size.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-size.h new file mode 100644 index 0000000..5ae6675 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-size.h @@ -0,0 +1,15 @@ +/* Non device/stack objects */ +case K_OBJ_MEM_SLAB: ret = sizeof(struct k_mem_slab); break; +case K_OBJ_MSGQ: ret = sizeof(struct k_msgq); break; +case K_OBJ_MUTEX: ret = sizeof(struct k_mutex); break; +case K_OBJ_PIPE: ret = sizeof(struct k_pipe); break; +case K_OBJ_QUEUE: ret = sizeof(struct k_queue); break; +case K_OBJ_POLL_SIGNAL: ret = sizeof(struct k_poll_signal); break; +case K_OBJ_SEM: ret = sizeof(struct k_sem); break; +case K_OBJ_STACK: ret = sizeof(struct k_stack); break; +case K_OBJ_THREAD: ret = sizeof(struct k_thread); break; +case K_OBJ_TIMER: ret = sizeof(struct k_timer); break; +case K_OBJ_CONDVAR: ret = sizeof(struct k_condvar); break; +#ifdef CONFIG_EVENTS +case K_OBJ_EVENT: ret = sizeof(struct k_event); break; +#endif diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-str.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-str.h new file mode 100644 index 0000000..0490b1b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/otype-to-str.h @@ -0,0 +1,141 @@ +/* Core kernel objects */ +case K_OBJ_MEM_SLAB: ret = "k_mem_slab"; break; +case K_OBJ_MSGQ: ret = "k_msgq"; break; +case K_OBJ_MUTEX: ret = "k_mutex"; break; +case K_OBJ_PIPE: ret = "k_pipe"; break; +case K_OBJ_QUEUE: ret = "k_queue"; break; +case K_OBJ_POLL_SIGNAL: ret = "k_poll_signal"; break; +case K_OBJ_SEM: ret = "k_sem"; break; +case K_OBJ_STACK: ret = "k_stack"; break; +case K_OBJ_THREAD: ret = "k_thread"; break; +case K_OBJ_TIMER: ret = "k_timer"; break; +case K_OBJ_THREAD_STACK_ELEMENT: ret = "z_thread_stack_element"; break; +case K_OBJ_NET_SOCKET: ret = "NET_SOCKET"; break; +case K_OBJ_NET_IF: ret = "net_if"; break; +case K_OBJ_SYS_MUTEX: ret = "sys_mutex"; break; +case K_OBJ_FUTEX: ret = "k_futex"; break; +case K_OBJ_CONDVAR: ret = "k_condvar"; break; +#ifdef CONFIG_EVENTS +case K_OBJ_EVENT: ret = "k_event"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_SUITE_NODE: ret = "ztest_suite_node"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_SUITE_STATS: ret = "ztest_suite_stats"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_UNIT_TEST: ret = "ztest_unit_test"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_TEST_RULE: ret = "ztest_test_rule"; break; +#endif +#ifdef CONFIG_RTIO +case K_OBJ_RTIO: ret = "rtio"; break; +#endif +#ifdef CONFIG_RTIO +case K_OBJ_RTIO_IODEV: ret = "rtio_iodev"; break; +#endif +#ifdef CONFIG_RTIO +case K_OBJ_RTIO_POOL: ret = "rtio_pool"; break; +#endif +#ifdef CONFIG_ADC_STREAM +case K_OBJ_ADC_DECODER_API: ret = "adc_decoder_api"; break; +#endif +#ifdef CONFIG_SENSOR_ASYNC_API +case K_OBJ_SENSOR_DECODER_API: ret = "sensor_decoder_api"; break; +#endif +/* Driver subsystems */ +case K_OBJ_DRIVER_FLASH: ret = "flash driver"; break; +case K_OBJ_DRIVER_SHARED_IRQ: ret = "shared_irq driver"; break; +case K_OBJ_DRIVER_DMIC: ret = "dmic driver"; break; +case K_OBJ_DRIVER_CRYPTO: ret = "crypto driver"; break; +case K_OBJ_DRIVER_ADC: ret = "adc driver"; break; +case K_OBJ_DRIVER_AUXDISPLAY: ret = "auxdisplay driver"; break; +case K_OBJ_DRIVER_BBRAM: ret = "bbram driver"; break; +case K_OBJ_DRIVER_BIOMETRIC: ret = "biometric driver"; break; +case K_OBJ_DRIVER_BT_HCI: ret = "bt_hci driver"; break; +case K_OBJ_DRIVER_CAN: ret = "can driver"; break; +case K_OBJ_DRIVER_CELLULAR: ret = "cellular driver"; break; +case K_OBJ_DRIVER_CHARGER: ret = "charger driver"; break; +case K_OBJ_DRIVER_CLOCK_CONTROL: ret = "clock_control driver"; break; +case K_OBJ_DRIVER_COMPARATOR: ret = "comparator driver"; break; +case K_OBJ_DRIVER_COREDUMP: ret = "coredump driver"; break; +case K_OBJ_DRIVER_COUNTER: ret = "counter driver"; break; +case K_OBJ_DRIVER_CRC: ret = "crc driver"; break; +case K_OBJ_DRIVER_DAC: ret = "dac driver"; break; +case K_OBJ_DRIVER_DAI: ret = "dai driver"; break; +case K_OBJ_DRIVER_DISPLAY: ret = "display driver"; break; +case K_OBJ_DRIVER_DMA: ret = "dma driver"; break; +case K_OBJ_DRIVER_EDAC: ret = "edac driver"; break; +case K_OBJ_DRIVER_EEPROM: ret = "eeprom driver"; break; +case K_OBJ_DRIVER_EMUL_BBRAM: ret = "emul_bbram driver"; break; +case K_OBJ_DRIVER_FUEL_GAUGE_EMUL: ret = "fuel_gauge_emul driver"; break; +case K_OBJ_DRIVER_EMUL_SENSOR: ret = "emul_sensor driver"; break; +case K_OBJ_DRIVER_ENTROPY: ret = "entropy driver"; break; +case K_OBJ_DRIVER_ESPI: ret = "espi driver"; break; +case K_OBJ_DRIVER_ESPI_SAF: ret = "espi_saf driver"; break; +case K_OBJ_DRIVER_FPGA: ret = "fpga driver"; break; +case K_OBJ_DRIVER_FUEL_GAUGE: ret = "fuel_gauge driver"; break; +case K_OBJ_DRIVER_GNSS: ret = "gnss driver"; break; +case K_OBJ_DRIVER_GPIO: ret = "gpio driver"; break; +case K_OBJ_DRIVER_HAPTICS: ret = "haptics driver"; break; +case K_OBJ_DRIVER_HWSPINLOCK: ret = "hwspinlock driver"; break; +case K_OBJ_DRIVER_I2C: ret = "i2c driver"; break; +case K_OBJ_DRIVER_I2C_TARGET: ret = "i2c_target driver"; break; +case K_OBJ_DRIVER_I2S: ret = "i2s driver"; break; +case K_OBJ_DRIVER_I3C: ret = "i3c driver"; break; +case K_OBJ_DRIVER_IPM: ret = "ipm driver"; break; +case K_OBJ_DRIVER_LED: ret = "led driver"; break; +case K_OBJ_DRIVER_LED_STRIP: ret = "led_strip driver"; break; +case K_OBJ_DRIVER_LORA: ret = "lora driver"; break; +case K_OBJ_DRIVER_MBOX: ret = "mbox driver"; break; +case K_OBJ_DRIVER_MDIO: ret = "mdio driver"; break; +case K_OBJ_DRIVER_MIPI_DBI: ret = "mipi_dbi driver"; break; +case K_OBJ_DRIVER_MIPI_DSI: ret = "mipi_dsi driver"; break; +case K_OBJ_DRIVER_MSPI: ret = "mspi driver"; break; +case K_OBJ_DRIVER_OPAMP: ret = "opamp driver"; break; +case K_OBJ_DRIVER_OTP: ret = "otp driver"; break; +case K_OBJ_DRIVER_PECI: ret = "peci driver"; break; +case K_OBJ_DRIVER_PS2: ret = "ps2 driver"; break; +case K_OBJ_DRIVER_PTP_CLOCK: ret = "ptp_clock driver"; break; +case K_OBJ_DRIVER_PWM: ret = "pwm driver"; break; +case K_OBJ_DRIVER_REGULATOR_PARENT: ret = "regulator_parent driver"; break; +case K_OBJ_DRIVER_REGULATOR: ret = "regulator driver"; break; +case K_OBJ_DRIVER_RESET: ret = "reset driver"; break; +case K_OBJ_DRIVER_RETAINED_MEM: ret = "retained_mem driver"; break; +case K_OBJ_DRIVER_RTC: ret = "rtc driver"; break; +case K_OBJ_DRIVER_SDHC: ret = "sdhc driver"; break; +case K_OBJ_DRIVER_SENSOR: ret = "sensor driver"; break; +case K_OBJ_DRIVER_SMBUS: ret = "smbus driver"; break; +case K_OBJ_DRIVER_SPI: ret = "spi driver"; break; +case K_OBJ_DRIVER_SYSCON: ret = "syscon driver"; break; +case K_OBJ_DRIVER_TEE: ret = "tee driver"; break; +case K_OBJ_DRIVER_TGPIO: ret = "tgpio driver"; break; +case K_OBJ_DRIVER_UAOL: ret = "uaol driver"; break; +case K_OBJ_DRIVER_VIDEO: ret = "video driver"; break; +case K_OBJ_DRIVER_VIRTIO: ret = "virtio driver"; break; +case K_OBJ_DRIVER_W1: ret = "w1 driver"; break; +case K_OBJ_DRIVER_WDT: ret = "wdt driver"; break; +case K_OBJ_DRIVER_WUC: ret = "wuc driver"; break; +case K_OBJ_DRIVER_CAN_TRANSCEIVER: ret = "can_transceiver driver"; break; +case K_OBJ_DRIVER_NRF_CLOCK_CONTROL: ret = "nrf_clock_control driver"; break; +case K_OBJ_DRIVER_I3C_TARGET: ret = "i3c_target driver"; break; +case K_OBJ_DRIVER_ITS: ret = "its driver"; break; +case K_OBJ_DRIVER_VTD: ret = "vtd driver"; break; +case K_OBJ_DRIVER_RENESAS_ELC: ret = "renesas_elc driver"; break; +case K_OBJ_DRIVER_PCIE_CTRL: ret = "pcie_ctrl driver"; break; +case K_OBJ_DRIVER_PCIE_EP: ret = "pcie_ep driver"; break; +case K_OBJ_DRIVER_PSI5: ret = "psi5 driver"; break; +case K_OBJ_DRIVER_SENT: ret = "sent driver"; break; +case K_OBJ_DRIVER_SVC: ret = "svc driver"; break; +case K_OBJ_DRIVER_STEPPER: ret = "stepper driver"; break; +case K_OBJ_DRIVER_STEPPER_CTRL: ret = "stepper_ctrl driver"; break; +case K_OBJ_DRIVER_UART: ret = "uart driver"; break; +case K_OBJ_DRIVER_BC12_EMUL: ret = "bc12_emul driver"; break; +case K_OBJ_DRIVER_BC12: ret = "bc12 driver"; break; +case K_OBJ_DRIVER_USBC_PPC: ret = "usbc_ppc driver"; break; +case K_OBJ_DRIVER_TCPC: ret = "tcpc driver"; break; +case K_OBJ_DRIVER_USBC_VBUS: ret = "usbc_vbus driver"; break; +case K_OBJ_DRIVER_IVSHMEM: ret = "ivshmem driver"; break; +case K_OBJ_DRIVER_ETHPHY: ret = "ethphy driver"; break; diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_dispatch.c b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_dispatch.c new file mode 100644 index 0000000..277715c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_dispatch.c @@ -0,0 +1,697 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#include + +/* Weak handler functions that get replaced by the real ones unless a system + * call is not implemented due to kernel configuration. + */ + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_read_stdin(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_write_stdout(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_fputc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_fwrite(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_sys_clock_getrtoffset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_sys_clock_settime(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_sys_clock_nanosleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_sys_mutex_kernel_lock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_sys_mutex_kernel_unlock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_simple_create_0(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_simple_create_1(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_simple_create_2(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_static_create(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_panic(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_process(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_buffered_cnt(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_filter_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_frontend_filter_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_write(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_erase(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_fill(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_flatten(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_page_info_by_offs(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_page_info_by_idx(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_page_count(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_sfdp_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_read_jedec_id(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_write_block_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_parameters(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_ex_op(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_copy(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_get_binding(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_is_ready(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_deinit(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_get_by_dt_nodelabel(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_stack_alloc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_stack_free(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_create(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_stack_space_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_runtime_stack_unused_threshold_pct_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_runtime_stack_unused_threshold_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_runtime_stack_unused_threshold_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_join(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_usleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_busy_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_yield(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_wakeup(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sched_current_thread_query(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_abort(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_timeout_expires_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_timeout_remaining_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_priority_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_priority_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_deadline_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_absolute_deadline_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_reschedule(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_suspend(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_resume(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_is_preempt_thread(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_custom_data_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_custom_data_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_name_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_name_copy(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_start(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_stop(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_status_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_status_sync(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_expires_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_remaining_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_user_data_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_user_data_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_uptime_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_cancel_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_alloc_append(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_alloc_prepend(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_is_empty(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_peek_head(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_peek_tail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_futex_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_futex_wake(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_post(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_set_masked(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_clear(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_wait_all(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_wait_safe(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_wait_all_safe(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_stack_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_stack_push(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_stack_pop(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_mutex_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_mutex_lock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_mutex_unlock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_signal(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_broadcast(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_take(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_give(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_count_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_put(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_put_front(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_peek(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_peek_at(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_purge(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_num_free_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_get_attrs(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_num_used_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_write(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_close(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_check(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_raise(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_str_out(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_float_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_float_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_object_access_check(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_object_alloc_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_sys_clock_hw_cycles_per_sec_runtime_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); +extern uintptr_t z_mrsh_k_object_release(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); +extern uintptr_t z_mrsh_k_object_access_grant(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); +extern uintptr_t z_mrsh_k_object_alloc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +const _k_syscall_handler_t _k_syscall_table[K_SYSCALL_LIMIT] = { + [K_SYSCALL_ZEPHYR_READ_STDIN] = z_mrsh_zephyr_read_stdin, + [K_SYSCALL_ZEPHYR_WRITE_STDOUT] = z_mrsh_zephyr_write_stdout, + [K_SYSCALL_ZEPHYR_FPUTC] = z_mrsh_zephyr_fputc, + [K_SYSCALL_ZEPHYR_FWRITE] = z_mrsh_zephyr_fwrite, + [K_SYSCALL_SYS_CLOCK_GETRTOFFSET] = z_mrsh_sys_clock_getrtoffset, + [K_SYSCALL_SYS_CLOCK_SETTIME] = z_mrsh_sys_clock_settime, + [K_SYSCALL_SYS_CLOCK_NANOSLEEP] = z_mrsh_sys_clock_nanosleep, + [K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK] = z_mrsh_z_sys_mutex_kernel_lock, + [K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK] = z_mrsh_z_sys_mutex_kernel_unlock, + [K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0] = z_mrsh_z_log_msg_simple_create_0, + [K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1] = z_mrsh_z_log_msg_simple_create_1, + [K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2] = z_mrsh_z_log_msg_simple_create_2, + [K_SYSCALL_Z_LOG_MSG_STATIC_CREATE] = z_mrsh_z_log_msg_static_create, + [K_SYSCALL_LOG_PANIC] = z_mrsh_log_panic, + [K_SYSCALL_LOG_PROCESS] = z_mrsh_log_process, + [K_SYSCALL_LOG_BUFFERED_CNT] = z_mrsh_log_buffered_cnt, + [K_SYSCALL_LOG_FILTER_SET] = z_mrsh_log_filter_set, + [K_SYSCALL_LOG_FRONTEND_FILTER_SET] = z_mrsh_log_frontend_filter_set, + [K_SYSCALL_FLASH_READ] = z_mrsh_flash_read, + [K_SYSCALL_FLASH_WRITE] = z_mrsh_flash_write, + [K_SYSCALL_FLASH_ERASE] = z_mrsh_flash_erase, + [K_SYSCALL_FLASH_GET_SIZE] = z_mrsh_flash_get_size, + [K_SYSCALL_FLASH_FILL] = z_mrsh_flash_fill, + [K_SYSCALL_FLASH_FLATTEN] = z_mrsh_flash_flatten, + [K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS] = z_mrsh_flash_get_page_info_by_offs, + [K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX] = z_mrsh_flash_get_page_info_by_idx, + [K_SYSCALL_FLASH_GET_PAGE_COUNT] = z_mrsh_flash_get_page_count, + [K_SYSCALL_FLASH_SFDP_READ] = z_mrsh_flash_sfdp_read, + [K_SYSCALL_FLASH_READ_JEDEC_ID] = z_mrsh_flash_read_jedec_id, + [K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE] = z_mrsh_flash_get_write_block_size, + [K_SYSCALL_FLASH_GET_PARAMETERS] = z_mrsh_flash_get_parameters, + [K_SYSCALL_FLASH_EX_OP] = z_mrsh_flash_ex_op, + [K_SYSCALL_FLASH_COPY] = z_mrsh_flash_copy, + [K_SYSCALL_DEVICE_GET_BINDING] = z_mrsh_device_get_binding, + [K_SYSCALL_DEVICE_IS_READY] = z_mrsh_device_is_ready, + [K_SYSCALL_DEVICE_INIT] = z_mrsh_device_init, + [K_SYSCALL_DEVICE_DEINIT] = z_mrsh_device_deinit, + [K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL] = z_mrsh_device_get_by_dt_nodelabel, + [K_SYSCALL_K_THREAD_STACK_ALLOC] = z_mrsh_k_thread_stack_alloc, + [K_SYSCALL_K_THREAD_STACK_FREE] = z_mrsh_k_thread_stack_free, + [K_SYSCALL_K_THREAD_CREATE] = z_mrsh_k_thread_create, + [K_SYSCALL_K_THREAD_STACK_SPACE_GET] = z_mrsh_k_thread_stack_space_get, + [K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_PCT_SET] = z_mrsh_k_thread_runtime_stack_unused_threshold_pct_set, + [K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_SET] = z_mrsh_k_thread_runtime_stack_unused_threshold_set, + [K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_GET] = z_mrsh_k_thread_runtime_stack_unused_threshold_get, + [K_SYSCALL_K_THREAD_JOIN] = z_mrsh_k_thread_join, + [K_SYSCALL_K_SLEEP] = z_mrsh_k_sleep, + [K_SYSCALL_K_USLEEP] = z_mrsh_k_usleep, + [K_SYSCALL_K_BUSY_WAIT] = z_mrsh_k_busy_wait, + [K_SYSCALL_K_YIELD] = z_mrsh_k_yield, + [K_SYSCALL_K_WAKEUP] = z_mrsh_k_wakeup, + [K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY] = z_mrsh_k_sched_current_thread_query, + [K_SYSCALL_K_THREAD_ABORT] = z_mrsh_k_thread_abort, + [K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS] = z_mrsh_k_thread_timeout_expires_ticks, + [K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS] = z_mrsh_k_thread_timeout_remaining_ticks, + [K_SYSCALL_K_THREAD_PRIORITY_GET] = z_mrsh_k_thread_priority_get, + [K_SYSCALL_K_THREAD_PRIORITY_SET] = z_mrsh_k_thread_priority_set, + [K_SYSCALL_K_THREAD_DEADLINE_SET] = z_mrsh_k_thread_deadline_set, + [K_SYSCALL_K_THREAD_ABSOLUTE_DEADLINE_SET] = z_mrsh_k_thread_absolute_deadline_set, + [K_SYSCALL_K_RESCHEDULE] = z_mrsh_k_reschedule, + [K_SYSCALL_K_THREAD_SUSPEND] = z_mrsh_k_thread_suspend, + [K_SYSCALL_K_THREAD_RESUME] = z_mrsh_k_thread_resume, + [K_SYSCALL_K_IS_PREEMPT_THREAD] = z_mrsh_k_is_preempt_thread, + [K_SYSCALL_K_THREAD_CUSTOM_DATA_SET] = z_mrsh_k_thread_custom_data_set, + [K_SYSCALL_K_THREAD_CUSTOM_DATA_GET] = z_mrsh_k_thread_custom_data_get, + [K_SYSCALL_K_THREAD_NAME_SET] = z_mrsh_k_thread_name_set, + [K_SYSCALL_K_THREAD_NAME_COPY] = z_mrsh_k_thread_name_copy, + [K_SYSCALL_K_TIMER_START] = z_mrsh_k_timer_start, + [K_SYSCALL_K_TIMER_STOP] = z_mrsh_k_timer_stop, + [K_SYSCALL_K_TIMER_STATUS_GET] = z_mrsh_k_timer_status_get, + [K_SYSCALL_K_TIMER_STATUS_SYNC] = z_mrsh_k_timer_status_sync, + [K_SYSCALL_K_TIMER_EXPIRES_TICKS] = z_mrsh_k_timer_expires_ticks, + [K_SYSCALL_K_TIMER_REMAINING_TICKS] = z_mrsh_k_timer_remaining_ticks, + [K_SYSCALL_K_TIMER_USER_DATA_SET] = z_mrsh_k_timer_user_data_set, + [K_SYSCALL_K_TIMER_USER_DATA_GET] = z_mrsh_k_timer_user_data_get, + [K_SYSCALL_K_UPTIME_TICKS] = z_mrsh_k_uptime_ticks, + [K_SYSCALL_K_QUEUE_INIT] = z_mrsh_k_queue_init, + [K_SYSCALL_K_QUEUE_CANCEL_WAIT] = z_mrsh_k_queue_cancel_wait, + [K_SYSCALL_K_QUEUE_ALLOC_APPEND] = z_mrsh_k_queue_alloc_append, + [K_SYSCALL_K_QUEUE_ALLOC_PREPEND] = z_mrsh_k_queue_alloc_prepend, + [K_SYSCALL_K_QUEUE_GET] = z_mrsh_k_queue_get, + [K_SYSCALL_K_QUEUE_IS_EMPTY] = z_mrsh_k_queue_is_empty, + [K_SYSCALL_K_QUEUE_PEEK_HEAD] = z_mrsh_k_queue_peek_head, + [K_SYSCALL_K_QUEUE_PEEK_TAIL] = z_mrsh_k_queue_peek_tail, + [K_SYSCALL_K_FUTEX_WAIT] = z_mrsh_k_futex_wait, + [K_SYSCALL_K_FUTEX_WAKE] = z_mrsh_k_futex_wake, + [K_SYSCALL_K_EVENT_INIT] = z_mrsh_k_event_init, + [K_SYSCALL_K_EVENT_POST] = z_mrsh_k_event_post, + [K_SYSCALL_K_EVENT_SET] = z_mrsh_k_event_set, + [K_SYSCALL_K_EVENT_SET_MASKED] = z_mrsh_k_event_set_masked, + [K_SYSCALL_K_EVENT_CLEAR] = z_mrsh_k_event_clear, + [K_SYSCALL_K_EVENT_WAIT] = z_mrsh_k_event_wait, + [K_SYSCALL_K_EVENT_WAIT_ALL] = z_mrsh_k_event_wait_all, + [K_SYSCALL_K_EVENT_WAIT_SAFE] = z_mrsh_k_event_wait_safe, + [K_SYSCALL_K_EVENT_WAIT_ALL_SAFE] = z_mrsh_k_event_wait_all_safe, + [K_SYSCALL_K_STACK_ALLOC_INIT] = z_mrsh_k_stack_alloc_init, + [K_SYSCALL_K_STACK_PUSH] = z_mrsh_k_stack_push, + [K_SYSCALL_K_STACK_POP] = z_mrsh_k_stack_pop, + [K_SYSCALL_K_MUTEX_INIT] = z_mrsh_k_mutex_init, + [K_SYSCALL_K_MUTEX_LOCK] = z_mrsh_k_mutex_lock, + [K_SYSCALL_K_MUTEX_UNLOCK] = z_mrsh_k_mutex_unlock, + [K_SYSCALL_K_CONDVAR_INIT] = z_mrsh_k_condvar_init, + [K_SYSCALL_K_CONDVAR_SIGNAL] = z_mrsh_k_condvar_signal, + [K_SYSCALL_K_CONDVAR_BROADCAST] = z_mrsh_k_condvar_broadcast, + [K_SYSCALL_K_CONDVAR_WAIT] = z_mrsh_k_condvar_wait, + [K_SYSCALL_K_SEM_INIT] = z_mrsh_k_sem_init, + [K_SYSCALL_K_SEM_TAKE] = z_mrsh_k_sem_take, + [K_SYSCALL_K_SEM_GIVE] = z_mrsh_k_sem_give, + [K_SYSCALL_K_SEM_RESET] = z_mrsh_k_sem_reset, + [K_SYSCALL_K_SEM_COUNT_GET] = z_mrsh_k_sem_count_get, + [K_SYSCALL_K_MSGQ_ALLOC_INIT] = z_mrsh_k_msgq_alloc_init, + [K_SYSCALL_K_MSGQ_PUT] = z_mrsh_k_msgq_put, + [K_SYSCALL_K_MSGQ_PUT_FRONT] = z_mrsh_k_msgq_put_front, + [K_SYSCALL_K_MSGQ_GET] = z_mrsh_k_msgq_get, + [K_SYSCALL_K_MSGQ_PEEK] = z_mrsh_k_msgq_peek, + [K_SYSCALL_K_MSGQ_PEEK_AT] = z_mrsh_k_msgq_peek_at, + [K_SYSCALL_K_MSGQ_PURGE] = z_mrsh_k_msgq_purge, + [K_SYSCALL_K_MSGQ_NUM_FREE_GET] = z_mrsh_k_msgq_num_free_get, + [K_SYSCALL_K_MSGQ_GET_ATTRS] = z_mrsh_k_msgq_get_attrs, + [K_SYSCALL_K_MSGQ_NUM_USED_GET] = z_mrsh_k_msgq_num_used_get, + [K_SYSCALL_K_PIPE_INIT] = z_mrsh_k_pipe_init, + [K_SYSCALL_K_PIPE_WRITE] = z_mrsh_k_pipe_write, + [K_SYSCALL_K_PIPE_READ] = z_mrsh_k_pipe_read, + [K_SYSCALL_K_PIPE_RESET] = z_mrsh_k_pipe_reset, + [K_SYSCALL_K_PIPE_CLOSE] = z_mrsh_k_pipe_close, + [K_SYSCALL_K_POLL] = z_mrsh_k_poll, + [K_SYSCALL_K_POLL_SIGNAL_INIT] = z_mrsh_k_poll_signal_init, + [K_SYSCALL_K_POLL_SIGNAL_RESET] = z_mrsh_k_poll_signal_reset, + [K_SYSCALL_K_POLL_SIGNAL_CHECK] = z_mrsh_k_poll_signal_check, + [K_SYSCALL_K_POLL_SIGNAL_RAISE] = z_mrsh_k_poll_signal_raise, + [K_SYSCALL_K_STR_OUT] = z_mrsh_k_str_out, + [K_SYSCALL_K_FLOAT_DISABLE] = z_mrsh_k_float_disable, + [K_SYSCALL_K_FLOAT_ENABLE] = z_mrsh_k_float_enable, + [K_SYSCALL_K_OBJECT_ACCESS_GRANT] = z_mrsh_k_object_access_grant, + [K_SYSCALL_K_OBJECT_RELEASE] = z_mrsh_k_object_release, + [K_SYSCALL_K_OBJECT_ACCESS_CHECK] = z_mrsh_k_object_access_check, + [K_SYSCALL_K_OBJECT_ALLOC] = z_mrsh_k_object_alloc, + [K_SYSCALL_K_OBJECT_ALLOC_SIZE] = z_mrsh_k_object_alloc_size, + [K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET] = z_mrsh_sys_clock_hw_cycles_per_sec_runtime_get, + [K_SYSCALL_BAD] = handler_bad_syscall +}; diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_exports_llext.c b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_exports_llext.c new file mode 100644 index 0000000..f587d5f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_exports_llext.c @@ -0,0 +1,289 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +/* + * Export the implementation functions of all emitted syscalls. + * Only the symbol names are relevant in this file, they will be + * resolved to the actual implementation functions by the linker. + */ + +/* Symbol declarations */ +extern void * const z_impl_device_deinit; +extern void * const z_impl_device_get_binding; +extern void * const z_impl_device_get_by_dt_nodelabel; +extern void * const z_impl_device_init; +extern void * const z_impl_device_is_ready; +extern void * const z_impl_flash_copy; +extern void * const z_impl_flash_erase; +extern void * const z_impl_flash_ex_op; +extern void * const z_impl_flash_fill; +extern void * const z_impl_flash_flatten; +extern void * const z_impl_flash_get_page_count; +extern void * const z_impl_flash_get_page_info_by_idx; +extern void * const z_impl_flash_get_page_info_by_offs; +extern void * const z_impl_flash_get_parameters; +extern void * const z_impl_flash_get_size; +extern void * const z_impl_flash_get_write_block_size; +extern void * const z_impl_flash_read; +extern void * const z_impl_flash_read_jedec_id; +extern void * const z_impl_flash_sfdp_read; +extern void * const z_impl_flash_write; +extern void * const z_impl_k_busy_wait; +extern void * const z_impl_k_condvar_broadcast; +extern void * const z_impl_k_condvar_init; +extern void * const z_impl_k_condvar_signal; +extern void * const z_impl_k_condvar_wait; +extern void * const z_impl_k_event_clear; +extern void * const z_impl_k_event_init; +extern void * const z_impl_k_event_post; +extern void * const z_impl_k_event_set; +extern void * const z_impl_k_event_set_masked; +extern void * const z_impl_k_event_wait; +extern void * const z_impl_k_event_wait_all; +extern void * const z_impl_k_event_wait_all_safe; +extern void * const z_impl_k_event_wait_safe; +extern void * const z_impl_k_float_disable; +extern void * const z_impl_k_float_enable; +extern void * const z_impl_k_futex_wait; +extern void * const z_impl_k_futex_wake; +extern void * const z_impl_k_is_preempt_thread; +extern void * const z_impl_k_msgq_alloc_init; +extern void * const z_impl_k_msgq_get; +extern void * const z_impl_k_msgq_get_attrs; +extern void * const z_impl_k_msgq_num_free_get; +extern void * const z_impl_k_msgq_num_used_get; +extern void * const z_impl_k_msgq_peek; +extern void * const z_impl_k_msgq_peek_at; +extern void * const z_impl_k_msgq_purge; +extern void * const z_impl_k_msgq_put; +extern void * const z_impl_k_msgq_put_front; +extern void * const z_impl_k_mutex_init; +extern void * const z_impl_k_mutex_lock; +extern void * const z_impl_k_mutex_unlock; +extern void * const z_impl_k_object_access_check; +extern void * const z_impl_k_object_access_grant; +extern void * const z_impl_k_object_alloc; +extern void * const z_impl_k_object_alloc_size; +extern void * const z_impl_k_object_release; +extern void * const z_impl_k_pipe_close; +extern void * const z_impl_k_pipe_init; +extern void * const z_impl_k_pipe_read; +extern void * const z_impl_k_pipe_reset; +extern void * const z_impl_k_pipe_write; +extern void * const z_impl_k_poll; +extern void * const z_impl_k_poll_signal_check; +extern void * const z_impl_k_poll_signal_init; +extern void * const z_impl_k_poll_signal_raise; +extern void * const z_impl_k_poll_signal_reset; +extern void * const z_impl_k_queue_alloc_append; +extern void * const z_impl_k_queue_alloc_prepend; +extern void * const z_impl_k_queue_cancel_wait; +extern void * const z_impl_k_queue_get; +extern void * const z_impl_k_queue_init; +extern void * const z_impl_k_queue_is_empty; +extern void * const z_impl_k_queue_peek_head; +extern void * const z_impl_k_queue_peek_tail; +extern void * const z_impl_k_reschedule; +extern void * const z_impl_k_sched_current_thread_query; +extern void * const z_impl_k_sem_count_get; +extern void * const z_impl_k_sem_give; +extern void * const z_impl_k_sem_init; +extern void * const z_impl_k_sem_reset; +extern void * const z_impl_k_sem_take; +extern void * const z_impl_k_sleep; +extern void * const z_impl_k_stack_alloc_init; +extern void * const z_impl_k_stack_pop; +extern void * const z_impl_k_stack_push; +extern void * const z_impl_k_str_out; +extern void * const z_impl_k_thread_abort; +extern void * const z_impl_k_thread_absolute_deadline_set; +extern void * const z_impl_k_thread_create; +extern void * const z_impl_k_thread_custom_data_get; +extern void * const z_impl_k_thread_custom_data_set; +extern void * const z_impl_k_thread_deadline_set; +extern void * const z_impl_k_thread_join; +extern void * const z_impl_k_thread_name_copy; +extern void * const z_impl_k_thread_name_set; +extern void * const z_impl_k_thread_priority_get; +extern void * const z_impl_k_thread_priority_set; +extern void * const z_impl_k_thread_resume; +extern void * const z_impl_k_thread_runtime_stack_unused_threshold_get; +extern void * const z_impl_k_thread_runtime_stack_unused_threshold_pct_set; +extern void * const z_impl_k_thread_runtime_stack_unused_threshold_set; +extern void * const z_impl_k_thread_stack_alloc; +extern void * const z_impl_k_thread_stack_free; +extern void * const z_impl_k_thread_stack_space_get; +extern void * const z_impl_k_thread_suspend; +extern void * const z_impl_k_thread_timeout_expires_ticks; +extern void * const z_impl_k_thread_timeout_remaining_ticks; +extern void * const z_impl_k_timer_expires_ticks; +extern void * const z_impl_k_timer_remaining_ticks; +extern void * const z_impl_k_timer_start; +extern void * const z_impl_k_timer_status_get; +extern void * const z_impl_k_timer_status_sync; +extern void * const z_impl_k_timer_stop; +extern void * const z_impl_k_timer_user_data_get; +extern void * const z_impl_k_timer_user_data_set; +extern void * const z_impl_k_uptime_ticks; +extern void * const z_impl_k_usleep; +extern void * const z_impl_k_wakeup; +extern void * const z_impl_k_yield; +extern void * const z_impl_log_buffered_cnt; +extern void * const z_impl_log_filter_set; +extern void * const z_impl_log_frontend_filter_set; +extern void * const z_impl_log_panic; +extern void * const z_impl_log_process; +extern void * const z_impl_sys_clock_getrtoffset; +extern void * const z_impl_sys_clock_hw_cycles_per_sec_runtime_get; +extern void * const z_impl_sys_clock_nanosleep; +extern void * const z_impl_sys_clock_settime; +extern void * const z_impl_z_log_msg_simple_create_0; +extern void * const z_impl_z_log_msg_simple_create_1; +extern void * const z_impl_z_log_msg_simple_create_2; +extern void * const z_impl_z_log_msg_static_create; +extern void * const z_impl_z_sys_mutex_kernel_lock; +extern void * const z_impl_z_sys_mutex_kernel_unlock; +extern void * const z_impl_zephyr_fputc; +extern void * const z_impl_zephyr_fwrite; +extern void * const z_impl_zephyr_read_stdin; +extern void * const z_impl_zephyr_write_stdout; + +/* Exported symbols */ +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_device_deinit); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_device_get_binding); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_device_get_by_dt_nodelabel); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_device_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_device_is_ready); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_copy); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_erase); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_ex_op); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_fill); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_flatten); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_get_page_count); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_get_page_info_by_idx); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_get_page_info_by_offs); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_get_parameters); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_get_size); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_get_write_block_size); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_read); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_read_jedec_id); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_sfdp_read); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_flash_write); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_busy_wait); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_condvar_broadcast); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_condvar_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_condvar_signal); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_condvar_wait); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_clear); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_post); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_set_masked); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_wait); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_wait_all); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_wait_all_safe); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_event_wait_safe); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_float_disable); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_float_enable); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_futex_wait); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_futex_wake); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_is_preempt_thread); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_alloc_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_get_attrs); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_num_free_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_num_used_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_peek); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_peek_at); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_purge); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_put); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_msgq_put_front); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_mutex_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_mutex_lock); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_mutex_unlock); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_object_access_check); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_object_access_grant); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_object_alloc); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_object_alloc_size); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_object_release); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_pipe_close); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_pipe_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_pipe_read); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_pipe_reset); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_pipe_write); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_poll); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_poll_signal_check); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_poll_signal_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_poll_signal_raise); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_poll_signal_reset); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_alloc_append); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_alloc_prepend); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_cancel_wait); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_is_empty); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_peek_head); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_queue_peek_tail); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_reschedule); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sched_current_thread_query); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sem_count_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sem_give); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sem_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sem_reset); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sem_take); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_sleep); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_stack_alloc_init); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_stack_pop); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_stack_push); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_str_out); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_abort); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_absolute_deadline_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_create); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_custom_data_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_custom_data_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_deadline_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_join); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_name_copy); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_name_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_priority_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_priority_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_resume); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_runtime_stack_unused_threshold_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_runtime_stack_unused_threshold_pct_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_runtime_stack_unused_threshold_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_stack_alloc); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_stack_free); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_stack_space_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_suspend); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_timeout_expires_ticks); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_thread_timeout_remaining_ticks); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_expires_ticks); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_remaining_ticks); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_start); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_status_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_status_sync); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_stop); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_user_data_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_timer_user_data_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_uptime_ticks); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_usleep); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_wakeup); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_k_yield); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_log_buffered_cnt); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_log_filter_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_log_frontend_filter_set); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_log_panic); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_log_process); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_sys_clock_getrtoffset); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_sys_clock_hw_cycles_per_sec_runtime_get); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_sys_clock_nanosleep); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_sys_clock_settime); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_z_log_msg_simple_create_0); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_z_log_msg_simple_create_1); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_z_log_msg_simple_create_2); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_z_log_msg_static_create); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_z_sys_mutex_kernel_lock); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_z_sys_mutex_kernel_unlock); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_zephyr_fputc); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_zephyr_fwrite); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_zephyr_read_stdin); +EXPORT_GROUP_SYMBOL(SYSCALL, z_impl_zephyr_write_stdout); diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_list.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_list.h new file mode 100644 index 0000000..8506f9a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscall_list.h @@ -0,0 +1,664 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef ZEPHYR_SYSCALL_LIST_H +#define ZEPHYR_SYSCALL_LIST_H + +#define K_SYSCALL_DEVICE_DEINIT 0 +#define K_SYSCALL_DEVICE_GET_BINDING 1 +#define K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL 2 +#define K_SYSCALL_DEVICE_INIT 3 +#define K_SYSCALL_DEVICE_IS_READY 4 +#define K_SYSCALL_FLASH_COPY 5 +#define K_SYSCALL_FLASH_ERASE 6 +#define K_SYSCALL_FLASH_EX_OP 7 +#define K_SYSCALL_FLASH_FILL 8 +#define K_SYSCALL_FLASH_FLATTEN 9 +#define K_SYSCALL_FLASH_GET_PAGE_COUNT 10 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 11 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 12 +#define K_SYSCALL_FLASH_GET_PARAMETERS 13 +#define K_SYSCALL_FLASH_GET_SIZE 14 +#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 15 +#define K_SYSCALL_FLASH_READ 16 +#define K_SYSCALL_FLASH_READ_JEDEC_ID 17 +#define K_SYSCALL_FLASH_SFDP_READ 18 +#define K_SYSCALL_FLASH_WRITE 19 +#define K_SYSCALL_K_BUSY_WAIT 20 +#define K_SYSCALL_K_CONDVAR_BROADCAST 21 +#define K_SYSCALL_K_CONDVAR_INIT 22 +#define K_SYSCALL_K_CONDVAR_SIGNAL 23 +#define K_SYSCALL_K_CONDVAR_WAIT 24 +#define K_SYSCALL_K_EVENT_CLEAR 25 +#define K_SYSCALL_K_EVENT_INIT 26 +#define K_SYSCALL_K_EVENT_POST 27 +#define K_SYSCALL_K_EVENT_SET 28 +#define K_SYSCALL_K_EVENT_SET_MASKED 29 +#define K_SYSCALL_K_EVENT_WAIT 30 +#define K_SYSCALL_K_EVENT_WAIT_ALL 31 +#define K_SYSCALL_K_EVENT_WAIT_ALL_SAFE 32 +#define K_SYSCALL_K_EVENT_WAIT_SAFE 33 +#define K_SYSCALL_K_FLOAT_DISABLE 34 +#define K_SYSCALL_K_FLOAT_ENABLE 35 +#define K_SYSCALL_K_FUTEX_WAIT 36 +#define K_SYSCALL_K_FUTEX_WAKE 37 +#define K_SYSCALL_K_IS_PREEMPT_THREAD 38 +#define K_SYSCALL_K_MSGQ_ALLOC_INIT 39 +#define K_SYSCALL_K_MSGQ_GET 40 +#define K_SYSCALL_K_MSGQ_GET_ATTRS 41 +#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 42 +#define K_SYSCALL_K_MSGQ_NUM_USED_GET 43 +#define K_SYSCALL_K_MSGQ_PEEK 44 +#define K_SYSCALL_K_MSGQ_PEEK_AT 45 +#define K_SYSCALL_K_MSGQ_PURGE 46 +#define K_SYSCALL_K_MSGQ_PUT 47 +#define K_SYSCALL_K_MSGQ_PUT_FRONT 48 +#define K_SYSCALL_K_MUTEX_INIT 49 +#define K_SYSCALL_K_MUTEX_LOCK 50 +#define K_SYSCALL_K_MUTEX_UNLOCK 51 +#define K_SYSCALL_K_OBJECT_ACCESS_CHECK 52 +#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 53 +#define K_SYSCALL_K_OBJECT_ALLOC 54 +#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 55 +#define K_SYSCALL_K_OBJECT_RELEASE 56 +#define K_SYSCALL_K_PIPE_CLOSE 57 +#define K_SYSCALL_K_PIPE_INIT 58 +#define K_SYSCALL_K_PIPE_READ 59 +#define K_SYSCALL_K_PIPE_RESET 60 +#define K_SYSCALL_K_PIPE_WRITE 61 +#define K_SYSCALL_K_POLL 62 +#define K_SYSCALL_K_POLL_SIGNAL_CHECK 63 +#define K_SYSCALL_K_POLL_SIGNAL_INIT 64 +#define K_SYSCALL_K_POLL_SIGNAL_RAISE 65 +#define K_SYSCALL_K_POLL_SIGNAL_RESET 66 +#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 67 +#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 68 +#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 69 +#define K_SYSCALL_K_QUEUE_GET 70 +#define K_SYSCALL_K_QUEUE_INIT 71 +#define K_SYSCALL_K_QUEUE_IS_EMPTY 72 +#define K_SYSCALL_K_QUEUE_PEEK_HEAD 73 +#define K_SYSCALL_K_QUEUE_PEEK_TAIL 74 +#define K_SYSCALL_K_RESCHEDULE 75 +#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 76 +#define K_SYSCALL_K_SEM_COUNT_GET 77 +#define K_SYSCALL_K_SEM_GIVE 78 +#define K_SYSCALL_K_SEM_INIT 79 +#define K_SYSCALL_K_SEM_RESET 80 +#define K_SYSCALL_K_SEM_TAKE 81 +#define K_SYSCALL_K_SLEEP 82 +#define K_SYSCALL_K_STACK_ALLOC_INIT 83 +#define K_SYSCALL_K_STACK_POP 84 +#define K_SYSCALL_K_STACK_PUSH 85 +#define K_SYSCALL_K_STR_OUT 86 +#define K_SYSCALL_K_THREAD_ABORT 87 +#define K_SYSCALL_K_THREAD_ABSOLUTE_DEADLINE_SET 88 +#define K_SYSCALL_K_THREAD_CREATE 89 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 90 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 91 +#define K_SYSCALL_K_THREAD_DEADLINE_SET 92 +#define K_SYSCALL_K_THREAD_JOIN 93 +#define K_SYSCALL_K_THREAD_NAME_COPY 94 +#define K_SYSCALL_K_THREAD_NAME_SET 95 +#define K_SYSCALL_K_THREAD_PRIORITY_GET 96 +#define K_SYSCALL_K_THREAD_PRIORITY_SET 97 +#define K_SYSCALL_K_THREAD_RESUME 98 +#define K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_GET 99 +#define K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_PCT_SET 100 +#define K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_SET 101 +#define K_SYSCALL_K_THREAD_STACK_ALLOC 102 +#define K_SYSCALL_K_THREAD_STACK_FREE 103 +#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 104 +#define K_SYSCALL_K_THREAD_SUSPEND 105 +#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 106 +#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 107 +#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 108 +#define K_SYSCALL_K_TIMER_REMAINING_TICKS 109 +#define K_SYSCALL_K_TIMER_START 110 +#define K_SYSCALL_K_TIMER_STATUS_GET 111 +#define K_SYSCALL_K_TIMER_STATUS_SYNC 112 +#define K_SYSCALL_K_TIMER_STOP 113 +#define K_SYSCALL_K_TIMER_USER_DATA_GET 114 +#define K_SYSCALL_K_TIMER_USER_DATA_SET 115 +#define K_SYSCALL_K_UPTIME_TICKS 116 +#define K_SYSCALL_K_USLEEP 117 +#define K_SYSCALL_K_WAKEUP 118 +#define K_SYSCALL_K_YIELD 119 +#define K_SYSCALL_LOG_BUFFERED_CNT 120 +#define K_SYSCALL_LOG_FILTER_SET 121 +#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 122 +#define K_SYSCALL_LOG_PANIC 123 +#define K_SYSCALL_LOG_PROCESS 124 +#define K_SYSCALL_SYS_CLOCK_GETRTOFFSET 125 +#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 126 +#define K_SYSCALL_SYS_CLOCK_NANOSLEEP 127 +#define K_SYSCALL_SYS_CLOCK_SETTIME 128 +#define K_SYSCALL_ZEPHYR_FPUTC 129 +#define K_SYSCALL_ZEPHYR_FWRITE 130 +#define K_SYSCALL_ZEPHYR_READ_STDIN 131 +#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 132 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 133 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 134 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 135 +#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 136 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 137 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 138 +#define K_SYSCALL_BAD 139 +#define K_SYSCALL_LIMIT 140 + + +/* Following syscalls are not used in image */ +#define K_SYSCALL_ADC_CHANNEL_SETUP 141 +#define K_SYSCALL_ADC_GET_DECODER 142 +#define K_SYSCALL_ADC_READ 143 +#define K_SYSCALL_ADC_READ_ASYNC 144 +#define K_SYSCALL_ATOMIC_ADD 145 +#define K_SYSCALL_ATOMIC_AND 146 +#define K_SYSCALL_ATOMIC_CAS 147 +#define K_SYSCALL_ATOMIC_NAND 148 +#define K_SYSCALL_ATOMIC_OR 149 +#define K_SYSCALL_ATOMIC_PTR_CAS 150 +#define K_SYSCALL_ATOMIC_PTR_SET 151 +#define K_SYSCALL_ATOMIC_SET 152 +#define K_SYSCALL_ATOMIC_SUB 153 +#define K_SYSCALL_ATOMIC_XOR 154 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 155 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 156 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 157 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 158 +#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 159 +#define K_SYSCALL_AUXDISPLAY_CLEAR 160 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 161 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 162 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 163 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 164 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 165 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 166 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 167 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 168 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 169 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 170 +#define K_SYSCALL_AUXDISPLAY_IS_BUSY 171 +#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 172 +#define K_SYSCALL_AUXDISPLAY_WRITE 173 +#define K_SYSCALL_BBRAM_CHECK_INVALID 174 +#define K_SYSCALL_BBRAM_CHECK_POWER 175 +#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 176 +#define K_SYSCALL_BBRAM_GET_SIZE 177 +#define K_SYSCALL_BBRAM_READ 178 +#define K_SYSCALL_BBRAM_WRITE 179 +#define K_SYSCALL_BC12_SET_RESULT_CB 180 +#define K_SYSCALL_BC12_SET_ROLE 181 +#define K_SYSCALL_BIOMETRIC_ATTR_GET 182 +#define K_SYSCALL_BIOMETRIC_ATTR_SET 183 +#define K_SYSCALL_BIOMETRIC_ENROLL_ABORT 184 +#define K_SYSCALL_BIOMETRIC_ENROLL_CAPTURE 185 +#define K_SYSCALL_BIOMETRIC_ENROLL_FINALIZE 186 +#define K_SYSCALL_BIOMETRIC_ENROLL_START 187 +#define K_SYSCALL_BIOMETRIC_GET_CAPABILITIES 188 +#define K_SYSCALL_BIOMETRIC_LED_CONTROL 189 +#define K_SYSCALL_BIOMETRIC_MATCH 190 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE 191 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE_ALL 192 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_LIST 193 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_READ 194 +#define K_SYSCALL_BIOMETRIC_TEMPLATE_STORE 195 +#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 196 +#define K_SYSCALL_CAN_CALC_TIMING 197 +#define K_SYSCALL_CAN_CALC_TIMING_DATA 198 +#define K_SYSCALL_CAN_GET_BITRATE_MAX 199 +#define K_SYSCALL_CAN_GET_BITRATE_MIN 200 +#define K_SYSCALL_CAN_GET_CAPABILITIES 201 +#define K_SYSCALL_CAN_GET_CORE_CLOCK 202 +#define K_SYSCALL_CAN_GET_MAX_FILTERS 203 +#define K_SYSCALL_CAN_GET_MODE 204 +#define K_SYSCALL_CAN_GET_STATE 205 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 206 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 207 +#define K_SYSCALL_CAN_GET_TIMING_MAX 208 +#define K_SYSCALL_CAN_GET_TIMING_MIN 209 +#define K_SYSCALL_CAN_GET_TRANSCEIVER 210 +#define K_SYSCALL_CAN_RECOVER 211 +#define K_SYSCALL_CAN_REMOVE_RX_FILTER 212 +#define K_SYSCALL_CAN_SEND 213 +#define K_SYSCALL_CAN_SET_BITRATE 214 +#define K_SYSCALL_CAN_SET_BITRATE_DATA 215 +#define K_SYSCALL_CAN_SET_MODE 216 +#define K_SYSCALL_CAN_SET_TIMING 217 +#define K_SYSCALL_CAN_SET_TIMING_DATA 218 +#define K_SYSCALL_CAN_START 219 +#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 220 +#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 221 +#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 222 +#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 223 +#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 224 +#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 225 +#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 226 +#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 227 +#define K_SYSCALL_CAN_STOP 228 +#define K_SYSCALL_CHARGER_CHARGE_ENABLE 229 +#define K_SYSCALL_CHARGER_GET_PROP 230 +#define K_SYSCALL_CHARGER_SET_PROP 231 +#define K_SYSCALL_COMPARATOR_GET_OUTPUT 232 +#define K_SYSCALL_COMPARATOR_SET_TRIGGER 233 +#define K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING 234 +#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 235 +#define K_SYSCALL_COUNTER_DISABLE_CAPTURE 236 +#define K_SYSCALL_COUNTER_ENABLE_CAPTURE 237 +#define K_SYSCALL_COUNTER_GET_FREQUENCY 238 +#define K_SYSCALL_COUNTER_GET_FREQUENCY_64 239 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 240 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD_64 241 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 242 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE_64 243 +#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 244 +#define K_SYSCALL_COUNTER_GET_PENDING_INT 245 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE 246 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE_64 247 +#define K_SYSCALL_COUNTER_GET_VALUE 248 +#define K_SYSCALL_COUNTER_GET_VALUE_64 249 +#define K_SYSCALL_COUNTER_IS_COUNTING_UP 250 +#define K_SYSCALL_COUNTER_NS_TO_TICKS 251 +#define K_SYSCALL_COUNTER_NS_TO_TICKS_64 252 +#define K_SYSCALL_COUNTER_RESET 253 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 254 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM_64 255 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 256 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD_64 257 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE 258 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE_64 259 +#define K_SYSCALL_COUNTER_SET_VALUE 260 +#define K_SYSCALL_COUNTER_SET_VALUE_64 261 +#define K_SYSCALL_COUNTER_START 262 +#define K_SYSCALL_COUNTER_STOP 263 +#define K_SYSCALL_COUNTER_TICKS_TO_NS 264 +#define K_SYSCALL_COUNTER_TICKS_TO_NS_64 265 +#define K_SYSCALL_COUNTER_TICKS_TO_US 266 +#define K_SYSCALL_COUNTER_TICKS_TO_US_64 267 +#define K_SYSCALL_COUNTER_US_TO_TICKS 268 +#define K_SYSCALL_COUNTER_US_TO_TICKS_64 269 +#define K_SYSCALL_CRC_BEGIN 270 +#define K_SYSCALL_CRC_FINISH 271 +#define K_SYSCALL_CRC_UPDATE 272 +#define K_SYSCALL_DAC_CHANNEL_SETUP 273 +#define K_SYSCALL_DAC_WRITE_VALUE 274 +#define K_SYSCALL_DAI_CONFIG_GET 275 +#define K_SYSCALL_DAI_CONFIG_SET 276 +#define K_SYSCALL_DAI_CONFIG_UPDATE 277 +#define K_SYSCALL_DAI_GET_PROPERTIES_COPY 278 +#define K_SYSCALL_DAI_PROBE 279 +#define K_SYSCALL_DAI_REMOVE 280 +#define K_SYSCALL_DAI_TRIGGER 281 +#define K_SYSCALL_DAI_TS_CONFIG 282 +#define K_SYSCALL_DAI_TS_GET 283 +#define K_SYSCALL_DAI_TS_START 284 +#define K_SYSCALL_DAI_TS_STOP 285 +#define K_SYSCALL_DEVMUX_SELECT_GET 286 +#define K_SYSCALL_DEVMUX_SELECT_SET 287 +#define K_SYSCALL_EEPROM_GET_SIZE 288 +#define K_SYSCALL_EEPROM_READ 289 +#define K_SYSCALL_EEPROM_WRITE 290 +#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 291 +#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 292 +#define K_SYSCALL_ENTROPY_GET_ENTROPY 293 +#define K_SYSCALL_ESPI_CONFIG 294 +#define K_SYSCALL_ESPI_FLASH_ERASE 295 +#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 296 +#define K_SYSCALL_ESPI_READ_FLASH 297 +#define K_SYSCALL_ESPI_READ_LPC_REQUEST 298 +#define K_SYSCALL_ESPI_READ_REQUEST 299 +#define K_SYSCALL_ESPI_RECEIVE_OOB 300 +#define K_SYSCALL_ESPI_RECEIVE_VWIRE 301 +#define K_SYSCALL_ESPI_SAF_ACTIVATE 302 +#define K_SYSCALL_ESPI_SAF_CONFIG 303 +#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 304 +#define K_SYSCALL_ESPI_SAF_FLASH_READ 305 +#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 306 +#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 307 +#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 308 +#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 309 +#define K_SYSCALL_ESPI_SEND_OOB 310 +#define K_SYSCALL_ESPI_SEND_VWIRE 311 +#define K_SYSCALL_ESPI_WRITE_FLASH 312 +#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 313 +#define K_SYSCALL_ESPI_WRITE_REQUEST 314 +#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 315 +#define K_SYSCALL_FLASH_SIMULATOR_GET_PARAMS 316 +#define K_SYSCALL_FLASH_SIMULATOR_SET_CALLBACKS 317 +#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 318 +#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 319 +#define K_SYSCALL_FUEL_GAUGE_GET_PROP 320 +#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 321 +#define K_SYSCALL_FUEL_GAUGE_SET_PROP 322 +#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 323 +#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 324 +#define K_SYSCALL_GNSS_GET_FIX_RATE 325 +#define K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE 326 +#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 327 +#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 328 +#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 329 +#define K_SYSCALL_GNSS_SET_FIX_RATE 330 +#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 331 +#define K_SYSCALL_GPIO_GET_PENDING_INT 332 +#define K_SYSCALL_GPIO_PIN_CONFIGURE 333 +#define K_SYSCALL_GPIO_PIN_GET_CONFIG 334 +#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 335 +#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 336 +#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 337 +#define K_SYSCALL_GPIO_PORT_GET_RAW 338 +#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 339 +#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 340 +#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 341 +#define K_SYSCALL_HAPTICS_START_OUTPUT 342 +#define K_SYSCALL_HAPTICS_STOP_OUTPUT 343 +#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 344 +#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 345 +#define K_SYSCALL_HWINFO_GET_DEVICE_ID 346 +#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 347 +#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 348 +#define K_SYSCALL_I2C_CONFIGURE 349 +#define K_SYSCALL_I2C_GET_CONFIG 350 +#define K_SYSCALL_I2C_RECOVER_BUS 351 +#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 352 +#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 353 +#define K_SYSCALL_I2C_TRANSFER 354 +#define K_SYSCALL_I2S_BUF_READ 355 +#define K_SYSCALL_I2S_BUF_WRITE 356 +#define K_SYSCALL_I2S_CONFIGURE 357 +#define K_SYSCALL_I2S_TRIGGER 358 +#define K_SYSCALL_I3C_DO_CCC 359 +#define K_SYSCALL_I3C_DO_CCC_CB 360 +#define K_SYSCALL_I3C_TRANSFER 361 +#define K_SYSCALL_I3C_TRANSFER_CB 362 +#define K_SYSCALL_IPM_COMPLETE 363 +#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 364 +#define K_SYSCALL_IPM_MAX_ID_VAL_GET 365 +#define K_SYSCALL_IPM_SEND 366 +#define K_SYSCALL_IPM_SET_ENABLED 367 +#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 368 +#define K_SYSCALL_IVSHMEM_GET_ID 369 +#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 370 +#define K_SYSCALL_IVSHMEM_GET_MEM 371 +#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 372 +#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 373 +#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 374 +#define K_SYSCALL_IVSHMEM_GET_STATE 375 +#define K_SYSCALL_IVSHMEM_GET_VECTORS 376 +#define K_SYSCALL_IVSHMEM_INT_PEER 377 +#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 378 +#define K_SYSCALL_IVSHMEM_SET_STATE 379 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 380 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 381 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 382 +#define K_SYSCALL_K_MEM_PAGING_STATS_GET 383 +#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 384 +#define K_SYSCALL_LED_BLINK 385 +#define K_SYSCALL_LED_GET_INFO 386 +#define K_SYSCALL_LED_OFF 387 +#define K_SYSCALL_LED_ON 388 +#define K_SYSCALL_LED_SET_BRIGHTNESS 389 +#define K_SYSCALL_LED_SET_CHANNEL 390 +#define K_SYSCALL_LED_SET_COLOR 391 +#define K_SYSCALL_LED_WRITE_CHANNELS 392 +#define K_SYSCALL_LLEXT_GET_FN_TABLE 393 +#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 394 +#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 395 +#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 396 +#define K_SYSCALL_MBOX_MTU_GET 397 +#define K_SYSCALL_MBOX_SEND 398 +#define K_SYSCALL_MBOX_SET_ENABLED 399 +#define K_SYSCALL_MDIO_READ 400 +#define K_SYSCALL_MDIO_READ_C45 401 +#define K_SYSCALL_MDIO_WRITE 402 +#define K_SYSCALL_MDIO_WRITE_C45 403 +#define K_SYSCALL_MSPI_CONFIG 404 +#define K_SYSCALL_MSPI_DEV_CONFIG 405 +#define K_SYSCALL_MSPI_GET_CHANNEL_STATUS 406 +#define K_SYSCALL_MSPI_SCRAMBLE_CONFIG 407 +#define K_SYSCALL_MSPI_TIMING_CONFIG 408 +#define K_SYSCALL_MSPI_TRANSCEIVE 409 +#define K_SYSCALL_MSPI_XIP_CONFIG 410 +#define K_SYSCALL_NET_ADDR_NTOP 411 +#define K_SYSCALL_NET_ADDR_PTON 412 +#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 413 +#define K_SYSCALL_NET_IF_GET_BY_INDEX 414 +#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 415 +#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 416 +#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 417 +#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 418 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 419 +#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 420 +#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 421 +#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 422 +#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 423 +#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 424 +#define K_SYSCALL_OPAMP_SET_GAIN 425 +#define K_SYSCALL_OTP_PROGRAM 426 +#define K_SYSCALL_OTP_READ 427 +#define K_SYSCALL_PECI_CONFIG 428 +#define K_SYSCALL_PECI_DISABLE 429 +#define K_SYSCALL_PECI_ENABLE 430 +#define K_SYSCALL_PECI_TRANSFER 431 +#define K_SYSCALL_PS2_CONFIG 432 +#define K_SYSCALL_PS2_DISABLE_CALLBACK 433 +#define K_SYSCALL_PS2_ENABLE_CALLBACK 434 +#define K_SYSCALL_PS2_READ 435 +#define K_SYSCALL_PS2_WRITE 436 +#define K_SYSCALL_PSI5_REGISTER_CALLBACK 437 +#define K_SYSCALL_PSI5_SEND 438 +#define K_SYSCALL_PSI5_START_SYNC 439 +#define K_SYSCALL_PSI5_STOP_SYNC 440 +#define K_SYSCALL_PTP_CLOCK_GET 441 +#define K_SYSCALL_PWM_CAPTURE_CYCLES 442 +#define K_SYSCALL_PWM_DISABLE_CAPTURE 443 +#define K_SYSCALL_PWM_ENABLE_CAPTURE 444 +#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 445 +#define K_SYSCALL_PWM_SET_CYCLES 446 +#define K_SYSCALL_RENESAS_ELC_DISABLE 447 +#define K_SYSCALL_RENESAS_ELC_ENABLE 448 +#define K_SYSCALL_RENESAS_ELC_LINK_BREAK 449 +#define K_SYSCALL_RENESAS_ELC_LINK_SET 450 +#define K_SYSCALL_RENESAS_ELC_SOFTWARE_EVENT_GENERATE 451 +#define K_SYSCALL_RENESAS_RA_CTSU_GROUP_CONFIGURE 452 +#define K_SYSCALL_RENESAS_RX_CTSU_GROUP_CONFIGURE 453 +#define K_SYSCALL_RESET_LINE_ASSERT 454 +#define K_SYSCALL_RESET_LINE_DEASSERT 455 +#define K_SYSCALL_RESET_LINE_TOGGLE 456 +#define K_SYSCALL_RESET_STATUS 457 +#define K_SYSCALL_RETAINED_MEM_CLEAR 458 +#define K_SYSCALL_RETAINED_MEM_READ 459 +#define K_SYSCALL_RETAINED_MEM_SIZE 460 +#define K_SYSCALL_RETAINED_MEM_WRITE 461 +#define K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS 462 +#define K_SYSCALL_RTC_ALARM_GET_TIME 463 +#define K_SYSCALL_RTC_ALARM_IS_PENDING 464 +#define K_SYSCALL_RTC_ALARM_SET_TIME 465 +#define K_SYSCALL_RTC_GET_CALIBRATION 466 +#define K_SYSCALL_RTC_GET_TIME 467 +#define K_SYSCALL_RTC_SET_CALIBRATION 468 +#define K_SYSCALL_RTC_SET_TIME 469 +#define K_SYSCALL_RTIO_CQE_COPY_OUT 470 +#define K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER 471 +#define K_SYSCALL_RTIO_POOL_ACQUIRE 472 +#define K_SYSCALL_RTIO_POOL_RELEASE 473 +#define K_SYSCALL_RTIO_RELEASE_BUFFER 474 +#define K_SYSCALL_RTIO_SQE_CANCEL 475 +#define K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES 476 +#define K_SYSCALL_RTIO_SQE_SIGNAL 477 +#define K_SYSCALL_RTIO_SUBMIT 478 +#define K_SYSCALL_SDHC_CARD_BUSY 479 +#define K_SYSCALL_SDHC_CARD_PRESENT 480 +#define K_SYSCALL_SDHC_DISABLE_INTERRUPT 481 +#define K_SYSCALL_SDHC_ENABLE_INTERRUPT 482 +#define K_SYSCALL_SDHC_EXECUTE_TUNING 483 +#define K_SYSCALL_SDHC_GET_HOST_PROPS 484 +#define K_SYSCALL_SDHC_HW_RESET 485 +#define K_SYSCALL_SDHC_REQUEST 486 +#define K_SYSCALL_SDHC_SET_IO 487 +#define K_SYSCALL_SENSOR_ATTR_GET 488 +#define K_SYSCALL_SENSOR_ATTR_SET 489 +#define K_SYSCALL_SENSOR_CHANNEL_GET 490 +#define K_SYSCALL_SENSOR_GET_DECODER 491 +#define K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV 492 +#define K_SYSCALL_SENSOR_SAMPLE_FETCH 493 +#define K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN 494 +#define K_SYSCALL_SENT_REGISTER_CALLBACK 495 +#define K_SYSCALL_SENT_START_LISTENING 496 +#define K_SYSCALL_SENT_STOP_LISTENING 497 +#define K_SYSCALL_SIP_SUPERVISORY_CALL 498 +#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ 499 +#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES 500 +#define K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID 501 +#define K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY 502 +#define K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID 503 +#define K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE 504 +#define K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX 505 +#define K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID 506 +#define K_SYSCALL_SMBUS_BLOCK_PCALL 507 +#define K_SYSCALL_SMBUS_BLOCK_READ 508 +#define K_SYSCALL_SMBUS_BLOCK_WRITE 509 +#define K_SYSCALL_SMBUS_BYTE_DATA_READ 510 +#define K_SYSCALL_SMBUS_BYTE_DATA_WRITE 511 +#define K_SYSCALL_SMBUS_BYTE_READ 512 +#define K_SYSCALL_SMBUS_BYTE_WRITE 513 +#define K_SYSCALL_SMBUS_CONFIGURE 514 +#define K_SYSCALL_SMBUS_GET_CONFIG 515 +#define K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB 516 +#define K_SYSCALL_SMBUS_PCALL 517 +#define K_SYSCALL_SMBUS_QUICK 518 +#define K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB 519 +#define K_SYSCALL_SMBUS_WORD_DATA_READ 520 +#define K_SYSCALL_SMBUS_WORD_DATA_WRITE 521 +#define K_SYSCALL_SPI_RELEASE 522 +#define K_SYSCALL_SPI_TRANSCEIVE 523 +#define K_SYSCALL_STEPPER_CTRL_CONFIGURE_RAMP 524 +#define K_SYSCALL_STEPPER_CTRL_GET_ACTUAL_POSITION 525 +#define K_SYSCALL_STEPPER_CTRL_IS_MOVING 526 +#define K_SYSCALL_STEPPER_CTRL_MOVE_BY 527 +#define K_SYSCALL_STEPPER_CTRL_MOVE_TO 528 +#define K_SYSCALL_STEPPER_CTRL_RUN 529 +#define K_SYSCALL_STEPPER_CTRL_SET_EVENT_CB 530 +#define K_SYSCALL_STEPPER_CTRL_SET_MICROSTEP_INTERVAL 531 +#define K_SYSCALL_STEPPER_CTRL_SET_REFERENCE_POSITION 532 +#define K_SYSCALL_STEPPER_CTRL_STOP 533 +#define K_SYSCALL_STEPPER_DISABLE 534 +#define K_SYSCALL_STEPPER_ENABLE 535 +#define K_SYSCALL_STEPPER_GET_MICRO_STEP_RES 536 +#define K_SYSCALL_STEPPER_SET_EVENT_CB 537 +#define K_SYSCALL_STEPPER_SET_MICRO_STEP_RES 538 +#define K_SYSCALL_SWDP_CONFIGURE 539 +#define K_SYSCALL_SWDP_GET_PINS 540 +#define K_SYSCALL_SWDP_INPUT_SEQUENCE 541 +#define K_SYSCALL_SWDP_OUTPUT_SEQUENCE 542 +#define K_SYSCALL_SWDP_PORT_OFF 543 +#define K_SYSCALL_SWDP_PORT_ON 544 +#define K_SYSCALL_SWDP_SET_CLOCK 545 +#define K_SYSCALL_SWDP_SET_PINS 546 +#define K_SYSCALL_SWDP_TRANSFER 547 +#define K_SYSCALL_SYSCON_GET_BASE 548 +#define K_SYSCALL_SYSCON_GET_SIZE 549 +#define K_SYSCALL_SYSCON_READ_REG 550 +#define K_SYSCALL_SYSCON_UPDATE_BITS 551 +#define K_SYSCALL_SYSCON_WRITE_REG 552 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 553 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 554 +#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 555 +#define K_SYSCALL_SYS_CSRAND_GET 556 +#define K_SYSCALL_SYS_RAND_GET 557 +#define K_SYSCALL_TEE_CANCEL 558 +#define K_SYSCALL_TEE_CLOSE_SESSION 559 +#define K_SYSCALL_TEE_GET_VERSION 560 +#define K_SYSCALL_TEE_INVOKE_FUNC 561 +#define K_SYSCALL_TEE_OPEN_SESSION 562 +#define K_SYSCALL_TEE_SHM_ALLOC 563 +#define K_SYSCALL_TEE_SHM_FREE 564 +#define K_SYSCALL_TEE_SHM_REGISTER 565 +#define K_SYSCALL_TEE_SHM_UNREGISTER 566 +#define K_SYSCALL_TEE_SUPPL_RECV 567 +#define K_SYSCALL_TEE_SUPPL_SEND 568 +#define K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP 569 +#define K_SYSCALL_TGPIO_PIN_DISABLE 570 +#define K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT 571 +#define K_SYSCALL_TGPIO_PIN_READ_TS_EC 572 +#define K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND 573 +#define K_SYSCALL_TGPIO_PORT_GET_TIME 574 +#define K_SYSCALL_UART_CONFIGURE 575 +#define K_SYSCALL_UART_CONFIG_GET 576 +#define K_SYSCALL_UART_DRV_CMD 577 +#define K_SYSCALL_UART_ERR_CHECK 578 +#define K_SYSCALL_UART_IRQ_ERR_DISABLE 579 +#define K_SYSCALL_UART_IRQ_ERR_ENABLE 580 +#define K_SYSCALL_UART_IRQ_IS_PENDING 581 +#define K_SYSCALL_UART_IRQ_RX_DISABLE 582 +#define K_SYSCALL_UART_IRQ_RX_ENABLE 583 +#define K_SYSCALL_UART_IRQ_TX_DISABLE 584 +#define K_SYSCALL_UART_IRQ_TX_ENABLE 585 +#define K_SYSCALL_UART_IRQ_UPDATE 586 +#define K_SYSCALL_UART_LINE_CTRL_GET 587 +#define K_SYSCALL_UART_LINE_CTRL_SET 588 +#define K_SYSCALL_UART_POLL_IN 589 +#define K_SYSCALL_UART_POLL_IN_U16 590 +#define K_SYSCALL_UART_POLL_OUT 591 +#define K_SYSCALL_UART_POLL_OUT_U16 592 +#define K_SYSCALL_UART_RX_DISABLE 593 +#define K_SYSCALL_UART_RX_ENABLE 594 +#define K_SYSCALL_UART_RX_ENABLE_U16 595 +#define K_SYSCALL_UART_TX 596 +#define K_SYSCALL_UART_TX_ABORT 597 +#define K_SYSCALL_UART_TX_U16 598 +#define K_SYSCALL_UPDATEHUB_AUTOHANDLER 599 +#define K_SYSCALL_UPDATEHUB_CONFIRM 600 +#define K_SYSCALL_UPDATEHUB_PROBE 601 +#define K_SYSCALL_UPDATEHUB_REBOOT 602 +#define K_SYSCALL_UPDATEHUB_REPORT_ERROR 603 +#define K_SYSCALL_UPDATEHUB_UPDATE 604 +#define K_SYSCALL_USER_FAULT 605 +#define K_SYSCALL_W1_CHANGE_BUS_LOCK 606 +#define K_SYSCALL_W1_CONFIGURE 607 +#define K_SYSCALL_W1_GET_SLAVE_COUNT 608 +#define K_SYSCALL_W1_READ_BIT 609 +#define K_SYSCALL_W1_READ_BLOCK 610 +#define K_SYSCALL_W1_READ_BYTE 611 +#define K_SYSCALL_W1_RESET_BUS 612 +#define K_SYSCALL_W1_SEARCH_BUS 613 +#define K_SYSCALL_W1_WRITE_BIT 614 +#define K_SYSCALL_W1_WRITE_BLOCK 615 +#define K_SYSCALL_W1_WRITE_BYTE 616 +#define K_SYSCALL_WDT_DISABLE 617 +#define K_SYSCALL_WDT_FEED 618 +#define K_SYSCALL_WDT_SETUP 619 +#define K_SYSCALL_XTENSA_USER_FAULT 620 +#define K_SYSCALL_ZSOCK_ACCEPT 621 +#define K_SYSCALL_ZSOCK_BIND 622 +#define K_SYSCALL_ZSOCK_CLOSE 623 +#define K_SYSCALL_ZSOCK_CONNECT 624 +#define K_SYSCALL_ZSOCK_FCNTL_IMPL 625 +#define K_SYSCALL_ZSOCK_GETHOSTNAME 626 +#define K_SYSCALL_ZSOCK_GETPEERNAME 627 +#define K_SYSCALL_ZSOCK_GETSOCKNAME 628 +#define K_SYSCALL_ZSOCK_GETSOCKOPT 629 +#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 630 +#define K_SYSCALL_ZSOCK_INET_PTON 631 +#define K_SYSCALL_ZSOCK_IOCTL_IMPL 632 +#define K_SYSCALL_ZSOCK_LISTEN 633 +#define K_SYSCALL_ZSOCK_RECVFROM 634 +#define K_SYSCALL_ZSOCK_RECVMSG 635 +#define K_SYSCALL_ZSOCK_SENDMSG 636 +#define K_SYSCALL_ZSOCK_SENDTO 637 +#define K_SYSCALL_ZSOCK_SETSOCKOPT 638 +#define K_SYSCALL_ZSOCK_SHUTDOWN 639 +#define K_SYSCALL_ZSOCK_SOCKET 640 +#define K_SYSCALL_ZSOCK_SOCKETPAIR 641 +#define K_SYSCALL_ZVFS_POLL 642 +#define K_SYSCALL_ZVFS_SELECT 643 +#define K_SYSCALL_Z_ERRNO 644 +#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 645 + + +#ifndef _ASMLANGUAGE + +#include +#include + +#endif /* _ASMLANGUAGE */ + +#endif /* ZEPHYR_SYSCALL_LIST_H */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/adc.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/adc.h new file mode 100644 index 0000000..e269d2d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/adc.h @@ -0,0 +1,125 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ADC_H +#define Z_INCLUDE_SYSCALLS_ADC_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_adc_channel_setup(const struct device * dev, const struct adc_channel_cfg * channel_cfg); + +__pinned_func +static inline int adc_channel_setup(const struct device * dev, const struct adc_channel_cfg * channel_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_channel_cfg * val; } parm1 = { .val = channel_cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_CHANNEL_SETUP); + } +#endif + compiler_barrier(); + return z_impl_adc_channel_setup(dev, channel_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_channel_setup(dev, channel_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_CHANNEL_SETUP, adc_channel_setup, dev, channel_cfg); syscall__retval = adc_channel_setup(dev, channel_cfg); sys_port_trace_syscall_exit(K_SYSCALL_ADC_CHANNEL_SETUP, adc_channel_setup, dev, channel_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_adc_read(const struct device * dev, const struct adc_sequence * sequence); + +__pinned_func +static inline int adc_read(const struct device * dev, const struct adc_sequence * sequence) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_sequence * val; } parm1 = { .val = sequence }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_READ); + } +#endif + compiler_barrier(); + return z_impl_adc_read(dev, sequence); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_read(dev, sequence) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_READ, adc_read, dev, sequence); syscall__retval = adc_read(dev, sequence); sys_port_trace_syscall_exit(K_SYSCALL_ADC_READ, adc_read, dev, sequence, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_adc_read_async(const struct device * dev, const struct adc_sequence * sequence, struct k_poll_signal * async); + +__pinned_func +static inline int adc_read_async(const struct device * dev, const struct adc_sequence * sequence, struct k_poll_signal * async) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_sequence * val; } parm1 = { .val = sequence }; + union { uintptr_t x; struct k_poll_signal * val; } parm2 = { .val = async }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ADC_READ_ASYNC); + } +#endif + compiler_barrier(); + return z_impl_adc_read_async(dev, sequence, async); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_read_async(dev, sequence, async) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_READ_ASYNC, adc_read_async, dev, sequence, async); syscall__retval = adc_read_async(dev, sequence, async); sys_port_trace_syscall_exit(K_SYSCALL_ADC_READ_ASYNC, adc_read_async, dev, sequence, async, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_adc_get_decoder(const struct device * dev, const struct adc_decoder_api ** api); + +__pinned_func +static inline int adc_get_decoder(const struct device * dev, const struct adc_decoder_api ** api) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_decoder_api ** val; } parm1 = { .val = api }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_GET_DECODER); + } +#endif + compiler_barrier(); + return z_impl_adc_get_decoder(dev, api); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_get_decoder(dev, api) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_GET_DECODER, adc_get_decoder, dev, api); syscall__retval = adc_get_decoder(dev, api); sys_port_trace_syscall_exit(K_SYSCALL_ADC_GET_DECODER, adc_get_decoder, dev, api, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/arch.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/arch.h new file mode 100644 index 0000000..cf55b0b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/arch.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ARCH_H +#define Z_INCLUDE_SYSCALLS_ARCH_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_xtensa_user_fault(unsigned int reason); + +__pinned_func +static inline void xtensa_user_fault(unsigned int reason) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; unsigned int val; } parm0 = { .val = reason }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_XTENSA_USER_FAULT); + return; + } +#endif + compiler_barrier(); + z_impl_xtensa_user_fault(reason); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define xtensa_user_fault(reason) do { sys_port_trace_syscall_enter(K_SYSCALL_XTENSA_USER_FAULT, xtensa_user_fault, reason); xtensa_user_fault(reason); sys_port_trace_syscall_exit(K_SYSCALL_XTENSA_USER_FAULT, xtensa_user_fault, reason); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/atomic_c.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/atomic_c.h new file mode 100644 index 0000000..e042a7e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/atomic_c.h @@ -0,0 +1,270 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ATOMIC_C_H +#define Z_INCLUDE_SYSCALLS_ATOMIC_C_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern bool z_impl_atomic_cas(atomic_t * target, atomic_val_t old_value, atomic_val_t new_value); + +__pinned_func +static inline bool atomic_cas(atomic_t * target, atomic_val_t old_value, atomic_val_t new_value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = old_value }; + union { uintptr_t x; atomic_val_t val; } parm2 = { .val = new_value }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ATOMIC_CAS); + } +#endif + compiler_barrier(); + return z_impl_atomic_cas(target, old_value, new_value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_cas(target, old_value, new_value) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_CAS, atomic_cas, target, old_value, new_value); syscall__retval = atomic_cas(target, old_value, new_value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_CAS, atomic_cas, target, old_value, new_value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_atomic_ptr_cas(atomic_ptr_t * target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value); + +__pinned_func +static inline bool atomic_ptr_cas(atomic_ptr_t * target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_ptr_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_ptr_val_t val; } parm1 = { .val = old_value }; + union { uintptr_t x; atomic_ptr_val_t val; } parm2 = { .val = new_value }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ATOMIC_PTR_CAS); + } +#endif + compiler_barrier(); + return z_impl_atomic_ptr_cas(target, old_value, new_value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_ptr_cas(target, old_value, new_value) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_PTR_CAS, atomic_ptr_cas, target, old_value, new_value); syscall__retval = atomic_ptr_cas(target, old_value, new_value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_PTR_CAS, atomic_ptr_cas, target, old_value, new_value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_add(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_add(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_ADD); + } +#endif + compiler_barrier(); + return z_impl_atomic_add(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_add(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_ADD, atomic_add, target, value); syscall__retval = atomic_add(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_ADD, atomic_add, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_sub(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_sub(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_SUB); + } +#endif + compiler_barrier(); + return z_impl_atomic_sub(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_sub(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_SUB, atomic_sub, target, value); syscall__retval = atomic_sub(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_SUB, atomic_sub, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_set(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_set(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_SET); + } +#endif + compiler_barrier(); + return z_impl_atomic_set(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_set(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_SET, atomic_set, target, value); syscall__retval = atomic_set(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_SET, atomic_set, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_ptr_val_t z_impl_atomic_ptr_set(atomic_ptr_t * target, atomic_ptr_val_t value); + +__pinned_func +static inline atomic_ptr_val_t atomic_ptr_set(atomic_ptr_t * target, atomic_ptr_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_ptr_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_ptr_val_t val; } parm1 = { .val = value }; + return (atomic_ptr_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_PTR_SET); + } +#endif + compiler_barrier(); + return z_impl_atomic_ptr_set(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_ptr_set(target, value) ({ atomic_ptr_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_PTR_SET, atomic_ptr_set, target, value); syscall__retval = atomic_ptr_set(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_PTR_SET, atomic_ptr_set, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_or(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_or(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_OR); + } +#endif + compiler_barrier(); + return z_impl_atomic_or(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_or(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_OR, atomic_or, target, value); syscall__retval = atomic_or(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_OR, atomic_or, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_xor(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_xor(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_XOR); + } +#endif + compiler_barrier(); + return z_impl_atomic_xor(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_xor(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_XOR, atomic_xor, target, value); syscall__retval = atomic_xor(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_XOR, atomic_xor, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_and(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_and(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_AND); + } +#endif + compiler_barrier(); + return z_impl_atomic_and(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_and(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_AND, atomic_and, target, value); syscall__retval = atomic_and(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_AND, atomic_and, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_nand(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_nand(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_NAND); + } +#endif + compiler_barrier(); + return z_impl_atomic_nand(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_nand(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_NAND, atomic_nand, target, value); syscall__retval = atomic_nand(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_NAND, atomic_nand, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/auxdisplay.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/auxdisplay.h new file mode 100644 index 0000000..21c3fec --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/auxdisplay.h @@ -0,0 +1,488 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_AUXDISPLAY_H +#define Z_INCLUDE_SYSCALLS_AUXDISPLAY_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_auxdisplay_display_on(const struct device * dev); + +__pinned_func +static inline int auxdisplay_display_on(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_DISPLAY_ON); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_on(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_on(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_ON, auxdisplay_display_on, dev); syscall__retval = auxdisplay_display_on(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_ON, auxdisplay_display_on, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_display_off(const struct device * dev); + +__pinned_func +static inline int auxdisplay_display_off(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_DISPLAY_OFF); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_off(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_off(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_OFF, auxdisplay_display_off, dev); syscall__retval = auxdisplay_display_off(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_OFF, auxdisplay_display_off, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_set_enabled(const struct device * dev, bool enabled); + +__pinned_func +static inline int auxdisplay_cursor_set_enabled(const struct device * dev, bool enabled) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enabled }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_set_enabled(dev, enabled); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_set_enabled(dev, enabled) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED, auxdisplay_cursor_set_enabled, dev, enabled); syscall__retval = auxdisplay_cursor_set_enabled(dev, enabled); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED, auxdisplay_cursor_set_enabled, dev, enabled, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_position_blinking_set_enabled(const struct device * dev, bool enabled); + +__pinned_func +static inline int auxdisplay_position_blinking_set_enabled(const struct device * dev, bool enabled) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enabled }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_position_blinking_set_enabled(dev, enabled); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_position_blinking_set_enabled(dev, enabled) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED, auxdisplay_position_blinking_set_enabled, dev, enabled); syscall__retval = auxdisplay_position_blinking_set_enabled(dev, enabled); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED, auxdisplay_position_blinking_set_enabled, dev, enabled, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_shift_set(const struct device * dev, uint8_t direction, bool display_shift); + +__pinned_func +static inline int auxdisplay_cursor_shift_set(const struct device * dev, uint8_t direction, bool display_shift) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = direction }; + union { uintptr_t x; bool val; } parm2 = { .val = display_shift }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_shift_set(dev, direction, display_shift); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_shift_set(dev, direction, display_shift) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET, auxdisplay_cursor_shift_set, dev, direction, display_shift); syscall__retval = auxdisplay_cursor_shift_set(dev, direction, display_shift); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET, auxdisplay_cursor_shift_set, dev, direction, display_shift, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y); + +__pinned_func +static inline int auxdisplay_cursor_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum auxdisplay_position val; } parm1 = { .val = type }; + union { uintptr_t x; int16_t val; } parm2 = { .val = x }; + union { uintptr_t x; int16_t val; } parm3 = { .val = y }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_position_set(dev, type, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_position_set(dev, type, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET, auxdisplay_cursor_position_set, dev, type, x, y); syscall__retval = auxdisplay_cursor_position_set(dev, type, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET, auxdisplay_cursor_position_set, dev, type, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_position_get(const struct device * dev, int16_t * x, int16_t * y); + +__pinned_func +static inline int auxdisplay_cursor_position_get(const struct device * dev, int16_t * x, int16_t * y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int16_t * val; } parm1 = { .val = x }; + union { uintptr_t x; int16_t * val; } parm2 = { .val = y }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_position_get(dev, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_position_get(dev, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET, auxdisplay_cursor_position_get, dev, x, y); syscall__retval = auxdisplay_cursor_position_get(dev, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET, auxdisplay_cursor_position_get, dev, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_display_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y); + +__pinned_func +static inline int auxdisplay_display_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum auxdisplay_position val; } parm1 = { .val = type }; + union { uintptr_t x; int16_t val; } parm2 = { .val = x }; + union { uintptr_t x; int16_t val; } parm3 = { .val = y }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_position_set(dev, type, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_position_set(dev, type, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET, auxdisplay_display_position_set, dev, type, x, y); syscall__retval = auxdisplay_display_position_set(dev, type, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET, auxdisplay_display_position_set, dev, type, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_display_position_get(const struct device * dev, int16_t * x, int16_t * y); + +__pinned_func +static inline int auxdisplay_display_position_get(const struct device * dev, int16_t * x, int16_t * y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int16_t * val; } parm1 = { .val = x }; + union { uintptr_t x; int16_t * val; } parm2 = { .val = y }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_position_get(dev, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_position_get(dev, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET, auxdisplay_display_position_get, dev, x, y); syscall__retval = auxdisplay_display_position_get(dev, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET, auxdisplay_display_position_get, dev, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_capabilities_get(const struct device * dev, struct auxdisplay_capabilities * capabilities); + +__pinned_func +static inline int auxdisplay_capabilities_get(const struct device * dev, struct auxdisplay_capabilities * capabilities) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct auxdisplay_capabilities * val; } parm1 = { .val = capabilities }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_capabilities_get(dev, capabilities); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_capabilities_get(dev, capabilities) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET, auxdisplay_capabilities_get, dev, capabilities); syscall__retval = auxdisplay_capabilities_get(dev, capabilities); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET, auxdisplay_capabilities_get, dev, capabilities, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_clear(const struct device * dev); + +__pinned_func +static inline int auxdisplay_clear(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_CLEAR); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_clear(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_clear(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CLEAR, auxdisplay_clear, dev); syscall__retval = auxdisplay_clear(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CLEAR, auxdisplay_clear, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_brightness_get(const struct device * dev, uint8_t * brightness); + +__pinned_func +static inline int auxdisplay_brightness_get(const struct device * dev, uint8_t * brightness) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = brightness }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_brightness_get(dev, brightness); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_brightness_get(dev, brightness) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET, auxdisplay_brightness_get, dev, brightness); syscall__retval = auxdisplay_brightness_get(dev, brightness); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET, auxdisplay_brightness_get, dev, brightness, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_brightness_set(const struct device * dev, uint8_t brightness); + +__pinned_func +static inline int auxdisplay_brightness_set(const struct device * dev, uint8_t brightness) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = brightness }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_brightness_set(dev, brightness); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_brightness_set(dev, brightness) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET, auxdisplay_brightness_set, dev, brightness); syscall__retval = auxdisplay_brightness_set(dev, brightness); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET, auxdisplay_brightness_set, dev, brightness, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_backlight_get(const struct device * dev, uint8_t * backlight); + +__pinned_func +static inline int auxdisplay_backlight_get(const struct device * dev, uint8_t * backlight) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = backlight }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_backlight_get(dev, backlight); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_backlight_get(dev, backlight) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET, auxdisplay_backlight_get, dev, backlight); syscall__retval = auxdisplay_backlight_get(dev, backlight); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET, auxdisplay_backlight_get, dev, backlight, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_backlight_set(const struct device * dev, uint8_t backlight); + +__pinned_func +static inline int auxdisplay_backlight_set(const struct device * dev, uint8_t backlight) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = backlight }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_backlight_set(dev, backlight); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_backlight_set(dev, backlight) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET, auxdisplay_backlight_set, dev, backlight); syscall__retval = auxdisplay_backlight_set(dev, backlight); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET, auxdisplay_backlight_set, dev, backlight, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_is_busy(const struct device * dev); + +__pinned_func +static inline int auxdisplay_is_busy(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_IS_BUSY); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_is_busy(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_is_busy(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_IS_BUSY, auxdisplay_is_busy, dev); syscall__retval = auxdisplay_is_busy(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_IS_BUSY, auxdisplay_is_busy, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_custom_character_set(const struct device * dev, struct auxdisplay_character * character); + +__pinned_func +static inline int auxdisplay_custom_character_set(const struct device * dev, struct auxdisplay_character * character) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct auxdisplay_character * val; } parm1 = { .val = character }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_custom_character_set(dev, character); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_custom_character_set(dev, character) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET, auxdisplay_custom_character_set, dev, character); syscall__retval = auxdisplay_custom_character_set(dev, character); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET, auxdisplay_custom_character_set, dev, character, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_write(const struct device * dev, const uint8_t * data, uint16_t len); + +__pinned_func +static inline int auxdisplay_write(const struct device * dev, const uint8_t * data, uint16_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = data }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = len }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_WRITE); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_write(dev, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_write(dev, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_WRITE, auxdisplay_write, dev, data, len); syscall__retval = auxdisplay_write(dev, data, len); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_WRITE, auxdisplay_write, dev, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_custom_command(const struct device * dev, struct auxdisplay_custom_data * data); + +__pinned_func +static inline int auxdisplay_custom_command(const struct device * dev, struct auxdisplay_custom_data * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct auxdisplay_custom_data * val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_custom_command(dev, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_custom_command(dev, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND, auxdisplay_custom_command, dev, data); syscall__retval = auxdisplay_custom_command(dev, data); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND, auxdisplay_custom_command, dev, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/bbram.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/bbram.h new file mode 100644 index 0000000..fcfa519 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/bbram.h @@ -0,0 +1,173 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_BBRAM_H +#define Z_INCLUDE_SYSCALLS_BBRAM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_bbram_check_invalid(const struct device * dev); + +__pinned_func +static inline int bbram_check_invalid(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_INVALID); + } +#endif + compiler_barrier(); + return z_impl_bbram_check_invalid(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_check_invalid(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_INVALID, bbram_check_invalid, dev); syscall__retval = bbram_check_invalid(dev); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_INVALID, bbram_check_invalid, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_check_standby_power(const struct device * dev); + +__pinned_func +static inline int bbram_check_standby_power(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_STANDBY_POWER); + } +#endif + compiler_barrier(); + return z_impl_bbram_check_standby_power(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_check_standby_power(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_STANDBY_POWER, bbram_check_standby_power, dev); syscall__retval = bbram_check_standby_power(dev); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_STANDBY_POWER, bbram_check_standby_power, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_check_power(const struct device * dev); + +__pinned_func +static inline int bbram_check_power(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_POWER); + } +#endif + compiler_barrier(); + return z_impl_bbram_check_power(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_check_power(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_POWER, bbram_check_power, dev); syscall__retval = bbram_check_power(dev); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_POWER, bbram_check_power, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_get_size(const struct device * dev, size_t * size); + +__pinned_func +static inline int bbram_get_size(const struct device * dev, size_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t * val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BBRAM_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_bbram_get_size(dev, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_get_size(dev, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_GET_SIZE, bbram_get_size, dev, size); syscall__retval = bbram_get_size(dev, size); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_GET_SIZE, bbram_get_size, dev, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_read(const struct device * dev, size_t offset, size_t size, uint8_t * data); + +__pinned_func +static inline int bbram_read(const struct device * dev, size_t offset, size_t size, uint8_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + union { uintptr_t x; uint8_t * val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BBRAM_READ); + } +#endif + compiler_barrier(); + return z_impl_bbram_read(dev, offset, size, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_read(dev, offset, size, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_READ, bbram_read, dev, offset, size, data); syscall__retval = bbram_read(dev, offset, size, data); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_READ, bbram_read, dev, offset, size, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_write(const struct device * dev, size_t offset, size_t size, const uint8_t * data); + +__pinned_func +static inline int bbram_write(const struct device * dev, size_t offset, size_t size, const uint8_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + union { uintptr_t x; const uint8_t * val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BBRAM_WRITE); + } +#endif + compiler_barrier(); + return z_impl_bbram_write(dev, offset, size, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_write(dev, offset, size, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_WRITE, bbram_write, dev, offset, size, data); syscall__retval = bbram_write(dev, offset, size, data); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_WRITE, bbram_write, dev, offset, size, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/biometrics.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/biometrics.h new file mode 100644 index 0000000..75f9a5c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/biometrics.h @@ -0,0 +1,373 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_BIOMETRICS_H +#define Z_INCLUDE_SYSCALLS_BIOMETRICS_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_biometric_get_capabilities(const struct device * dev, struct biometric_capabilities * caps); + +__pinned_func +static inline int biometric_get_capabilities(const struct device * dev, struct biometric_capabilities * caps) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct biometric_capabilities * val; } parm1 = { .val = caps }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BIOMETRIC_GET_CAPABILITIES); + } +#endif + compiler_barrier(); + return z_impl_biometric_get_capabilities(dev, caps); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_get_capabilities(dev, caps) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_GET_CAPABILITIES, biometric_get_capabilities, dev, caps); syscall__retval = biometric_get_capabilities(dev, caps); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_GET_CAPABILITIES, biometric_get_capabilities, dev, caps, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_attr_set(const struct device * dev, enum biometric_attribute attr, int32_t val); + +__pinned_func +static inline int biometric_attr_set(const struct device * dev, enum biometric_attribute attr, int32_t val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum biometric_attribute val; } parm1 = { .val = attr }; + union { uintptr_t x; int32_t val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_BIOMETRIC_ATTR_SET); + } +#endif + compiler_barrier(); + return z_impl_biometric_attr_set(dev, attr, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_attr_set(dev, attr, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_ATTR_SET, biometric_attr_set, dev, attr, val); syscall__retval = biometric_attr_set(dev, attr, val); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_ATTR_SET, biometric_attr_set, dev, attr, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_attr_get(const struct device * dev, enum biometric_attribute attr, int32_t * val); + +__pinned_func +static inline int biometric_attr_get(const struct device * dev, enum biometric_attribute attr, int32_t * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum biometric_attribute val; } parm1 = { .val = attr }; + union { uintptr_t x; int32_t * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_BIOMETRIC_ATTR_GET); + } +#endif + compiler_barrier(); + return z_impl_biometric_attr_get(dev, attr, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_attr_get(dev, attr, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_ATTR_GET, biometric_attr_get, dev, attr, val); syscall__retval = biometric_attr_get(dev, attr, val); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_ATTR_GET, biometric_attr_get, dev, attr, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_enroll_start(const struct device * dev, uint16_t template_id); + +__pinned_func +static inline int biometric_enroll_start(const struct device * dev, uint16_t template_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = template_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BIOMETRIC_ENROLL_START); + } +#endif + compiler_barrier(); + return z_impl_biometric_enroll_start(dev, template_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_enroll_start(dev, template_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_ENROLL_START, biometric_enroll_start, dev, template_id); syscall__retval = biometric_enroll_start(dev, template_id); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_ENROLL_START, biometric_enroll_start, dev, template_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_enroll_capture(const struct device * dev, k_timeout_t timeout, struct biometric_capture_result * result); + +__pinned_func +static inline int biometric_enroll_capture(const struct device * dev, k_timeout_t timeout, struct biometric_capture_result * result) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + union { uintptr_t x; struct biometric_capture_result * val; } parm2 = { .val = result }; + return (int) arch_syscall_invoke4(parm0.x, parm1.split.lo, parm1.split.hi, parm2.x, K_SYSCALL_BIOMETRIC_ENROLL_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_biometric_enroll_capture(dev, timeout, result); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_enroll_capture(dev, timeout, result) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_ENROLL_CAPTURE, biometric_enroll_capture, dev, timeout, result); syscall__retval = biometric_enroll_capture(dev, timeout, result); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_ENROLL_CAPTURE, biometric_enroll_capture, dev, timeout, result, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_enroll_finalize(const struct device * dev); + +__pinned_func +static inline int biometric_enroll_finalize(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BIOMETRIC_ENROLL_FINALIZE); + } +#endif + compiler_barrier(); + return z_impl_biometric_enroll_finalize(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_enroll_finalize(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_ENROLL_FINALIZE, biometric_enroll_finalize, dev); syscall__retval = biometric_enroll_finalize(dev); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_ENROLL_FINALIZE, biometric_enroll_finalize, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_enroll_abort(const struct device * dev); + +__pinned_func +static inline int biometric_enroll_abort(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BIOMETRIC_ENROLL_ABORT); + } +#endif + compiler_barrier(); + return z_impl_biometric_enroll_abort(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_enroll_abort(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_ENROLL_ABORT, biometric_enroll_abort, dev); syscall__retval = biometric_enroll_abort(dev); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_ENROLL_ABORT, biometric_enroll_abort, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_template_store(const struct device * dev, uint16_t id, const uint8_t * data, size_t size); + +__pinned_func +static inline int biometric_template_store(const struct device * dev, uint16_t id, const uint8_t * data, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; const uint8_t * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BIOMETRIC_TEMPLATE_STORE); + } +#endif + compiler_barrier(); + return z_impl_biometric_template_store(dev, id, data, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_template_store(dev, id, data, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_TEMPLATE_STORE, biometric_template_store, dev, id, data, size); syscall__retval = biometric_template_store(dev, id, data, size); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_TEMPLATE_STORE, biometric_template_store, dev, id, data, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_template_read(const struct device * dev, uint16_t id, uint8_t * data, size_t size); + +__pinned_func +static inline int biometric_template_read(const struct device * dev, uint16_t id, uint8_t * data, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BIOMETRIC_TEMPLATE_READ); + } +#endif + compiler_barrier(); + return z_impl_biometric_template_read(dev, id, data, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_template_read(dev, id, data, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_TEMPLATE_READ, biometric_template_read, dev, id, data, size); syscall__retval = biometric_template_read(dev, id, data, size); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_TEMPLATE_READ, biometric_template_read, dev, id, data, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_template_delete(const struct device * dev, uint16_t id); + +__pinned_func +static inline int biometric_template_delete(const struct device * dev, uint16_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE); + } +#endif + compiler_barrier(); + return z_impl_biometric_template_delete(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_template_delete(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE, biometric_template_delete, dev, id); syscall__retval = biometric_template_delete(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE, biometric_template_delete, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_template_delete_all(const struct device * dev); + +__pinned_func +static inline int biometric_template_delete_all(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE_ALL); + } +#endif + compiler_barrier(); + return z_impl_biometric_template_delete_all(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_template_delete_all(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE_ALL, biometric_template_delete_all, dev); syscall__retval = biometric_template_delete_all(dev); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_TEMPLATE_DELETE_ALL, biometric_template_delete_all, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_template_list(const struct device * dev, uint16_t * ids, size_t max_count, size_t * actual_count); + +__pinned_func +static inline int biometric_template_list(const struct device * dev, uint16_t * ids, size_t max_count, size_t * actual_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t * val; } parm1 = { .val = ids }; + union { uintptr_t x; size_t val; } parm2 = { .val = max_count }; + union { uintptr_t x; size_t * val; } parm3 = { .val = actual_count }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BIOMETRIC_TEMPLATE_LIST); + } +#endif + compiler_barrier(); + return z_impl_biometric_template_list(dev, ids, max_count, actual_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_template_list(dev, ids, max_count, actual_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_TEMPLATE_LIST, biometric_template_list, dev, ids, max_count, actual_count); syscall__retval = biometric_template_list(dev, ids, max_count, actual_count); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_TEMPLATE_LIST, biometric_template_list, dev, ids, max_count, actual_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_match(const struct device * dev, enum biometric_match_mode mode, uint16_t template_id, k_timeout_t timeout, struct biometric_match_result * result); + +__pinned_func +static inline int biometric_match(const struct device * dev, enum biometric_match_mode mode, uint16_t template_id, k_timeout_t timeout, struct biometric_match_result * result) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum biometric_match_mode val; } parm1 = { .val = mode }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = template_id }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + union { uintptr_t x; struct biometric_match_result * val; } parm4 = { .val = result }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, parm4.x, K_SYSCALL_BIOMETRIC_MATCH); + } +#endif + compiler_barrier(); + return z_impl_biometric_match(dev, mode, template_id, timeout, result); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_match(dev, mode, template_id, timeout, result) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_MATCH, biometric_match, dev, mode, template_id, timeout, result); syscall__retval = biometric_match(dev, mode, template_id, timeout, result); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_MATCH, biometric_match, dev, mode, template_id, timeout, result, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_biometric_led_control(const struct device * dev, enum biometric_led_state state); + +__pinned_func +static inline int biometric_led_control(const struct device * dev, enum biometric_led_state state) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum biometric_led_state val; } parm1 = { .val = state }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BIOMETRIC_LED_CONTROL); + } +#endif + compiler_barrier(); + return z_impl_biometric_led_control(dev, state); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define biometric_led_control(dev, state) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BIOMETRIC_LED_CONTROL, biometric_led_control, dev, state); syscall__retval = biometric_led_control(dev, state); sys_port_trace_syscall_exit(K_SYSCALL_BIOMETRIC_LED_CONTROL, biometric_led_control, dev, state, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/cache.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/cache.h new file mode 100644 index 0000000..7dbb963 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/cache.h @@ -0,0 +1,100 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CACHE_H +#define Z_INCLUDE_SYSCALLS_CACHE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sys_cache_data_flush_range(void * addr, size_t size); + +__pinned_func +static inline int sys_cache_data_flush_range(void * addr, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = addr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE); + } +#endif + compiler_barrier(); + return z_impl_sys_cache_data_flush_range(addr, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_cache_data_flush_range(addr, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE, sys_cache_data_flush_range, addr, size); syscall__retval = sys_cache_data_flush_range(addr, size); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE, sys_cache_data_flush_range, addr, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sys_cache_data_invd_range(void * addr, size_t size); + +__pinned_func +static inline int sys_cache_data_invd_range(void * addr, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = addr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE); + } +#endif + compiler_barrier(); + return z_impl_sys_cache_data_invd_range(addr, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_cache_data_invd_range(addr, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE, sys_cache_data_invd_range, addr, size); syscall__retval = sys_cache_data_invd_range(addr, size); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE, sys_cache_data_invd_range, addr, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sys_cache_data_flush_and_invd_range(void * addr, size_t size); + +__pinned_func +static inline int sys_cache_data_flush_and_invd_range(void * addr, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = addr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE); + } +#endif + compiler_barrier(); + return z_impl_sys_cache_data_flush_and_invd_range(addr, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_cache_data_flush_and_invd_range(addr, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE, sys_cache_data_flush_and_invd_range, addr, size); syscall__retval = sys_cache_data_flush_and_invd_range(addr, size); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE, sys_cache_data_flush_and_invd_range, addr, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/can.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/can.h new file mode 100644 index 0000000..261b074 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/can.h @@ -0,0 +1,812 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CAN_H +#define Z_INCLUDE_SYSCALLS_CAN_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_can_get_core_clock(const struct device * dev, uint32_t * rate); + +__pinned_func +static inline int can_get_core_clock(const struct device * dev, uint32_t * rate) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = rate }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_CORE_CLOCK); + } +#endif + compiler_barrier(); + return z_impl_can_get_core_clock(dev, rate); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_core_clock(dev, rate) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_CORE_CLOCK, can_get_core_clock, dev, rate); syscall__retval = can_get_core_clock(dev, rate); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_CORE_CLOCK, can_get_core_clock, dev, rate, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_get_bitrate_min(const struct device * dev); + +__pinned_func +static inline uint32_t can_get_bitrate_min(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_BITRATE_MIN); + } +#endif + compiler_barrier(); + return z_impl_can_get_bitrate_min(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_bitrate_min(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_BITRATE_MIN, can_get_bitrate_min, dev); syscall__retval = can_get_bitrate_min(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_BITRATE_MIN, can_get_bitrate_min, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_get_bitrate_max(const struct device * dev); + +__pinned_func +static inline uint32_t can_get_bitrate_max(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_BITRATE_MAX); + } +#endif + compiler_barrier(); + return z_impl_can_get_bitrate_max(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_bitrate_max(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_BITRATE_MAX, can_get_bitrate_max, dev); syscall__retval = can_get_bitrate_max(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_BITRATE_MAX, can_get_bitrate_max, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_min(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_min(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_MIN); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_min(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_min(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_MIN, can_get_timing_min, dev); syscall__retval = can_get_timing_min(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_MIN, can_get_timing_min, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_max(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_max(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_MAX); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_max(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_max(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_MAX, can_get_timing_max, dev); syscall__retval = can_get_timing_max(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_MAX, can_get_timing_max, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_calc_timing(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt); + +__pinned_func +static inline int can_calc_timing(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct can_timing * val; } parm1 = { .val = res }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = bitrate }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = sample_pnt }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CAN_CALC_TIMING); + } +#endif + compiler_barrier(); + return z_impl_can_calc_timing(dev, res, bitrate, sample_pnt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_calc_timing(dev, res, bitrate, sample_pnt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_CALC_TIMING, can_calc_timing, dev, res, bitrate, sample_pnt); syscall__retval = can_calc_timing(dev, res, bitrate, sample_pnt); sys_port_trace_syscall_exit(K_SYSCALL_CAN_CALC_TIMING, can_calc_timing, dev, res, bitrate, sample_pnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_data_min(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_data_min(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_DATA_MIN); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_data_min(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_data_min(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_DATA_MIN, can_get_timing_data_min, dev); syscall__retval = can_get_timing_data_min(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_DATA_MIN, can_get_timing_data_min, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_data_max(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_data_max(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_DATA_MAX); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_data_max(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_data_max(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_DATA_MAX, can_get_timing_data_max, dev); syscall__retval = can_get_timing_data_max(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_DATA_MAX, can_get_timing_data_max, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_calc_timing_data(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt); + +__pinned_func +static inline int can_calc_timing_data(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct can_timing * val; } parm1 = { .val = res }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = bitrate }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = sample_pnt }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CAN_CALC_TIMING_DATA); + } +#endif + compiler_barrier(); + return z_impl_can_calc_timing_data(dev, res, bitrate, sample_pnt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_calc_timing_data(dev, res, bitrate, sample_pnt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_CALC_TIMING_DATA, can_calc_timing_data, dev, res, bitrate, sample_pnt); syscall__retval = can_calc_timing_data(dev, res, bitrate, sample_pnt); sys_port_trace_syscall_exit(K_SYSCALL_CAN_CALC_TIMING_DATA, can_calc_timing_data, dev, res, bitrate, sample_pnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_timing_data(const struct device * dev, const struct can_timing * timing_data); + +__pinned_func +static inline int can_set_timing_data(const struct device * dev, const struct can_timing * timing_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct can_timing * val; } parm1 = { .val = timing_data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_TIMING_DATA); + } +#endif + compiler_barrier(); + return z_impl_can_set_timing_data(dev, timing_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_timing_data(dev, timing_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_TIMING_DATA, can_set_timing_data, dev, timing_data); syscall__retval = can_set_timing_data(dev, timing_data); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_TIMING_DATA, can_set_timing_data, dev, timing_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_bitrate_data(const struct device * dev, uint32_t bitrate_data); + +__pinned_func +static inline int can_set_bitrate_data(const struct device * dev, uint32_t bitrate_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate_data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_BITRATE_DATA); + } +#endif + compiler_barrier(); + return z_impl_can_set_bitrate_data(dev, bitrate_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_bitrate_data(dev, bitrate_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_BITRATE_DATA, can_set_bitrate_data, dev, bitrate_data); syscall__retval = can_set_bitrate_data(dev, bitrate_data); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_BITRATE_DATA, can_set_bitrate_data, dev, bitrate_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_timing(const struct device * dev, const struct can_timing * timing); + +__pinned_func +static inline int can_set_timing(const struct device * dev, const struct can_timing * timing) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct can_timing * val; } parm1 = { .val = timing }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_TIMING); + } +#endif + compiler_barrier(); + return z_impl_can_set_timing(dev, timing); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_timing(dev, timing) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_TIMING, can_set_timing, dev, timing); syscall__retval = can_set_timing(dev, timing); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_TIMING, can_set_timing, dev, timing, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_get_capabilities(const struct device * dev, can_mode_t * cap); + +__pinned_func +static inline int can_get_capabilities(const struct device * dev, can_mode_t * cap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; can_mode_t * val; } parm1 = { .val = cap }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_CAPABILITIES); + } +#endif + compiler_barrier(); + return z_impl_can_get_capabilities(dev, cap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_capabilities(dev, cap) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_CAPABILITIES, can_get_capabilities, dev, cap); syscall__retval = can_get_capabilities(dev, cap); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_CAPABILITIES, can_get_capabilities, dev, cap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct device * z_impl_can_get_transceiver(const struct device * dev); + +__pinned_func +static inline const struct device * can_get_transceiver(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TRANSCEIVER); + } +#endif + compiler_barrier(); + return z_impl_can_get_transceiver(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_transceiver(dev) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TRANSCEIVER, can_get_transceiver, dev); syscall__retval = can_get_transceiver(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TRANSCEIVER, can_get_transceiver, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_start(const struct device * dev); + +__pinned_func +static inline int can_start(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_START); + } +#endif + compiler_barrier(); + return z_impl_can_start(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_start(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_START, can_start, dev); syscall__retval = can_start(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_START, can_start, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_stop(const struct device * dev); + +__pinned_func +static inline int can_stop(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STOP); + } +#endif + compiler_barrier(); + return z_impl_can_stop(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stop(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STOP, can_stop, dev); syscall__retval = can_stop(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STOP, can_stop, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_mode(const struct device * dev, can_mode_t mode); + +__pinned_func +static inline int can_set_mode(const struct device * dev, can_mode_t mode) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; can_mode_t val; } parm1 = { .val = mode }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_MODE); + } +#endif + compiler_barrier(); + return z_impl_can_set_mode(dev, mode); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_mode(dev, mode) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_MODE, can_set_mode, dev, mode); syscall__retval = can_set_mode(dev, mode); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_MODE, can_set_mode, dev, mode, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern can_mode_t z_impl_can_get_mode(const struct device * dev); + +__pinned_func +static inline can_mode_t can_get_mode(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (can_mode_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_MODE); + } +#endif + compiler_barrier(); + return z_impl_can_get_mode(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_mode(dev) ({ can_mode_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_MODE, can_get_mode, dev); syscall__retval = can_get_mode(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_MODE, can_get_mode, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_bitrate(const struct device * dev, uint32_t bitrate); + +__pinned_func +static inline int can_set_bitrate(const struct device * dev, uint32_t bitrate) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_BITRATE); + } +#endif + compiler_barrier(); + return z_impl_can_set_bitrate(dev, bitrate); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_bitrate(dev, bitrate) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_BITRATE, can_set_bitrate, dev, bitrate); syscall__retval = can_set_bitrate(dev, bitrate); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_BITRATE, can_set_bitrate, dev, bitrate, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_send(const struct device * dev, const struct can_frame * frame, k_timeout_t timeout, can_tx_callback_t callback, void * user_data); + +__pinned_func +static inline int can_send(const struct device * dev, const struct can_frame * frame, k_timeout_t timeout, can_tx_callback_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct can_frame * val; } parm1 = { .val = frame }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + union { uintptr_t x; can_tx_callback_t val; } parm3 = { .val = callback }; + union { uintptr_t x; void * val; } parm4 = { .val = user_data }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, parm3.x, parm4.x, K_SYSCALL_CAN_SEND); + } +#endif + compiler_barrier(); + return z_impl_can_send(dev, frame, timeout, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_send(dev, frame, timeout, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SEND, can_send, dev, frame, timeout, callback, user_data); syscall__retval = can_send(dev, frame, timeout, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SEND, can_send, dev, frame, timeout, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_add_rx_filter_msgq(const struct device * dev, struct k_msgq * msgq, const struct can_filter * filter); + +__pinned_func +static inline int can_add_rx_filter_msgq(const struct device * dev, struct k_msgq * msgq, const struct can_filter * filter) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct k_msgq * val; } parm1 = { .val = msgq }; + union { uintptr_t x; const struct can_filter * val; } parm2 = { .val = filter }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ); + } +#endif + compiler_barrier(); + return z_impl_can_add_rx_filter_msgq(dev, msgq, filter); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_add_rx_filter_msgq(dev, msgq, filter) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ, can_add_rx_filter_msgq, dev, msgq, filter); syscall__retval = can_add_rx_filter_msgq(dev, msgq, filter); sys_port_trace_syscall_exit(K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ, can_add_rx_filter_msgq, dev, msgq, filter, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_can_remove_rx_filter(const struct device * dev, int filter_id); + +__pinned_func +static inline void can_remove_rx_filter(const struct device * dev, int filter_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = filter_id }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_REMOVE_RX_FILTER); + return; + } +#endif + compiler_barrier(); + z_impl_can_remove_rx_filter(dev, filter_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_remove_rx_filter(dev, filter_id) do { sys_port_trace_syscall_enter(K_SYSCALL_CAN_REMOVE_RX_FILTER, can_remove_rx_filter, dev, filter_id); can_remove_rx_filter(dev, filter_id); sys_port_trace_syscall_exit(K_SYSCALL_CAN_REMOVE_RX_FILTER, can_remove_rx_filter, dev, filter_id); } while(false) +#endif +#endif + + +extern int z_impl_can_get_max_filters(const struct device * dev, bool ide); + +__pinned_func +static inline int can_get_max_filters(const struct device * dev, bool ide) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = ide }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_MAX_FILTERS); + } +#endif + compiler_barrier(); + return z_impl_can_get_max_filters(dev, ide); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_max_filters(dev, ide) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_MAX_FILTERS, can_get_max_filters, dev, ide); syscall__retval = can_get_max_filters(dev, ide); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_MAX_FILTERS, can_get_max_filters, dev, ide, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_get_state(const struct device * dev, enum can_state * state, struct can_bus_err_cnt * err_cnt); + +__pinned_func +static inline int can_get_state(const struct device * dev, enum can_state * state, struct can_bus_err_cnt * err_cnt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum can_state * val; } parm1 = { .val = state }; + union { uintptr_t x; struct can_bus_err_cnt * val; } parm2 = { .val = err_cnt }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CAN_GET_STATE); + } +#endif + compiler_barrier(); + return z_impl_can_get_state(dev, state, err_cnt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_state(dev, state, err_cnt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_STATE, can_get_state, dev, state, err_cnt); syscall__retval = can_get_state(dev, state, err_cnt); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_STATE, can_get_state, dev, state, err_cnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_recover(const struct device * dev, k_timeout_t timeout); + +__pinned_func +static inline int can_recover(const struct device * dev, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_CAN_RECOVER); + } +#endif + compiler_barrier(); + return z_impl_can_recover(dev, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_recover(dev, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_RECOVER, can_recover, dev, timeout); syscall__retval = can_recover(dev, timeout); sys_port_trace_syscall_exit(K_SYSCALL_CAN_RECOVER, can_recover, dev, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_bit_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_bit_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_bit_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_bit_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT_ERRORS, can_stats_get_bit_errors, dev); syscall__retval = can_stats_get_bit_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT_ERRORS, can_stats_get_bit_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_bit0_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_bit0_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_bit0_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_bit0_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS, can_stats_get_bit0_errors, dev); syscall__retval = can_stats_get_bit0_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS, can_stats_get_bit0_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_bit1_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_bit1_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_bit1_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_bit1_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS, can_stats_get_bit1_errors, dev); syscall__retval = can_stats_get_bit1_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS, can_stats_get_bit1_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_stuff_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_stuff_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_stuff_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_stuff_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS, can_stats_get_stuff_errors, dev); syscall__retval = can_stats_get_stuff_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS, can_stats_get_stuff_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_crc_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_crc_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_CRC_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_crc_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_crc_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_CRC_ERRORS, can_stats_get_crc_errors, dev); syscall__retval = can_stats_get_crc_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_CRC_ERRORS, can_stats_get_crc_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_form_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_form_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_FORM_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_form_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_form_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_FORM_ERRORS, can_stats_get_form_errors, dev); syscall__retval = can_stats_get_form_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_FORM_ERRORS, can_stats_get_form_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_ack_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_ack_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_ACK_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_ack_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_ack_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_ACK_ERRORS, can_stats_get_ack_errors, dev); syscall__retval = can_stats_get_ack_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_ACK_ERRORS, can_stats_get_ack_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_rx_overruns(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_rx_overruns(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_rx_overruns(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_rx_overruns(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS, can_stats_get_rx_overruns, dev); syscall__retval = can_stats_get_rx_overruns(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS, can_stats_get_rx_overruns, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/charger.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/charger.h new file mode 100644 index 0000000..e78ba1d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/charger.h @@ -0,0 +1,102 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CHARGER_H +#define Z_INCLUDE_SYSCALLS_CHARGER_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_charger_get_prop(const struct device * dev, const charger_prop_t prop, union charger_propval * val); + +__pinned_func +static inline int charger_get_prop(const struct device * dev, const charger_prop_t prop, union charger_propval * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const charger_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; union charger_propval * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CHARGER_GET_PROP); + } +#endif + compiler_barrier(); + return z_impl_charger_get_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define charger_get_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_GET_PROP, charger_get_prop, dev, prop, val); syscall__retval = charger_get_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_GET_PROP, charger_get_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_charger_set_prop(const struct device * dev, const charger_prop_t prop, const union charger_propval * val); + +__pinned_func +static inline int charger_set_prop(const struct device * dev, const charger_prop_t prop, const union charger_propval * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const charger_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; const union charger_propval * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CHARGER_SET_PROP); + } +#endif + compiler_barrier(); + return z_impl_charger_set_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define charger_set_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_SET_PROP, charger_set_prop, dev, prop, val); syscall__retval = charger_set_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_SET_PROP, charger_set_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_charger_charge_enable(const struct device * dev, const bool enable); + +__pinned_func +static inline int charger_charge_enable(const struct device * dev, const bool enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const bool val; } parm1 = { .val = enable }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CHARGER_CHARGE_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_charger_charge_enable(dev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define charger_charge_enable(dev, enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_CHARGE_ENABLE, charger_charge_enable, dev, enable); syscall__retval = charger_charge_enable(dev, enable); sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_CHARGE_ENABLE, charger_charge_enable, dev, enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/clock.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/clock.h new file mode 100644 index 0000000..36a99e6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/clock.h @@ -0,0 +1,102 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CLOCK_H +#define Z_INCLUDE_SYSCALLS_CLOCK_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_sys_clock_getrtoffset(struct timespec * tp); + +__pinned_func +static inline void sys_clock_getrtoffset(struct timespec * tp) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct timespec * val; } parm0 = { .val = tp }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_SYS_CLOCK_GETRTOFFSET); + return; + } +#endif + compiler_barrier(); + z_impl_sys_clock_getrtoffset(tp); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_clock_getrtoffset(tp) do { sys_port_trace_syscall_enter(K_SYSCALL_SYS_CLOCK_GETRTOFFSET, sys_clock_getrtoffset, tp); sys_clock_getrtoffset(tp); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CLOCK_GETRTOFFSET, sys_clock_getrtoffset, tp); } while(false) +#endif +#endif + + +extern int z_impl_sys_clock_settime(int clock_id, const struct timespec * tp); + +__pinned_func +static inline int sys_clock_settime(int clock_id, const struct timespec * tp) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = clock_id }; + union { uintptr_t x; const struct timespec * val; } parm1 = { .val = tp }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CLOCK_SETTIME); + } +#endif + compiler_barrier(); + return z_impl_sys_clock_settime(clock_id, tp); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_clock_settime(clock_id, tp) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CLOCK_SETTIME, sys_clock_settime, clock_id, tp); syscall__retval = sys_clock_settime(clock_id, tp); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CLOCK_SETTIME, sys_clock_settime, clock_id, tp, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sys_clock_nanosleep(int clock_id, int flags, const struct timespec * rqtp, struct timespec * rmtp); + +__pinned_func +static inline int sys_clock_nanosleep(int clock_id, int flags, const struct timespec * rqtp, struct timespec * rmtp) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = clock_id }; + union { uintptr_t x; int val; } parm1 = { .val = flags }; + union { uintptr_t x; const struct timespec * val; } parm2 = { .val = rqtp }; + union { uintptr_t x; struct timespec * val; } parm3 = { .val = rmtp }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SYS_CLOCK_NANOSLEEP); + } +#endif + compiler_barrier(); + return z_impl_sys_clock_nanosleep(clock_id, flags, rqtp, rmtp); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_clock_nanosleep(clock_id, flags, rqtp, rmtp) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CLOCK_NANOSLEEP, sys_clock_nanosleep, clock_id, flags, rqtp, rmtp); syscall__retval = sys_clock_nanosleep(clock_id, flags, rqtp, rmtp); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CLOCK_NANOSLEEP, sys_clock_nanosleep, clock_id, flags, rqtp, rmtp, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/comparator.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/comparator.h new file mode 100644 index 0000000..dfae6e5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/comparator.h @@ -0,0 +1,98 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_COMPARATOR_H +#define Z_INCLUDE_SYSCALLS_COMPARATOR_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_comparator_get_output(const struct device * dev); + +__pinned_func +static inline int comparator_get_output(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COMPARATOR_GET_OUTPUT); + } +#endif + compiler_barrier(); + return z_impl_comparator_get_output(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define comparator_get_output(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COMPARATOR_GET_OUTPUT, comparator_get_output, dev); syscall__retval = comparator_get_output(dev); sys_port_trace_syscall_exit(K_SYSCALL_COMPARATOR_GET_OUTPUT, comparator_get_output, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_comparator_set_trigger(const struct device * dev, enum comparator_trigger trigger); + +__pinned_func +static inline int comparator_set_trigger(const struct device * dev, enum comparator_trigger trigger) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum comparator_trigger val; } parm1 = { .val = trigger }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COMPARATOR_SET_TRIGGER); + } +#endif + compiler_barrier(); + return z_impl_comparator_set_trigger(dev, trigger); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define comparator_set_trigger(dev, trigger) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COMPARATOR_SET_TRIGGER, comparator_set_trigger, dev, trigger); syscall__retval = comparator_set_trigger(dev, trigger); sys_port_trace_syscall_exit(K_SYSCALL_COMPARATOR_SET_TRIGGER, comparator_set_trigger, dev, trigger, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_comparator_trigger_is_pending(const struct device * dev); + +__pinned_func +static inline int comparator_trigger_is_pending(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING); + } +#endif + compiler_barrier(); + return z_impl_comparator_trigger_is_pending(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define comparator_trigger_is_pending(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING, comparator_trigger_is_pending, dev); syscall__retval = comparator_trigger_is_pending(dev); sys_port_trace_syscall_exit(K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING, comparator_trigger_is_pending, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/counter.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/counter.h new file mode 100644 index 0000000..430fc9c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/counter.h @@ -0,0 +1,880 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_COUNTER_H +#define Z_INCLUDE_SYSCALLS_COUNTER_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern bool z_impl_counter_is_counting_up(const struct device * dev); + +__pinned_func +static inline bool counter_is_counting_up(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_IS_COUNTING_UP); + } +#endif + compiler_barrier(); + return z_impl_counter_is_counting_up(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_is_counting_up(dev) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_IS_COUNTING_UP, counter_is_counting_up, dev); syscall__retval = counter_is_counting_up(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_IS_COUNTING_UP, counter_is_counting_up, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint8_t z_impl_counter_get_num_of_channels(const struct device * dev); + +__pinned_func +static inline uint8_t counter_get_num_of_channels(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint8_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS); + } +#endif + compiler_barrier(); + return z_impl_counter_get_num_of_channels(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_num_of_channels(dev) ({ uint8_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS, counter_get_num_of_channels, dev); syscall__retval = counter_get_num_of_channels(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS, counter_get_num_of_channels, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_frequency(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_frequency(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_FREQUENCY); + } +#endif + compiler_barrier(); + return z_impl_counter_get_frequency(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_frequency(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_FREQUENCY, counter_get_frequency, dev); syscall__retval = counter_get_frequency(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_FREQUENCY, counter_get_frequency, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_get_frequency_64(const struct device * dev); + +__pinned_func +static inline uint64_t counter_get_frequency_64(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_GET_FREQUENCY_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_get_frequency_64(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_frequency_64(dev) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_FREQUENCY_64, counter_get_frequency_64, dev); syscall__retval = counter_get_frequency_64(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_FREQUENCY_64, counter_get_frequency_64, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_us_to_ticks(const struct device * dev, uint64_t us); + +__pinned_func +static inline uint32_t counter_us_to_ticks(const struct device * dev, uint64_t us) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = us }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_COUNTER_US_TO_TICKS); + } +#endif + compiler_barrier(); + return z_impl_counter_us_to_ticks(dev, us); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_us_to_ticks(dev, us) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_US_TO_TICKS, counter_us_to_ticks, dev, us); syscall__retval = counter_us_to_ticks(dev, us); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_US_TO_TICKS, counter_us_to_ticks, dev, us, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_us_to_ticks_64(const struct device * dev, uint64_t us); + +__pinned_func +static inline uint64_t counter_us_to_ticks_64(const struct device * dev, uint64_t us) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = us }; + (void) arch_syscall_invoke4(parm0.x, parm1.split.lo, parm1.split.hi, (uintptr_t)&ret64, K_SYSCALL_COUNTER_US_TO_TICKS_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_us_to_ticks_64(dev, us); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_us_to_ticks_64(dev, us) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_US_TO_TICKS_64, counter_us_to_ticks_64, dev, us); syscall__retval = counter_us_to_ticks_64(dev, us); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_US_TO_TICKS_64, counter_us_to_ticks_64, dev, us, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_ticks_to_us(const struct device * dev, uint32_t ticks); + +__pinned_func +static inline uint64_t counter_ticks_to_us(const struct device * dev, uint32_t ticks) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_TICKS_TO_US); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_ticks_to_us(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ticks_to_us(dev, ticks) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_TICKS_TO_US, counter_ticks_to_us, dev, ticks); syscall__retval = counter_ticks_to_us(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_TICKS_TO_US, counter_ticks_to_us, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_ticks_to_us_64(const struct device * dev, uint64_t ticks); + +__pinned_func +static inline uint64_t counter_ticks_to_us_64(const struct device * dev, uint64_t ticks) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = ticks }; + (void) arch_syscall_invoke4(parm0.x, parm1.split.lo, parm1.split.hi, (uintptr_t)&ret64, K_SYSCALL_COUNTER_TICKS_TO_US_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_ticks_to_us_64(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ticks_to_us_64(dev, ticks) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_TICKS_TO_US_64, counter_ticks_to_us_64, dev, ticks); syscall__retval = counter_ticks_to_us_64(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_TICKS_TO_US_64, counter_ticks_to_us_64, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_ns_to_ticks(const struct device * dev, uint64_t ns); + +__pinned_func +static inline uint32_t counter_ns_to_ticks(const struct device * dev, uint64_t ns) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = ns }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_COUNTER_NS_TO_TICKS); + } +#endif + compiler_barrier(); + return z_impl_counter_ns_to_ticks(dev, ns); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ns_to_ticks(dev, ns) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_NS_TO_TICKS, counter_ns_to_ticks, dev, ns); syscall__retval = counter_ns_to_ticks(dev, ns); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_NS_TO_TICKS, counter_ns_to_ticks, dev, ns, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_ns_to_ticks_64(const struct device * dev, uint64_t ns); + +__pinned_func +static inline uint64_t counter_ns_to_ticks_64(const struct device * dev, uint64_t ns) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = ns }; + (void) arch_syscall_invoke4(parm0.x, parm1.split.lo, parm1.split.hi, (uintptr_t)&ret64, K_SYSCALL_COUNTER_NS_TO_TICKS_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_ns_to_ticks_64(dev, ns); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ns_to_ticks_64(dev, ns) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_NS_TO_TICKS_64, counter_ns_to_ticks_64, dev, ns); syscall__retval = counter_ns_to_ticks_64(dev, ns); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_NS_TO_TICKS_64, counter_ns_to_ticks_64, dev, ns, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_ticks_to_ns(const struct device * dev, uint32_t ticks); + +__pinned_func +static inline uint64_t counter_ticks_to_ns(const struct device * dev, uint32_t ticks) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_TICKS_TO_NS); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_ticks_to_ns(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ticks_to_ns(dev, ticks) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_TICKS_TO_NS, counter_ticks_to_ns, dev, ticks); syscall__retval = counter_ticks_to_ns(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_TICKS_TO_NS, counter_ticks_to_ns, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_ticks_to_ns_64(const struct device * dev, uint64_t ticks); + +__pinned_func +static inline uint64_t counter_ticks_to_ns_64(const struct device * dev, uint64_t ticks) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = ticks }; + (void) arch_syscall_invoke4(parm0.x, parm1.split.lo, parm1.split.hi, (uintptr_t)&ret64, K_SYSCALL_COUNTER_TICKS_TO_NS_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_ticks_to_ns_64(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ticks_to_ns_64(dev, ticks) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_TICKS_TO_NS_64, counter_ticks_to_ns_64, dev, ticks); syscall__retval = counter_ticks_to_ns_64(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_TICKS_TO_NS_64, counter_ticks_to_ns_64, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_max_top_value(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_max_top_value(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_get_max_top_value(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_max_top_value(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE, counter_get_max_top_value, dev); syscall__retval = counter_get_max_top_value(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE, counter_get_max_top_value, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_start(const struct device * dev); + +__pinned_func +static inline int counter_start(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_START); + } +#endif + compiler_barrier(); + return z_impl_counter_start(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_start(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_START, counter_start, dev); syscall__retval = counter_start(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_START, counter_start, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_stop(const struct device * dev); + +__pinned_func +static inline int counter_stop(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_STOP); + } +#endif + compiler_barrier(); + return z_impl_counter_stop(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_stop(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_STOP, counter_stop, dev); syscall__retval = counter_stop(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_STOP, counter_stop, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_get_value(const struct device * dev, uint32_t * ticks); + +__pinned_func +static inline int counter_get_value(const struct device * dev, uint32_t * ticks) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = ticks }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_get_value(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_value(dev, ticks) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_VALUE, counter_get_value, dev, ticks); syscall__retval = counter_get_value(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_VALUE, counter_get_value, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_reset(const struct device * dev); + +__pinned_func +static inline int counter_reset(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_RESET); + } +#endif + compiler_barrier(); + return z_impl_counter_reset(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_reset(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_RESET, counter_reset, dev); syscall__retval = counter_reset(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_RESET, counter_reset, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_value(const struct device * dev, uint32_t ticks); + +__pinned_func +static inline int counter_set_value(const struct device * dev, uint32_t ticks) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_SET_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_set_value(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_value(dev, ticks) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_VALUE, counter_set_value, dev, ticks); syscall__retval = counter_set_value(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_VALUE, counter_set_value, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_channel_alarm(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg * alarm_cfg); + +__pinned_func +static inline int counter_set_channel_alarm(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg * alarm_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + union { uintptr_t x; const struct counter_alarm_cfg * val; } parm2 = { .val = alarm_cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_CHANNEL_ALARM); + } +#endif + compiler_barrier(); + return z_impl_counter_set_channel_alarm(dev, chan_id, alarm_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_channel_alarm(dev, chan_id, alarm_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM, counter_set_channel_alarm, dev, chan_id, alarm_cfg); syscall__retval = counter_set_channel_alarm(dev, chan_id, alarm_cfg); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM, counter_set_channel_alarm, dev, chan_id, alarm_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_cancel_channel_alarm(const struct device * dev, uint8_t chan_id); + +__pinned_func +static inline int counter_cancel_channel_alarm(const struct device * dev, uint8_t chan_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM); + } +#endif + compiler_barrier(); + return z_impl_counter_cancel_channel_alarm(dev, chan_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_cancel_channel_alarm(dev, chan_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM, counter_cancel_channel_alarm, dev, chan_id); syscall__retval = counter_cancel_channel_alarm(dev, chan_id); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM, counter_cancel_channel_alarm, dev, chan_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_top_value(const struct device * dev, const struct counter_top_cfg * cfg); + +__pinned_func +static inline int counter_set_top_value(const struct device * dev, const struct counter_top_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct counter_top_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_SET_TOP_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_set_top_value(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_top_value(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_TOP_VALUE, counter_set_top_value, dev, cfg); syscall__retval = counter_set_top_value(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_TOP_VALUE, counter_set_top_value, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_pending_int(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_pending_int(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_PENDING_INT); + } +#endif + compiler_barrier(); + return z_impl_counter_get_pending_int(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_pending_int(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_PENDING_INT, counter_get_pending_int, dev); syscall__retval = counter_get_pending_int(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_PENDING_INT, counter_get_pending_int, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_top_value(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_top_value(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_TOP_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_get_top_value(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_top_value(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_TOP_VALUE, counter_get_top_value, dev); syscall__retval = counter_get_top_value(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_TOP_VALUE, counter_get_top_value, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_guard_period(const struct device * dev, uint32_t ticks, uint32_t flags); + +__pinned_func +static inline int counter_set_guard_period(const struct device * dev, uint32_t ticks, uint32_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_GUARD_PERIOD); + } +#endif + compiler_barrier(); + return z_impl_counter_set_guard_period(dev, ticks, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_guard_period(dev, ticks, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_GUARD_PERIOD, counter_set_guard_period, dev, ticks, flags); syscall__retval = counter_set_guard_period(dev, ticks, flags); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_GUARD_PERIOD, counter_set_guard_period, dev, ticks, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_guard_period(const struct device * dev, uint32_t flags); + +__pinned_func +static inline uint32_t counter_get_guard_period(const struct device * dev, uint32_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = flags }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_GUARD_PERIOD); + } +#endif + compiler_barrier(); + return z_impl_counter_get_guard_period(dev, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_guard_period(dev, flags) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_GUARD_PERIOD, counter_get_guard_period, dev, flags); syscall__retval = counter_get_guard_period(dev, flags); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_GUARD_PERIOD, counter_get_guard_period, dev, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_get_max_top_value_64(const struct device * dev); + +__pinned_func +static inline uint64_t counter_get_max_top_value_64(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_get_max_top_value_64(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_max_top_value_64(dev) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE_64, counter_get_max_top_value_64, dev); syscall__retval = counter_get_max_top_value_64(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE_64, counter_get_max_top_value_64, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_top_value_64(const struct device * dev, const struct counter_top_cfg_64 * cfg); + +__pinned_func +static inline int counter_set_top_value_64(const struct device * dev, const struct counter_top_cfg_64 * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct counter_top_cfg_64 * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_SET_TOP_VALUE_64); + } +#endif + compiler_barrier(); + return z_impl_counter_set_top_value_64(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_top_value_64(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_TOP_VALUE_64, counter_set_top_value_64, dev, cfg); syscall__retval = counter_set_top_value_64(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_TOP_VALUE_64, counter_set_top_value_64, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_channel_alarm_64(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg_64 * alarm_cfg); + +__pinned_func +static inline int counter_set_channel_alarm_64(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg_64 * alarm_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + union { uintptr_t x; const struct counter_alarm_cfg_64 * val; } parm2 = { .val = alarm_cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_CHANNEL_ALARM_64); + } +#endif + compiler_barrier(); + return z_impl_counter_set_channel_alarm_64(dev, chan_id, alarm_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_channel_alarm_64(dev, chan_id, alarm_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM_64, counter_set_channel_alarm_64, dev, chan_id, alarm_cfg); syscall__retval = counter_set_channel_alarm_64(dev, chan_id, alarm_cfg); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM_64, counter_set_channel_alarm_64, dev, chan_id, alarm_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_get_top_value_64(const struct device * dev); + +__pinned_func +static inline uint64_t counter_get_top_value_64(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_GET_TOP_VALUE_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_get_top_value_64(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_top_value_64(dev) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_TOP_VALUE_64, counter_get_top_value_64, dev); syscall__retval = counter_get_top_value_64(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_TOP_VALUE_64, counter_get_top_value_64, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_guard_period_64(const struct device * dev, uint64_t ticks, uint32_t flags); + +__pinned_func +static inline int counter_set_guard_period_64(const struct device * dev, uint64_t ticks, uint32_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = ticks }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke4(parm0.x, parm1.split.lo, parm1.split.hi, parm2.x, K_SYSCALL_COUNTER_SET_GUARD_PERIOD_64); + } +#endif + compiler_barrier(); + return z_impl_counter_set_guard_period_64(dev, ticks, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_guard_period_64(dev, ticks, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_GUARD_PERIOD_64, counter_set_guard_period_64, dev, ticks, flags); syscall__retval = counter_set_guard_period_64(dev, ticks, flags); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_GUARD_PERIOD_64, counter_set_guard_period_64, dev, ticks, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_get_guard_period_64(const struct device * dev, uint32_t flags); + +__pinned_func +static inline uint64_t counter_get_guard_period_64(const struct device * dev, uint32_t flags) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = flags }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_GET_GUARD_PERIOD_64); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_get_guard_period_64(dev, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_guard_period_64(dev, flags) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_GUARD_PERIOD_64, counter_get_guard_period_64, dev, flags); syscall__retval = counter_get_guard_period_64(dev, flags); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_GUARD_PERIOD_64, counter_get_guard_period_64, dev, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_get_value_64(const struct device * dev, uint64_t * ticks); + +__pinned_func +static inline int counter_get_value_64(const struct device * dev, uint64_t * ticks) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint64_t * val; } parm1 = { .val = ticks }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_VALUE_64); + } +#endif + compiler_barrier(); + return z_impl_counter_get_value_64(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_value_64(dev, ticks) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_VALUE_64, counter_get_value_64, dev, ticks); syscall__retval = counter_get_value_64(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_VALUE_64, counter_get_value_64, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_value_64(const struct device * dev, uint64_t ticks); + +__pinned_func +static inline int counter_set_value_64(const struct device * dev, uint64_t ticks) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = ticks }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_COUNTER_SET_VALUE_64); + } +#endif + compiler_barrier(); + return z_impl_counter_set_value_64(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_value_64(dev, ticks) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_VALUE_64, counter_set_value_64, dev, ticks); syscall__retval = counter_set_value_64(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_VALUE_64, counter_set_value_64, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_enable_capture(const struct device * dev, uint8_t chan_id); + +__pinned_func +static inline int counter_enable_capture(const struct device * dev, uint8_t chan_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_ENABLE_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_counter_enable_capture(dev, chan_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_enable_capture(dev, chan_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_ENABLE_CAPTURE, counter_enable_capture, dev, chan_id); syscall__retval = counter_enable_capture(dev, chan_id); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_ENABLE_CAPTURE, counter_enable_capture, dev, chan_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_disable_capture(const struct device * dev, uint8_t chan_id); + +__pinned_func +static inline int counter_disable_capture(const struct device * dev, uint8_t chan_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_DISABLE_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_counter_disable_capture(dev, chan_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_disable_capture(dev, chan_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_DISABLE_CAPTURE, counter_disable_capture, dev, chan_id); syscall__retval = counter_disable_capture(dev, chan_id); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_DISABLE_CAPTURE, counter_disable_capture, dev, chan_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/crc.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/crc.h new file mode 100644 index 0000000..c719ca6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/crc.h @@ -0,0 +1,102 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CRC_H +#define Z_INCLUDE_SYSCALLS_CRC_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_crc_begin(const struct device * dev, struct crc_ctx * ctx); + +__pinned_func +static inline int crc_begin(const struct device * dev, struct crc_ctx * ctx) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct crc_ctx * val; } parm1 = { .val = ctx }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CRC_BEGIN); + } +#endif + compiler_barrier(); + return z_impl_crc_begin(dev, ctx); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define crc_begin(dev, ctx) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CRC_BEGIN, crc_begin, dev, ctx); syscall__retval = crc_begin(dev, ctx); sys_port_trace_syscall_exit(K_SYSCALL_CRC_BEGIN, crc_begin, dev, ctx, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_crc_update(const struct device * dev, struct crc_ctx * ctx, const void * buffer, size_t bufsize); + +__pinned_func +static inline int crc_update(const struct device * dev, struct crc_ctx * ctx, const void * buffer, size_t bufsize) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct crc_ctx * val; } parm1 = { .val = ctx }; + union { uintptr_t x; const void * val; } parm2 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm3 = { .val = bufsize }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CRC_UPDATE); + } +#endif + compiler_barrier(); + return z_impl_crc_update(dev, ctx, buffer, bufsize); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define crc_update(dev, ctx, buffer, bufsize) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CRC_UPDATE, crc_update, dev, ctx, buffer, bufsize); syscall__retval = crc_update(dev, ctx, buffer, bufsize); sys_port_trace_syscall_exit(K_SYSCALL_CRC_UPDATE, crc_update, dev, ctx, buffer, bufsize, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_crc_finish(const struct device * dev, struct crc_ctx * ctx); + +__pinned_func +static inline int crc_finish(const struct device * dev, struct crc_ctx * ctx) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct crc_ctx * val; } parm1 = { .val = ctx }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CRC_FINISH); + } +#endif + compiler_barrier(); + return z_impl_crc_finish(dev, ctx); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define crc_finish(dev, ctx) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CRC_FINISH, crc_finish, dev, ctx); syscall__retval = crc_finish(dev, ctx); sys_port_trace_syscall_exit(K_SYSCALL_CRC_FINISH, crc_finish, dev, ctx, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/dac.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/dac.h new file mode 100644 index 0000000..4e61714 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/dac.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DAC_H +#define Z_INCLUDE_SYSCALLS_DAC_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_dac_channel_setup(const struct device * dev, const struct dac_channel_cfg * channel_cfg); + +__pinned_func +static inline int dac_channel_setup(const struct device * dev, const struct dac_channel_cfg * channel_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct dac_channel_cfg * val; } parm1 = { .val = channel_cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DAC_CHANNEL_SETUP); + } +#endif + compiler_barrier(); + return z_impl_dac_channel_setup(dev, channel_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dac_channel_setup(dev, channel_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAC_CHANNEL_SETUP, dac_channel_setup, dev, channel_cfg); syscall__retval = dac_channel_setup(dev, channel_cfg); sys_port_trace_syscall_exit(K_SYSCALL_DAC_CHANNEL_SETUP, dac_channel_setup, dev, channel_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dac_write_value(const struct device * dev, uint8_t channel, uint32_t value); + +__pinned_func +static inline int dac_write_value(const struct device * dev, uint8_t channel, uint32_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAC_WRITE_VALUE); + } +#endif + compiler_barrier(); + return z_impl_dac_write_value(dev, channel, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dac_write_value(dev, channel, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAC_WRITE_VALUE, dac_write_value, dev, channel, value); syscall__retval = dac_write_value(dev, channel, value); sys_port_trace_syscall_exit(K_SYSCALL_DAC_WRITE_VALUE, dac_write_value, dev, channel, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/dai.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/dai.h new file mode 100644 index 0000000..0a62f00 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/dai.h @@ -0,0 +1,298 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DAI_H +#define Z_INCLUDE_SYSCALLS_DAI_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_dai_probe(const struct device * dev); + +__pinned_func +static inline int dai_probe(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DAI_PROBE); + } +#endif + compiler_barrier(); + return z_impl_dai_probe(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_probe(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_PROBE, dai_probe, dev); syscall__retval = dai_probe(dev); sys_port_trace_syscall_exit(K_SYSCALL_DAI_PROBE, dai_probe, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_remove(const struct device * dev); + +__pinned_func +static inline int dai_remove(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DAI_REMOVE); + } +#endif + compiler_barrier(); + return z_impl_dai_remove(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_remove(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_REMOVE, dai_remove, dev); syscall__retval = dai_remove(dev); sys_port_trace_syscall_exit(K_SYSCALL_DAI_REMOVE, dai_remove, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_config_set(const struct device * dev, const struct dai_config * cfg, const void * bespoke_cfg, size_t size); + +__pinned_func +static inline int dai_config_set(const struct device * dev, const struct dai_config * cfg, const void * bespoke_cfg, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct dai_config * val; } parm1 = { .val = cfg }; + union { uintptr_t x; const void * val; } parm2 = { .val = bespoke_cfg }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_DAI_CONFIG_SET); + } +#endif + compiler_barrier(); + return z_impl_dai_config_set(dev, cfg, bespoke_cfg, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_config_set(dev, cfg, bespoke_cfg, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_CONFIG_SET, dai_config_set, dev, cfg, bespoke_cfg, size); syscall__retval = dai_config_set(dev, cfg, bespoke_cfg, size); sys_port_trace_syscall_exit(K_SYSCALL_DAI_CONFIG_SET, dai_config_set, dev, cfg, bespoke_cfg, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_config_get(const struct device * dev, struct dai_config * cfg, enum dai_dir dir); + +__pinned_func +static inline int dai_config_get(const struct device * dev, struct dai_config * cfg, enum dai_dir dir) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct dai_config * val; } parm1 = { .val = cfg }; + union { uintptr_t x; enum dai_dir val; } parm2 = { .val = dir }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAI_CONFIG_GET); + } +#endif + compiler_barrier(); + return z_impl_dai_config_get(dev, cfg, dir); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_config_get(dev, cfg, dir) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_CONFIG_GET, dai_config_get, dev, cfg, dir); syscall__retval = dai_config_get(dev, cfg, dir); sys_port_trace_syscall_exit(K_SYSCALL_DAI_CONFIG_GET, dai_config_get, dev, cfg, dir, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_get_properties_copy(const struct device * dev, enum dai_dir dir, int stream_id, struct dai_properties * dst); + +__pinned_func +static inline int dai_get_properties_copy(const struct device * dev, enum dai_dir dir, int stream_id, struct dai_properties * dst) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum dai_dir val; } parm1 = { .val = dir }; + union { uintptr_t x; int val; } parm2 = { .val = stream_id }; + union { uintptr_t x; struct dai_properties * val; } parm3 = { .val = dst }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_DAI_GET_PROPERTIES_COPY); + } +#endif + compiler_barrier(); + return z_impl_dai_get_properties_copy(dev, dir, stream_id, dst); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_get_properties_copy(dev, dir, stream_id, dst) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_GET_PROPERTIES_COPY, dai_get_properties_copy, dev, dir, stream_id, dst); syscall__retval = dai_get_properties_copy(dev, dir, stream_id, dst); sys_port_trace_syscall_exit(K_SYSCALL_DAI_GET_PROPERTIES_COPY, dai_get_properties_copy, dev, dir, stream_id, dst, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_trigger(const struct device * dev, enum dai_dir dir, enum dai_trigger_cmd cmd); + +__pinned_func +static inline int dai_trigger(const struct device * dev, enum dai_dir dir, enum dai_trigger_cmd cmd) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum dai_dir val; } parm1 = { .val = dir }; + union { uintptr_t x; enum dai_trigger_cmd val; } parm2 = { .val = cmd }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAI_TRIGGER); + } +#endif + compiler_barrier(); + return z_impl_dai_trigger(dev, dir, cmd); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_trigger(dev, dir, cmd) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_TRIGGER, dai_trigger, dev, dir, cmd); syscall__retval = dai_trigger(dev, dir, cmd); sys_port_trace_syscall_exit(K_SYSCALL_DAI_TRIGGER, dai_trigger, dev, dir, cmd, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_ts_config(const struct device * dev, struct dai_ts_cfg * cfg); + +__pinned_func +static inline int dai_ts_config(const struct device * dev, struct dai_ts_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct dai_ts_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DAI_TS_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_dai_ts_config(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_ts_config(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_TS_CONFIG, dai_ts_config, dev, cfg); syscall__retval = dai_ts_config(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_DAI_TS_CONFIG, dai_ts_config, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_ts_start(const struct device * dev, struct dai_ts_cfg * cfg); + +__pinned_func +static inline int dai_ts_start(const struct device * dev, struct dai_ts_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct dai_ts_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DAI_TS_START); + } +#endif + compiler_barrier(); + return z_impl_dai_ts_start(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_ts_start(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_TS_START, dai_ts_start, dev, cfg); syscall__retval = dai_ts_start(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_DAI_TS_START, dai_ts_start, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_ts_stop(const struct device * dev, struct dai_ts_cfg * cfg); + +__pinned_func +static inline int dai_ts_stop(const struct device * dev, struct dai_ts_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct dai_ts_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DAI_TS_STOP); + } +#endif + compiler_barrier(); + return z_impl_dai_ts_stop(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_ts_stop(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_TS_STOP, dai_ts_stop, dev, cfg); syscall__retval = dai_ts_stop(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_DAI_TS_STOP, dai_ts_stop, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_ts_get(const struct device * dev, struct dai_ts_cfg * cfg, struct dai_ts_data * tsd); + +__pinned_func +static inline int dai_ts_get(const struct device * dev, struct dai_ts_cfg * cfg, struct dai_ts_data * tsd) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct dai_ts_cfg * val; } parm1 = { .val = cfg }; + union { uintptr_t x; struct dai_ts_data * val; } parm2 = { .val = tsd }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAI_TS_GET); + } +#endif + compiler_barrier(); + return z_impl_dai_ts_get(dev, cfg, tsd); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_ts_get(dev, cfg, tsd) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_TS_GET, dai_ts_get, dev, cfg, tsd); syscall__retval = dai_ts_get(dev, cfg, tsd); sys_port_trace_syscall_exit(K_SYSCALL_DAI_TS_GET, dai_ts_get, dev, cfg, tsd, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dai_config_update(const struct device * dev, const void * bespoke_cfg, size_t size); + +__pinned_func +static inline int dai_config_update(const struct device * dev, const void * bespoke_cfg, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const void * val; } parm1 = { .val = bespoke_cfg }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAI_CONFIG_UPDATE); + } +#endif + compiler_barrier(); + return z_impl_dai_config_update(dev, bespoke_cfg, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dai_config_update(dev, bespoke_cfg, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAI_CONFIG_UPDATE, dai_config_update, dev, bespoke_cfg, size); syscall__retval = dai_config_update(dev, bespoke_cfg, size); sys_port_trace_syscall_exit(K_SYSCALL_DAI_CONFIG_UPDATE, dai_config_update, dev, bespoke_cfg, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/demand_paging.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/demand_paging.h new file mode 100644 index 0000000..7887736 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/demand_paging.h @@ -0,0 +1,149 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DEMAND_PAGING_H +#define Z_INCLUDE_SYSCALLS_DEMAND_PAGING_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_k_mem_paging_stats_get(struct k_mem_paging_stats_t * stats); + +__pinned_func +static inline void k_mem_paging_stats_get(struct k_mem_paging_stats_t * stats) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_stats_t * val; } parm0 = { .val = stats }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_STATS_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_stats_get(stats); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_stats_get(stats) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_STATS_GET, k_mem_paging_stats_get, stats); k_mem_paging_stats_get(stats); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_STATS_GET, k_mem_paging_stats_get, stats); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_thread_stats_get(struct k_thread * thread, struct k_mem_paging_stats_t * stats); + +__pinned_func +static inline void k_mem_paging_thread_stats_get(struct k_thread * thread, struct k_mem_paging_stats_t * stats) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; struct k_mem_paging_stats_t * val; } parm1 = { .val = stats }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_thread_stats_get(thread, stats); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_thread_stats_get(thread, stats) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET, k_mem_paging_thread_stats_get, thread, stats); k_mem_paging_thread_stats_get(thread, stats); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET, k_mem_paging_thread_stats_get, thread, stats); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_histogram_eviction_get(struct k_mem_paging_histogram_t * hist); + +__pinned_func +static inline void k_mem_paging_histogram_eviction_get(struct k_mem_paging_histogram_t * hist) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_histogram_eviction_get(hist); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_histogram_eviction_get(hist) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET, k_mem_paging_histogram_eviction_get, hist); k_mem_paging_histogram_eviction_get(hist); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET, k_mem_paging_histogram_eviction_get, hist); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_histogram_backing_store_page_in_get(struct k_mem_paging_histogram_t * hist); + +__pinned_func +static inline void k_mem_paging_histogram_backing_store_page_in_get(struct k_mem_paging_histogram_t * hist) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_histogram_backing_store_page_in_get(hist); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_histogram_backing_store_page_in_get(hist) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET, k_mem_paging_histogram_backing_store_page_in_get, hist); k_mem_paging_histogram_backing_store_page_in_get(hist); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET, k_mem_paging_histogram_backing_store_page_in_get, hist); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_histogram_backing_store_page_out_get(struct k_mem_paging_histogram_t * hist); + +__pinned_func +static inline void k_mem_paging_histogram_backing_store_page_out_get(struct k_mem_paging_histogram_t * hist) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_histogram_backing_store_page_out_get(hist); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_histogram_backing_store_page_out_get(hist) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET, k_mem_paging_histogram_backing_store_page_out_get, hist); k_mem_paging_histogram_backing_store_page_out_get(hist); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET, k_mem_paging_histogram_backing_store_page_out_get, hist); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/device.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/device.h new file mode 100644 index 0000000..bcdb837 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/device.h @@ -0,0 +1,143 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DEVICE_H +#define Z_INCLUDE_SYSCALLS_DEVICE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern const struct device * z_impl_device_get_binding(const char * name); + +__pinned_func +static inline const struct device * device_get_binding(const char * name) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const char * val; } parm0 = { .val = name }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_GET_BINDING); + } +#endif + compiler_barrier(); + return z_impl_device_get_binding(name); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_get_binding(name) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_GET_BINDING, device_get_binding, name); syscall__retval = device_get_binding(name); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_GET_BINDING, device_get_binding, name, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_device_is_ready(const struct device * dev); + +__pinned_func +static inline bool device_is_ready(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_IS_READY); + } +#endif + compiler_barrier(); + return z_impl_device_is_ready(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_is_ready(dev) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_IS_READY, device_is_ready, dev); syscall__retval = device_is_ready(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_IS_READY, device_is_ready, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_device_init(const struct device * dev); + +__pinned_func +static inline int device_init(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_INIT); + } +#endif + compiler_barrier(); + return z_impl_device_init(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_init(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_INIT, device_init, dev); syscall__retval = device_init(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_INIT, device_init, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_device_deinit(const struct device * dev); + +__pinned_func +static inline int device_deinit(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_DEINIT); + } +#endif + compiler_barrier(); + return z_impl_device_deinit(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_deinit(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_DEINIT, device_deinit, dev); syscall__retval = device_deinit(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_DEINIT, device_deinit, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct device * z_impl_device_get_by_dt_nodelabel(const char * nodelabel); + +__pinned_func +static inline const struct device * device_get_by_dt_nodelabel(const char * nodelabel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const char * val; } parm0 = { .val = nodelabel }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL); + } +#endif + compiler_barrier(); + return z_impl_device_get_by_dt_nodelabel(nodelabel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_get_by_dt_nodelabel(nodelabel) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL, device_get_by_dt_nodelabel, nodelabel); syscall__retval = device_get_by_dt_nodelabel(nodelabel); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL, device_get_by_dt_nodelabel, nodelabel, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/devmux.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/devmux.h new file mode 100644 index 0000000..dc5b4a9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/devmux.h @@ -0,0 +1,75 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DEVMUX_H +#define Z_INCLUDE_SYSCALLS_DEVMUX_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_devmux_select_get(const struct device * dev); + +__pinned_func +static inline int devmux_select_get(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVMUX_SELECT_GET); + } +#endif + compiler_barrier(); + return z_impl_devmux_select_get(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define devmux_select_get(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVMUX_SELECT_GET, devmux_select_get, dev); syscall__retval = devmux_select_get(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVMUX_SELECT_GET, devmux_select_get, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_devmux_select_set(struct device * dev, size_t index); + +__pinned_func +static inline int devmux_select_set(struct device * dev, size_t index) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = index }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DEVMUX_SELECT_SET); + } +#endif + compiler_barrier(); + return z_impl_devmux_select_set(dev, index); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define devmux_select_set(dev, index) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVMUX_SELECT_SET, devmux_select_set, dev, index); syscall__retval = devmux_select_set(dev, index); sys_port_trace_syscall_exit(K_SYSCALL_DEVMUX_SELECT_SET, devmux_select_set, dev, index, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/eeprom.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/eeprom.h new file mode 100644 index 0000000..4034552 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/eeprom.h @@ -0,0 +1,103 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_EEPROM_H +#define Z_INCLUDE_SYSCALLS_EEPROM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_eeprom_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int eeprom_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_EEPROM_READ); + } +#endif + compiler_barrier(); + return z_impl_eeprom_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define eeprom_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_READ, eeprom_read, dev, offset, data, len); syscall__retval = eeprom_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_READ, eeprom_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_eeprom_write(const struct device * dev, off_t offset, const void * data, size_t len); + +__pinned_func +static inline int eeprom_write(const struct device * dev, off_t offset, const void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_EEPROM_WRITE); + } +#endif + compiler_barrier(); + return z_impl_eeprom_write(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define eeprom_write(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_WRITE, eeprom_write, dev, offset, data, len); syscall__retval = eeprom_write(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_WRITE, eeprom_write, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_eeprom_get_size(const struct device * dev); + +__pinned_func +static inline size_t eeprom_get_size(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_EEPROM_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_eeprom_get_size(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define eeprom_get_size(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_GET_SIZE, eeprom_get_size, dev); syscall__retval = eeprom_get_size(dev); sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_GET_SIZE, eeprom_get_size, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/emul_fuel_gauge.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/emul_fuel_gauge.h new file mode 100644 index 0000000..d54cdec --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/emul_fuel_gauge.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_EMUL_FUEL_GAUGE_H +#define Z_INCLUDE_SYSCALLS_EMUL_FUEL_GAUGE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_emul_fuel_gauge_set_battery_charging(const struct emul * target, uint32_t uV, int uA); + +__pinned_func +static inline int emul_fuel_gauge_set_battery_charging(const struct emul * target, uint32_t uV, int uA) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct emul * val; } parm0 = { .val = target }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = uV }; + union { uintptr_t x; int val; } parm2 = { .val = uA }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING); + } +#endif + compiler_barrier(); + return z_impl_emul_fuel_gauge_set_battery_charging(target, uV, uA); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define emul_fuel_gauge_set_battery_charging(target, uV, uA) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING, emul_fuel_gauge_set_battery_charging, target, uV, uA); syscall__retval = emul_fuel_gauge_set_battery_charging(target, uV, uA); sys_port_trace_syscall_exit(K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING, emul_fuel_gauge_set_battery_charging, target, uV, uA, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_emul_fuel_gauge_is_battery_cutoff(const struct emul * target, bool * cutoff); + +__pinned_func +static inline int emul_fuel_gauge_is_battery_cutoff(const struct emul * target, bool * cutoff) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct emul * val; } parm0 = { .val = target }; + union { uintptr_t x; bool * val; } parm1 = { .val = cutoff }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF); + } +#endif + compiler_barrier(); + return z_impl_emul_fuel_gauge_is_battery_cutoff(target, cutoff); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define emul_fuel_gauge_is_battery_cutoff(target, cutoff) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF, emul_fuel_gauge_is_battery_cutoff, target, cutoff); syscall__retval = emul_fuel_gauge_is_battery_cutoff(target, cutoff); sys_port_trace_syscall_exit(K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF, emul_fuel_gauge_is_battery_cutoff, target, cutoff, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/entropy.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/entropy.h new file mode 100644 index 0000000..543cc20 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/entropy.h @@ -0,0 +1,53 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ENTROPY_H +#define Z_INCLUDE_SYSCALLS_ENTROPY_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_entropy_get_entropy(const struct device * dev, uint8_t * buffer, uint16_t length); + +__pinned_func +static inline int entropy_get_entropy(const struct device * dev, uint8_t * buffer, uint16_t length) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = length }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ENTROPY_GET_ENTROPY); + } +#endif + compiler_barrier(); + return z_impl_entropy_get_entropy(dev, buffer, length); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define entropy_get_entropy(dev, buffer, length) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ENTROPY_GET_ENTROPY, entropy_get_entropy, dev, buffer, length); syscall__retval = entropy_get_entropy(dev, buffer, length); sys_port_trace_syscall_exit(K_SYSCALL_ENTROPY_GET_ENTROPY, entropy_get_entropy, dev, buffer, length, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/errno_private.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/errno_private.h new file mode 100644 index 0000000..4c4571c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/errno_private.h @@ -0,0 +1,43 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ERRNO_PRIVATE_H +#define Z_INCLUDE_SYSCALLS_ERRNO_PRIVATE_H + + + + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int * z_impl_z_errno(void); + +__pinned_func +static inline int * z_errno(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int *) arch_syscall_invoke0(K_SYSCALL_Z_ERRNO); + } +#endif + compiler_barrier(); + return z_impl_z_errno(); +} + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/error.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/error.h new file mode 100644 index 0000000..8ae9708 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/error.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ERROR_H +#define Z_INCLUDE_SYSCALLS_ERROR_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_user_fault(unsigned int reason); + +__pinned_func +static inline void user_fault(unsigned int reason) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; unsigned int val; } parm0 = { .val = reason }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_USER_FAULT); + return; + } +#endif + compiler_barrier(); + z_impl_user_fault(reason); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define user_fault(reason) do { sys_port_trace_syscall_enter(K_SYSCALL_USER_FAULT, user_fault, reason); user_fault(reason); sys_port_trace_syscall_exit(K_SYSCALL_USER_FAULT, user_fault, reason); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/espi.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/espi.h new file mode 100644 index 0000000..b633999 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/espi.h @@ -0,0 +1,344 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ESPI_H +#define Z_INCLUDE_SYSCALLS_ESPI_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_espi_config(const struct device * dev, struct espi_cfg * cfg); + +__pinned_func +static inline int espi_config(const struct device * dev, struct espi_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_espi_config(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_config(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_CONFIG, espi_config, dev, cfg); syscall__retval = espi_config(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_CONFIG, espi_config, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_espi_get_channel_status(const struct device * dev, enum espi_channel ch); + +__pinned_func +static inline bool espi_get_channel_status(const struct device * dev, enum espi_channel ch) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum espi_channel val; } parm1 = { .val = ch }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_GET_CHANNEL_STATUS); + } +#endif + compiler_barrier(); + return z_impl_espi_get_channel_status(dev, ch); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_get_channel_status(dev, ch) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_GET_CHANNEL_STATUS, espi_get_channel_status, dev, ch); syscall__retval = espi_get_channel_status(dev, ch); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_GET_CHANNEL_STATUS, espi_get_channel_status, dev, ch, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_read_request(const struct device * dev, struct espi_request_packet * req); + +__pinned_func +static inline int espi_read_request(const struct device * dev, struct espi_request_packet * req) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_request_packet * val; } parm1 = { .val = req }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_READ_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_read_request(dev, req); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_read_request(dev, req) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_REQUEST, espi_read_request, dev, req); syscall__retval = espi_read_request(dev, req); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_REQUEST, espi_read_request, dev, req, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_write_request(const struct device * dev, struct espi_request_packet * req); + +__pinned_func +static inline int espi_write_request(const struct device * dev, struct espi_request_packet * req) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_request_packet * val; } parm1 = { .val = req }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_WRITE_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_write_request(dev, req); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_write_request(dev, req) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_REQUEST, espi_write_request, dev, req); syscall__retval = espi_write_request(dev, req); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_REQUEST, espi_write_request, dev, req, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_read_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data); + +__pinned_func +static inline int espi_read_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum lpc_peripheral_opcode val; } parm1 = { .val = op }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_READ_LPC_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_read_lpc_request(dev, op, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_read_lpc_request(dev, op, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_LPC_REQUEST, espi_read_lpc_request, dev, op, data); syscall__retval = espi_read_lpc_request(dev, op, data); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_LPC_REQUEST, espi_read_lpc_request, dev, op, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_write_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data); + +__pinned_func +static inline int espi_write_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum lpc_peripheral_opcode val; } parm1 = { .val = op }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_WRITE_LPC_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_write_lpc_request(dev, op, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_write_lpc_request(dev, op, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_LPC_REQUEST, espi_write_lpc_request, dev, op, data); syscall__retval = espi_write_lpc_request(dev, op, data); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_LPC_REQUEST, espi_write_lpc_request, dev, op, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_send_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t level); + +__pinned_func +static inline int espi_send_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum espi_vwire_signal val; } parm1 = { .val = signal }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = level }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_SEND_VWIRE); + } +#endif + compiler_barrier(); + return z_impl_espi_send_vwire(dev, signal, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_send_vwire(dev, signal, level) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SEND_VWIRE, espi_send_vwire, dev, signal, level); syscall__retval = espi_send_vwire(dev, signal, level); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SEND_VWIRE, espi_send_vwire, dev, signal, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_receive_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t * level); + +__pinned_func +static inline int espi_receive_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t * level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum espi_vwire_signal val; } parm1 = { .val = signal }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = level }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_RECEIVE_VWIRE); + } +#endif + compiler_barrier(); + return z_impl_espi_receive_vwire(dev, signal, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_receive_vwire(dev, signal, level) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_RECEIVE_VWIRE, espi_receive_vwire, dev, signal, level); syscall__retval = espi_receive_vwire(dev, signal, level); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_RECEIVE_VWIRE, espi_receive_vwire, dev, signal, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_send_oob(const struct device * dev, struct espi_oob_packet * pckt); + +__pinned_func +static inline int espi_send_oob(const struct device * dev, struct espi_oob_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_oob_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SEND_OOB); + } +#endif + compiler_barrier(); + return z_impl_espi_send_oob(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_send_oob(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SEND_OOB, espi_send_oob, dev, pckt); syscall__retval = espi_send_oob(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SEND_OOB, espi_send_oob, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_receive_oob(const struct device * dev, struct espi_oob_packet * pckt); + +__pinned_func +static inline int espi_receive_oob(const struct device * dev, struct espi_oob_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_oob_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_RECEIVE_OOB); + } +#endif + compiler_barrier(); + return z_impl_espi_receive_oob(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_receive_oob(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_RECEIVE_OOB, espi_receive_oob, dev, pckt); syscall__retval = espi_receive_oob(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_RECEIVE_OOB, espi_receive_oob, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_read_flash(const struct device * dev, struct espi_flash_packet * pckt); + +__pinned_func +static inline int espi_read_flash(const struct device * dev, struct espi_flash_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_READ_FLASH); + } +#endif + compiler_barrier(); + return z_impl_espi_read_flash(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_read_flash(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_FLASH, espi_read_flash, dev, pckt); syscall__retval = espi_read_flash(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_FLASH, espi_read_flash, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_write_flash(const struct device * dev, struct espi_flash_packet * pckt); + +__pinned_func +static inline int espi_write_flash(const struct device * dev, struct espi_flash_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_WRITE_FLASH); + } +#endif + compiler_barrier(); + return z_impl_espi_write_flash(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_write_flash(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_FLASH, espi_write_flash, dev, pckt); syscall__retval = espi_write_flash(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_FLASH, espi_write_flash, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_flash_erase(const struct device * dev, struct espi_flash_packet * pckt); + +__pinned_func +static inline int espi_flash_erase(const struct device * dev, struct espi_flash_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_FLASH_ERASE); + } +#endif + compiler_barrier(); + return z_impl_espi_flash_erase(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_flash_erase(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_FLASH_ERASE, espi_flash_erase, dev, pckt); syscall__retval = espi_flash_erase(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_FLASH_ERASE, espi_flash_erase, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/espi_saf.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/espi_saf.h new file mode 100644 index 0000000..e345a18 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/espi_saf.h @@ -0,0 +1,218 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ESPI_SAF_H +#define Z_INCLUDE_SYSCALLS_ESPI_SAF_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_espi_saf_config(const struct device * dev, const struct espi_saf_cfg * cfg); + +__pinned_func +static inline int espi_saf_config(const struct device * dev, const struct espi_saf_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct espi_saf_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_config(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_config(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_CONFIG, espi_saf_config, dev, cfg); syscall__retval = espi_saf_config(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_CONFIG, espi_saf_config, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_set_protection_regions(const struct device * dev, const struct espi_saf_protection * pr); + +__pinned_func +static inline int espi_saf_set_protection_regions(const struct device * dev, const struct espi_saf_protection * pr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct espi_saf_protection * val; } parm1 = { .val = pr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_set_protection_regions(dev, pr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_set_protection_regions(dev, pr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS, espi_saf_set_protection_regions, dev, pr); syscall__retval = espi_saf_set_protection_regions(dev, pr); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS, espi_saf_set_protection_regions, dev, pr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_activate(const struct device * dev); + +__pinned_func +static inline int espi_saf_activate(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_ESPI_SAF_ACTIVATE); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_activate(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_activate(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_ACTIVATE, espi_saf_activate, dev); syscall__retval = espi_saf_activate(dev); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_ACTIVATE, espi_saf_activate, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_espi_saf_get_channel_status(const struct device * dev); + +__pinned_func +static inline bool espi_saf_get_channel_status(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_get_channel_status(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_get_channel_status(dev) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS, espi_saf_get_channel_status, dev); syscall__retval = espi_saf_get_channel_status(dev); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS, espi_saf_get_channel_status, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_read(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_read(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_READ); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_read(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_read(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_READ, espi_saf_flash_read, dev, pckt); syscall__retval = espi_saf_flash_read(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_READ, espi_saf_flash_read, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_write(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_write(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_WRITE); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_write(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_write(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_WRITE, espi_saf_flash_write, dev, pckt); syscall__retval = espi_saf_flash_write(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_WRITE, espi_saf_flash_write, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_erase(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_erase(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_ERASE); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_erase(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_erase(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_ERASE, espi_saf_flash_erase, dev, pckt); syscall__retval = espi_saf_flash_erase(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_ERASE, espi_saf_flash_erase, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_unsuccess(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_unsuccess(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_unsuccess(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_unsuccess(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS, espi_saf_flash_unsuccess, dev, pckt); syscall__retval = espi_saf_flash_unsuccess(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS, espi_saf_flash_unsuccess, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ethernet.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ethernet.h new file mode 100644 index 0000000..af01e98 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ethernet.h @@ -0,0 +1,51 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ETHERNET_H +#define Z_INCLUDE_SYSCALLS_ETHERNET_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern const struct device * z_impl_net_eth_get_ptp_clock_by_index(int index); + +__pinned_func +static inline const struct device * net_eth_get_ptp_clock_by_index(int index) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_eth_get_ptp_clock_by_index(index); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_eth_get_ptp_clock_by_index(index) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX, net_eth_get_ptp_clock_by_index, index); syscall__retval = net_eth_get_ptp_clock_by_index(index); sys_port_trace_syscall_exit(K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX, net_eth_get_ptp_clock_by_index, index, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/fdtable.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/fdtable.h new file mode 100644 index 0000000..7ef4114 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/fdtable.h @@ -0,0 +1,81 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FDTABLE_H +#define Z_INCLUDE_SYSCALLS_FDTABLE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_zvfs_poll(struct zvfs_pollfd * fds, int nfds, int poll_timeout); + +__pinned_func +static inline int zvfs_poll(struct zvfs_pollfd * fds, int nfds, int poll_timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct zvfs_pollfd * val; } parm0 = { .val = fds }; + union { uintptr_t x; int val; } parm1 = { .val = nfds }; + union { uintptr_t x; int val; } parm2 = { .val = poll_timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZVFS_POLL); + } +#endif + compiler_barrier(); + return z_impl_zvfs_poll(fds, nfds, poll_timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zvfs_poll(fds, nfds, poll_timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZVFS_POLL, zvfs_poll, fds, nfds, poll_timeout); syscall__retval = zvfs_poll(fds, nfds, poll_timeout); sys_port_trace_syscall_exit(K_SYSCALL_ZVFS_POLL, zvfs_poll, fds, nfds, poll_timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zvfs_select(int nfds, struct zvfs_fd_set *ZRESTRICT readfds, struct zvfs_fd_set *ZRESTRICT writefds, struct zvfs_fd_set *ZRESTRICT errorfds, const struct timespec *ZRESTRICT timeout, const void *ZRESTRICT sigmask); + +__pinned_func +static inline int zvfs_select(int nfds, struct zvfs_fd_set *ZRESTRICT readfds, struct zvfs_fd_set *ZRESTRICT writefds, struct zvfs_fd_set *ZRESTRICT errorfds, const struct timespec *ZRESTRICT timeout, const void *ZRESTRICT sigmask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = nfds }; + union { uintptr_t x; struct zvfs_fd_set *ZRESTRICT val; } parm1 = { .val = readfds }; + union { uintptr_t x; struct zvfs_fd_set *ZRESTRICT val; } parm2 = { .val = writefds }; + union { uintptr_t x; struct zvfs_fd_set *ZRESTRICT val; } parm3 = { .val = errorfds }; + union { uintptr_t x; const struct timespec *ZRESTRICT val; } parm4 = { .val = timeout }; + union { uintptr_t x; const void *ZRESTRICT val; } parm5 = { .val = sigmask }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZVFS_SELECT); + } +#endif + compiler_barrier(); + return z_impl_zvfs_select(nfds, readfds, writefds, errorfds, timeout, sigmask); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zvfs_select(nfds, readfds, writefds, errorfds, timeout, sigmask) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZVFS_SELECT, zvfs_select, nfds, readfds, writefds, errorfds, timeout, sigmask); syscall__retval = zvfs_select(nfds, readfds, writefds, errorfds, timeout, sigmask); sys_port_trace_syscall_exit(K_SYSCALL_ZVFS_SELECT, zvfs_select, nfds, readfds, writefds, errorfds, timeout, sigmask, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/flash.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/flash.h new file mode 100644 index 0000000..b9d580d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/flash.h @@ -0,0 +1,408 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FLASH_H +#define Z_INCLUDE_SYSCALLS_FLASH_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_flash_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int flash_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_READ); + } +#endif + compiler_barrier(); + return z_impl_flash_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_READ, flash_read, dev, offset, data, len); syscall__retval = flash_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_READ, flash_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_write(const struct device * dev, off_t offset, const void * data, size_t len); + +__pinned_func +static inline int flash_write(const struct device * dev, off_t offset, const void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_WRITE); + } +#endif + compiler_barrier(); + return z_impl_flash_write(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_write(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_WRITE, flash_write, dev, offset, data, len); syscall__retval = flash_write(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_WRITE, flash_write, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_erase(const struct device * dev, off_t offset, size_t size); + +__pinned_func +static inline int flash_erase(const struct device * dev, off_t offset, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_ERASE); + } +#endif + compiler_barrier(); + return z_impl_flash_erase(dev, offset, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_erase(dev, offset, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_ERASE, flash_erase, dev, offset, size); syscall__retval = flash_erase(dev, offset, size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_ERASE, flash_erase, dev, offset, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_get_size(const struct device * dev, uint64_t * size); + +__pinned_func +static inline int flash_get_size(const struct device * dev, uint64_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint64_t * val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_flash_get_size(dev, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_size(dev, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_SIZE, flash_get_size, dev, size); syscall__retval = flash_get_size(dev, size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_SIZE, flash_get_size, dev, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_fill(const struct device * dev, uint8_t val, off_t offset, size_t size); + +__pinned_func +static inline int flash_fill(const struct device * dev, uint8_t val, off_t offset, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = val }; + union { uintptr_t x; off_t val; } parm2 = { .val = offset }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_FILL); + } +#endif + compiler_barrier(); + return z_impl_flash_fill(dev, val, offset, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_fill(dev, val, offset, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_FILL, flash_fill, dev, val, offset, size); syscall__retval = flash_fill(dev, val, offset, size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_FILL, flash_fill, dev, val, offset, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_flatten(const struct device * dev, off_t offset, size_t size); + +__pinned_func +static inline int flash_flatten(const struct device * dev, off_t offset, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_FLATTEN); + } +#endif + compiler_barrier(); + return z_impl_flash_flatten(dev, offset, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_flatten(dev, offset, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_FLATTEN, flash_flatten, dev, offset, size); syscall__retval = flash_flatten(dev, offset, size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_FLATTEN, flash_flatten, dev, offset, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_get_page_info_by_offs(const struct device * dev, off_t offset, struct flash_pages_info * info); + +__pinned_func +static inline int flash_get_page_info_by_offs(const struct device * dev, off_t offset, struct flash_pages_info * info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS); + } +#endif + compiler_barrier(); + return z_impl_flash_get_page_info_by_offs(dev, offset, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_page_info_by_offs(dev, offset, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS, flash_get_page_info_by_offs, dev, offset, info); syscall__retval = flash_get_page_info_by_offs(dev, offset, info); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS, flash_get_page_info_by_offs, dev, offset, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_get_page_info_by_idx(const struct device * dev, uint32_t page_index, struct flash_pages_info * info); + +__pinned_func +static inline int flash_get_page_info_by_idx(const struct device * dev, uint32_t page_index, struct flash_pages_info * info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = page_index }; + union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX); + } +#endif + compiler_barrier(); + return z_impl_flash_get_page_info_by_idx(dev, page_index, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_page_info_by_idx(dev, page_index, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX, flash_get_page_info_by_idx, dev, page_index, info); syscall__retval = flash_get_page_info_by_idx(dev, page_index, info); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX, flash_get_page_info_by_idx, dev, page_index, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_flash_get_page_count(const struct device * dev); + +__pinned_func +static inline size_t flash_get_page_count(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_PAGE_COUNT); + } +#endif + compiler_barrier(); + return z_impl_flash_get_page_count(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_page_count(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_COUNT, flash_get_page_count, dev); syscall__retval = flash_get_page_count(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_COUNT, flash_get_page_count, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_sfdp_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int flash_sfdp_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_SFDP_READ); + } +#endif + compiler_barrier(); + return z_impl_flash_sfdp_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_sfdp_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SFDP_READ, flash_sfdp_read, dev, offset, data, len); syscall__retval = flash_sfdp_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SFDP_READ, flash_sfdp_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_read_jedec_id(const struct device * dev, uint8_t * id); + +__pinned_func +static inline int flash_read_jedec_id(const struct device * dev, uint8_t * id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_READ_JEDEC_ID); + } +#endif + compiler_barrier(); + return z_impl_flash_read_jedec_id(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_read_jedec_id(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_READ_JEDEC_ID, flash_read_jedec_id, dev, id); syscall__retval = flash_read_jedec_id(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_READ_JEDEC_ID, flash_read_jedec_id, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_flash_get_write_block_size(const struct device * dev); + +__pinned_func +static inline size_t flash_get_write_block_size(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE); + } +#endif + compiler_barrier(); + return z_impl_flash_get_write_block_size(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_write_block_size(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE, flash_get_write_block_size, dev); syscall__retval = flash_get_write_block_size(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE, flash_get_write_block_size, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct flash_parameters * z_impl_flash_get_parameters(const struct device * dev); + +__pinned_func +static inline const struct flash_parameters * flash_get_parameters(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct flash_parameters *) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_PARAMETERS); + } +#endif + compiler_barrier(); + return z_impl_flash_get_parameters(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_parameters(dev) ({ const struct flash_parameters * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PARAMETERS, flash_get_parameters, dev); syscall__retval = flash_get_parameters(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PARAMETERS, flash_get_parameters, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_ex_op(const struct device * dev, uint16_t code, const uintptr_t in, void * out); + +__pinned_func +static inline int flash_ex_op(const struct device * dev, uint16_t code, const uintptr_t in, void * out) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = code }; + union { uintptr_t x; const uintptr_t val; } parm2 = { .val = in }; + union { uintptr_t x; void * val; } parm3 = { .val = out }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_EX_OP); + } +#endif + compiler_barrier(); + return z_impl_flash_ex_op(dev, code, in, out); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_ex_op(dev, code, in, out) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_EX_OP, flash_ex_op, dev, code, in, out); syscall__retval = flash_ex_op(dev, code, in, out); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_EX_OP, flash_ex_op, dev, code, in, out, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_copy(const struct device * src_dev, off_t src_offset, const struct device * dst_dev, off_t dst_offset, off_t size, uint8_t * buf, size_t buf_size); + +__pinned_func +static inline int flash_copy(const struct device * src_dev, off_t src_offset, const struct device * dst_dev, off_t dst_offset, off_t size, uint8_t * buf, size_t buf_size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = src_dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = src_offset }; + union { uintptr_t x; const struct device * val; } parm2 = { .val = dst_dev }; + union { uintptr_t x; off_t val; } parm3 = { .val = dst_offset }; + union { uintptr_t x; off_t val; } parm4 = { .val = size }; + union { uintptr_t x; uint8_t * val; } parm5 = { .val = buf }; + union { uintptr_t x; size_t val; } parm6 = { .val = buf_size }; + uintptr_t more[] = { + parm5.x, + parm6.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_FLASH_COPY); + } +#endif + compiler_barrier(); + return z_impl_flash_copy(src_dev, src_offset, dst_dev, dst_offset, size, buf, buf_size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_copy(src_dev, src_offset, dst_dev, dst_offset, size, buf, buf_size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_COPY, flash_copy, src_dev, src_offset, dst_dev, dst_offset, size, buf, buf_size); syscall__retval = flash_copy(src_dev, src_offset, dst_dev, dst_offset, size, buf, buf_size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_COPY, flash_copy, src_dev, src_offset, dst_dev, dst_offset, size, buf, buf_size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/flash_simulator.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/flash_simulator.h new file mode 100644 index 0000000..a9021de --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/flash_simulator.h @@ -0,0 +1,100 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FLASH_SIMULATOR_H +#define Z_INCLUDE_SYSCALLS_FLASH_SIMULATOR_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern const struct flash_simulator_params * z_impl_flash_simulator_get_params(const struct device * dev); + +__pinned_func +static inline const struct flash_simulator_params * flash_simulator_get_params(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct flash_simulator_params *) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_SIMULATOR_GET_PARAMS); + } +#endif + compiler_barrier(); + return z_impl_flash_simulator_get_params(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_simulator_get_params(dev) ({ const struct flash_simulator_params * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SIMULATOR_GET_PARAMS, flash_simulator_get_params, dev); syscall__retval = flash_simulator_get_params(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SIMULATOR_GET_PARAMS, flash_simulator_get_params, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_flash_simulator_set_callbacks(const struct device * dev, const struct flash_simulator_cb * cb); + +__pinned_func +static inline void flash_simulator_set_callbacks(const struct device * dev, const struct flash_simulator_cb * cb) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct flash_simulator_cb * val; } parm1 = { .val = cb }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_SIMULATOR_SET_CALLBACKS); + return; + } +#endif + compiler_barrier(); + z_impl_flash_simulator_set_callbacks(dev, cb); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_simulator_set_callbacks(dev, cb) do { sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SIMULATOR_SET_CALLBACKS, flash_simulator_set_callbacks, dev, cb); flash_simulator_set_callbacks(dev, cb); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SIMULATOR_SET_CALLBACKS, flash_simulator_set_callbacks, dev, cb); } while(false) +#endif +#endif + + +extern void * z_impl_flash_simulator_get_memory(const struct device * dev, size_t * mock_size); + +__pinned_func +static inline void * flash_simulator_get_memory(const struct device * dev, size_t * mock_size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t * val; } parm1 = { .val = mock_size }; + return (void *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY); + } +#endif + compiler_barrier(); + return z_impl_flash_simulator_get_memory(dev, mock_size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_simulator_get_memory(dev, mock_size) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY, flash_simulator_get_memory, dev, mock_size); syscall__retval = flash_simulator_get_memory(dev, mock_size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY, flash_simulator_get_memory, dev, mock_size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/fuel_gauge.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/fuel_gauge.h new file mode 100644 index 0000000..b06201d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/fuel_gauge.h @@ -0,0 +1,179 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FUEL_GAUGE_H +#define Z_INCLUDE_SYSCALLS_FUEL_GAUGE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_fuel_gauge_get_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val * val); + +__pinned_func +static inline int fuel_gauge_get_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FUEL_GAUGE_GET_PROP); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_get_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_get_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_PROP, fuel_gauge_get_prop, dev, prop, val); syscall__retval = fuel_gauge_get_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_PROP, fuel_gauge_get_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_get_props(const struct device * dev, const fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len); + +__pinned_func +static inline int fuel_gauge_get_props(const struct device * dev, const fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const fuel_gauge_prop_t * val; } parm1 = { .val = props }; + union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = vals }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_GET_PROPS); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_get_props(dev, props, vals, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_get_props(dev, props, vals, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_PROPS, fuel_gauge_get_props, dev, props, vals, len); syscall__retval = fuel_gauge_get_props(dev, props, vals, len); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_PROPS, fuel_gauge_get_props, dev, props, vals, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_set_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val); + +__pinned_func +static inline int fuel_gauge_set_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; union fuel_gauge_prop_val val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FUEL_GAUGE_SET_PROP); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_set_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_set_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_SET_PROP, fuel_gauge_set_prop, dev, prop, val); syscall__retval = fuel_gauge_set_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_SET_PROP, fuel_gauge_set_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_set_props(const struct device * dev, const fuel_gauge_prop_t * props, const union fuel_gauge_prop_val * vals, size_t len); + +__pinned_func +static inline int fuel_gauge_set_props(const struct device * dev, const fuel_gauge_prop_t * props, const union fuel_gauge_prop_val * vals, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const fuel_gauge_prop_t * val; } parm1 = { .val = props }; + union { uintptr_t x; const union fuel_gauge_prop_val * val; } parm2 = { .val = vals }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_SET_PROPS); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_set_props(dev, props, vals, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_set_props(dev, props, vals, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_SET_PROPS, fuel_gauge_set_props, dev, props, vals, len); syscall__retval = fuel_gauge_set_props(dev, props, vals, len); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_SET_PROPS, fuel_gauge_set_props, dev, props, vals, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_get_buffer_prop(const struct device * dev, fuel_gauge_prop_t prop_type, void * dst, size_t dst_len); + +__pinned_func +static inline int fuel_gauge_get_buffer_prop(const struct device * dev, fuel_gauge_prop_t prop_type, void * dst, size_t dst_len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop_type }; + union { uintptr_t x; void * val; } parm2 = { .val = dst }; + union { uintptr_t x; size_t val; } parm3 = { .val = dst_len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP, fuel_gauge_get_buffer_prop, dev, prop_type, dst, dst_len); syscall__retval = fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP, fuel_gauge_get_buffer_prop, dev, prop_type, dst, dst_len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_battery_cutoff(const struct device * dev); + +__pinned_func +static inline int fuel_gauge_battery_cutoff(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_battery_cutoff(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_battery_cutoff(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF, fuel_gauge_battery_cutoff, dev); syscall__retval = fuel_gauge_battery_cutoff(dev); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF, fuel_gauge_battery_cutoff, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/gnss.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/gnss.h new file mode 100644 index 0000000..0c64597 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/gnss.h @@ -0,0 +1,220 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_GNSS_H +#define Z_INCLUDE_SYSCALLS_GNSS_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_gnss_set_fix_rate(const struct device * dev, uint32_t fix_interval_ms); + +__pinned_func +static inline int gnss_set_fix_rate(const struct device * dev, uint32_t fix_interval_ms) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = fix_interval_ms }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_FIX_RATE); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_fix_rate(dev, fix_interval_ms); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_fix_rate(dev, fix_interval_ms) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_FIX_RATE, gnss_set_fix_rate, dev, fix_interval_ms); syscall__retval = gnss_set_fix_rate(dev, fix_interval_ms); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_FIX_RATE, gnss_set_fix_rate, dev, fix_interval_ms, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_fix_rate(const struct device * dev, uint32_t * fix_interval_ms); + +__pinned_func +static inline int gnss_get_fix_rate(const struct device * dev, uint32_t * fix_interval_ms) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = fix_interval_ms }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_FIX_RATE); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_fix_rate(dev, fix_interval_ms); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_fix_rate(dev, fix_interval_ms) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_FIX_RATE, gnss_get_fix_rate, dev, fix_interval_ms); syscall__retval = gnss_get_fix_rate(dev, fix_interval_ms); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_FIX_RATE, gnss_get_fix_rate, dev, fix_interval_ms, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_set_navigation_mode(const struct device * dev, enum gnss_navigation_mode mode); + +__pinned_func +static inline int gnss_set_navigation_mode(const struct device * dev, enum gnss_navigation_mode mode) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum gnss_navigation_mode val; } parm1 = { .val = mode }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_NAVIGATION_MODE); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_navigation_mode(dev, mode); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_navigation_mode(dev, mode) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_NAVIGATION_MODE, gnss_set_navigation_mode, dev, mode); syscall__retval = gnss_set_navigation_mode(dev, mode); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_NAVIGATION_MODE, gnss_set_navigation_mode, dev, mode, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_navigation_mode(const struct device * dev, enum gnss_navigation_mode * mode); + +__pinned_func +static inline int gnss_get_navigation_mode(const struct device * dev, enum gnss_navigation_mode * mode) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum gnss_navigation_mode * val; } parm1 = { .val = mode }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_NAVIGATION_MODE); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_navigation_mode(dev, mode); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_navigation_mode(dev, mode) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_NAVIGATION_MODE, gnss_get_navigation_mode, dev, mode); syscall__retval = gnss_get_navigation_mode(dev, mode); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_NAVIGATION_MODE, gnss_get_navigation_mode, dev, mode, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_set_enabled_systems(const struct device * dev, gnss_systems_t systems); + +__pinned_func +static inline int gnss_set_enabled_systems(const struct device * dev, gnss_systems_t systems) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; gnss_systems_t val; } parm1 = { .val = systems }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_enabled_systems(dev, systems); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_enabled_systems(dev, systems) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS, gnss_set_enabled_systems, dev, systems); syscall__retval = gnss_set_enabled_systems(dev, systems); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS, gnss_set_enabled_systems, dev, systems, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_enabled_systems(const struct device * dev, gnss_systems_t * systems); + +__pinned_func +static inline int gnss_get_enabled_systems(const struct device * dev, gnss_systems_t * systems) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; gnss_systems_t * val; } parm1 = { .val = systems }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_enabled_systems(dev, systems); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_enabled_systems(dev, systems) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS, gnss_get_enabled_systems, dev, systems); syscall__retval = gnss_get_enabled_systems(dev, systems); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS, gnss_get_enabled_systems, dev, systems, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_supported_systems(const struct device * dev, gnss_systems_t * systems); + +__pinned_func +static inline int gnss_get_supported_systems(const struct device * dev, gnss_systems_t * systems) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; gnss_systems_t * val; } parm1 = { .val = systems }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_supported_systems(dev, systems); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_supported_systems(dev, systems) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS, gnss_get_supported_systems, dev, systems); syscall__retval = gnss_get_supported_systems(dev, systems); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS, gnss_get_supported_systems, dev, systems, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_latest_timepulse(const struct device * dev, k_ticks_t * timestamp); + +__pinned_func +static inline int gnss_get_latest_timepulse(const struct device * dev, k_ticks_t * timestamp) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; k_ticks_t * val; } parm1 = { .val = timestamp }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_latest_timepulse(dev, timestamp); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_latest_timepulse(dev, timestamp) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE, gnss_get_latest_timepulse, dev, timestamp); syscall__retval = gnss_get_latest_timepulse(dev, timestamp); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE, gnss_get_latest_timepulse, dev, timestamp, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/gpio.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/gpio.h new file mode 100644 index 0000000..74a1873 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/gpio.h @@ -0,0 +1,273 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_GPIO_H +#define Z_INCLUDE_SYSCALLS_GPIO_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_gpio_pin_interrupt_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags); + +__pinned_func +static inline int gpio_pin_interrupt_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin }; + union { uintptr_t x; gpio_flags_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_gpio_pin_interrupt_configure(port, pin, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_pin_interrupt_configure(port, pin, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE, gpio_pin_interrupt_configure, port, pin, flags); syscall__retval = gpio_pin_interrupt_configure(port, pin, flags); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE, gpio_pin_interrupt_configure, port, pin, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_pin_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags); + +__pinned_func +static inline int gpio_pin_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin }; + union { uintptr_t x; gpio_flags_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_gpio_pin_configure(port, pin, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_pin_configure(port, pin, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_CONFIGURE, gpio_pin_configure, port, pin, flags); syscall__retval = gpio_pin_configure(port, pin, flags); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_CONFIGURE, gpio_pin_configure, port, pin, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_get_direction(const struct device * port, gpio_port_pins_t map, gpio_port_pins_t * inputs, gpio_port_pins_t * outputs); + +__pinned_func +static inline int gpio_port_get_direction(const struct device * port, gpio_port_pins_t map, gpio_port_pins_t * inputs, gpio_port_pins_t * outputs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = map }; + union { uintptr_t x; gpio_port_pins_t * val; } parm2 = { .val = inputs }; + union { uintptr_t x; gpio_port_pins_t * val; } parm3 = { .val = outputs }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_GPIO_PORT_GET_DIRECTION); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_get_direction(port, map, inputs, outputs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_get_direction(port, map, inputs, outputs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_GET_DIRECTION, gpio_port_get_direction, port, map, inputs, outputs); syscall__retval = gpio_port_get_direction(port, map, inputs, outputs); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_GET_DIRECTION, gpio_port_get_direction, port, map, inputs, outputs, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_pin_get_config(const struct device * port, gpio_pin_t pin, gpio_flags_t * flags); + +__pinned_func +static inline int gpio_pin_get_config(const struct device * port, gpio_pin_t pin, gpio_flags_t * flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin }; + union { uintptr_t x; gpio_flags_t * val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_GET_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_gpio_pin_get_config(port, pin, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_pin_get_config(port, pin, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_GET_CONFIG, gpio_pin_get_config, port, pin, flags); syscall__retval = gpio_pin_get_config(port, pin, flags); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_GET_CONFIG, gpio_pin_get_config, port, pin, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_get_raw(const struct device * port, gpio_port_value_t * value); + +__pinned_func +static inline int gpio_port_get_raw(const struct device * port, gpio_port_value_t * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_value_t * val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_GET_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_get_raw(port, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_get_raw(port, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_GET_RAW, gpio_port_get_raw, port, value); syscall__retval = gpio_port_get_raw(port, value); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_GET_RAW, gpio_port_get_raw, port, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_set_masked_raw(const struct device * port, gpio_port_pins_t mask, gpio_port_value_t value); + +__pinned_func +static inline int gpio_port_set_masked_raw(const struct device * port, gpio_port_pins_t mask, gpio_port_value_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = mask }; + union { uintptr_t x; gpio_port_value_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PORT_SET_MASKED_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_set_masked_raw(port, mask, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_set_masked_raw(port, mask, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_SET_MASKED_RAW, gpio_port_set_masked_raw, port, mask, value); syscall__retval = gpio_port_set_masked_raw(port, mask, value); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_SET_MASKED_RAW, gpio_port_set_masked_raw, port, mask, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_set_bits_raw(const struct device * port, gpio_port_pins_t pins); + +__pinned_func +static inline int gpio_port_set_bits_raw(const struct device * port, gpio_port_pins_t pins) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_SET_BITS_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_set_bits_raw(port, pins); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_set_bits_raw(port, pins) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_SET_BITS_RAW, gpio_port_set_bits_raw, port, pins); syscall__retval = gpio_port_set_bits_raw(port, pins); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_SET_BITS_RAW, gpio_port_set_bits_raw, port, pins, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_clear_bits_raw(const struct device * port, gpio_port_pins_t pins); + +__pinned_func +static inline int gpio_port_clear_bits_raw(const struct device * port, gpio_port_pins_t pins) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_clear_bits_raw(port, pins); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_clear_bits_raw(port, pins) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW, gpio_port_clear_bits_raw, port, pins); syscall__retval = gpio_port_clear_bits_raw(port, pins); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW, gpio_port_clear_bits_raw, port, pins, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_toggle_bits(const struct device * port, gpio_port_pins_t pins); + +__pinned_func +static inline int gpio_port_toggle_bits(const struct device * port, gpio_port_pins_t pins) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_TOGGLE_BITS); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_toggle_bits(port, pins); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_toggle_bits(port, pins) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_TOGGLE_BITS, gpio_port_toggle_bits, port, pins); syscall__retval = gpio_port_toggle_bits(port, pins); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_TOGGLE_BITS, gpio_port_toggle_bits, port, pins, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_get_pending_int(const struct device * dev); + +__pinned_func +static inline int gpio_get_pending_int(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_GPIO_GET_PENDING_INT); + } +#endif + compiler_barrier(); + return z_impl_gpio_get_pending_int(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_get_pending_int(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_GET_PENDING_INT, gpio_get_pending_int, dev); syscall__retval = gpio_get_pending_int(dev); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_GET_PENDING_INT, gpio_get_pending_int, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/haptics.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/haptics.h new file mode 100644 index 0000000..b6e30be --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/haptics.h @@ -0,0 +1,74 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_HAPTICS_H +#define Z_INCLUDE_SYSCALLS_HAPTICS_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_haptics_start_output(const struct device * dev); + +__pinned_func +static inline int haptics_start_output(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HAPTICS_START_OUTPUT); + } +#endif + compiler_barrier(); + return z_impl_haptics_start_output(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define haptics_start_output(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HAPTICS_START_OUTPUT, haptics_start_output, dev); syscall__retval = haptics_start_output(dev); sys_port_trace_syscall_exit(K_SYSCALL_HAPTICS_START_OUTPUT, haptics_start_output, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_haptics_stop_output(const struct device * dev); + +__pinned_func +static inline int haptics_stop_output(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HAPTICS_STOP_OUTPUT); + } +#endif + compiler_barrier(); + return z_impl_haptics_stop_output(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define haptics_stop_output(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HAPTICS_STOP_OUTPUT, haptics_stop_output, dev); syscall__retval = haptics_stop_output(dev); sys_port_trace_syscall_exit(K_SYSCALL_HAPTICS_STOP_OUTPUT, haptics_stop_output, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/hwinfo.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/hwinfo.h new file mode 100644 index 0000000..cd05615 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/hwinfo.h @@ -0,0 +1,143 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_HWINFO_H +#define Z_INCLUDE_SYSCALLS_HWINFO_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern ssize_t z_impl_hwinfo_get_device_id(uint8_t * buffer, size_t length); + +__pinned_func +static inline ssize_t hwinfo_get_device_id(uint8_t * buffer, size_t length) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint8_t * val; } parm0 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm1 = { .val = length }; + return (ssize_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWINFO_GET_DEVICE_ID); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_device_id(buffer, length); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_device_id(buffer, length) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_DEVICE_ID, hwinfo_get_device_id, buffer, length); syscall__retval = hwinfo_get_device_id(buffer, length); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_DEVICE_ID, hwinfo_get_device_id, buffer, length, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_get_device_eui64(uint8_t * buffer); + +__pinned_func +static inline int hwinfo_get_device_eui64(uint8_t * buffer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint8_t * val; } parm0 = { .val = buffer }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_DEVICE_EUI64); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_device_eui64(buffer); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_device_eui64(buffer) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_DEVICE_EUI64, hwinfo_get_device_eui64, buffer); syscall__retval = hwinfo_get_device_eui64(buffer); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_DEVICE_EUI64, hwinfo_get_device_eui64, buffer, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_get_reset_cause(uint32_t * cause); + +__pinned_func +static inline int hwinfo_get_reset_cause(uint32_t * cause) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint32_t * val; } parm0 = { .val = cause }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_RESET_CAUSE); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_reset_cause(cause); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_reset_cause(cause) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_RESET_CAUSE, hwinfo_get_reset_cause, cause); syscall__retval = hwinfo_get_reset_cause(cause); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_RESET_CAUSE, hwinfo_get_reset_cause, cause, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_clear_reset_cause(void); + +__pinned_func +static inline int hwinfo_clear_reset_cause(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_clear_reset_cause(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_clear_reset_cause() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE, hwinfo_clear_reset_cause); syscall__retval = hwinfo_clear_reset_cause(); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE, hwinfo_clear_reset_cause, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_get_supported_reset_cause(uint32_t * supported); + +__pinned_func +static inline int hwinfo_get_supported_reset_cause(uint32_t * supported) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint32_t * val; } parm0 = { .val = supported }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_supported_reset_cause(supported); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_supported_reset_cause(supported) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE, hwinfo_get_supported_reset_cause, supported); syscall__retval = hwinfo_get_supported_reset_cause(supported); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE, hwinfo_get_supported_reset_cause, supported, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i2c.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i2c.h new file mode 100644 index 0000000..8a11d7a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i2c.h @@ -0,0 +1,171 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_I2C_H +#define Z_INCLUDE_SYSCALLS_I2C_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_i2c_configure(const struct device * dev, uint32_t dev_config); + +__pinned_func +static inline int i2c_configure(const struct device * dev, uint32_t dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I2C_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_i2c_configure(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_configure(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_CONFIGURE, i2c_configure, dev, dev_config); syscall__retval = i2c_configure(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_I2C_CONFIGURE, i2c_configure, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_get_config(const struct device * dev, uint32_t * dev_config); + +__pinned_func +static inline int i2c_get_config(const struct device * dev, uint32_t * dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I2C_GET_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_i2c_get_config(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_get_config(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_GET_CONFIG, i2c_get_config, dev, dev_config); syscall__retval = i2c_get_config(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_I2C_GET_CONFIG, i2c_get_config, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_transfer(const struct device * dev, struct i2c_msg * msgs, uint8_t num_msgs, uint16_t addr); + +__pinned_func +static inline int i2c_transfer(const struct device * dev, struct i2c_msg * msgs, uint8_t num_msgs, uint16_t addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct i2c_msg * val; } parm1 = { .val = msgs }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = addr }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_I2C_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_i2c_transfer(dev, msgs, num_msgs, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_transfer(dev, msgs, num_msgs, addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_TRANSFER, i2c_transfer, dev, msgs, num_msgs, addr); syscall__retval = i2c_transfer(dev, msgs, num_msgs, addr); sys_port_trace_syscall_exit(K_SYSCALL_I2C_TRANSFER, i2c_transfer, dev, msgs, num_msgs, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_recover_bus(const struct device * dev); + +__pinned_func +static inline int i2c_recover_bus(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_RECOVER_BUS); + } +#endif + compiler_barrier(); + return z_impl_i2c_recover_bus(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_recover_bus(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_RECOVER_BUS, i2c_recover_bus, dev); syscall__retval = i2c_recover_bus(dev); sys_port_trace_syscall_exit(K_SYSCALL_I2C_RECOVER_BUS, i2c_recover_bus, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_target_driver_register(const struct device * dev); + +__pinned_func +static inline int i2c_target_driver_register(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_TARGET_DRIVER_REGISTER); + } +#endif + compiler_barrier(); + return z_impl_i2c_target_driver_register(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_target_driver_register(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_TARGET_DRIVER_REGISTER, i2c_target_driver_register, dev); syscall__retval = i2c_target_driver_register(dev); sys_port_trace_syscall_exit(K_SYSCALL_I2C_TARGET_DRIVER_REGISTER, i2c_target_driver_register, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_target_driver_unregister(const struct device * dev); + +__pinned_func +static inline int i2c_target_driver_unregister(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER); + } +#endif + compiler_barrier(); + return z_impl_i2c_target_driver_unregister(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_target_driver_unregister(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER, i2c_target_driver_unregister, dev); syscall__retval = i2c_target_driver_unregister(dev); sys_port_trace_syscall_exit(K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER, i2c_target_driver_unregister, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i2s.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i2s.h new file mode 100644 index 0000000..3176fec --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i2s.h @@ -0,0 +1,128 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_I2S_H +#define Z_INCLUDE_SYSCALLS_I2S_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_i2s_configure(const struct device * dev, enum i2s_dir dir, const struct i2s_config * cfg); + +__pinned_func +static inline int i2s_configure(const struct device * dev, enum i2s_dir dir, const struct i2s_config * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum i2s_dir val; } parm1 = { .val = dir }; + union { uintptr_t x; const struct i2s_config * val; } parm2 = { .val = cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_i2s_configure(dev, dir, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_configure(dev, dir, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_CONFIGURE, i2s_configure, dev, dir, cfg); syscall__retval = i2s_configure(dev, dir, cfg); sys_port_trace_syscall_exit(K_SYSCALL_I2S_CONFIGURE, i2s_configure, dev, dir, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2s_buf_read(const struct device * dev, void * buf, size_t * size); + +__pinned_func +static inline int i2s_buf_read(const struct device * dev, void * buf, size_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t * val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_BUF_READ); + } +#endif + compiler_barrier(); + return z_impl_i2s_buf_read(dev, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_buf_read(dev, buf, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_BUF_READ, i2s_buf_read, dev, buf, size); syscall__retval = i2s_buf_read(dev, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_I2S_BUF_READ, i2s_buf_read, dev, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2s_buf_write(const struct device * dev, void * buf, size_t size); + +__pinned_func +static inline int i2s_buf_write(const struct device * dev, void * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_BUF_WRITE); + } +#endif + compiler_barrier(); + return z_impl_i2s_buf_write(dev, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_buf_write(dev, buf, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_BUF_WRITE, i2s_buf_write, dev, buf, size); syscall__retval = i2s_buf_write(dev, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_I2S_BUF_WRITE, i2s_buf_write, dev, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2s_trigger(const struct device * dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd); + +__pinned_func +static inline int i2s_trigger(const struct device * dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum i2s_dir val; } parm1 = { .val = dir }; + union { uintptr_t x; enum i2s_trigger_cmd val; } parm2 = { .val = cmd }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_TRIGGER); + } +#endif + compiler_barrier(); + return z_impl_i2s_trigger(dev, dir, cmd); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_trigger(dev, dir, cmd) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_TRIGGER, i2s_trigger, dev, dir, cmd); syscall__retval = i2s_trigger(dev, dir, cmd); sys_port_trace_syscall_exit(K_SYSCALL_I2S_TRIGGER, i2s_trigger, dev, dir, cmd, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i3c.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i3c.h new file mode 100644 index 0000000..3942c7c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/i3c.h @@ -0,0 +1,130 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_I3C_H +#define Z_INCLUDE_SYSCALLS_I3C_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_i3c_do_ccc(const struct device * dev, struct i3c_ccc_payload * payload); + +__pinned_func +static inline int i3c_do_ccc(const struct device * dev, struct i3c_ccc_payload * payload) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct i3c_ccc_payload * val; } parm1 = { .val = payload }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I3C_DO_CCC); + } +#endif + compiler_barrier(); + return z_impl_i3c_do_ccc(dev, payload); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i3c_do_ccc(dev, payload) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I3C_DO_CCC, i3c_do_ccc, dev, payload); syscall__retval = i3c_do_ccc(dev, payload); sys_port_trace_syscall_exit(K_SYSCALL_I3C_DO_CCC, i3c_do_ccc, dev, payload, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i3c_do_ccc_cb(const struct device * dev, struct i3c_ccc_payload * payload, i3c_callback_t cb, void * userdata); + +__pinned_func +static inline int i3c_do_ccc_cb(const struct device * dev, struct i3c_ccc_payload * payload, i3c_callback_t cb, void * userdata) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct i3c_ccc_payload * val; } parm1 = { .val = payload }; + union { uintptr_t x; i3c_callback_t val; } parm2 = { .val = cb }; + union { uintptr_t x; void * val; } parm3 = { .val = userdata }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_I3C_DO_CCC_CB); + } +#endif + compiler_barrier(); + return z_impl_i3c_do_ccc_cb(dev, payload, cb, userdata); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i3c_do_ccc_cb(dev, payload, cb, userdata) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I3C_DO_CCC_CB, i3c_do_ccc_cb, dev, payload, cb, userdata); syscall__retval = i3c_do_ccc_cb(dev, payload, cb, userdata); sys_port_trace_syscall_exit(K_SYSCALL_I3C_DO_CCC_CB, i3c_do_ccc_cb, dev, payload, cb, userdata, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i3c_transfer(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs); + +__pinned_func +static inline int i3c_transfer(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct i3c_device_desc * val; } parm0 = { .val = target }; + union { uintptr_t x; struct i3c_msg * val; } parm1 = { .val = msgs }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I3C_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_i3c_transfer(target, msgs, num_msgs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i3c_transfer(target, msgs, num_msgs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I3C_TRANSFER, i3c_transfer, target, msgs, num_msgs); syscall__retval = i3c_transfer(target, msgs, num_msgs); sys_port_trace_syscall_exit(K_SYSCALL_I3C_TRANSFER, i3c_transfer, target, msgs, num_msgs, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i3c_transfer_cb(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs, i3c_callback_t cb, void * userdata); + +__pinned_func +static inline int i3c_transfer_cb(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs, i3c_callback_t cb, void * userdata) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct i3c_device_desc * val; } parm0 = { .val = target }; + union { uintptr_t x; struct i3c_msg * val; } parm1 = { .val = msgs }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs }; + union { uintptr_t x; i3c_callback_t val; } parm3 = { .val = cb }; + union { uintptr_t x; void * val; } parm4 = { .val = userdata }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_I3C_TRANSFER_CB); + } +#endif + compiler_barrier(); + return z_impl_i3c_transfer_cb(target, msgs, num_msgs, cb, userdata); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i3c_transfer_cb(target, msgs, num_msgs, cb, userdata) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I3C_TRANSFER_CB, i3c_transfer_cb, target, msgs, num_msgs, cb, userdata); syscall__retval = i3c_transfer_cb(target, msgs, num_msgs, cb, userdata); sys_port_trace_syscall_exit(K_SYSCALL_I3C_TRANSFER_CB, i3c_transfer_cb, target, msgs, num_msgs, cb, userdata, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/input_renesas_ra_ctsu.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/input_renesas_ra_ctsu.h new file mode 100644 index 0000000..39257f0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/input_renesas_ra_ctsu.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_INPUT_RENESAS_RA_CTSU_H +#define Z_INCLUDE_SYSCALLS_INPUT_RENESAS_RA_CTSU_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_renesas_ra_ctsu_group_configure(const struct device * dev, const struct renesas_ra_ctsu_touch_cfg * cfg); + +__pinned_func +static inline int renesas_ra_ctsu_group_configure(const struct device * dev, const struct renesas_ra_ctsu_touch_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct renesas_ra_ctsu_touch_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RENESAS_RA_CTSU_GROUP_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_renesas_ra_ctsu_group_configure(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_ra_ctsu_group_configure(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_RA_CTSU_GROUP_CONFIGURE, renesas_ra_ctsu_group_configure, dev, cfg); syscall__retval = renesas_ra_ctsu_group_configure(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_RA_CTSU_GROUP_CONFIGURE, renesas_ra_ctsu_group_configure, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/input_renesas_rx_ctsu.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/input_renesas_rx_ctsu.h new file mode 100644 index 0000000..b82a17a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/input_renesas_rx_ctsu.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_INPUT_RENESAS_RX_CTSU_H +#define Z_INCLUDE_SYSCALLS_INPUT_RENESAS_RX_CTSU_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_renesas_rx_ctsu_group_configure(const struct device * dev, const struct renesas_rx_ctsu_touch_cfg * cfg); + +__pinned_func +static inline int renesas_rx_ctsu_group_configure(const struct device * dev, const struct renesas_rx_ctsu_touch_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct renesas_rx_ctsu_touch_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RENESAS_RX_CTSU_GROUP_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_renesas_rx_ctsu_group_configure(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_rx_ctsu_group_configure(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_RX_CTSU_GROUP_CONFIGURE, renesas_rx_ctsu_group_configure, dev, cfg); syscall__retval = renesas_rx_ctsu_group_configure(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_RX_CTSU_GROUP_CONFIGURE, renesas_rx_ctsu_group_configure, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ipm.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ipm.h new file mode 100644 index 0000000..beafd88 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ipm.h @@ -0,0 +1,149 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_IPM_H +#define Z_INCLUDE_SYSCALLS_IPM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_ipm_send(const struct device * ipmdev, int wait, uint32_t id, const void * data, int size); + +__pinned_func +static inline int ipm_send(const struct device * ipmdev, int wait, uint32_t id, const void * data, int size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + union { uintptr_t x; int val; } parm1 = { .val = wait }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = id }; + union { uintptr_t x; const void * val; } parm3 = { .val = data }; + union { uintptr_t x; int val; } parm4 = { .val = size }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_IPM_SEND); + } +#endif + compiler_barrier(); + return z_impl_ipm_send(ipmdev, wait, id, data, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_send(ipmdev, wait, id, data, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_SEND, ipm_send, ipmdev, wait, id, data, size); syscall__retval = ipm_send(ipmdev, wait, id, data, size); sys_port_trace_syscall_exit(K_SYSCALL_IPM_SEND, ipm_send, ipmdev, wait, id, data, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ipm_max_data_size_get(const struct device * ipmdev); + +__pinned_func +static inline int ipm_max_data_size_get(const struct device * ipmdev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_MAX_DATA_SIZE_GET); + } +#endif + compiler_barrier(); + return z_impl_ipm_max_data_size_get(ipmdev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_max_data_size_get(ipmdev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_MAX_DATA_SIZE_GET, ipm_max_data_size_get, ipmdev); syscall__retval = ipm_max_data_size_get(ipmdev); sys_port_trace_syscall_exit(K_SYSCALL_IPM_MAX_DATA_SIZE_GET, ipm_max_data_size_get, ipmdev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ipm_max_id_val_get(const struct device * ipmdev); + +__pinned_func +static inline uint32_t ipm_max_id_val_get(const struct device * ipmdev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_MAX_ID_VAL_GET); + } +#endif + compiler_barrier(); + return z_impl_ipm_max_id_val_get(ipmdev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_max_id_val_get(ipmdev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_MAX_ID_VAL_GET, ipm_max_id_val_get, ipmdev); syscall__retval = ipm_max_id_val_get(ipmdev); sys_port_trace_syscall_exit(K_SYSCALL_IPM_MAX_ID_VAL_GET, ipm_max_id_val_get, ipmdev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ipm_set_enabled(const struct device * ipmdev, int enable); + +__pinned_func +static inline int ipm_set_enabled(const struct device * ipmdev, int enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + union { uintptr_t x; int val; } parm1 = { .val = enable }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IPM_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_ipm_set_enabled(ipmdev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_set_enabled(ipmdev, enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_SET_ENABLED, ipm_set_enabled, ipmdev, enable); syscall__retval = ipm_set_enabled(ipmdev, enable); sys_port_trace_syscall_exit(K_SYSCALL_IPM_SET_ENABLED, ipm_set_enabled, ipmdev, enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_ipm_complete(const struct device * ipmdev); + +__pinned_func +static inline void ipm_complete(const struct device * ipmdev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_COMPLETE); + return; + } +#endif + compiler_barrier(); + z_impl_ipm_complete(ipmdev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_complete(ipmdev) do { sys_port_trace_syscall_enter(K_SYSCALL_IPM_COMPLETE, ipm_complete, ipmdev); ipm_complete(ipmdev); sys_port_trace_syscall_exit(K_SYSCALL_IPM_COMPLETE, ipm_complete, ipmdev); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ivshmem.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ivshmem.h new file mode 100644 index 0000000..d16fdd7 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ivshmem.h @@ -0,0 +1,315 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_IVSHMEM_H +#define Z_INCLUDE_SYSCALLS_IVSHMEM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern size_t z_impl_ivshmem_get_mem(const struct device * dev, uintptr_t * memmap); + +__pinned_func +static inline size_t ivshmem_get_mem(const struct device * dev, uintptr_t * memmap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uintptr_t * val; } parm1 = { .val = memmap }; + return (size_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_MEM); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_mem(dev, memmap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_mem(dev, memmap) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_MEM, ivshmem_get_mem, dev, memmap); syscall__retval = ivshmem_get_mem(dev, memmap); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_MEM, ivshmem_get_mem, dev, memmap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ivshmem_get_id(const struct device * dev); + +__pinned_func +static inline uint32_t ivshmem_get_id(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_ID); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_id(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_id(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_ID, ivshmem_get_id, dev); syscall__retval = ivshmem_get_id(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_ID, ivshmem_get_id, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint16_t z_impl_ivshmem_get_vectors(const struct device * dev); + +__pinned_func +static inline uint16_t ivshmem_get_vectors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint16_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_VECTORS); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_vectors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_vectors(dev) ({ uint16_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_VECTORS, ivshmem_get_vectors, dev); syscall__retval = ivshmem_get_vectors(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_VECTORS, ivshmem_get_vectors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_int_peer(const struct device * dev, uint32_t peer_id, uint16_t vector); + +__pinned_func +static inline int ivshmem_int_peer(const struct device * dev, uint32_t peer_id, uint16_t vector) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = vector }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_INT_PEER); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_int_peer(dev, peer_id, vector); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_int_peer(dev, peer_id, vector) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_INT_PEER, ivshmem_int_peer, dev, peer_id, vector); syscall__retval = ivshmem_int_peer(dev, peer_id, vector); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_INT_PEER, ivshmem_int_peer, dev, peer_id, vector, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_register_handler(const struct device * dev, struct k_poll_signal * signal, uint16_t vector); + +__pinned_func +static inline int ivshmem_register_handler(const struct device * dev, struct k_poll_signal * signal, uint16_t vector) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct k_poll_signal * val; } parm1 = { .val = signal }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = vector }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_REGISTER_HANDLER); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_register_handler(dev, signal, vector); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_register_handler(dev, signal, vector) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_REGISTER_HANDLER, ivshmem_register_handler, dev, signal, vector); syscall__retval = ivshmem_register_handler(dev, signal, vector); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_REGISTER_HANDLER, ivshmem_register_handler, dev, signal, vector, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_ivshmem_get_rw_mem_section(const struct device * dev, uintptr_t * memmap); + +__pinned_func +static inline size_t ivshmem_get_rw_mem_section(const struct device * dev, uintptr_t * memmap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uintptr_t * val; } parm1 = { .val = memmap }; + return (size_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_rw_mem_section(dev, memmap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_rw_mem_section(dev, memmap) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION, ivshmem_get_rw_mem_section, dev, memmap); syscall__retval = ivshmem_get_rw_mem_section(dev, memmap); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION, ivshmem_get_rw_mem_section, dev, memmap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_ivshmem_get_output_mem_section(const struct device * dev, uint32_t peer_id, uintptr_t * memmap); + +__pinned_func +static inline size_t ivshmem_get_output_mem_section(const struct device * dev, uint32_t peer_id, uintptr_t * memmap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id }; + union { uintptr_t x; uintptr_t * val; } parm2 = { .val = memmap }; + return (size_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_output_mem_section(dev, peer_id, memmap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_output_mem_section(dev, peer_id, memmap) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION, ivshmem_get_output_mem_section, dev, peer_id, memmap); syscall__retval = ivshmem_get_output_mem_section(dev, peer_id, memmap); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION, ivshmem_get_output_mem_section, dev, peer_id, memmap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ivshmem_get_state(const struct device * dev, uint32_t peer_id); + +__pinned_func +static inline uint32_t ivshmem_get_state(const struct device * dev, uint32_t peer_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_STATE); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_state(dev, peer_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_state(dev, peer_id) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_STATE, ivshmem_get_state, dev, peer_id); syscall__retval = ivshmem_get_state(dev, peer_id); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_STATE, ivshmem_get_state, dev, peer_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_set_state(const struct device * dev, uint32_t state); + +__pinned_func +static inline int ivshmem_set_state(const struct device * dev, uint32_t state) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = state }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_SET_STATE); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_set_state(dev, state); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_set_state(dev, state) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_SET_STATE, ivshmem_set_state, dev, state); syscall__retval = ivshmem_set_state(dev, state); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_SET_STATE, ivshmem_set_state, dev, state, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ivshmem_get_max_peers(const struct device * dev); + +__pinned_func +static inline uint32_t ivshmem_get_max_peers(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_MAX_PEERS); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_max_peers(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_max_peers(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_MAX_PEERS, ivshmem_get_max_peers, dev); syscall__retval = ivshmem_get_max_peers(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_MAX_PEERS, ivshmem_get_max_peers, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint16_t z_impl_ivshmem_get_protocol(const struct device * dev); + +__pinned_func +static inline uint16_t ivshmem_get_protocol(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint16_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_PROTOCOL); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_protocol(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_protocol(dev) ({ uint16_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_PROTOCOL, ivshmem_get_protocol, dev); syscall__retval = ivshmem_get_protocol(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_PROTOCOL, ivshmem_get_protocol, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_enable_interrupts(const struct device * dev, bool enable); + +__pinned_func +static inline int ivshmem_enable_interrupts(const struct device * dev, bool enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enable }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_enable_interrupts(dev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_enable_interrupts(dev, enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS, ivshmem_enable_interrupts, dev, enable); syscall__retval = ivshmem_enable_interrupts(dev, enable); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS, ivshmem_enable_interrupts, dev, enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/kernel.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/kernel.h new file mode 100644 index 0000000..b5d73c4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/kernel.h @@ -0,0 +1,1670 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_KERNEL_H +#define Z_INCLUDE_SYSCALLS_KERNEL_H + + + + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern k_thread_stack_t * z_impl_k_thread_stack_alloc(size_t size, int flags); + +__pinned_func +static inline k_thread_stack_t * k_thread_stack_alloc(size_t size, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; size_t val; } parm0 = { .val = size }; + union { uintptr_t x; int val; } parm1 = { .val = flags }; + return (k_thread_stack_t *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_STACK_ALLOC); + } +#endif + compiler_barrier(); + return z_impl_k_thread_stack_alloc(size, flags); +} + + +extern int z_impl_k_thread_stack_free(k_thread_stack_t * stack); + +__pinned_func +static inline int k_thread_stack_free(k_thread_stack_t * stack) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_thread_stack_t * val; } parm0 = { .val = stack }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_STACK_FREE); + } +#endif + compiler_barrier(); + return z_impl_k_thread_stack_free(stack); +} + + +extern k_tid_t z_impl_k_thread_create(struct k_thread * new_thread, k_thread_stack_t * stack, size_t stack_size, k_thread_entry_t entry, void * p1, void * p2, void * p3, int prio, uint32_t options, k_timeout_t delay); + +__pinned_func +static inline k_tid_t k_thread_create(struct k_thread * new_thread, k_thread_stack_t * stack, size_t stack_size, k_thread_entry_t entry, void * p1, void * p2, void * p3, int prio, uint32_t options, k_timeout_t delay) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = new_thread }; + union { uintptr_t x; k_thread_stack_t * val; } parm1 = { .val = stack }; + union { uintptr_t x; size_t val; } parm2 = { .val = stack_size }; + union { uintptr_t x; k_thread_entry_t val; } parm3 = { .val = entry }; + union { uintptr_t x; void * val; } parm4 = { .val = p1 }; + union { uintptr_t x; void * val; } parm5 = { .val = p2 }; + union { uintptr_t x; void * val; } parm6 = { .val = p3 }; + union { uintptr_t x; int val; } parm7 = { .val = prio }; + union { uintptr_t x; uint32_t val; } parm8 = { .val = options }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm9 = { .val = delay }; + uintptr_t more[] = { + parm5.x, + parm6.x, + parm7.x, + parm8.x, + parm9.split.lo, + parm9.split.hi + }; + return (k_tid_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_THREAD_CREATE); + } +#endif + compiler_barrier(); + return z_impl_k_thread_create(new_thread, stack, stack_size, entry, p1, p2, p3, prio, options, delay); +} + + +extern int z_impl_k_thread_stack_space_get(const struct k_thread * thread, size_t * unused_ptr); + +__pinned_func +static inline int k_thread_stack_space_get(const struct k_thread * thread, size_t * unused_ptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; size_t * val; } parm1 = { .val = unused_ptr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_STACK_SPACE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_stack_space_get(thread, unused_ptr); +} + + +extern int z_impl_k_thread_runtime_stack_unused_threshold_pct_set(struct k_thread * thread, uint32_t pct); + +__pinned_func +static inline int k_thread_runtime_stack_unused_threshold_pct_set(struct k_thread * thread, uint32_t pct) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pct }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_PCT_SET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_runtime_stack_unused_threshold_pct_set(thread, pct); +} + + +extern int z_impl_k_thread_runtime_stack_unused_threshold_set(struct k_thread * thread, size_t threshold); + +__pinned_func +static inline int k_thread_runtime_stack_unused_threshold_set(struct k_thread * thread, size_t threshold) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; size_t val; } parm1 = { .val = threshold }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_SET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_runtime_stack_unused_threshold_set(thread, threshold); +} + + +extern size_t z_impl_k_thread_runtime_stack_unused_threshold_get(struct k_thread * thread); + +__pinned_func +static inline size_t k_thread_runtime_stack_unused_threshold_get(struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_RUNTIME_STACK_UNUSED_THRESHOLD_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_runtime_stack_unused_threshold_get(thread); +} + + +extern int z_impl_k_thread_join(struct k_thread * thread, k_timeout_t timeout); + +__pinned_func +static inline int k_thread_join(struct k_thread * thread, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_THREAD_JOIN); + } +#endif + compiler_barrier(); + return z_impl_k_thread_join(thread, timeout); +} + + +extern int32_t z_impl_k_sleep(k_timeout_t timeout); + +__pinned_func +static inline int32_t k_sleep(k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm0 = { .val = timeout }; + return (int32_t) arch_syscall_invoke2(parm0.split.lo, parm0.split.hi, K_SYSCALL_K_SLEEP); + } +#endif + compiler_barrier(); + return z_impl_k_sleep(timeout); +} + + +extern int32_t z_impl_k_usleep(int32_t us); + +__pinned_func +static inline int32_t k_usleep(int32_t us) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int32_t val; } parm0 = { .val = us }; + return (int32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_USLEEP); + } +#endif + compiler_barrier(); + return z_impl_k_usleep(us); +} + + +extern void z_impl_k_busy_wait(uint32_t usec_to_wait); + +__pinned_func +static inline void k_busy_wait(uint32_t usec_to_wait) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint32_t val; } parm0 = { .val = usec_to_wait }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_BUSY_WAIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_busy_wait(usec_to_wait); +} + + +extern void z_impl_k_yield(void); + +__pinned_func +static inline void k_yield(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_K_YIELD); + return; + } +#endif + compiler_barrier(); + z_impl_k_yield(); +} + + +extern void z_impl_k_wakeup(k_tid_t thread); + +__pinned_func +static inline void k_wakeup(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_WAKEUP); + return; + } +#endif + compiler_barrier(); + z_impl_k_wakeup(thread); +} + + +extern k_tid_t z_impl_k_sched_current_thread_query(void); + +__pinned_func +static inline k_tid_t k_sched_current_thread_query(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (k_tid_t) arch_syscall_invoke0(K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY); + } +#endif + compiler_barrier(); + return z_impl_k_sched_current_thread_query(); +} + + +extern void z_impl_k_thread_abort(k_tid_t thread); + +__pinned_func +static inline void k_thread_abort(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_ABORT); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_abort(thread); +} + + +extern k_ticks_t z_impl_k_thread_timeout_expires_ticks(const struct k_thread * thread); + +__pinned_func +static inline k_ticks_t k_thread_timeout_expires_ticks(const struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_thread_timeout_expires_ticks(thread); +} + + +extern k_ticks_t z_impl_k_thread_timeout_remaining_ticks(const struct k_thread * thread); + +__pinned_func +static inline k_ticks_t k_thread_timeout_remaining_ticks(const struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_thread_timeout_remaining_ticks(thread); +} + + +extern int z_impl_k_thread_priority_get(k_tid_t thread); + +__pinned_func +static inline int k_thread_priority_get(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_PRIORITY_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_priority_get(thread); +} + + +extern void z_impl_k_thread_priority_set(k_tid_t thread, int prio); + +__pinned_func +static inline void k_thread_priority_set(k_tid_t thread, int prio) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; int val; } parm1 = { .val = prio }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_PRIORITY_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_priority_set(thread, prio); +} + + +extern void z_impl_k_thread_deadline_set(k_tid_t thread, int deadline); + +__pinned_func +static inline void k_thread_deadline_set(k_tid_t thread, int deadline) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; int val; } parm1 = { .val = deadline }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_DEADLINE_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_deadline_set(thread, deadline); +} + + +extern void z_impl_k_thread_absolute_deadline_set(k_tid_t thread, int deadline); + +__pinned_func +static inline void k_thread_absolute_deadline_set(k_tid_t thread, int deadline) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; int val; } parm1 = { .val = deadline }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_ABSOLUTE_DEADLINE_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_absolute_deadline_set(thread, deadline); +} + + +extern void z_impl_k_reschedule(void); + +__pinned_func +static inline void k_reschedule(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_K_RESCHEDULE); + return; + } +#endif + compiler_barrier(); + z_impl_k_reschedule(); +} + + +extern void z_impl_k_thread_suspend(k_tid_t thread); + +__pinned_func +static inline void k_thread_suspend(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_SUSPEND); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_suspend(thread); +} + + +extern void z_impl_k_thread_resume(k_tid_t thread); + +__pinned_func +static inline void k_thread_resume(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_RESUME); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_resume(thread); +} + + +extern int z_impl_k_is_preempt_thread(void); + +__pinned_func +static inline int k_is_preempt_thread(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_K_IS_PREEMPT_THREAD); + } +#endif + compiler_barrier(); + return z_impl_k_is_preempt_thread(); +} + + +extern void z_impl_k_thread_custom_data_set(void * value); + +__pinned_func +static inline void k_thread_custom_data_set(void * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = value }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_CUSTOM_DATA_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_custom_data_set(value); +} + + +extern void * z_impl_k_thread_custom_data_get(void); + +__pinned_func +static inline void * k_thread_custom_data_get(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (void *) arch_syscall_invoke0(K_SYSCALL_K_THREAD_CUSTOM_DATA_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_custom_data_get(); +} + + +extern int z_impl_k_thread_name_set(k_tid_t thread, const char * str); + +__pinned_func +static inline int k_thread_name_set(k_tid_t thread, const char * str) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; const char * val; } parm1 = { .val = str }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_NAME_SET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_name_set(thread, str); +} + + +extern int z_impl_k_thread_name_copy(k_tid_t thread, char * buf, size_t size); + +__pinned_func +static inline int k_thread_name_copy(k_tid_t thread, char * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; char * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_THREAD_NAME_COPY); + } +#endif + compiler_barrier(); + return z_impl_k_thread_name_copy(thread, buf, size); +} + + +extern void z_impl_k_timer_start(struct k_timer * timer, k_timeout_t duration, k_timeout_t period); + +__pinned_func +static inline void k_timer_start(struct k_timer * timer, k_timeout_t duration, k_timeout_t period) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = duration }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = period }; + (void) arch_syscall_invoke5(parm0.x, parm1.split.lo, parm1.split.hi, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_TIMER_START); + return; + } +#endif + compiler_barrier(); + z_impl_k_timer_start(timer, duration, period); +} + + +extern void z_impl_k_timer_stop(struct k_timer * timer); + +__pinned_func +static inline void k_timer_stop(struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STOP); + return; + } +#endif + compiler_barrier(); + z_impl_k_timer_stop(timer); +} + + +extern uint32_t z_impl_k_timer_status_get(struct k_timer * timer); + +__pinned_func +static inline uint32_t k_timer_status_get(struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STATUS_GET); + } +#endif + compiler_barrier(); + return z_impl_k_timer_status_get(timer); +} + + +extern uint32_t z_impl_k_timer_status_sync(struct k_timer * timer); + +__pinned_func +static inline uint32_t k_timer_status_sync(struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STATUS_SYNC); + } +#endif + compiler_barrier(); + return z_impl_k_timer_status_sync(timer); +} + + +extern k_ticks_t z_impl_k_timer_expires_ticks(const struct k_timer * timer); + +__pinned_func +static inline k_ticks_t k_timer_expires_ticks(const struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_TIMER_EXPIRES_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_timer_expires_ticks(timer); +} + + +extern k_ticks_t z_impl_k_timer_remaining_ticks(const struct k_timer * timer); + +__pinned_func +static inline k_ticks_t k_timer_remaining_ticks(const struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_TIMER_REMAINING_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_timer_remaining_ticks(timer); +} + + +extern void z_impl_k_timer_user_data_set(struct k_timer * timer, void * user_data); + +__pinned_func +static inline void k_timer_user_data_set(struct k_timer * timer, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + union { uintptr_t x; void * val; } parm1 = { .val = user_data }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_TIMER_USER_DATA_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_timer_user_data_set(timer, user_data); +} + + +extern void * z_impl_k_timer_user_data_get(const struct k_timer * timer); + +__pinned_func +static inline void * k_timer_user_data_get(const struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_USER_DATA_GET); + } +#endif + compiler_barrier(); + return z_impl_k_timer_user_data_get(timer); +} + + +extern int64_t z_impl_k_uptime_ticks(void); + +__pinned_func +static inline int64_t k_uptime_ticks(void) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + (void) arch_syscall_invoke1((uintptr_t)&ret64, K_SYSCALL_K_UPTIME_TICKS); + return (int64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_uptime_ticks(); +} + + +extern void z_impl_k_queue_init(struct k_queue * queue); + +__pinned_func +static inline void k_queue_init(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_queue_init(queue); +} + + +extern void z_impl_k_queue_cancel_wait(struct k_queue * queue); + +__pinned_func +static inline void k_queue_cancel_wait(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_CANCEL_WAIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_queue_cancel_wait(queue); +} + + +extern int32_t z_impl_k_queue_alloc_append(struct k_queue * queue, void * data); + +__pinned_func +static inline int32_t k_queue_alloc_append(struct k_queue * queue, void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_QUEUE_ALLOC_APPEND); + } +#endif + compiler_barrier(); + return z_impl_k_queue_alloc_append(queue, data); +} + + +extern int32_t z_impl_k_queue_alloc_prepend(struct k_queue * queue, void * data); + +__pinned_func +static inline int32_t k_queue_alloc_prepend(struct k_queue * queue, void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_QUEUE_ALLOC_PREPEND); + } +#endif + compiler_barrier(); + return z_impl_k_queue_alloc_prepend(queue, data); +} + + +extern void * z_impl_k_queue_get(struct k_queue * queue, k_timeout_t timeout); + +__pinned_func +static inline void * k_queue_get(struct k_queue * queue, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (void *) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_QUEUE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_queue_get(queue, timeout); +} + + +extern int z_impl_k_queue_is_empty(struct k_queue * queue); + +__pinned_func +static inline int k_queue_is_empty(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_IS_EMPTY); + } +#endif + compiler_barrier(); + return z_impl_k_queue_is_empty(queue); +} + + +extern void * z_impl_k_queue_peek_head(struct k_queue * queue); + +__pinned_func +static inline void * k_queue_peek_head(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_PEEK_HEAD); + } +#endif + compiler_barrier(); + return z_impl_k_queue_peek_head(queue); +} + + +extern void * z_impl_k_queue_peek_tail(struct k_queue * queue); + +__pinned_func +static inline void * k_queue_peek_tail(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_PEEK_TAIL); + } +#endif + compiler_barrier(); + return z_impl_k_queue_peek_tail(queue); +} + + +extern int z_impl_k_futex_wait(struct k_futex * futex, int expected, k_timeout_t timeout); + +__pinned_func +static inline int k_futex_wait(struct k_futex * futex, int expected, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_futex * val; } parm0 = { .val = futex }; + union { uintptr_t x; int val; } parm1 = { .val = expected }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_FUTEX_WAIT); + } +#endif + compiler_barrier(); + return z_impl_k_futex_wait(futex, expected, timeout); +} + + +extern int z_impl_k_futex_wake(struct k_futex * futex, bool wake_all); + +__pinned_func +static inline int k_futex_wake(struct k_futex * futex, bool wake_all) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_futex * val; } parm0 = { .val = futex }; + union { uintptr_t x; bool val; } parm1 = { .val = wake_all }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_FUTEX_WAKE); + } +#endif + compiler_barrier(); + return z_impl_k_futex_wake(futex, wake_all); +} + + +extern void z_impl_k_event_init(struct k_event * event); + +__pinned_func +static inline void k_event_init(struct k_event * event) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_EVENT_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_event_init(event); +} + + +extern uint32_t z_impl_k_event_post(struct k_event * event, uint32_t events); + +__pinned_func +static inline uint32_t k_event_post(struct k_event * event, uint32_t events) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_POST); + } +#endif + compiler_barrier(); + return z_impl_k_event_post(event, events); +} + + +extern uint32_t z_impl_k_event_set(struct k_event * event, uint32_t events); + +__pinned_func +static inline uint32_t k_event_set(struct k_event * event, uint32_t events) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_SET); + } +#endif + compiler_barrier(); + return z_impl_k_event_set(event, events); +} + + +extern uint32_t z_impl_k_event_set_masked(struct k_event * event, uint32_t events, uint32_t events_mask); + +__pinned_func +static inline uint32_t k_event_set_masked(struct k_event * event, uint32_t events, uint32_t events_mask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = events_mask }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_EVENT_SET_MASKED); + } +#endif + compiler_barrier(); + return z_impl_k_event_set_masked(event, events, events_mask); +} + + +extern uint32_t z_impl_k_event_clear(struct k_event * event, uint32_t events); + +__pinned_func +static inline uint32_t k_event_clear(struct k_event * event, uint32_t events) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_CLEAR); + } +#endif + compiler_barrier(); + return z_impl_k_event_clear(event, events); +} + + +extern uint32_t z_impl_k_event_wait(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout); + +__pinned_func +static inline uint32_t k_event_wait(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; bool val; } parm2 = { .val = reset }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT); + } +#endif + compiler_barrier(); + return z_impl_k_event_wait(event, events, reset, timeout); +} + + +extern uint32_t z_impl_k_event_wait_all(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout); + +__pinned_func +static inline uint32_t k_event_wait_all(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; bool val; } parm2 = { .val = reset }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT_ALL); + } +#endif + compiler_barrier(); + return z_impl_k_event_wait_all(event, events, reset, timeout); +} + + +extern uint32_t z_impl_k_event_wait_safe(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout); + +__pinned_func +static inline uint32_t k_event_wait_safe(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; bool val; } parm2 = { .val = reset }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT_SAFE); + } +#endif + compiler_barrier(); + return z_impl_k_event_wait_safe(event, events, reset, timeout); +} + + +extern uint32_t z_impl_k_event_wait_all_safe(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout); + +__pinned_func +static inline uint32_t k_event_wait_all_safe(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; bool val; } parm2 = { .val = reset }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT_ALL_SAFE); + } +#endif + compiler_barrier(); + return z_impl_k_event_wait_all_safe(event, events, reset, timeout); +} + + +extern int32_t z_impl_k_stack_alloc_init(struct k_stack * stack, uint32_t num_entries); + +__pinned_func +static inline int32_t k_stack_alloc_init(struct k_stack * stack, uint32_t num_entries) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = num_entries }; + return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STACK_ALLOC_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_stack_alloc_init(stack, num_entries); +} + + +extern int z_impl_k_stack_push(struct k_stack * stack, stack_data_t data); + +__pinned_func +static inline int k_stack_push(struct k_stack * stack, stack_data_t data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack }; + union { uintptr_t x; stack_data_t val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STACK_PUSH); + } +#endif + compiler_barrier(); + return z_impl_k_stack_push(stack, data); +} + + +extern int z_impl_k_stack_pop(struct k_stack * stack, stack_data_t * data, k_timeout_t timeout); + +__pinned_func +static inline int k_stack_pop(struct k_stack * stack, stack_data_t * data, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack }; + union { uintptr_t x; stack_data_t * val; } parm1 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_STACK_POP); + } +#endif + compiler_barrier(); + return z_impl_k_stack_pop(stack, data, timeout); +} + + +extern int z_impl_k_mutex_init(struct k_mutex * mutex); + +__pinned_func +static inline int k_mutex_init(struct k_mutex * mutex) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MUTEX_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_mutex_init(mutex); +} + + +extern int z_impl_k_mutex_lock(struct k_mutex * mutex, k_timeout_t timeout); + +__pinned_func +static inline int k_mutex_lock(struct k_mutex * mutex, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_MUTEX_LOCK); + } +#endif + compiler_barrier(); + return z_impl_k_mutex_lock(mutex, timeout); +} + + +extern int z_impl_k_mutex_unlock(struct k_mutex * mutex); + +__pinned_func +static inline int k_mutex_unlock(struct k_mutex * mutex) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MUTEX_UNLOCK); + } +#endif + compiler_barrier(); + return z_impl_k_mutex_unlock(mutex); +} + + +extern int z_impl_k_condvar_init(struct k_condvar * condvar); + +__pinned_func +static inline int k_condvar_init(struct k_condvar * condvar) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_init(condvar); +} + + +extern int z_impl_k_condvar_signal(struct k_condvar * condvar); + +__pinned_func +static inline int k_condvar_signal(struct k_condvar * condvar) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_SIGNAL); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_signal(condvar); +} + + +extern int z_impl_k_condvar_broadcast(struct k_condvar * condvar); + +__pinned_func +static inline int k_condvar_broadcast(struct k_condvar * condvar) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_BROADCAST); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_broadcast(condvar); +} + + +extern int z_impl_k_condvar_wait(struct k_condvar * condvar, struct k_mutex * mutex, k_timeout_t timeout); + +__pinned_func +static inline int k_condvar_wait(struct k_condvar * condvar, struct k_mutex * mutex, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + union { uintptr_t x; struct k_mutex * val; } parm1 = { .val = mutex }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_CONDVAR_WAIT); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_wait(condvar, mutex, timeout); +} + + +extern int z_impl_k_sem_init(struct k_sem * sem, unsigned int initial_count, unsigned int limit); + +__pinned_func +static inline int k_sem_init(struct k_sem * sem, unsigned int initial_count, unsigned int limit) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + union { uintptr_t x; unsigned int val; } parm1 = { .val = initial_count }; + union { uintptr_t x; unsigned int val; } parm2 = { .val = limit }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_SEM_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_sem_init(sem, initial_count, limit); +} + + +extern int z_impl_k_sem_take(struct k_sem * sem, k_timeout_t timeout); + +__pinned_func +static inline int k_sem_take(struct k_sem * sem, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_SEM_TAKE); + } +#endif + compiler_barrier(); + return z_impl_k_sem_take(sem, timeout); +} + + +extern void z_impl_k_sem_give(struct k_sem * sem); + +__pinned_func +static inline void k_sem_give(struct k_sem * sem) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_GIVE); + return; + } +#endif + compiler_barrier(); + z_impl_k_sem_give(sem); +} + + +extern void z_impl_k_sem_reset(struct k_sem * sem); + +__pinned_func +static inline void k_sem_reset(struct k_sem * sem) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_RESET); + return; + } +#endif + compiler_barrier(); + z_impl_k_sem_reset(sem); +} + + +extern unsigned int z_impl_k_sem_count_get(struct k_sem * sem); + +__pinned_func +static inline unsigned int k_sem_count_get(struct k_sem * sem) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + return (unsigned int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_COUNT_GET); + } +#endif + compiler_barrier(); + return z_impl_k_sem_count_get(sem); +} + + +extern int z_impl_k_msgq_alloc_init(struct k_msgq * msgq, size_t msg_size, uint32_t max_msgs); + +__pinned_func +static inline int k_msgq_alloc_init(struct k_msgq * msgq, size_t msg_size, uint32_t max_msgs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; size_t val; } parm1 = { .val = msg_size }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = max_msgs }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_MSGQ_ALLOC_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_alloc_init(msgq, msg_size, max_msgs); +} + + +extern int z_impl_k_msgq_put(struct k_msgq * msgq, const void * data, k_timeout_t timeout); + +__pinned_func +static inline int k_msgq_put(struct k_msgq * msgq, const void * data, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; const void * val; } parm1 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_MSGQ_PUT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_put(msgq, data, timeout); +} + + +extern int z_impl_k_msgq_put_front(struct k_msgq * msgq, const void * data); + +__pinned_func +static inline int k_msgq_put_front(struct k_msgq * msgq, const void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; const void * val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_PUT_FRONT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_put_front(msgq, data); +} + + +extern int z_impl_k_msgq_get(struct k_msgq * msgq, void * data, k_timeout_t timeout); + +__pinned_func +static inline int k_msgq_get(struct k_msgq * msgq, void * data, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_MSGQ_GET); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_get(msgq, data, timeout); +} + + +extern int z_impl_k_msgq_peek(struct k_msgq * msgq, void * data); + +__pinned_func +static inline int k_msgq_peek(struct k_msgq * msgq, void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_PEEK); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_peek(msgq, data); +} + + +extern int z_impl_k_msgq_peek_at(struct k_msgq * msgq, void * data, uint32_t idx); + +__pinned_func +static inline int k_msgq_peek_at(struct k_msgq * msgq, void * data, uint32_t idx) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = idx }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_MSGQ_PEEK_AT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_peek_at(msgq, data, idx); +} + + +extern void z_impl_k_msgq_purge(struct k_msgq * msgq); + +__pinned_func +static inline void k_msgq_purge(struct k_msgq * msgq) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_PURGE); + return; + } +#endif + compiler_barrier(); + z_impl_k_msgq_purge(msgq); +} + + +extern uint32_t z_impl_k_msgq_num_free_get(struct k_msgq * msgq); + +__pinned_func +static inline uint32_t k_msgq_num_free_get(struct k_msgq * msgq) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_NUM_FREE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_num_free_get(msgq); +} + + +extern void z_impl_k_msgq_get_attrs(struct k_msgq * msgq, struct k_msgq_attrs * attrs); + +__pinned_func +static inline void k_msgq_get_attrs(struct k_msgq * msgq, struct k_msgq_attrs * attrs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; struct k_msgq_attrs * val; } parm1 = { .val = attrs }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_GET_ATTRS); + return; + } +#endif + compiler_barrier(); + z_impl_k_msgq_get_attrs(msgq, attrs); +} + + +extern uint32_t z_impl_k_msgq_num_used_get(struct k_msgq * msgq); + +__pinned_func +static inline uint32_t k_msgq_num_used_get(struct k_msgq * msgq) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_NUM_USED_GET); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_num_used_get(msgq); +} + + +extern void z_impl_k_pipe_init(struct k_pipe * pipe, uint8_t * buffer, size_t buffer_size); + +__pinned_func +static inline void k_pipe_init(struct k_pipe * pipe, uint8_t * buffer, size_t buffer_size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm2 = { .val = buffer_size }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_PIPE_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_pipe_init(pipe, buffer, buffer_size); +} + + +extern int z_impl_k_pipe_write(struct k_pipe * pipe, const uint8_t * data, size_t len, k_timeout_t timeout); + +__pinned_func +static inline int k_pipe_write(struct k_pipe * pipe, const uint8_t * data, size_t len, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = data }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_PIPE_WRITE); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_write(pipe, data, len, timeout); +} + + +extern int z_impl_k_pipe_read(struct k_pipe * pipe, uint8_t * data, size_t len, k_timeout_t timeout); + +__pinned_func +static inline int k_pipe_read(struct k_pipe * pipe, uint8_t * data, size_t len, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = data }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_PIPE_READ); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_read(pipe, data, len, timeout); +} + + +extern void z_impl_k_pipe_reset(struct k_pipe * pipe); + +__pinned_func +static inline void k_pipe_reset(struct k_pipe * pipe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_RESET); + return; + } +#endif + compiler_barrier(); + z_impl_k_pipe_reset(pipe); +} + + +extern void z_impl_k_pipe_close(struct k_pipe * pipe); + +__pinned_func +static inline void k_pipe_close(struct k_pipe * pipe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_CLOSE); + return; + } +#endif + compiler_barrier(); + z_impl_k_pipe_close(pipe); +} + + +extern int z_impl_k_poll(struct k_poll_event * events, int num_events, k_timeout_t timeout); + +__pinned_func +static inline int k_poll(struct k_poll_event * events, int num_events, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_event * val; } parm0 = { .val = events }; + union { uintptr_t x; int val; } parm1 = { .val = num_events }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_POLL); + } +#endif + compiler_barrier(); + return z_impl_k_poll(events, num_events, timeout); +} + + +extern void z_impl_k_poll_signal_init(struct k_poll_signal * sig); + +__pinned_func +static inline void k_poll_signal_init(struct k_poll_signal * sig) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_POLL_SIGNAL_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_poll_signal_init(sig); +} + + +extern void z_impl_k_poll_signal_reset(struct k_poll_signal * sig); + +__pinned_func +static inline void k_poll_signal_reset(struct k_poll_signal * sig) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_POLL_SIGNAL_RESET); + return; + } +#endif + compiler_barrier(); + z_impl_k_poll_signal_reset(sig); +} + + +extern void z_impl_k_poll_signal_check(struct k_poll_signal * sig, unsigned int * signaled, int * result); + +__pinned_func +static inline void k_poll_signal_check(struct k_poll_signal * sig, unsigned int * signaled, int * result) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + union { uintptr_t x; unsigned int * val; } parm1 = { .val = signaled }; + union { uintptr_t x; int * val; } parm2 = { .val = result }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_POLL_SIGNAL_CHECK); + return; + } +#endif + compiler_barrier(); + z_impl_k_poll_signal_check(sig, signaled, result); +} + + +extern int z_impl_k_poll_signal_raise(struct k_poll_signal * sig, int result); + +__pinned_func +static inline int k_poll_signal_raise(struct k_poll_signal * sig, int result) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + union { uintptr_t x; int val; } parm1 = { .val = result }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_POLL_SIGNAL_RAISE); + } +#endif + compiler_barrier(); + return z_impl_k_poll_signal_raise(sig, result); +} + + +extern void z_impl_k_str_out(char * c, size_t n); + +__pinned_func +static inline void k_str_out(char * c, size_t n) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; char * val; } parm0 = { .val = c }; + union { uintptr_t x; size_t val; } parm1 = { .val = n }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STR_OUT); + return; + } +#endif + compiler_barrier(); + z_impl_k_str_out(c, n); +} + + +extern int z_impl_k_float_disable(struct k_thread * thread); + +__pinned_func +static inline int k_float_disable(struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_FLOAT_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_k_float_disable(thread); +} + + +extern int z_impl_k_float_enable(struct k_thread * thread, unsigned int options); + +__pinned_func +static inline int k_float_enable(struct k_thread * thread, unsigned int options) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; unsigned int val; } parm1 = { .val = options }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_FLOAT_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_k_float_enable(thread, options); +} + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/kobject.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/kobject.h new file mode 100644 index 0000000..b571b4d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/kobject.h @@ -0,0 +1,147 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_KOBJECT_H +#define Z_INCLUDE_SYSCALLS_KOBJECT_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_k_object_access_grant(const void * object, struct k_thread * thread); + +__pinned_func +static inline void k_object_access_grant(const void * object, struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = object }; + union { uintptr_t x; struct k_thread * val; } parm1 = { .val = thread }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_OBJECT_ACCESS_GRANT); + return; + } +#endif + compiler_barrier(); + z_impl_k_object_access_grant(object, thread); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_access_grant(object, thread) do { sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ACCESS_GRANT, k_object_access_grant, object, thread); k_object_access_grant(object, thread); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ACCESS_GRANT, k_object_access_grant, object, thread); } while(false) +#endif +#endif + + +extern void z_impl_k_object_release(const void * object); + +__pinned_func +static inline void k_object_release(const void * object) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = object }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_RELEASE); + return; + } +#endif + compiler_barrier(); + z_impl_k_object_release(object); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_release(object) do { sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_RELEASE, k_object_release, object); k_object_release(object); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_RELEASE, k_object_release, object); } while(false) +#endif +#endif + + +extern int z_impl_k_object_access_check(const void * object); + +__pinned_func +static inline int k_object_access_check(const void * object) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = object }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_ACCESS_CHECK); + } +#endif + compiler_barrier(); + return z_impl_k_object_access_check(object); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_access_check(object) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ACCESS_CHECK, k_object_access_check, object); syscall__retval = k_object_access_check(object); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ACCESS_CHECK, k_object_access_check, object, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void * z_impl_k_object_alloc(enum k_objects otype); + +__pinned_func +static inline void * k_object_alloc(enum k_objects otype) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; enum k_objects val; } parm0 = { .val = otype }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_ALLOC); + } +#endif + compiler_barrier(); + return z_impl_k_object_alloc(otype); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_alloc(otype) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ALLOC, k_object_alloc, otype); syscall__retval = k_object_alloc(otype); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ALLOC, k_object_alloc, otype, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void * z_impl_k_object_alloc_size(enum k_objects otype, size_t size); + +__pinned_func +static inline void * k_object_alloc_size(enum k_objects otype, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; enum k_objects val; } parm0 = { .val = otype }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (void *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_OBJECT_ALLOC_SIZE); + } +#endif + compiler_barrier(); + return z_impl_k_object_alloc_size(otype, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_alloc_size(otype, size) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ALLOC_SIZE, k_object_alloc_size, otype, size); syscall__retval = k_object_alloc_size(otype, size); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ALLOC_SIZE, k_object_alloc_size, otype, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/led.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/led.h new file mode 100644 index 0000000..ab2d074 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/led.h @@ -0,0 +1,229 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LED_H +#define Z_INCLUDE_SYSCALLS_LED_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_led_blink(const struct device * dev, uint32_t led, uint32_t delay_on, uint32_t delay_off); + +__pinned_func +static inline int led_blink(const struct device * dev, uint32_t led, uint32_t delay_on, uint32_t delay_off) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = delay_on }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = delay_off }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_BLINK); + } +#endif + compiler_barrier(); + return z_impl_led_blink(dev, led, delay_on, delay_off); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_blink(dev, led, delay_on, delay_off) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_BLINK, led_blink, dev, led, delay_on, delay_off); syscall__retval = led_blink(dev, led, delay_on, delay_off); sys_port_trace_syscall_exit(K_SYSCALL_LED_BLINK, led_blink, dev, led, delay_on, delay_off, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_get_info(const struct device * dev, uint32_t led, const struct led_info ** info); + +__pinned_func +static inline int led_get_info(const struct device * dev, uint32_t led, const struct led_info ** info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; const struct led_info ** val; } parm2 = { .val = info }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_GET_INFO); + } +#endif + compiler_barrier(); + return z_impl_led_get_info(dev, led, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_get_info(dev, led, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_GET_INFO, led_get_info, dev, led, info); syscall__retval = led_get_info(dev, led, info); sys_port_trace_syscall_exit(K_SYSCALL_LED_GET_INFO, led_get_info, dev, led, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_set_brightness(const struct device * dev, uint32_t led, uint8_t value); + +__pinned_func +static inline int led_set_brightness(const struct device * dev, uint32_t led, uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_SET_BRIGHTNESS); + } +#endif + compiler_barrier(); + return z_impl_led_set_brightness(dev, led, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_set_brightness(dev, led, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_BRIGHTNESS, led_set_brightness, dev, led, value); syscall__retval = led_set_brightness(dev, led, value); sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_BRIGHTNESS, led_set_brightness, dev, led, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_write_channels(const struct device * dev, uint32_t start_channel, uint32_t num_channels, const uint8_t * buf); + +__pinned_func +static inline int led_write_channels(const struct device * dev, uint32_t start_channel, uint32_t num_channels, const uint8_t * buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = start_channel }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = num_channels }; + union { uintptr_t x; const uint8_t * val; } parm3 = { .val = buf }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_WRITE_CHANNELS); + } +#endif + compiler_barrier(); + return z_impl_led_write_channels(dev, start_channel, num_channels, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_write_channels(dev, start_channel, num_channels, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_WRITE_CHANNELS, led_write_channels, dev, start_channel, num_channels, buf); syscall__retval = led_write_channels(dev, start_channel, num_channels, buf); sys_port_trace_syscall_exit(K_SYSCALL_LED_WRITE_CHANNELS, led_write_channels, dev, start_channel, num_channels, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_set_channel(const struct device * dev, uint32_t channel, uint8_t value); + +__pinned_func +static inline int led_set_channel(const struct device * dev, uint32_t channel, uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_SET_CHANNEL); + } +#endif + compiler_barrier(); + return z_impl_led_set_channel(dev, channel, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_set_channel(dev, channel, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_CHANNEL, led_set_channel, dev, channel, value); syscall__retval = led_set_channel(dev, channel, value); sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_CHANNEL, led_set_channel, dev, channel, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_set_color(const struct device * dev, uint32_t led, uint8_t num_colors, const uint8_t * color); + +__pinned_func +static inline int led_set_color(const struct device * dev, uint32_t led, uint8_t num_colors, const uint8_t * color) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_colors }; + union { uintptr_t x; const uint8_t * val; } parm3 = { .val = color }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_SET_COLOR); + } +#endif + compiler_barrier(); + return z_impl_led_set_color(dev, led, num_colors, color); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_set_color(dev, led, num_colors, color) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_COLOR, led_set_color, dev, led, num_colors, color); syscall__retval = led_set_color(dev, led, num_colors, color); sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_COLOR, led_set_color, dev, led, num_colors, color, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_on(const struct device * dev, uint32_t led); + +__pinned_func +static inline int led_on(const struct device * dev, uint32_t led) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LED_ON); + } +#endif + compiler_barrier(); + return z_impl_led_on(dev, led); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_on(dev, led) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_ON, led_on, dev, led); syscall__retval = led_on(dev, led); sys_port_trace_syscall_exit(K_SYSCALL_LED_ON, led_on, dev, led, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_off(const struct device * dev, uint32_t led); + +__pinned_func +static inline int led_off(const struct device * dev, uint32_t led) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LED_OFF); + } +#endif + compiler_barrier(); + return z_impl_led_off(dev, led); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_off(dev, led) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_OFF, led_off, dev, led); syscall__retval = led_off(dev, led); sys_port_trace_syscall_exit(K_SYSCALL_LED_OFF, led_off, dev, led, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/libc-hooks.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/libc-hooks.h new file mode 100644 index 0000000..f6f5042 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/libc-hooks.h @@ -0,0 +1,126 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LIBC_HOOKS_H +#define Z_INCLUDE_SYSCALLS_LIBC_HOOKS_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_zephyr_read_stdin(char * buf, int nbytes); + +__pinned_func +static inline int zephyr_read_stdin(char * buf, int nbytes) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; char * val; } parm0 = { .val = buf }; + union { uintptr_t x; int val; } parm1 = { .val = nbytes }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_READ_STDIN); + } +#endif + compiler_barrier(); + return z_impl_zephyr_read_stdin(buf, nbytes); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_read_stdin(buf, nbytes) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_READ_STDIN, zephyr_read_stdin, buf, nbytes); syscall__retval = zephyr_read_stdin(buf, nbytes); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_READ_STDIN, zephyr_read_stdin, buf, nbytes, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zephyr_write_stdout(const void * buf, int nbytes); + +__pinned_func +static inline int zephyr_write_stdout(const void * buf, int nbytes) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = buf }; + union { uintptr_t x; int val; } parm1 = { .val = nbytes }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_WRITE_STDOUT); + } +#endif + compiler_barrier(); + return z_impl_zephyr_write_stdout(buf, nbytes); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_write_stdout(buf, nbytes) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_WRITE_STDOUT, zephyr_write_stdout, buf, nbytes); syscall__retval = zephyr_write_stdout(buf, nbytes); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_WRITE_STDOUT, zephyr_write_stdout, buf, nbytes, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zephyr_fputc(int c, FILE * stream); + +__pinned_func +static inline int zephyr_fputc(int c, FILE * stream) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = c }; + union { uintptr_t x; FILE * val; } parm1 = { .val = stream }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_FPUTC); + } +#endif + compiler_barrier(); + return z_impl_zephyr_fputc(c, stream); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_fputc(c, stream) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_FPUTC, zephyr_fputc, c, stream); syscall__retval = zephyr_fputc(c, stream); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_FPUTC, zephyr_fputc, c, stream, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_zephyr_fwrite(const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream); + +__pinned_func +static inline size_t zephyr_fwrite(const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void *ZRESTRICT val; } parm0 = { .val = ptr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + union { uintptr_t x; size_t val; } parm2 = { .val = nitems }; + union { uintptr_t x; FILE *ZRESTRICT val; } parm3 = { .val = stream }; + return (size_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_ZEPHYR_FWRITE); + } +#endif + compiler_barrier(); + return z_impl_zephyr_fwrite(ptr, size, nitems, stream); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_fwrite(ptr, size, nitems, stream) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_FWRITE, zephyr_fwrite, ptr, size, nitems, stream); syscall__retval = zephyr_fwrite(ptr, size, nitems, stream); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_FWRITE, zephyr_fwrite, ptr, size, nitems, stream, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/llext.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/llext.h new file mode 100644 index 0000000..72ba359 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/llext.h @@ -0,0 +1,54 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LLEXT_H +#define Z_INCLUDE_SYSCALLS_LLEXT_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern ssize_t z_impl_llext_get_fn_table(struct llext * ext, bool is_init, void * buf, size_t size); + +__pinned_func +static inline ssize_t llext_get_fn_table(struct llext * ext, bool is_init, void * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct llext * val; } parm0 = { .val = ext }; + union { uintptr_t x; bool val; } parm1 = { .val = is_init }; + union { uintptr_t x; void * val; } parm2 = { .val = buf }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (ssize_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LLEXT_GET_FN_TABLE); + } +#endif + compiler_barrier(); + return z_impl_llext_get_fn_table(ext, is_init, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define llext_get_fn_table(ext, is_init, buf, size) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LLEXT_GET_FN_TABLE, llext_get_fn_table, ext, is_init, buf, size); syscall__retval = llext_get_fn_table(ext, is_init, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_LLEXT_GET_FN_TABLE, llext_get_fn_table, ext, is_init, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/log_ctrl.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/log_ctrl.h new file mode 100644 index 0000000..e4061a2 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/log_ctrl.h @@ -0,0 +1,145 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LOG_CTRL_H +#define Z_INCLUDE_SYSCALLS_LOG_CTRL_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_log_panic(void); + +__pinned_func +static inline void log_panic(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_LOG_PANIC); + return; + } +#endif + compiler_barrier(); + z_impl_log_panic(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_panic() do { sys_port_trace_syscall_enter(K_SYSCALL_LOG_PANIC, log_panic); log_panic(); sys_port_trace_syscall_exit(K_SYSCALL_LOG_PANIC, log_panic); } while(false) +#endif +#endif + + +extern bool z_impl_log_process(void); + +__pinned_func +static inline bool log_process(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (bool) arch_syscall_invoke0(K_SYSCALL_LOG_PROCESS); + } +#endif + compiler_barrier(); + return z_impl_log_process(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_process() ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_PROCESS, log_process); syscall__retval = log_process(); sys_port_trace_syscall_exit(K_SYSCALL_LOG_PROCESS, log_process, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_log_buffered_cnt(void); + +__pinned_func +static inline uint32_t log_buffered_cnt(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (uint32_t) arch_syscall_invoke0(K_SYSCALL_LOG_BUFFERED_CNT); + } +#endif + compiler_barrier(); + return z_impl_log_buffered_cnt(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_buffered_cnt() ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_BUFFERED_CNT, log_buffered_cnt); syscall__retval = log_buffered_cnt(); sys_port_trace_syscall_exit(K_SYSCALL_LOG_BUFFERED_CNT, log_buffered_cnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_log_filter_set(struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level); + +__pinned_func +static inline uint32_t log_filter_set(struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct log_backend const *const val; } parm0 = { .val = backend }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = domain_id }; + union { uintptr_t x; int16_t val; } parm2 = { .val = source_id }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = level }; + return (uint32_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LOG_FILTER_SET); + } +#endif + compiler_barrier(); + return z_impl_log_filter_set(backend, domain_id, source_id, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_filter_set(backend, domain_id, source_id, level) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_FILTER_SET, log_filter_set, backend, domain_id, source_id, level); syscall__retval = log_filter_set(backend, domain_id, source_id, level); sys_port_trace_syscall_exit(K_SYSCALL_LOG_FILTER_SET, log_filter_set, backend, domain_id, source_id, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_log_frontend_filter_set(int16_t source_id, uint32_t level); + +__pinned_func +static inline uint32_t log_frontend_filter_set(int16_t source_id, uint32_t level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int16_t val; } parm0 = { .val = source_id }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LOG_FRONTEND_FILTER_SET); + } +#endif + compiler_barrier(); + return z_impl_log_frontend_filter_set(source_id, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_frontend_filter_set(source_id, level) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_FRONTEND_FILTER_SET, log_frontend_filter_set, source_id, level); syscall__retval = log_frontend_filter_set(source_id, level); sys_port_trace_syscall_exit(K_SYSCALL_LOG_FRONTEND_FILTER_SET, log_frontend_filter_set, source_id, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/log_msg.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/log_msg.h new file mode 100644 index 0000000..9b8bab5 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/log_msg.h @@ -0,0 +1,136 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LOG_MSG_H +#define Z_INCLUDE_SYSCALLS_LOG_MSG_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_z_log_msg_simple_create_0(const void * source, uint32_t level, const char * fmt); + +__pinned_func +static inline void z_log_msg_simple_create_0(const void * source, uint32_t level, const char * fmt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + union { uintptr_t x; const char * val; } parm2 = { .val = fmt }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_simple_create_0(source, level, fmt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_simple_create_0(source, level, fmt) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0, z_log_msg_simple_create_0, source, level, fmt); z_log_msg_simple_create_0(source, level, fmt); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0, z_log_msg_simple_create_0, source, level, fmt); } while(false) +#endif +#endif + + +extern void z_impl_z_log_msg_simple_create_1(const void * source, uint32_t level, const char * fmt, uint32_t arg); + +__pinned_func +static inline void z_log_msg_simple_create_1(const void * source, uint32_t level, const char * fmt, uint32_t arg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + union { uintptr_t x; const char * val; } parm2 = { .val = fmt }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = arg }; + (void) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_simple_create_1(source, level, fmt, arg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_simple_create_1(source, level, fmt, arg) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1, z_log_msg_simple_create_1, source, level, fmt, arg); z_log_msg_simple_create_1(source, level, fmt, arg); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1, z_log_msg_simple_create_1, source, level, fmt, arg); } while(false) +#endif +#endif + + +extern void z_impl_z_log_msg_simple_create_2(const void * source, uint32_t level, const char * fmt, uint32_t arg0, uint32_t arg1); + +__pinned_func +static inline void z_log_msg_simple_create_2(const void * source, uint32_t level, const char * fmt, uint32_t arg0, uint32_t arg1) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + union { uintptr_t x; const char * val; } parm2 = { .val = fmt }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = arg0 }; + union { uintptr_t x; uint32_t val; } parm4 = { .val = arg1 }; + (void) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_simple_create_2(source, level, fmt, arg0, arg1); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_simple_create_2(source, level, fmt, arg0, arg1) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2, z_log_msg_simple_create_2, source, level, fmt, arg0, arg1); z_log_msg_simple_create_2(source, level, fmt, arg0, arg1); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2, z_log_msg_simple_create_2, source, level, fmt, arg0, arg1); } while(false) +#endif +#endif + + +extern void z_impl_z_log_msg_static_create(const void * source, const struct log_msg_desc desc, uint8_t * package, const void * data); + +__pinned_func +static inline void z_log_msg_static_create(const void * source, const struct log_msg_desc desc, uint8_t * package, const void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; const struct log_msg_desc val; } parm1 = { .val = desc }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = package }; + union { uintptr_t x; const void * val; } parm3 = { .val = data }; + (void) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_LOG_MSG_STATIC_CREATE); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_static_create(source, desc, package, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_static_create(source, desc, package, data) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_STATIC_CREATE, z_log_msg_static_create, source, desc, package, data); z_log_msg_static_create(source, desc, package, data); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_STATIC_CREATE, z_log_msg_static_create, source, desc, package, data); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/maxim_ds3231.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/maxim_ds3231.h new file mode 100644 index 0000000..d6e399d --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/maxim_ds3231.h @@ -0,0 +1,76 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MAXIM_DS3231_H +#define Z_INCLUDE_SYSCALLS_MAXIM_DS3231_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_maxim_ds3231_req_syncpoint(const struct device * dev, struct k_poll_signal * signal); + +__pinned_func +static inline int maxim_ds3231_req_syncpoint(const struct device * dev, struct k_poll_signal * signal) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct k_poll_signal * val; } parm1 = { .val = signal }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT); + } +#endif + compiler_barrier(); + return z_impl_maxim_ds3231_req_syncpoint(dev, signal); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define maxim_ds3231_req_syncpoint(dev, signal) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT, maxim_ds3231_req_syncpoint, dev, signal); syscall__retval = maxim_ds3231_req_syncpoint(dev, signal); sys_port_trace_syscall_exit(K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT, maxim_ds3231_req_syncpoint, dev, signal, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_maxim_ds3231_get_syncpoint(const struct device * dev, struct maxim_ds3231_syncpoint * syncpoint); + +__pinned_func +static inline int maxim_ds3231_get_syncpoint(const struct device * dev, struct maxim_ds3231_syncpoint * syncpoint) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct maxim_ds3231_syncpoint * val; } parm1 = { .val = syncpoint }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT); + } +#endif + compiler_barrier(); + return z_impl_maxim_ds3231_get_syncpoint(dev, syncpoint); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define maxim_ds3231_get_syncpoint(dev, syncpoint) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT, maxim_ds3231_get_syncpoint, dev, syncpoint); syscall__retval = maxim_ds3231_get_syncpoint(dev, syncpoint); sys_port_trace_syscall_exit(K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT, maxim_ds3231_get_syncpoint, dev, syncpoint, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mbox.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mbox.h new file mode 100644 index 0000000..53ef70b --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mbox.h @@ -0,0 +1,124 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MBOX_H +#define Z_INCLUDE_SYSCALLS_MBOX_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_mbox_send(const struct device * dev, mbox_channel_id_t channel_id, const struct mbox_msg * msg); + +__pinned_func +static inline int mbox_send(const struct device * dev, mbox_channel_id_t channel_id, const struct mbox_msg * msg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; mbox_channel_id_t val; } parm1 = { .val = channel_id }; + union { uintptr_t x; const struct mbox_msg * val; } parm2 = { .val = msg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MBOX_SEND); + } +#endif + compiler_barrier(); + return z_impl_mbox_send(dev, channel_id, msg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_send(dev, channel_id, msg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_SEND, mbox_send, dev, channel_id, msg); syscall__retval = mbox_send(dev, channel_id, msg); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_SEND, mbox_send, dev, channel_id, msg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mbox_mtu_get(const struct device * dev); + +__pinned_func +static inline int mbox_mtu_get(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_MBOX_MTU_GET); + } +#endif + compiler_barrier(); + return z_impl_mbox_mtu_get(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_mtu_get(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_MTU_GET, mbox_mtu_get, dev); syscall__retval = mbox_mtu_get(dev); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_MTU_GET, mbox_mtu_get, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mbox_set_enabled(const struct device * dev, mbox_channel_id_t channel_id, bool enabled); + +__pinned_func +static inline int mbox_set_enabled(const struct device * dev, mbox_channel_id_t channel_id, bool enabled) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; mbox_channel_id_t val; } parm1 = { .val = channel_id }; + union { uintptr_t x; bool val; } parm2 = { .val = enabled }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MBOX_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_mbox_set_enabled(dev, channel_id, enabled); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_set_enabled(dev, channel_id, enabled) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_SET_ENABLED, mbox_set_enabled, dev, channel_id, enabled); syscall__retval = mbox_set_enabled(dev, channel_id, enabled); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_SET_ENABLED, mbox_set_enabled, dev, channel_id, enabled, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_mbox_max_channels_get(const struct device * dev); + +__pinned_func +static inline uint32_t mbox_max_channels_get(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_MBOX_MAX_CHANNELS_GET); + } +#endif + compiler_barrier(); + return z_impl_mbox_max_channels_get(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_max_channels_get(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_MAX_CHANNELS_GET, mbox_max_channels_get, dev); syscall__retval = mbox_max_channels_get(dev); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_MAX_CHANNELS_GET, mbox_max_channels_get, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mdio.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mdio.h new file mode 100644 index 0000000..f1f26ae --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mdio.h @@ -0,0 +1,134 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MDIO_H +#define Z_INCLUDE_SYSCALLS_MDIO_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_mdio_read(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t * data); + +__pinned_func +static inline int mdio_read(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = regad }; + union { uintptr_t x; uint16_t * val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MDIO_READ); + } +#endif + compiler_barrier(); + return z_impl_mdio_read(dev, prtad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_read(dev, prtad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_READ, mdio_read, dev, prtad, regad, data); syscall__retval = mdio_read(dev, prtad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_READ, mdio_read, dev, prtad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mdio_write(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t data); + +__pinned_func +static inline int mdio_write(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = regad }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MDIO_WRITE); + } +#endif + compiler_barrier(); + return z_impl_mdio_write(dev, prtad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_write(dev, prtad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_WRITE, mdio_write, dev, prtad, regad, data); syscall__retval = mdio_write(dev, prtad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_WRITE, mdio_write, dev, prtad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mdio_read_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t * data); + +__pinned_func +static inline int mdio_read_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = devad }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = regad }; + union { uintptr_t x; uint16_t * val; } parm4 = { .val = data }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_MDIO_READ_C45); + } +#endif + compiler_barrier(); + return z_impl_mdio_read_c45(dev, prtad, devad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_read_c45(dev, prtad, devad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_READ_C45, mdio_read_c45, dev, prtad, devad, regad, data); syscall__retval = mdio_read_c45(dev, prtad, devad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_READ_C45, mdio_read_c45, dev, prtad, devad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mdio_write_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data); + +__pinned_func +static inline int mdio_write_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = devad }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = regad }; + union { uintptr_t x; uint16_t val; } parm4 = { .val = data }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_MDIO_WRITE_C45); + } +#endif + compiler_barrier(); + return z_impl_mdio_write_c45(dev, prtad, devad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_write_c45(dev, prtad, devad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_WRITE_C45, mdio_write_c45, dev, prtad, devad, regad, data); syscall__retval = mdio_write_c45(dev, prtad, devad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_WRITE_C45, mdio_write_c45, dev, prtad, devad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mspi.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mspi.h new file mode 100644 index 0000000..6a72b61 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mspi.h @@ -0,0 +1,202 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MSPI_H +#define Z_INCLUDE_SYSCALLS_MSPI_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_mspi_config(const struct mspi_dt_spec * spec); + +__pinned_func +static inline int mspi_config(const struct mspi_dt_spec * spec) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct mspi_dt_spec * val; } parm0 = { .val = spec }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_MSPI_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_mspi_config(spec); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_config(spec) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_CONFIG, mspi_config, spec); syscall__retval = mspi_config(spec); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_CONFIG, mspi_config, spec, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mspi_dev_config(const struct device * controller, const struct mspi_dev_id * dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg * cfg); + +__pinned_func +static inline int mspi_dev_config(const struct device * controller, const struct mspi_dev_id * dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = controller }; + union { uintptr_t x; const struct mspi_dev_id * val; } parm1 = { .val = dev_id }; + union { uintptr_t x; const enum mspi_dev_cfg_mask val; } parm2 = { .val = param_mask }; + union { uintptr_t x; const struct mspi_dev_cfg * val; } parm3 = { .val = cfg }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MSPI_DEV_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_mspi_dev_config(controller, dev_id, param_mask, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_dev_config(controller, dev_id, param_mask, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_DEV_CONFIG, mspi_dev_config, controller, dev_id, param_mask, cfg); syscall__retval = mspi_dev_config(controller, dev_id, param_mask, cfg); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_DEV_CONFIG, mspi_dev_config, controller, dev_id, param_mask, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mspi_get_channel_status(const struct device * controller, uint8_t ch); + +__pinned_func +static inline int mspi_get_channel_status(const struct device * controller, uint8_t ch) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = controller }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = ch }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MSPI_GET_CHANNEL_STATUS); + } +#endif + compiler_barrier(); + return z_impl_mspi_get_channel_status(controller, ch); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_get_channel_status(controller, ch) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_GET_CHANNEL_STATUS, mspi_get_channel_status, controller, ch); syscall__retval = mspi_get_channel_status(controller, ch); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_GET_CHANNEL_STATUS, mspi_get_channel_status, controller, ch, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mspi_transceive(const struct device * controller, const struct mspi_dev_id * dev_id, const struct mspi_xfer * req); + +__pinned_func +static inline int mspi_transceive(const struct device * controller, const struct mspi_dev_id * dev_id, const struct mspi_xfer * req) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = controller }; + union { uintptr_t x; const struct mspi_dev_id * val; } parm1 = { .val = dev_id }; + union { uintptr_t x; const struct mspi_xfer * val; } parm2 = { .val = req }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MSPI_TRANSCEIVE); + } +#endif + compiler_barrier(); + return z_impl_mspi_transceive(controller, dev_id, req); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_transceive(controller, dev_id, req) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_TRANSCEIVE, mspi_transceive, controller, dev_id, req); syscall__retval = mspi_transceive(controller, dev_id, req); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_TRANSCEIVE, mspi_transceive, controller, dev_id, req, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mspi_xip_config(const struct device * controller, const struct mspi_dev_id * dev_id, const struct mspi_xip_cfg * cfg); + +__pinned_func +static inline int mspi_xip_config(const struct device * controller, const struct mspi_dev_id * dev_id, const struct mspi_xip_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = controller }; + union { uintptr_t x; const struct mspi_dev_id * val; } parm1 = { .val = dev_id }; + union { uintptr_t x; const struct mspi_xip_cfg * val; } parm2 = { .val = cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MSPI_XIP_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_mspi_xip_config(controller, dev_id, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_xip_config(controller, dev_id, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_XIP_CONFIG, mspi_xip_config, controller, dev_id, cfg); syscall__retval = mspi_xip_config(controller, dev_id, cfg); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_XIP_CONFIG, mspi_xip_config, controller, dev_id, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mspi_scramble_config(const struct device * controller, const struct mspi_dev_id * dev_id, const struct mspi_scramble_cfg * cfg); + +__pinned_func +static inline int mspi_scramble_config(const struct device * controller, const struct mspi_dev_id * dev_id, const struct mspi_scramble_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = controller }; + union { uintptr_t x; const struct mspi_dev_id * val; } parm1 = { .val = dev_id }; + union { uintptr_t x; const struct mspi_scramble_cfg * val; } parm2 = { .val = cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MSPI_SCRAMBLE_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_mspi_scramble_config(controller, dev_id, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_scramble_config(controller, dev_id, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_SCRAMBLE_CONFIG, mspi_scramble_config, controller, dev_id, cfg); syscall__retval = mspi_scramble_config(controller, dev_id, cfg); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_SCRAMBLE_CONFIG, mspi_scramble_config, controller, dev_id, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mspi_timing_config(const struct device * controller, const struct mspi_dev_id * dev_id, const uint32_t param_mask, void * cfg); + +__pinned_func +static inline int mspi_timing_config(const struct device * controller, const struct mspi_dev_id * dev_id, const uint32_t param_mask, void * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = controller }; + union { uintptr_t x; const struct mspi_dev_id * val; } parm1 = { .val = dev_id }; + union { uintptr_t x; const uint32_t val; } parm2 = { .val = param_mask }; + union { uintptr_t x; void * val; } parm3 = { .val = cfg }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MSPI_TIMING_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_mspi_timing_config(controller, dev_id, param_mask, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mspi_timing_config(controller, dev_id, param_mask, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MSPI_TIMING_CONFIG, mspi_timing_config, controller, dev_id, param_mask, cfg); syscall__retval = mspi_timing_config(controller, dev_id, param_mask, cfg); sys_port_trace_syscall_exit(K_SYSCALL_MSPI_TIMING_CONFIG, mspi_timing_config, controller, dev_id, param_mask, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mutex.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mutex.h new file mode 100644 index 0000000..1e90425 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/mutex.h @@ -0,0 +1,75 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MUTEX_H +#define Z_INCLUDE_SYSCALLS_MUTEX_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_z_sys_mutex_kernel_lock(struct sys_mutex * mutex, k_timeout_t timeout); + +__pinned_func +static inline int z_sys_mutex_kernel_lock(struct sys_mutex * mutex, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct sys_mutex * val; } parm0 = { .val = mutex }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK); + } +#endif + compiler_barrier(); + return z_impl_z_sys_mutex_kernel_lock(mutex, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_sys_mutex_kernel_lock(mutex, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK, z_sys_mutex_kernel_lock, mutex, timeout); syscall__retval = z_sys_mutex_kernel_lock(mutex, timeout); sys_port_trace_syscall_exit(K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK, z_sys_mutex_kernel_lock, mutex, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_z_sys_mutex_kernel_unlock(struct sys_mutex * mutex); + +__pinned_func +static inline int z_sys_mutex_kernel_unlock(struct sys_mutex * mutex) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct sys_mutex * val; } parm0 = { .val = mutex }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK); + } +#endif + compiler_barrier(); + return z_impl_z_sys_mutex_kernel_unlock(mutex); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_sys_mutex_kernel_unlock(mutex) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK, z_sys_mutex_kernel_unlock, mutex); syscall__retval = z_sys_mutex_kernel_unlock(mutex); sys_port_trace_syscall_exit(K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK, z_sys_mutex_kernel_unlock, mutex, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/net_if.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/net_if.h new file mode 100644 index 0000000..04c93c4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/net_if.h @@ -0,0 +1,246 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_NET_IF_H +#define Z_INCLUDE_SYSCALLS_NET_IF_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_net_if_ipv6_addr_lookup_by_index(const struct net_in6_addr * addr); + +__pinned_func +static inline int net_if_ipv6_addr_lookup_by_index(const struct net_in6_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct net_in6_addr * val; } parm0 = { .val = addr }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv6_addr_lookup_by_index(addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv6_addr_lookup_by_index(addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX, net_if_ipv6_addr_lookup_by_index, addr); syscall__retval = net_if_ipv6_addr_lookup_by_index(addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX, net_if_ipv6_addr_lookup_by_index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv6_addr_add_by_index(int index, const struct net_in6_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime); + +__pinned_func +static inline bool net_if_ipv6_addr_add_by_index(int index, const struct net_in6_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct net_in6_addr * val; } parm1 = { .val = addr }; + union { uintptr_t x; enum net_addr_type val; } parm2 = { .val = addr_type }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = vlifetime }; + return (bool) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX, net_if_ipv6_addr_add_by_index, index, addr, addr_type, vlifetime); syscall__retval = net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX, net_if_ipv6_addr_add_by_index, index, addr, addr_type, vlifetime, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv6_addr_rm_by_index(int index, const struct net_in6_addr * addr); + +__pinned_func +static inline bool net_if_ipv6_addr_rm_by_index(int index, const struct net_in6_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct net_in6_addr * val; } parm1 = { .val = addr }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv6_addr_rm_by_index(index, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv6_addr_rm_by_index(index, addr) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX, net_if_ipv6_addr_rm_by_index, index, addr); syscall__retval = net_if_ipv6_addr_rm_by_index(index, addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX, net_if_ipv6_addr_rm_by_index, index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_net_if_ipv4_addr_lookup_by_index(const struct net_in_addr * addr); + +__pinned_func +static inline int net_if_ipv4_addr_lookup_by_index(const struct net_in_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct net_in_addr * val; } parm0 = { .val = addr }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_addr_lookup_by_index(addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_addr_lookup_by_index(addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX, net_if_ipv4_addr_lookup_by_index, addr); syscall__retval = net_if_ipv4_addr_lookup_by_index(addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX, net_if_ipv4_addr_lookup_by_index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_addr_add_by_index(int index, const struct net_in_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime); + +__pinned_func +static inline bool net_if_ipv4_addr_add_by_index(int index, const struct net_in_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct net_in_addr * val; } parm1 = { .val = addr }; + union { uintptr_t x; enum net_addr_type val; } parm2 = { .val = addr_type }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = vlifetime }; + return (bool) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX, net_if_ipv4_addr_add_by_index, index, addr, addr_type, vlifetime); syscall__retval = net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX, net_if_ipv4_addr_add_by_index, index, addr, addr_type, vlifetime, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_addr_rm_by_index(int index, const struct net_in_addr * addr); + +__pinned_func +static inline bool net_if_ipv4_addr_rm_by_index(int index, const struct net_in_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct net_in_addr * val; } parm1 = { .val = addr }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_addr_rm_by_index(index, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_addr_rm_by_index(index, addr) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX, net_if_ipv4_addr_rm_by_index, index, addr); syscall__retval = net_if_ipv4_addr_rm_by_index(index, addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX, net_if_ipv4_addr_rm_by_index, index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_set_netmask_by_addr_by_index(int index, const struct net_in_addr * addr, const struct net_in_addr * netmask); + +__pinned_func +static inline bool net_if_ipv4_set_netmask_by_addr_by_index(int index, const struct net_in_addr * addr, const struct net_in_addr * netmask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct net_in_addr * val; } parm1 = { .val = addr }; + union { uintptr_t x; const struct net_in_addr * val; } parm2 = { .val = netmask }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX, net_if_ipv4_set_netmask_by_addr_by_index, index, addr, netmask); syscall__retval = net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX, net_if_ipv4_set_netmask_by_addr_by_index, index, addr, netmask, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_set_gw_by_index(int index, const struct net_in_addr * gw); + +__pinned_func +static inline bool net_if_ipv4_set_gw_by_index(int index, const struct net_in_addr * gw) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct net_in_addr * val; } parm1 = { .val = gw }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_set_gw_by_index(index, gw); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_set_gw_by_index(index, gw) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX, net_if_ipv4_set_gw_by_index, index, gw); syscall__retval = net_if_ipv4_set_gw_by_index(index, gw); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX, net_if_ipv4_set_gw_by_index, index, gw, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern struct net_if * z_impl_net_if_get_by_index(int index); + +__pinned_func +static inline struct net_if * net_if_get_by_index(int index) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + return (struct net_if *) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_GET_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_get_by_index(index); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_get_by_index(index) ({ struct net_if * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_GET_BY_INDEX, net_if_get_by_index, index); syscall__retval = net_if_get_by_index(index); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_GET_BY_INDEX, net_if_get_by_index, index, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/net_ip.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/net_ip.h new file mode 100644 index 0000000..fe96588 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/net_ip.h @@ -0,0 +1,79 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_NET_IP_H +#define Z_INCLUDE_SYSCALLS_NET_IP_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_net_addr_pton(net_sa_family_t family, const char * src, void * dst); + +__pinned_func +static inline int net_addr_pton(net_sa_family_t family, const char * src, void * dst) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; net_sa_family_t val; } parm0 = { .val = family }; + union { uintptr_t x; const char * val; } parm1 = { .val = src }; + union { uintptr_t x; void * val; } parm2 = { .val = dst }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_NET_ADDR_PTON); + } +#endif + compiler_barrier(); + return z_impl_net_addr_pton(family, src, dst); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_addr_pton(family, src, dst) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_ADDR_PTON, net_addr_pton, family, src, dst); syscall__retval = net_addr_pton(family, src, dst); sys_port_trace_syscall_exit(K_SYSCALL_NET_ADDR_PTON, net_addr_pton, family, src, dst, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern char * z_impl_net_addr_ntop(net_sa_family_t family, const void * src, char * dst, size_t size); + +__pinned_func +static inline char * net_addr_ntop(net_sa_family_t family, const void * src, char * dst, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; net_sa_family_t val; } parm0 = { .val = family }; + union { uintptr_t x; const void * val; } parm1 = { .val = src }; + union { uintptr_t x; char * val; } parm2 = { .val = dst }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (char *) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_ADDR_NTOP); + } +#endif + compiler_barrier(); + return z_impl_net_addr_ntop(family, src, dst, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_addr_ntop(family, src, dst, size) ({ char * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_ADDR_NTOP, net_addr_ntop, family, src, dst, size); syscall__retval = net_addr_ntop(family, src, dst, size); sys_port_trace_syscall_exit(K_SYSCALL_NET_ADDR_NTOP, net_addr_ntop, family, src, dst, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/nrf_qspi_nor.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/nrf_qspi_nor.h new file mode 100644 index 0000000..ea0c654 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/nrf_qspi_nor.h @@ -0,0 +1,53 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_NRF_QSPI_NOR_H +#define Z_INCLUDE_SYSCALLS_NRF_QSPI_NOR_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_nrf_qspi_nor_xip_enable(const struct device * dev, bool enable); + +__pinned_func +static inline void nrf_qspi_nor_xip_enable(const struct device * dev, bool enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enable }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_nrf_qspi_nor_xip_enable(dev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define nrf_qspi_nor_xip_enable(dev, enable) do { sys_port_trace_syscall_enter(K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE, nrf_qspi_nor_xip_enable, dev, enable); nrf_qspi_nor_xip_enable(dev, enable); sys_port_trace_syscall_exit(K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE, nrf_qspi_nor_xip_enable, dev, enable); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/opamp.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/opamp.h new file mode 100644 index 0000000..5c45de9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/opamp.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_OPAMP_H +#define Z_INCLUDE_SYSCALLS_OPAMP_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_opamp_set_gain(const struct device * dev, enum opamp_gain gain); + +__pinned_func +static inline int opamp_set_gain(const struct device * dev, enum opamp_gain gain) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum opamp_gain val; } parm1 = { .val = gain }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_OPAMP_SET_GAIN); + } +#endif + compiler_barrier(); + return z_impl_opamp_set_gain(dev, gain); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define opamp_set_gain(dev, gain) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_OPAMP_SET_GAIN, opamp_set_gain, dev, gain); syscall__retval = opamp_set_gain(dev, gain); sys_port_trace_syscall_exit(K_SYSCALL_OPAMP_SET_GAIN, opamp_set_gain, dev, gain, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/otp.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/otp.h new file mode 100644 index 0000000..7fe4c67 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/otp.h @@ -0,0 +1,80 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_OTP_H +#define Z_INCLUDE_SYSCALLS_OTP_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_otp_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int otp_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_OTP_READ); + } +#endif + compiler_barrier(); + return z_impl_otp_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define otp_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_OTP_READ, otp_read, dev, offset, data, len); syscall__retval = otp_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_OTP_READ, otp_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_otp_program(const struct device * dev, off_t offset, const void * data, size_t len); + +__pinned_func +static inline int otp_program(const struct device * dev, off_t offset, const void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_OTP_PROGRAM); + } +#endif + compiler_barrier(); + return z_impl_otp_program(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define otp_program(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_OTP_PROGRAM, otp_program, dev, offset, data, len); syscall__retval = otp_program(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_OTP_PROGRAM, otp_program, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/peci.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/peci.h new file mode 100644 index 0000000..17acef0 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/peci.h @@ -0,0 +1,122 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PECI_H +#define Z_INCLUDE_SYSCALLS_PECI_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_peci_config(const struct device * dev, uint32_t bitrate); + +__pinned_func +static inline int peci_config(const struct device * dev, uint32_t bitrate) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PECI_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_peci_config(dev, bitrate); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_config(dev, bitrate) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_CONFIG, peci_config, dev, bitrate); syscall__retval = peci_config(dev, bitrate); sys_port_trace_syscall_exit(K_SYSCALL_PECI_CONFIG, peci_config, dev, bitrate, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_peci_enable(const struct device * dev); + +__pinned_func +static inline int peci_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PECI_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_peci_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_enable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_ENABLE, peci_enable, dev); syscall__retval = peci_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_PECI_ENABLE, peci_enable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_peci_disable(const struct device * dev); + +__pinned_func +static inline int peci_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PECI_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_peci_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_DISABLE, peci_disable, dev); syscall__retval = peci_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_PECI_DISABLE, peci_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_peci_transfer(const struct device * dev, struct peci_msg * msg); + +__pinned_func +static inline int peci_transfer(const struct device * dev, struct peci_msg * msg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct peci_msg * val; } parm1 = { .val = msg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PECI_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_peci_transfer(dev, msg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_transfer(dev, msg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_TRANSFER, peci_transfer, dev, msg); syscall__retval = peci_transfer(dev, msg); sys_port_trace_syscall_exit(K_SYSCALL_PECI_TRANSFER, peci_transfer, dev, msg, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ps2.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ps2.h new file mode 100644 index 0000000..4b94318 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ps2.h @@ -0,0 +1,146 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PS2_H +#define Z_INCLUDE_SYSCALLS_PS2_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_ps2_config(const struct device * dev, ps2_callback_t callback_isr); + +__pinned_func +static inline int ps2_config(const struct device * dev, ps2_callback_t callback_isr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; ps2_callback_t val; } parm1 = { .val = callback_isr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_ps2_config(dev, callback_isr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_config(dev, callback_isr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_CONFIG, ps2_config, dev, callback_isr); syscall__retval = ps2_config(dev, callback_isr); sys_port_trace_syscall_exit(K_SYSCALL_PS2_CONFIG, ps2_config, dev, callback_isr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_write(const struct device * dev, uint8_t value); + +__pinned_func +static inline int ps2_write(const struct device * dev, uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_WRITE); + } +#endif + compiler_barrier(); + return z_impl_ps2_write(dev, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_write(dev, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_WRITE, ps2_write, dev, value); syscall__retval = ps2_write(dev, value); sys_port_trace_syscall_exit(K_SYSCALL_PS2_WRITE, ps2_write, dev, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_read(const struct device * dev, uint8_t * value); + +__pinned_func +static inline int ps2_read(const struct device * dev, uint8_t * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_READ); + } +#endif + compiler_barrier(); + return z_impl_ps2_read(dev, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_read(dev, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_READ, ps2_read, dev, value); syscall__retval = ps2_read(dev, value); sys_port_trace_syscall_exit(K_SYSCALL_PS2_READ, ps2_read, dev, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_enable_callback(const struct device * dev); + +__pinned_func +static inline int ps2_enable_callback(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PS2_ENABLE_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_ps2_enable_callback(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_enable_callback(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_ENABLE_CALLBACK, ps2_enable_callback, dev); syscall__retval = ps2_enable_callback(dev); sys_port_trace_syscall_exit(K_SYSCALL_PS2_ENABLE_CALLBACK, ps2_enable_callback, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_disable_callback(const struct device * dev); + +__pinned_func +static inline int ps2_disable_callback(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PS2_DISABLE_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_ps2_disable_callback(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_disable_callback(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_DISABLE_CALLBACK, ps2_disable_callback, dev); syscall__retval = ps2_disable_callback(dev); sys_port_trace_syscall_exit(K_SYSCALL_PS2_DISABLE_CALLBACK, ps2_disable_callback, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/psi5.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/psi5.h new file mode 100644 index 0000000..d990afc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/psi5.h @@ -0,0 +1,133 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PSI5_H +#define Z_INCLUDE_SYSCALLS_PSI5_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_psi5_start_sync(const struct device * dev, uint8_t channel); + +__pinned_func +static inline int psi5_start_sync(const struct device * dev, uint8_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PSI5_START_SYNC); + } +#endif + compiler_barrier(); + return z_impl_psi5_start_sync(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define psi5_start_sync(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PSI5_START_SYNC, psi5_start_sync, dev, channel); syscall__retval = psi5_start_sync(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_PSI5_START_SYNC, psi5_start_sync, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_psi5_stop_sync(const struct device * dev, uint8_t channel); + +__pinned_func +static inline int psi5_stop_sync(const struct device * dev, uint8_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PSI5_STOP_SYNC); + } +#endif + compiler_barrier(); + return z_impl_psi5_stop_sync(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define psi5_stop_sync(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PSI5_STOP_SYNC, psi5_stop_sync, dev, channel); syscall__retval = psi5_stop_sync(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_PSI5_STOP_SYNC, psi5_stop_sync, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_psi5_send(const struct device * dev, uint8_t channel, const uint64_t data, k_timeout_t timeout, psi5_tx_callback_t callback, void * user_data); + +__pinned_func +static inline int psi5_send(const struct device * dev, uint8_t channel, const uint64_t data, k_timeout_t timeout, psi5_tx_callback_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + union { uintptr_t x; const uint64_t val; } parm2 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + union { uintptr_t x; psi5_tx_callback_t val; } parm4 = { .val = callback }; + union { uintptr_t x; void * val; } parm5 = { .val = user_data }; + uintptr_t more[] = { + parm4.x, + parm5.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, (uintptr_t) &more, K_SYSCALL_PSI5_SEND); + } +#endif + compiler_barrier(); + return z_impl_psi5_send(dev, channel, data, timeout, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define psi5_send(dev, channel, data, timeout, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PSI5_SEND, psi5_send, dev, channel, data, timeout, callback, user_data); syscall__retval = psi5_send(dev, channel, data, timeout, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_PSI5_SEND, psi5_send, dev, channel, data, timeout, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_psi5_register_callback(const struct device * dev, uint8_t channel, struct psi5_rx_callback_configs callback_configs); + +__pinned_func +static inline int psi5_register_callback(const struct device * dev, uint8_t channel, struct psi5_rx_callback_configs callback_configs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + union { uintptr_t x; struct psi5_rx_callback_configs val; } parm2 = { .val = callback_configs }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_PSI5_REGISTER_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_psi5_register_callback(dev, channel, callback_configs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define psi5_register_callback(dev, channel, callback_configs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PSI5_REGISTER_CALLBACK, psi5_register_callback, dev, channel, callback_configs); syscall__retval = psi5_register_callback(dev, channel, callback_configs); sys_port_trace_syscall_exit(K_SYSCALL_PSI5_REGISTER_CALLBACK, psi5_register_callback, dev, channel, callback_configs, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ptp_clock.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ptp_clock.h new file mode 100644 index 0000000..399019c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/ptp_clock.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PTP_CLOCK_H +#define Z_INCLUDE_SYSCALLS_PTP_CLOCK_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_ptp_clock_get(const struct device * dev, struct net_ptp_time * tm); + +__pinned_func +static inline int ptp_clock_get(const struct device * dev, struct net_ptp_time * tm) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct net_ptp_time * val; } parm1 = { .val = tm }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PTP_CLOCK_GET); + } +#endif + compiler_barrier(); + return z_impl_ptp_clock_get(dev, tm); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ptp_clock_get(dev, tm) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PTP_CLOCK_GET, ptp_clock_get, dev, tm); syscall__retval = ptp_clock_get(dev, tm); sys_port_trace_syscall_exit(K_SYSCALL_PTP_CLOCK_GET, ptp_clock_get, dev, tm, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/pwm.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/pwm.h new file mode 100644 index 0000000..49d249f --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/pwm.h @@ -0,0 +1,160 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PWM_H +#define Z_INCLUDE_SYSCALLS_PWM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_pwm_set_cycles(const struct device * dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags); + +__pinned_func +static inline int pwm_set_cycles(const struct device * dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = period }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = pulse }; + union { uintptr_t x; pwm_flags_t val; } parm4 = { .val = flags }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_PWM_SET_CYCLES); + } +#endif + compiler_barrier(); + return z_impl_pwm_set_cycles(dev, channel, period, pulse, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_set_cycles(dev, channel, period, pulse, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_SET_CYCLES, pwm_set_cycles, dev, channel, period, pulse, flags); syscall__retval = pwm_set_cycles(dev, channel, period, pulse, flags); sys_port_trace_syscall_exit(K_SYSCALL_PWM_SET_CYCLES, pwm_set_cycles, dev, channel, period, pulse, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_get_cycles_per_sec(const struct device * dev, uint32_t channel, uint64_t * cycles); + +__pinned_func +static inline int pwm_get_cycles_per_sec(const struct device * dev, uint32_t channel, uint64_t * cycles) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint64_t * val; } parm2 = { .val = cycles }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_PWM_GET_CYCLES_PER_SEC); + } +#endif + compiler_barrier(); + return z_impl_pwm_get_cycles_per_sec(dev, channel, cycles); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_get_cycles_per_sec(dev, channel, cycles) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_GET_CYCLES_PER_SEC, pwm_get_cycles_per_sec, dev, channel, cycles); syscall__retval = pwm_get_cycles_per_sec(dev, channel, cycles); sys_port_trace_syscall_exit(K_SYSCALL_PWM_GET_CYCLES_PER_SEC, pwm_get_cycles_per_sec, dev, channel, cycles, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_enable_capture(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int pwm_enable_capture(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PWM_ENABLE_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_pwm_enable_capture(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_enable_capture(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_ENABLE_CAPTURE, pwm_enable_capture, dev, channel); syscall__retval = pwm_enable_capture(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_PWM_ENABLE_CAPTURE, pwm_enable_capture, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_disable_capture(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int pwm_disable_capture(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PWM_DISABLE_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_pwm_disable_capture(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_disable_capture(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_DISABLE_CAPTURE, pwm_disable_capture, dev, channel); syscall__retval = pwm_disable_capture(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_PWM_DISABLE_CAPTURE, pwm_disable_capture, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_capture_cycles(const struct device * dev, uint32_t channel, pwm_flags_t flags, uint32_t * period, uint32_t * pulse, k_timeout_t timeout); + +__pinned_func +static inline int pwm_capture_cycles(const struct device * dev, uint32_t channel, pwm_flags_t flags, uint32_t * period, uint32_t * pulse, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; pwm_flags_t val; } parm2 = { .val = flags }; + union { uintptr_t x; uint32_t * val; } parm3 = { .val = period }; + union { uintptr_t x; uint32_t * val; } parm4 = { .val = pulse }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout }; + uintptr_t more[] = { + parm5.split.lo, + parm5.split.hi + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_PWM_CAPTURE_CYCLES); + } +#endif + compiler_barrier(); + return z_impl_pwm_capture_cycles(dev, channel, flags, period, pulse, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_capture_cycles(dev, channel, flags, period, pulse, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_CAPTURE_CYCLES, pwm_capture_cycles, dev, channel, flags, period, pulse, timeout); syscall__retval = pwm_capture_cycles(dev, channel, flags, period, pulse, timeout); sys_port_trace_syscall_exit(K_SYSCALL_PWM_CAPTURE_CYCLES, pwm_capture_cycles, dev, channel, flags, period, pulse, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/random.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/random.h new file mode 100644 index 0000000..0e0a77c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/random.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RANDOM_H +#define Z_INCLUDE_SYSCALLS_RANDOM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_sys_rand_get(void * dst, size_t len); + +__pinned_func +static inline void sys_rand_get(void * dst, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = dst }; + union { uintptr_t x; size_t val; } parm1 = { .val = len }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_RAND_GET); + return; + } +#endif + compiler_barrier(); + z_impl_sys_rand_get(dst, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_rand_get(dst, len) do { sys_port_trace_syscall_enter(K_SYSCALL_SYS_RAND_GET, sys_rand_get, dst, len); sys_rand_get(dst, len); sys_port_trace_syscall_exit(K_SYSCALL_SYS_RAND_GET, sys_rand_get, dst, len); } while(false) +#endif +#endif + + +extern int z_impl_sys_csrand_get(void * dst, size_t len); + +__pinned_func +static inline int sys_csrand_get(void * dst, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = dst }; + union { uintptr_t x; size_t val; } parm1 = { .val = len }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CSRAND_GET); + } +#endif + compiler_barrier(); + return z_impl_sys_csrand_get(dst, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_csrand_get(dst, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CSRAND_GET, sys_csrand_get, dst, len); syscall__retval = sys_csrand_get(dst, len); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CSRAND_GET, sys_csrand_get, dst, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/renesas_elc.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/renesas_elc.h new file mode 100644 index 0000000..be08066 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/renesas_elc.h @@ -0,0 +1,147 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RENESAS_ELC_H +#define Z_INCLUDE_SYSCALLS_RENESAS_ELC_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_renesas_elc_software_event_generate(const struct device * dev, uint32_t event); + +__pinned_func +static inline int renesas_elc_software_event_generate(const struct device * dev, uint32_t event) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = event }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RENESAS_ELC_SOFTWARE_EVENT_GENERATE); + } +#endif + compiler_barrier(); + return z_impl_renesas_elc_software_event_generate(dev, event); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_elc_software_event_generate(dev, event) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_ELC_SOFTWARE_EVENT_GENERATE, renesas_elc_software_event_generate, dev, event); syscall__retval = renesas_elc_software_event_generate(dev, event); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_ELC_SOFTWARE_EVENT_GENERATE, renesas_elc_software_event_generate, dev, event, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_renesas_elc_link_set(const struct device * dev, uint32_t peripheral, uint32_t event); + +__pinned_func +static inline int renesas_elc_link_set(const struct device * dev, uint32_t peripheral, uint32_t event) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peripheral }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = event }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RENESAS_ELC_LINK_SET); + } +#endif + compiler_barrier(); + return z_impl_renesas_elc_link_set(dev, peripheral, event); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_elc_link_set(dev, peripheral, event) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_ELC_LINK_SET, renesas_elc_link_set, dev, peripheral, event); syscall__retval = renesas_elc_link_set(dev, peripheral, event); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_ELC_LINK_SET, renesas_elc_link_set, dev, peripheral, event, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_renesas_elc_link_break(const struct device * dev, uint32_t peripheral); + +__pinned_func +static inline int renesas_elc_link_break(const struct device * dev, uint32_t peripheral) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peripheral }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RENESAS_ELC_LINK_BREAK); + } +#endif + compiler_barrier(); + return z_impl_renesas_elc_link_break(dev, peripheral); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_elc_link_break(dev, peripheral) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_ELC_LINK_BREAK, renesas_elc_link_break, dev, peripheral); syscall__retval = renesas_elc_link_break(dev, peripheral); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_ELC_LINK_BREAK, renesas_elc_link_break, dev, peripheral, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_renesas_elc_enable(const struct device * dev); + +__pinned_func +static inline int renesas_elc_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RENESAS_ELC_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_renesas_elc_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_elc_enable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_ELC_ENABLE, renesas_elc_enable, dev); syscall__retval = renesas_elc_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_ELC_ENABLE, renesas_elc_enable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_renesas_elc_disable(const struct device * dev); + +__pinned_func +static inline int renesas_elc_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RENESAS_ELC_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_renesas_elc_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define renesas_elc_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RENESAS_ELC_DISABLE, renesas_elc_disable, dev); syscall__retval = renesas_elc_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_RENESAS_ELC_DISABLE, renesas_elc_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/reset.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/reset.h new file mode 100644 index 0000000..c6be6fd --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/reset.h @@ -0,0 +1,125 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RESET_H +#define Z_INCLUDE_SYSCALLS_RESET_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_reset_status(const struct device * dev, uint32_t id, uint8_t * status); + +__pinned_func +static inline int reset_status(const struct device * dev, uint32_t id, uint8_t * status) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = status }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RESET_STATUS); + } +#endif + compiler_barrier(); + return z_impl_reset_status(dev, id, status); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_status(dev, id, status) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_STATUS, reset_status, dev, id, status); syscall__retval = reset_status(dev, id, status); sys_port_trace_syscall_exit(K_SYSCALL_RESET_STATUS, reset_status, dev, id, status, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_reset_line_assert(const struct device * dev, uint32_t id); + +__pinned_func +static inline int reset_line_assert(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_ASSERT); + } +#endif + compiler_barrier(); + return z_impl_reset_line_assert(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_line_assert(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_ASSERT, reset_line_assert, dev, id); syscall__retval = reset_line_assert(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_ASSERT, reset_line_assert, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_reset_line_deassert(const struct device * dev, uint32_t id); + +__pinned_func +static inline int reset_line_deassert(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_DEASSERT); + } +#endif + compiler_barrier(); + return z_impl_reset_line_deassert(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_line_deassert(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_DEASSERT, reset_line_deassert, dev, id); syscall__retval = reset_line_deassert(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_DEASSERT, reset_line_deassert, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_reset_line_toggle(const struct device * dev, uint32_t id); + +__pinned_func +static inline int reset_line_toggle(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_TOGGLE); + } +#endif + compiler_barrier(); + return z_impl_reset_line_toggle(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_line_toggle(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_TOGGLE, reset_line_toggle, dev, id); syscall__retval = reset_line_toggle(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_TOGGLE, reset_line_toggle, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/retained_mem.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/retained_mem.h new file mode 100644 index 0000000..b3725f1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/retained_mem.h @@ -0,0 +1,126 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RETAINED_MEM_H +#define Z_INCLUDE_SYSCALLS_RETAINED_MEM_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern ssize_t z_impl_retained_mem_size(const struct device * dev); + +__pinned_func +static inline ssize_t retained_mem_size(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (ssize_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_RETAINED_MEM_SIZE); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_size(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_size(dev) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_SIZE, retained_mem_size, dev); syscall__retval = retained_mem_size(dev); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_SIZE, retained_mem_size, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_retained_mem_read(const struct device * dev, off_t offset, uint8_t * buffer, size_t size); + +__pinned_func +static inline int retained_mem_read(const struct device * dev, off_t offset, uint8_t * buffer, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RETAINED_MEM_READ); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_read(dev, offset, buffer, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_read(dev, offset, buffer, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_READ, retained_mem_read, dev, offset, buffer, size); syscall__retval = retained_mem_read(dev, offset, buffer, size); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_READ, retained_mem_read, dev, offset, buffer, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_retained_mem_write(const struct device * dev, off_t offset, const uint8_t * buffer, size_t size); + +__pinned_func +static inline int retained_mem_write(const struct device * dev, off_t offset, const uint8_t * buffer, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const uint8_t * val; } parm2 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RETAINED_MEM_WRITE); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_write(dev, offset, buffer, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_write(dev, offset, buffer, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_WRITE, retained_mem_write, dev, offset, buffer, size); syscall__retval = retained_mem_write(dev, offset, buffer, size); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_WRITE, retained_mem_write, dev, offset, buffer, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_retained_mem_clear(const struct device * dev); + +__pinned_func +static inline int retained_mem_clear(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RETAINED_MEM_CLEAR); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_clear(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_clear(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_CLEAR, retained_mem_clear, dev); syscall__retval = retained_mem_clear(dev); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_CLEAR, retained_mem_clear, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/rtc.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/rtc.h new file mode 100644 index 0000000..460c4e6 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/rtc.h @@ -0,0 +1,225 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RTC_H +#define Z_INCLUDE_SYSCALLS_RTC_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_rtc_set_time(const struct device * dev, const struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_set_time(const struct device * dev, const struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct rtc_time * val; } parm1 = { .val = timeptr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_SET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_set_time(dev, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_set_time(dev, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_SET_TIME, rtc_set_time, dev, timeptr); syscall__retval = rtc_set_time(dev, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_SET_TIME, rtc_set_time, dev, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_get_time(const struct device * dev, struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_get_time(const struct device * dev, struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct rtc_time * val; } parm1 = { .val = timeptr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_GET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_get_time(dev, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_get_time(dev, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_GET_TIME, rtc_get_time, dev, timeptr); syscall__retval = rtc_get_time(dev, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_GET_TIME, rtc_get_time, dev, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_get_supported_fields(const struct device * dev, uint16_t id, uint16_t * mask); + +__pinned_func +static inline int rtc_alarm_get_supported_fields(const struct device * dev, uint16_t id, uint16_t * mask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint16_t * val; } parm2 = { .val = mask }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_get_supported_fields(dev, id, mask); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_get_supported_fields(dev, id, mask) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS, rtc_alarm_get_supported_fields, dev, id, mask); syscall__retval = rtc_alarm_get_supported_fields(dev, id, mask); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS, rtc_alarm_get_supported_fields, dev, id, mask, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_set_time(const struct device * dev, uint16_t id, uint16_t mask, const struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_alarm_set_time(const struct device * dev, uint16_t id, uint16_t mask, const struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = mask }; + union { uintptr_t x; const struct rtc_time * val; } parm3 = { .val = timeptr }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_SET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_set_time(dev, id, mask, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_set_time(dev, id, mask, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_SET_TIME, rtc_alarm_set_time, dev, id, mask, timeptr); syscall__retval = rtc_alarm_set_time(dev, id, mask, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_SET_TIME, rtc_alarm_set_time, dev, id, mask, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_get_time(const struct device * dev, uint16_t id, uint16_t * mask, struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_alarm_get_time(const struct device * dev, uint16_t id, uint16_t * mask, struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint16_t * val; } parm2 = { .val = mask }; + union { uintptr_t x; struct rtc_time * val; } parm3 = { .val = timeptr }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_GET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_get_time(dev, id, mask, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_get_time(dev, id, mask, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_GET_TIME, rtc_alarm_get_time, dev, id, mask, timeptr); syscall__retval = rtc_alarm_get_time(dev, id, mask, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_GET_TIME, rtc_alarm_get_time, dev, id, mask, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_is_pending(const struct device * dev, uint16_t id); + +__pinned_func +static inline int rtc_alarm_is_pending(const struct device * dev, uint16_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_ALARM_IS_PENDING); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_is_pending(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_is_pending(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_IS_PENDING, rtc_alarm_is_pending, dev, id); syscall__retval = rtc_alarm_is_pending(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_IS_PENDING, rtc_alarm_is_pending, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_set_calibration(const struct device * dev, int32_t calibration); + +__pinned_func +static inline int rtc_set_calibration(const struct device * dev, int32_t calibration) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int32_t val; } parm1 = { .val = calibration }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_SET_CALIBRATION); + } +#endif + compiler_barrier(); + return z_impl_rtc_set_calibration(dev, calibration); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_set_calibration(dev, calibration) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_SET_CALIBRATION, rtc_set_calibration, dev, calibration); syscall__retval = rtc_set_calibration(dev, calibration); sys_port_trace_syscall_exit(K_SYSCALL_RTC_SET_CALIBRATION, rtc_set_calibration, dev, calibration, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_get_calibration(const struct device * dev, int32_t * calibration); + +__pinned_func +static inline int rtc_get_calibration(const struct device * dev, int32_t * calibration) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int32_t * val; } parm1 = { .val = calibration }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_GET_CALIBRATION); + } +#endif + compiler_barrier(); + return z_impl_rtc_get_calibration(dev, calibration); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_get_calibration(dev, calibration) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_GET_CALIBRATION, rtc_get_calibration, dev, calibration); syscall__retval = rtc_get_calibration(dev, calibration); sys_port_trace_syscall_exit(K_SYSCALL_RTC_GET_CALIBRATION, rtc_get_calibration, dev, calibration, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/rtio.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/rtio.h new file mode 100644 index 0000000..bac2508 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/rtio.h @@ -0,0 +1,251 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RTIO_H +#define Z_INCLUDE_SYSCALLS_RTIO_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_rtio_sqe_signal(struct rtio_sqe * sqe); + +__pinned_func +static inline void rtio_sqe_signal(struct rtio_sqe * sqe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio_sqe * val; } parm0 = { .val = sqe }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_RTIO_SQE_SIGNAL); + return; + } +#endif + compiler_barrier(); + z_impl_rtio_sqe_signal(sqe); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_sqe_signal(sqe) do { sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_SIGNAL, rtio_sqe_signal, sqe); rtio_sqe_signal(sqe); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_SIGNAL, rtio_sqe_signal, sqe); } while(false) +#endif +#endif + + +extern int z_impl_rtio_cqe_get_mempool_buffer(const struct rtio * r, struct rtio_cqe * cqe, uint8_t ** buff, uint32_t * buff_len); + +__pinned_func +static inline int rtio_cqe_get_mempool_buffer(const struct rtio * r, struct rtio_cqe * cqe, uint8_t ** buff, uint32_t * buff_len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; struct rtio_cqe * val; } parm1 = { .val = cqe }; + union { uintptr_t x; uint8_t ** val; } parm2 = { .val = buff }; + union { uintptr_t x; uint32_t * val; } parm3 = { .val = buff_len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER); + } +#endif + compiler_barrier(); + return z_impl_rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER, rtio_cqe_get_mempool_buffer, r, cqe, buff, buff_len); syscall__retval = rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER, rtio_cqe_get_mempool_buffer, r, cqe, buff, buff_len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_rtio_release_buffer(struct rtio * r, void * buff, uint32_t buff_len); + +__pinned_func +static inline void rtio_release_buffer(struct rtio * r, void * buff, uint32_t buff_len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; void * val; } parm1 = { .val = buff }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = buff_len }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTIO_RELEASE_BUFFER); + return; + } +#endif + compiler_barrier(); + z_impl_rtio_release_buffer(r, buff, buff_len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_release_buffer(r, buff, buff_len) do { sys_port_trace_syscall_enter(K_SYSCALL_RTIO_RELEASE_BUFFER, rtio_release_buffer, r, buff, buff_len); rtio_release_buffer(r, buff, buff_len); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_RELEASE_BUFFER, rtio_release_buffer, r, buff, buff_len); } while(false) +#endif +#endif + + +extern int z_impl_rtio_sqe_cancel(struct rtio_sqe * sqe); + +__pinned_func +static inline int rtio_sqe_cancel(struct rtio_sqe * sqe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio_sqe * val; } parm0 = { .val = sqe }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RTIO_SQE_CANCEL); + } +#endif + compiler_barrier(); + return z_impl_rtio_sqe_cancel(sqe); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_sqe_cancel(sqe) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_CANCEL, rtio_sqe_cancel, sqe); syscall__retval = rtio_sqe_cancel(sqe); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_CANCEL, rtio_sqe_cancel, sqe, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtio_sqe_copy_in_get_handles(struct rtio * r, const struct rtio_sqe * sqes, struct rtio_sqe ** handle, size_t sqe_count); + +__pinned_func +static inline int rtio_sqe_copy_in_get_handles(struct rtio * r, const struct rtio_sqe * sqes, struct rtio_sqe ** handle, size_t sqe_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; const struct rtio_sqe * val; } parm1 = { .val = sqes }; + union { uintptr_t x; struct rtio_sqe ** val; } parm2 = { .val = handle }; + union { uintptr_t x; size_t val; } parm3 = { .val = sqe_count }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES); + } +#endif + compiler_barrier(); + return z_impl_rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES, rtio_sqe_copy_in_get_handles, r, sqes, handle, sqe_count); syscall__retval = rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES, rtio_sqe_copy_in_get_handles, r, sqes, handle, sqe_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtio_cqe_copy_out(struct rtio * r, struct rtio_cqe * cqes, size_t cqe_count, k_timeout_t timeout); + +__pinned_func +static inline int rtio_cqe_copy_out(struct rtio * r, struct rtio_cqe * cqes, size_t cqe_count, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; struct rtio_cqe * val; } parm1 = { .val = cqes }; + union { uintptr_t x; size_t val; } parm2 = { .val = cqe_count }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_RTIO_CQE_COPY_OUT); + } +#endif + compiler_barrier(); + return z_impl_rtio_cqe_copy_out(r, cqes, cqe_count, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_cqe_copy_out(r, cqes, cqe_count, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_CQE_COPY_OUT, rtio_cqe_copy_out, r, cqes, cqe_count, timeout); syscall__retval = rtio_cqe_copy_out(r, cqes, cqe_count, timeout); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_CQE_COPY_OUT, rtio_cqe_copy_out, r, cqes, cqe_count, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtio_submit(struct rtio * r, uint32_t wait_count); + +__pinned_func +static inline int rtio_submit(struct rtio * r, uint32_t wait_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = wait_count }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTIO_SUBMIT); + } +#endif + compiler_barrier(); + return z_impl_rtio_submit(r, wait_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_submit(r, wait_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SUBMIT, rtio_submit, r, wait_count); syscall__retval = rtio_submit(r, wait_count); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SUBMIT, rtio_submit, r, wait_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern struct rtio * z_impl_rtio_pool_acquire(struct rtio_pool * pool); + +__pinned_func +static inline struct rtio * rtio_pool_acquire(struct rtio_pool * pool) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio_pool * val; } parm0 = { .val = pool }; + return (struct rtio *) arch_syscall_invoke1(parm0.x, K_SYSCALL_RTIO_POOL_ACQUIRE); + } +#endif + compiler_barrier(); + return z_impl_rtio_pool_acquire(pool); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_pool_acquire(pool) ({ struct rtio * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_POOL_ACQUIRE, rtio_pool_acquire, pool); syscall__retval = rtio_pool_acquire(pool); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_POOL_ACQUIRE, rtio_pool_acquire, pool, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_rtio_pool_release(struct rtio_pool * pool, struct rtio * r); + +__pinned_func +static inline void rtio_pool_release(struct rtio_pool * pool, struct rtio * r) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio_pool * val; } parm0 = { .val = pool }; + union { uintptr_t x; struct rtio * val; } parm1 = { .val = r }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTIO_POOL_RELEASE); + return; + } +#endif + compiler_barrier(); + z_impl_rtio_pool_release(pool, r); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_pool_release(pool, r) do { sys_port_trace_syscall_enter(K_SYSCALL_RTIO_POOL_RELEASE, rtio_pool_release, pool, r); rtio_pool_release(pool, r); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_POOL_RELEASE, rtio_pool_release, pool, r); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sdhc.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sdhc.h new file mode 100644 index 0000000..5e0ec48 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sdhc.h @@ -0,0 +1,243 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SDHC_H +#define Z_INCLUDE_SYSCALLS_SDHC_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sdhc_hw_reset(const struct device * dev); + +__pinned_func +static inline int sdhc_hw_reset(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_HW_RESET); + } +#endif + compiler_barrier(); + return z_impl_sdhc_hw_reset(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_hw_reset(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_HW_RESET, sdhc_hw_reset, dev); syscall__retval = sdhc_hw_reset(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_HW_RESET, sdhc_hw_reset, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_request(const struct device * dev, struct sdhc_command * cmd, struct sdhc_data * data); + +__pinned_func +static inline int sdhc_request(const struct device * dev, struct sdhc_command * cmd, struct sdhc_data * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sdhc_command * val; } parm1 = { .val = cmd }; + union { uintptr_t x; struct sdhc_data * val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SDHC_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_sdhc_request(dev, cmd, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_request(dev, cmd, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_REQUEST, sdhc_request, dev, cmd, data); syscall__retval = sdhc_request(dev, cmd, data); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_REQUEST, sdhc_request, dev, cmd, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_set_io(const struct device * dev, struct sdhc_io * io); + +__pinned_func +static inline int sdhc_set_io(const struct device * dev, struct sdhc_io * io) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sdhc_io * val; } parm1 = { .val = io }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_SET_IO); + } +#endif + compiler_barrier(); + return z_impl_sdhc_set_io(dev, io); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_set_io(dev, io) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_SET_IO, sdhc_set_io, dev, io); syscall__retval = sdhc_set_io(dev, io); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_SET_IO, sdhc_set_io, dev, io, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_card_present(const struct device * dev); + +__pinned_func +static inline int sdhc_card_present(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_CARD_PRESENT); + } +#endif + compiler_barrier(); + return z_impl_sdhc_card_present(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_card_present(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_CARD_PRESENT, sdhc_card_present, dev); syscall__retval = sdhc_card_present(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_CARD_PRESENT, sdhc_card_present, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_execute_tuning(const struct device * dev); + +__pinned_func +static inline int sdhc_execute_tuning(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_EXECUTE_TUNING); + } +#endif + compiler_barrier(); + return z_impl_sdhc_execute_tuning(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_execute_tuning(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_EXECUTE_TUNING, sdhc_execute_tuning, dev); syscall__retval = sdhc_execute_tuning(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_EXECUTE_TUNING, sdhc_execute_tuning, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_card_busy(const struct device * dev); + +__pinned_func +static inline int sdhc_card_busy(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_CARD_BUSY); + } +#endif + compiler_barrier(); + return z_impl_sdhc_card_busy(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_card_busy(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_CARD_BUSY, sdhc_card_busy, dev); syscall__retval = sdhc_card_busy(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_CARD_BUSY, sdhc_card_busy, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_get_host_props(const struct device * dev, struct sdhc_host_props * props); + +__pinned_func +static inline int sdhc_get_host_props(const struct device * dev, struct sdhc_host_props * props) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sdhc_host_props * val; } parm1 = { .val = props }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_GET_HOST_PROPS); + } +#endif + compiler_barrier(); + return z_impl_sdhc_get_host_props(dev, props); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_get_host_props(dev, props) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_GET_HOST_PROPS, sdhc_get_host_props, dev, props); syscall__retval = sdhc_get_host_props(dev, props); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_GET_HOST_PROPS, sdhc_get_host_props, dev, props, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_enable_interrupt(const struct device * dev, sdhc_interrupt_cb_t callback, int sources, void * user_data); + +__pinned_func +static inline int sdhc_enable_interrupt(const struct device * dev, sdhc_interrupt_cb_t callback, int sources, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; sdhc_interrupt_cb_t val; } parm1 = { .val = callback }; + union { uintptr_t x; int val; } parm2 = { .val = sources }; + union { uintptr_t x; void * val; } parm3 = { .val = user_data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SDHC_ENABLE_INTERRUPT); + } +#endif + compiler_barrier(); + return z_impl_sdhc_enable_interrupt(dev, callback, sources, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_enable_interrupt(dev, callback, sources, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_ENABLE_INTERRUPT, sdhc_enable_interrupt, dev, callback, sources, user_data); syscall__retval = sdhc_enable_interrupt(dev, callback, sources, user_data); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_ENABLE_INTERRUPT, sdhc_enable_interrupt, dev, callback, sources, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_disable_interrupt(const struct device * dev, int sources); + +__pinned_func +static inline int sdhc_disable_interrupt(const struct device * dev, int sources) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = sources }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_DISABLE_INTERRUPT); + } +#endif + compiler_barrier(); + return z_impl_sdhc_disable_interrupt(dev, sources); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_disable_interrupt(dev, sources) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_DISABLE_INTERRUPT, sdhc_disable_interrupt, dev, sources); syscall__retval = sdhc_disable_interrupt(dev, sources); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_DISABLE_INTERRUPT, sdhc_disable_interrupt, dev, sources, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sensor.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sensor.h new file mode 100644 index 0000000..582a83a --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sensor.h @@ -0,0 +1,202 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SENSOR_H +#define Z_INCLUDE_SYSCALLS_SENSOR_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sensor_attr_set(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value * val); + +__pinned_func +static inline int sensor_attr_set(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan }; + union { uintptr_t x; enum sensor_attribute val; } parm2 = { .val = attr }; + union { uintptr_t x; const struct sensor_value * val; } parm3 = { .val = val }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_ATTR_SET); + } +#endif + compiler_barrier(); + return z_impl_sensor_attr_set(dev, chan, attr, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_attr_set(dev, chan, attr, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_ATTR_SET, sensor_attr_set, dev, chan, attr, val); syscall__retval = sensor_attr_set(dev, chan, attr, val); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_ATTR_SET, sensor_attr_set, dev, chan, attr, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_attr_get(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value * val); + +__pinned_func +static inline int sensor_attr_get(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan }; + union { uintptr_t x; enum sensor_attribute val; } parm2 = { .val = attr }; + union { uintptr_t x; struct sensor_value * val; } parm3 = { .val = val }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_ATTR_GET); + } +#endif + compiler_barrier(); + return z_impl_sensor_attr_get(dev, chan, attr, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_attr_get(dev, chan, attr, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_ATTR_GET, sensor_attr_get, dev, chan, attr, val); syscall__retval = sensor_attr_get(dev, chan, attr, val); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_ATTR_GET, sensor_attr_get, dev, chan, attr, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_sample_fetch(const struct device * dev); + +__pinned_func +static inline int sensor_sample_fetch(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SENSOR_SAMPLE_FETCH); + } +#endif + compiler_barrier(); + return z_impl_sensor_sample_fetch(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_sample_fetch(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_SAMPLE_FETCH, sensor_sample_fetch, dev); syscall__retval = sensor_sample_fetch(dev); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_SAMPLE_FETCH, sensor_sample_fetch, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_sample_fetch_chan(const struct device * dev, enum sensor_channel type); + +__pinned_func +static inline int sensor_sample_fetch_chan(const struct device * dev, enum sensor_channel type) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = type }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN); + } +#endif + compiler_barrier(); + return z_impl_sensor_sample_fetch_chan(dev, type); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_sample_fetch_chan(dev, type) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN, sensor_sample_fetch_chan, dev, type); syscall__retval = sensor_sample_fetch_chan(dev, type); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN, sensor_sample_fetch_chan, dev, type, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_channel_get(const struct device * dev, enum sensor_channel chan, struct sensor_value * val); + +__pinned_func +static inline int sensor_channel_get(const struct device * dev, enum sensor_channel chan, struct sensor_value * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan }; + union { uintptr_t x; struct sensor_value * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SENSOR_CHANNEL_GET); + } +#endif + compiler_barrier(); + return z_impl_sensor_channel_get(dev, chan, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_channel_get(dev, chan, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_CHANNEL_GET, sensor_channel_get, dev, chan, val); syscall__retval = sensor_channel_get(dev, chan, val); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_CHANNEL_GET, sensor_channel_get, dev, chan, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_get_decoder(const struct device * dev, const struct sensor_decoder_api ** decoder); + +__pinned_func +static inline int sensor_get_decoder(const struct device * dev, const struct sensor_decoder_api ** decoder) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct sensor_decoder_api ** val; } parm1 = { .val = decoder }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENSOR_GET_DECODER); + } +#endif + compiler_barrier(); + return z_impl_sensor_get_decoder(dev, decoder); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_get_decoder(dev, decoder) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_GET_DECODER, sensor_get_decoder, dev, decoder); syscall__retval = sensor_get_decoder(dev, decoder); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_GET_DECODER, sensor_get_decoder, dev, decoder, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_reconfigure_read_iodev(const struct rtio_iodev * iodev, const struct device * sensor, const struct sensor_chan_spec * channels, size_t num_channels); + +__pinned_func +static inline int sensor_reconfigure_read_iodev(const struct rtio_iodev * iodev, const struct device * sensor, const struct sensor_chan_spec * channels, size_t num_channels) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct rtio_iodev * val; } parm0 = { .val = iodev }; + union { uintptr_t x; const struct device * val; } parm1 = { .val = sensor }; + union { uintptr_t x; const struct sensor_chan_spec * val; } parm2 = { .val = channels }; + union { uintptr_t x; size_t val; } parm3 = { .val = num_channels }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV); + } +#endif + compiler_barrier(); + return z_impl_sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV, sensor_reconfigure_read_iodev, iodev, sensor, channels, num_channels); syscall__retval = sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV, sensor_reconfigure_read_iodev, iodev, sensor, channels, num_channels, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sent.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sent.h new file mode 100644 index 0000000..81d5487 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sent.h @@ -0,0 +1,101 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SENT_H +#define Z_INCLUDE_SYSCALLS_SENT_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sent_start_listening(const struct device * dev, uint8_t channel); + +__pinned_func +static inline int sent_start_listening(const struct device * dev, uint8_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENT_START_LISTENING); + } +#endif + compiler_barrier(); + return z_impl_sent_start_listening(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sent_start_listening(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENT_START_LISTENING, sent_start_listening, dev, channel); syscall__retval = sent_start_listening(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_SENT_START_LISTENING, sent_start_listening, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sent_stop_listening(const struct device * dev, uint8_t channel); + +__pinned_func +static inline int sent_stop_listening(const struct device * dev, uint8_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENT_STOP_LISTENING); + } +#endif + compiler_barrier(); + return z_impl_sent_stop_listening(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sent_stop_listening(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENT_STOP_LISTENING, sent_stop_listening, dev, channel); syscall__retval = sent_stop_listening(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_SENT_STOP_LISTENING, sent_stop_listening, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sent_register_callback(const struct device * dev, uint8_t channel, struct sent_rx_callback_configs callback_configs); + +__pinned_func +static inline int sent_register_callback(const struct device * dev, uint8_t channel, struct sent_rx_callback_configs callback_configs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + union { uintptr_t x; struct sent_rx_callback_configs val; } parm2 = { .val = callback_configs }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SENT_REGISTER_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_sent_register_callback(dev, channel, callback_configs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sent_register_callback(dev, channel, callback_configs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENT_REGISTER_CALLBACK, sent_register_callback, dev, channel, callback_configs); syscall__retval = sent_register_callback(dev, channel, callback_configs); sys_port_trace_syscall_exit(K_SYSCALL_SENT_REGISTER_CALLBACK, sent_register_callback, dev, channel, callback_configs, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sip_svc_driver.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sip_svc_driver.h new file mode 100644 index 0000000..7d306e7 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/sip_svc_driver.h @@ -0,0 +1,285 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SIP_SVC_DRIVER_H +#define Z_INCLUDE_SYSCALLS_SIP_SVC_DRIVER_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_sip_supervisory_call(const struct device * dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res * res); + +__pinned_func +static inline void sip_supervisory_call(const struct device * dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned long val; } parm1 = { .val = function_id }; + union { uintptr_t x; unsigned long val; } parm2 = { .val = arg0 }; + union { uintptr_t x; unsigned long val; } parm3 = { .val = arg1 }; + union { uintptr_t x; unsigned long val; } parm4 = { .val = arg2 }; + union { uintptr_t x; unsigned long val; } parm5 = { .val = arg3 }; + union { uintptr_t x; unsigned long val; } parm6 = { .val = arg4 }; + union { uintptr_t x; unsigned long val; } parm7 = { .val = arg5 }; + union { uintptr_t x; unsigned long val; } parm8 = { .val = arg6 }; + union { uintptr_t x; struct arm_smccc_res * val; } parm9 = { .val = res }; + uintptr_t more[] = { + parm5.x, + parm6.x, + parm7.x, + parm8.x, + parm9.x + }; + (void) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SIP_SUPERVISORY_CALL); + return; + } +#endif + compiler_barrier(); + z_impl_sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res) do { sys_port_trace_syscall_enter(K_SYSCALL_SIP_SUPERVISORY_CALL, sip_supervisory_call, dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SUPERVISORY_CALL, sip_supervisory_call, dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); } while(false) +#endif +#endif + + +extern bool z_impl_sip_svc_plat_func_id_valid(const struct device * dev, uint32_t command, uint32_t func_id); + +__pinned_func +static inline bool sip_svc_plat_func_id_valid(const struct device * dev, uint32_t command, uint32_t func_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = command }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = func_id }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_func_id_valid(dev, command, func_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_func_id_valid(dev, command, func_id) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID, sip_svc_plat_func_id_valid, dev, command, func_id); syscall__retval = sip_svc_plat_func_id_valid(dev, command, func_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID, sip_svc_plat_func_id_valid, dev, command, func_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_sip_svc_plat_format_trans_id(const struct device * dev, uint32_t client_idx, uint32_t trans_idx); + +__pinned_func +static inline uint32_t sip_svc_plat_format_trans_id(const struct device * dev, uint32_t client_idx, uint32_t trans_idx) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = client_idx }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = trans_idx }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_format_trans_id(dev, client_idx, trans_idx); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_format_trans_id(dev, client_idx, trans_idx) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID, sip_svc_plat_format_trans_id, dev, client_idx, trans_idx); syscall__retval = sip_svc_plat_format_trans_id(dev, client_idx, trans_idx); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID, sip_svc_plat_format_trans_id, dev, client_idx, trans_idx, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_sip_svc_plat_get_trans_idx(const struct device * dev, uint32_t trans_id); + +__pinned_func +static inline uint32_t sip_svc_plat_get_trans_idx(const struct device * dev, uint32_t trans_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = trans_id }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_get_trans_idx(dev, trans_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_get_trans_idx(dev, trans_id) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX, sip_svc_plat_get_trans_idx, dev, trans_id); syscall__retval = sip_svc_plat_get_trans_idx(dev, trans_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX, sip_svc_plat_get_trans_idx, dev, trans_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_sip_svc_plat_update_trans_id(const struct device * dev, struct sip_svc_request * request, uint32_t trans_id); + +__pinned_func +static inline void sip_svc_plat_update_trans_id(const struct device * dev, struct sip_svc_request * request, uint32_t trans_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sip_svc_request * val; } parm1 = { .val = request }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = trans_id }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID); + return; + } +#endif + compiler_barrier(); + z_impl_sip_svc_plat_update_trans_id(dev, request, trans_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_update_trans_id(dev, request, trans_id) do { sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID, sip_svc_plat_update_trans_id, dev, request, trans_id); sip_svc_plat_update_trans_id(dev, request, trans_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID, sip_svc_plat_update_trans_id, dev, request, trans_id); } while(false) +#endif +#endif + + +extern uint32_t z_impl_sip_svc_plat_get_error_code(const struct device * dev, struct arm_smccc_res * res); + +__pinned_func +static inline uint32_t sip_svc_plat_get_error_code(const struct device * dev, struct arm_smccc_res * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct arm_smccc_res * val; } parm1 = { .val = res }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_get_error_code(dev, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_get_error_code(dev, res) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE, sip_svc_plat_get_error_code, dev, res); syscall__retval = sip_svc_plat_get_error_code(dev, res); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE, sip_svc_plat_get_error_code, dev, res, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sip_svc_plat_async_res_req(const struct device * dev, unsigned long * a0, unsigned long * a1, unsigned long * a2, unsigned long * a3, unsigned long * a4, unsigned long * a5, unsigned long * a6, unsigned long * a7, char * buf, size_t size); + +__pinned_func +static inline int sip_svc_plat_async_res_req(const struct device * dev, unsigned long * a0, unsigned long * a1, unsigned long * a2, unsigned long * a3, unsigned long * a4, unsigned long * a5, unsigned long * a6, unsigned long * a7, char * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned long * val; } parm1 = { .val = a0 }; + union { uintptr_t x; unsigned long * val; } parm2 = { .val = a1 }; + union { uintptr_t x; unsigned long * val; } parm3 = { .val = a2 }; + union { uintptr_t x; unsigned long * val; } parm4 = { .val = a3 }; + union { uintptr_t x; unsigned long * val; } parm5 = { .val = a4 }; + union { uintptr_t x; unsigned long * val; } parm6 = { .val = a5 }; + union { uintptr_t x; unsigned long * val; } parm7 = { .val = a6 }; + union { uintptr_t x; unsigned long * val; } parm8 = { .val = a7 }; + union { uintptr_t x; char * val; } parm9 = { .val = buf }; + union { uintptr_t x; size_t val; } parm10 = { .val = size }; + uintptr_t more[] = { + parm5.x, + parm6.x, + parm7.x, + parm8.x, + parm9.x, + parm10.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ, sip_svc_plat_async_res_req, dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); syscall__retval = sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ, sip_svc_plat_async_res_req, dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sip_svc_plat_async_res_res(const struct device * dev, struct arm_smccc_res * res, char * buf, size_t * size, uint32_t * trans_id); + +__pinned_func +static inline int sip_svc_plat_async_res_res(const struct device * dev, struct arm_smccc_res * res, char * buf, size_t * size, uint32_t * trans_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct arm_smccc_res * val; } parm1 = { .val = res }; + union { uintptr_t x; char * val; } parm2 = { .val = buf }; + union { uintptr_t x; size_t * val; } parm3 = { .val = size }; + union { uintptr_t x; uint32_t * val; } parm4 = { .val = trans_id }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_async_res_res(dev, res, buf, size, trans_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_async_res_res(dev, res, buf, size, trans_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES, sip_svc_plat_async_res_res, dev, res, buf, size, trans_id); syscall__retval = sip_svc_plat_async_res_res(dev, res, buf, size, trans_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES, sip_svc_plat_async_res_res, dev, res, buf, size, trans_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_sip_svc_plat_free_async_memory(const struct device * dev, struct sip_svc_request * request); + +__pinned_func +static inline void sip_svc_plat_free_async_memory(const struct device * dev, struct sip_svc_request * request) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sip_svc_request * val; } parm1 = { .val = request }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY); + return; + } +#endif + compiler_barrier(); + z_impl_sip_svc_plat_free_async_memory(dev, request); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_free_async_memory(dev, request) do { sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY, sip_svc_plat_free_async_memory, dev, request); sip_svc_plat_free_async_memory(dev, request); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY, sip_svc_plat_free_async_memory, dev, request); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/smbus.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/smbus.h new file mode 100644 index 0000000..ff86135 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/smbus.h @@ -0,0 +1,417 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SMBUS_H +#define Z_INCLUDE_SYSCALLS_SMBUS_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_smbus_configure(const struct device * dev, uint32_t dev_config); + +__pinned_func +static inline int smbus_configure(const struct device * dev, uint32_t dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_smbus_configure(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_configure(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_CONFIGURE, smbus_configure, dev, dev_config); syscall__retval = smbus_configure(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_CONFIGURE, smbus_configure, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_get_config(const struct device * dev, uint32_t * dev_config); + +__pinned_func +static inline int smbus_get_config(const struct device * dev, uint32_t * dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_GET_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_smbus_get_config(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_get_config(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_GET_CONFIG, smbus_get_config, dev, dev_config); syscall__retval = smbus_get_config(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_GET_CONFIG, smbus_get_config, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_smbalert_remove_cb(const struct device * dev, struct smbus_callback * cb); + +__pinned_func +static inline int smbus_smbalert_remove_cb(const struct device * dev, struct smbus_callback * cb) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct smbus_callback * val; } parm1 = { .val = cb }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB); + } +#endif + compiler_barrier(); + return z_impl_smbus_smbalert_remove_cb(dev, cb); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_smbalert_remove_cb(dev, cb) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB, smbus_smbalert_remove_cb, dev, cb); syscall__retval = smbus_smbalert_remove_cb(dev, cb); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB, smbus_smbalert_remove_cb, dev, cb, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_host_notify_remove_cb(const struct device * dev, struct smbus_callback * cb); + +__pinned_func +static inline int smbus_host_notify_remove_cb(const struct device * dev, struct smbus_callback * cb) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct smbus_callback * val; } parm1 = { .val = cb }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB); + } +#endif + compiler_barrier(); + return z_impl_smbus_host_notify_remove_cb(dev, cb); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_host_notify_remove_cb(dev, cb) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB, smbus_host_notify_remove_cb, dev, cb); syscall__retval = smbus_host_notify_remove_cb(dev, cb); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB, smbus_host_notify_remove_cb, dev, cb, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_quick(const struct device * dev, uint16_t addr, enum smbus_direction direction); + +__pinned_func +static inline int smbus_quick(const struct device * dev, uint16_t addr, enum smbus_direction direction) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; enum smbus_direction val; } parm2 = { .val = direction }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_QUICK); + } +#endif + compiler_barrier(); + return z_impl_smbus_quick(dev, addr, direction); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_quick(dev, addr, direction) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_QUICK, smbus_quick, dev, addr, direction); syscall__retval = smbus_quick(dev, addr, direction); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_QUICK, smbus_quick, dev, addr, direction, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_write(const struct device * dev, uint16_t addr, uint8_t byte); + +__pinned_func +static inline int smbus_byte_write(const struct device * dev, uint16_t addr, uint8_t byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = byte }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_BYTE_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_write(dev, addr, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_write(dev, addr, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_WRITE, smbus_byte_write, dev, addr, byte); syscall__retval = smbus_byte_write(dev, addr, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_WRITE, smbus_byte_write, dev, addr, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_read(const struct device * dev, uint16_t addr, uint8_t * byte); + +__pinned_func +static inline int smbus_byte_read(const struct device * dev, uint16_t addr, uint8_t * byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = byte }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_BYTE_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_read(dev, addr, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_read(dev, addr, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_READ, smbus_byte_read, dev, addr, byte); syscall__retval = smbus_byte_read(dev, addr, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_READ, smbus_byte_read, dev, addr, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t byte); + +__pinned_func +static inline int smbus_byte_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t val; } parm3 = { .val = byte }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_BYTE_DATA_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_data_write(dev, addr, cmd, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_data_write(dev, addr, cmd, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_DATA_WRITE, smbus_byte_data_write, dev, addr, cmd, byte); syscall__retval = smbus_byte_data_write(dev, addr, cmd, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_DATA_WRITE, smbus_byte_data_write, dev, addr, cmd, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * byte); + +__pinned_func +static inline int smbus_byte_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t * val; } parm3 = { .val = byte }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_BYTE_DATA_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_data_read(dev, addr, cmd, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_data_read(dev, addr, cmd, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_DATA_READ, smbus_byte_data_read, dev, addr, cmd, byte); syscall__retval = smbus_byte_data_read(dev, addr, cmd, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_DATA_READ, smbus_byte_data_read, dev, addr, cmd, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_word_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t word); + +__pinned_func +static inline int smbus_word_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t word) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = word }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_WORD_DATA_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_word_data_write(dev, addr, cmd, word); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_word_data_write(dev, addr, cmd, word) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_WORD_DATA_WRITE, smbus_word_data_write, dev, addr, cmd, word); syscall__retval = smbus_word_data_write(dev, addr, cmd, word); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_WORD_DATA_WRITE, smbus_word_data_write, dev, addr, cmd, word, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_word_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t * word); + +__pinned_func +static inline int smbus_word_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t * word) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint16_t * val; } parm3 = { .val = word }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_WORD_DATA_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_word_data_read(dev, addr, cmd, word); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_word_data_read(dev, addr, cmd, word) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_WORD_DATA_READ, smbus_word_data_read, dev, addr, cmd, word); syscall__retval = smbus_word_data_read(dev, addr, cmd, word); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_WORD_DATA_READ, smbus_word_data_read, dev, addr, cmd, word, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t * recv_word); + +__pinned_func +static inline int smbus_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t * recv_word) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = send_word }; + union { uintptr_t x; uint16_t * val; } parm4 = { .val = recv_word }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_PCALL); + } +#endif + compiler_barrier(); + return z_impl_smbus_pcall(dev, addr, cmd, send_word, recv_word); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_pcall(dev, addr, cmd, send_word, recv_word) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_PCALL, smbus_pcall, dev, addr, cmd, send_word, recv_word); syscall__retval = smbus_pcall(dev, addr, cmd, send_word, recv_word); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_PCALL, smbus_pcall, dev, addr, cmd, send_word, recv_word, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_block_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t * buf); + +__pinned_func +static inline int smbus_block_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t * buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t val; } parm3 = { .val = count }; + union { uintptr_t x; uint8_t * val; } parm4 = { .val = buf }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_BLOCK_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_block_write(dev, addr, cmd, count, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_block_write(dev, addr, cmd, count, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_WRITE, smbus_block_write, dev, addr, cmd, count, buf); syscall__retval = smbus_block_write(dev, addr, cmd, count, buf); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_WRITE, smbus_block_write, dev, addr, cmd, count, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_block_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * count, uint8_t * buf); + +__pinned_func +static inline int smbus_block_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * count, uint8_t * buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t * val; } parm3 = { .val = count }; + union { uintptr_t x; uint8_t * val; } parm4 = { .val = buf }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_BLOCK_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_block_read(dev, addr, cmd, count, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_block_read(dev, addr, cmd, count, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_READ, smbus_block_read, dev, addr, cmd, count, buf); syscall__retval = smbus_block_read(dev, addr, cmd, count, buf); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_READ, smbus_block_read, dev, addr, cmd, count, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_block_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t * snd_buf, uint8_t * rcv_count, uint8_t * rcv_buf); + +__pinned_func +static inline int smbus_block_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t * snd_buf, uint8_t * rcv_count, uint8_t * rcv_buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t val; } parm3 = { .val = snd_count }; + union { uintptr_t x; uint8_t * val; } parm4 = { .val = snd_buf }; + union { uintptr_t x; uint8_t * val; } parm5 = { .val = rcv_count }; + union { uintptr_t x; uint8_t * val; } parm6 = { .val = rcv_buf }; + uintptr_t more[] = { + parm5.x, + parm6.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SMBUS_BLOCK_PCALL); + } +#endif + compiler_barrier(); + return z_impl_smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_PCALL, smbus_block_pcall, dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); syscall__retval = smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_PCALL, smbus_block_pcall, dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/socket.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/socket.h new file mode 100644 index 0000000..1fb8600 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/socket.h @@ -0,0 +1,586 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SOCKET_H +#define Z_INCLUDE_SYSCALLS_SOCKET_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void * z_impl_zsock_get_context_object(int sock); + +__pinned_func +static inline void * zsock_get_context_object(int sock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT); + } +#endif + compiler_barrier(); + return z_impl_zsock_get_context_object(sock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_get_context_object(sock) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT, zsock_get_context_object, sock); syscall__retval = zsock_get_context_object(sock); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT, zsock_get_context_object, sock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_socket(int family, int type, int proto); + +__pinned_func +static inline int zsock_socket(int family, int type, int proto) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = family }; + union { uintptr_t x; int val; } parm1 = { .val = type }; + union { uintptr_t x; int val; } parm2 = { .val = proto }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_SOCKET); + } +#endif + compiler_barrier(); + return z_impl_zsock_socket(family, type, proto); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_socket(family, type, proto) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SOCKET, zsock_socket, family, type, proto); syscall__retval = zsock_socket(family, type, proto); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SOCKET, zsock_socket, family, type, proto, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_socketpair(int family, int type, int proto, int * sv); + +__pinned_func +static inline int zsock_socketpair(int family, int type, int proto, int * sv) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = family }; + union { uintptr_t x; int val; } parm1 = { .val = type }; + union { uintptr_t x; int val; } parm2 = { .val = proto }; + union { uintptr_t x; int * val; } parm3 = { .val = sv }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_ZSOCK_SOCKETPAIR); + } +#endif + compiler_barrier(); + return z_impl_zsock_socketpair(family, type, proto, sv); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_socketpair(family, type, proto, sv) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SOCKETPAIR, zsock_socketpair, family, type, proto, sv); syscall__retval = zsock_socketpair(family, type, proto, sv); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SOCKETPAIR, zsock_socketpair, family, type, proto, sv, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_close(int sock); + +__pinned_func +static inline int zsock_close(int sock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_ZSOCK_CLOSE); + } +#endif + compiler_barrier(); + return z_impl_zsock_close(sock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_close(sock) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_CLOSE, zsock_close, sock); syscall__retval = zsock_close(sock); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_CLOSE, zsock_close, sock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_shutdown(int sock, int how); + +__pinned_func +static inline int zsock_shutdown(int sock, int how) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = how }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_SHUTDOWN); + } +#endif + compiler_barrier(); + return z_impl_zsock_shutdown(sock, how); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_shutdown(sock, how) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SHUTDOWN, zsock_shutdown, sock, how); syscall__retval = zsock_shutdown(sock, how); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SHUTDOWN, zsock_shutdown, sock, how, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_bind(int sock, const struct net_sockaddr * addr, net_socklen_t addrlen); + +__pinned_func +static inline int zsock_bind(int sock, const struct net_sockaddr * addr, net_socklen_t addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const struct net_sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; net_socklen_t val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_BIND); + } +#endif + compiler_barrier(); + return z_impl_zsock_bind(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_bind(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_BIND, zsock_bind, sock, addr, addrlen); syscall__retval = zsock_bind(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_BIND, zsock_bind, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_connect(int sock, const struct net_sockaddr * addr, net_socklen_t addrlen); + +__pinned_func +static inline int zsock_connect(int sock, const struct net_sockaddr * addr, net_socklen_t addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const struct net_sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; net_socklen_t val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_CONNECT); + } +#endif + compiler_barrier(); + return z_impl_zsock_connect(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_connect(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_CONNECT, zsock_connect, sock, addr, addrlen); syscall__retval = zsock_connect(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_CONNECT, zsock_connect, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_listen(int sock, int backlog); + +__pinned_func +static inline int zsock_listen(int sock, int backlog) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = backlog }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_LISTEN); + } +#endif + compiler_barrier(); + return z_impl_zsock_listen(sock, backlog); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_listen(sock, backlog) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_LISTEN, zsock_listen, sock, backlog); syscall__retval = zsock_listen(sock, backlog); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_LISTEN, zsock_listen, sock, backlog, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_accept(int sock, struct net_sockaddr * addr, net_socklen_t * addrlen); + +__pinned_func +static inline int zsock_accept(int sock, struct net_sockaddr * addr, net_socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct net_sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; net_socklen_t * val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_ACCEPT); + } +#endif + compiler_barrier(); + return z_impl_zsock_accept(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_accept(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_ACCEPT, zsock_accept, sock, addr, addrlen); syscall__retval = zsock_accept(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_ACCEPT, zsock_accept, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_sendto(int sock, const void * buf, size_t len, int flags, const struct net_sockaddr * dest_addr, net_socklen_t addrlen); + +__pinned_func +static inline ssize_t zsock_sendto(int sock, const void * buf, size_t len, int flags, const struct net_sockaddr * dest_addr, net_socklen_t addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int val; } parm3 = { .val = flags }; + union { uintptr_t x; const struct net_sockaddr * val; } parm4 = { .val = dest_addr }; + union { uintptr_t x; net_socklen_t val; } parm5 = { .val = addrlen }; + return (ssize_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZSOCK_SENDTO); + } +#endif + compiler_barrier(); + return z_impl_zsock_sendto(sock, buf, len, flags, dest_addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_sendto(sock, buf, len, flags, dest_addr, addrlen) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SENDTO, zsock_sendto, sock, buf, len, flags, dest_addr, addrlen); syscall__retval = zsock_sendto(sock, buf, len, flags, dest_addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SENDTO, zsock_sendto, sock, buf, len, flags, dest_addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_sendmsg(int sock, const struct net_msghdr * msg, int flags); + +__pinned_func +static inline ssize_t zsock_sendmsg(int sock, const struct net_msghdr * msg, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const struct net_msghdr * val; } parm1 = { .val = msg }; + union { uintptr_t x; int val; } parm2 = { .val = flags }; + return (ssize_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_SENDMSG); + } +#endif + compiler_barrier(); + return z_impl_zsock_sendmsg(sock, msg, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_sendmsg(sock, msg, flags) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SENDMSG, zsock_sendmsg, sock, msg, flags); syscall__retval = zsock_sendmsg(sock, msg, flags); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SENDMSG, zsock_sendmsg, sock, msg, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_recvfrom(int sock, void * buf, size_t max_len, int flags, struct net_sockaddr * src_addr, net_socklen_t * addrlen); + +__pinned_func +static inline ssize_t zsock_recvfrom(int sock, void * buf, size_t max_len, int flags, struct net_sockaddr * src_addr, net_socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = max_len }; + union { uintptr_t x; int val; } parm3 = { .val = flags }; + union { uintptr_t x; struct net_sockaddr * val; } parm4 = { .val = src_addr }; + union { uintptr_t x; net_socklen_t * val; } parm5 = { .val = addrlen }; + return (ssize_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZSOCK_RECVFROM); + } +#endif + compiler_barrier(); + return z_impl_zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_RECVFROM, zsock_recvfrom, sock, buf, max_len, flags, src_addr, addrlen); syscall__retval = zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_RECVFROM, zsock_recvfrom, sock, buf, max_len, flags, src_addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_recvmsg(int sock, struct net_msghdr * msg, int flags); + +__pinned_func +static inline ssize_t zsock_recvmsg(int sock, struct net_msghdr * msg, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct net_msghdr * val; } parm1 = { .val = msg }; + union { uintptr_t x; int val; } parm2 = { .val = flags }; + return (ssize_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_RECVMSG); + } +#endif + compiler_barrier(); + return z_impl_zsock_recvmsg(sock, msg, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_recvmsg(sock, msg, flags) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_RECVMSG, zsock_recvmsg, sock, msg, flags); syscall__retval = zsock_recvmsg(sock, msg, flags); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_RECVMSG, zsock_recvmsg, sock, msg, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_fcntl_impl(int sock, int cmd, int flags); + +__pinned_func +static inline int zsock_fcntl_impl(int sock, int cmd, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = cmd }; + union { uintptr_t x; int val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_FCNTL_IMPL); + } +#endif + compiler_barrier(); + return z_impl_zsock_fcntl_impl(sock, cmd, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_fcntl_impl(sock, cmd, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_FCNTL_IMPL, zsock_fcntl_impl, sock, cmd, flags); syscall__retval = zsock_fcntl_impl(sock, cmd, flags); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_FCNTL_IMPL, zsock_fcntl_impl, sock, cmd, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_ioctl_impl(int sock, unsigned long request, va_list ap); + +__pinned_func +static inline int zsock_ioctl_impl(int sock, unsigned long request, va_list ap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; unsigned long val; } parm1 = { .val = request }; + union { uintptr_t x; va_list val; } parm2; + va_copy(parm2.val, ap); + int invoke__retval = arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_IOCTL_IMPL); + va_end(parm2.val); + return invoke__retval; + } +#endif + compiler_barrier(); + return z_impl_zsock_ioctl_impl(sock, request, ap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_ioctl_impl(sock, request, ap) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_IOCTL_IMPL, zsock_ioctl_impl, sock, request, ap); syscall__retval = zsock_ioctl_impl(sock, request, ap); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_IOCTL_IMPL, zsock_ioctl_impl, sock, request, ap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_getsockopt(int sock, int level, int optname, void * optval, net_socklen_t * optlen); + +__pinned_func +static inline int zsock_getsockopt(int sock, int level, int optname, void * optval, net_socklen_t * optlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = level }; + union { uintptr_t x; int val; } parm2 = { .val = optname }; + union { uintptr_t x; void * val; } parm3 = { .val = optval }; + union { uintptr_t x; net_socklen_t * val; } parm4 = { .val = optlen }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_GETSOCKOPT); + } +#endif + compiler_barrier(); + return z_impl_zsock_getsockopt(sock, level, optname, optval, optlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_getsockopt(sock, level, optname, optval, optlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETSOCKOPT, zsock_getsockopt, sock, level, optname, optval, optlen); syscall__retval = zsock_getsockopt(sock, level, optname, optval, optlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETSOCKOPT, zsock_getsockopt, sock, level, optname, optval, optlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_setsockopt(int sock, int level, int optname, const void * optval, net_socklen_t optlen); + +__pinned_func +static inline int zsock_setsockopt(int sock, int level, int optname, const void * optval, net_socklen_t optlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = level }; + union { uintptr_t x; int val; } parm2 = { .val = optname }; + union { uintptr_t x; const void * val; } parm3 = { .val = optval }; + union { uintptr_t x; net_socklen_t val; } parm4 = { .val = optlen }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_SETSOCKOPT); + } +#endif + compiler_barrier(); + return z_impl_zsock_setsockopt(sock, level, optname, optval, optlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_setsockopt(sock, level, optname, optval, optlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SETSOCKOPT, zsock_setsockopt, sock, level, optname, optval, optlen); syscall__retval = zsock_setsockopt(sock, level, optname, optval, optlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SETSOCKOPT, zsock_setsockopt, sock, level, optname, optval, optlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_getpeername(int sock, struct net_sockaddr * addr, net_socklen_t * addrlen); + +__pinned_func +static inline int zsock_getpeername(int sock, struct net_sockaddr * addr, net_socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct net_sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; net_socklen_t * val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_GETPEERNAME); + } +#endif + compiler_barrier(); + return z_impl_zsock_getpeername(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_getpeername(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETPEERNAME, zsock_getpeername, sock, addr, addrlen); syscall__retval = zsock_getpeername(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETPEERNAME, zsock_getpeername, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_getsockname(int sock, struct net_sockaddr * addr, net_socklen_t * addrlen); + +__pinned_func +static inline int zsock_getsockname(int sock, struct net_sockaddr * addr, net_socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct net_sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; net_socklen_t * val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_GETSOCKNAME); + } +#endif + compiler_barrier(); + return z_impl_zsock_getsockname(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_getsockname(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETSOCKNAME, zsock_getsockname, sock, addr, addrlen); syscall__retval = zsock_getsockname(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETSOCKNAME, zsock_getsockname, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_gethostname(char * buf, size_t len); + +__pinned_func +static inline int zsock_gethostname(char * buf, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; char * val; } parm0 = { .val = buf }; + union { uintptr_t x; size_t val; } parm1 = { .val = len }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_GETHOSTNAME); + } +#endif + compiler_barrier(); + return z_impl_zsock_gethostname(buf, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_gethostname(buf, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETHOSTNAME, zsock_gethostname, buf, len); syscall__retval = zsock_gethostname(buf, len); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETHOSTNAME, zsock_gethostname, buf, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_inet_pton(net_sa_family_t family, const char * src, void * dst); + +__pinned_func +static inline int zsock_inet_pton(net_sa_family_t family, const char * src, void * dst) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; net_sa_family_t val; } parm0 = { .val = family }; + union { uintptr_t x; const char * val; } parm1 = { .val = src }; + union { uintptr_t x; void * val; } parm2 = { .val = dst }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_INET_PTON); + } +#endif + compiler_barrier(); + return z_impl_zsock_inet_pton(family, src, dst); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_inet_pton(family, src, dst) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_INET_PTON, zsock_inet_pton, family, src, dst); syscall__retval = zsock_inet_pton(family, src, dst); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_INET_PTON, zsock_inet_pton, family, src, dst, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_z_zsock_getaddrinfo_internal(const char * host, const char * service, const struct zsock_addrinfo * hints, struct zsock_addrinfo * res); + +__pinned_func +static inline int z_zsock_getaddrinfo_internal(const char * host, const char * service, const struct zsock_addrinfo * hints, struct zsock_addrinfo * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const char * val; } parm0 = { .val = host }; + union { uintptr_t x; const char * val; } parm1 = { .val = service }; + union { uintptr_t x; const struct zsock_addrinfo * val; } parm2 = { .val = hints }; + union { uintptr_t x; struct zsock_addrinfo * val; } parm3 = { .val = res }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL); + } +#endif + compiler_barrier(); + return z_impl_z_zsock_getaddrinfo_internal(host, service, hints, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_zsock_getaddrinfo_internal(host, service, hints, res) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL, z_zsock_getaddrinfo_internal, host, service, hints, res); syscall__retval = z_zsock_getaddrinfo_internal(host, service, hints, res); sys_port_trace_syscall_exit(K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL, z_zsock_getaddrinfo_internal, host, service, hints, res, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/socket_service.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/socket_service.h new file mode 100644 index 0000000..6660b91 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/socket_service.h @@ -0,0 +1,54 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SOCKET_SERVICE_H +#define Z_INCLUDE_SYSCALLS_SOCKET_SERVICE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_net_socket_service_register(const struct net_socket_service_desc * service, struct zsock_pollfd * fds, int len, void * user_data); + +__pinned_func +static inline int net_socket_service_register(const struct net_socket_service_desc * service, struct zsock_pollfd * fds, int len, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct net_socket_service_desc * val; } parm0 = { .val = service }; + union { uintptr_t x; struct zsock_pollfd * val; } parm1 = { .val = fds }; + union { uintptr_t x; int val; } parm2 = { .val = len }; + union { uintptr_t x; void * val; } parm3 = { .val = user_data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_SOCKET_SERVICE_REGISTER); + } +#endif + compiler_barrier(); + return z_impl_net_socket_service_register(service, fds, len, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_socket_service_register(service, fds, len, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_SOCKET_SERVICE_REGISTER, net_socket_service_register, service, fds, len, user_data); syscall__retval = net_socket_service_register(service, fds, len, user_data); sys_port_trace_syscall_exit(K_SYSCALL_NET_SOCKET_SERVICE_REGISTER, net_socket_service_register, service, fds, len, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/spi.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/spi.h new file mode 100644 index 0000000..0737a35 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/spi.h @@ -0,0 +1,78 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SPI_H +#define Z_INCLUDE_SYSCALLS_SPI_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_spi_transceive(const struct device * dev, const struct spi_config * config, const struct spi_buf_set * tx_bufs, const struct spi_buf_set * rx_bufs); + +__pinned_func +static inline int spi_transceive(const struct device * dev, const struct spi_config * config, const struct spi_buf_set * tx_bufs, const struct spi_buf_set * rx_bufs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct spi_config * val; } parm1 = { .val = config }; + union { uintptr_t x; const struct spi_buf_set * val; } parm2 = { .val = tx_bufs }; + union { uintptr_t x; const struct spi_buf_set * val; } parm3 = { .val = rx_bufs }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SPI_TRANSCEIVE); + } +#endif + compiler_barrier(); + return z_impl_spi_transceive(dev, config, tx_bufs, rx_bufs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define spi_transceive(dev, config, tx_bufs, rx_bufs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SPI_TRANSCEIVE, spi_transceive, dev, config, tx_bufs, rx_bufs); syscall__retval = spi_transceive(dev, config, tx_bufs, rx_bufs); sys_port_trace_syscall_exit(K_SYSCALL_SPI_TRANSCEIVE, spi_transceive, dev, config, tx_bufs, rx_bufs, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_spi_release(const struct device * dev, const struct spi_config * config); + +__pinned_func +static inline int spi_release(const struct device * dev, const struct spi_config * config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct spi_config * val; } parm1 = { .val = config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SPI_RELEASE); + } +#endif + compiler_barrier(); + return z_impl_spi_release(dev, config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define spi_release(dev, config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SPI_RELEASE, spi_release, dev, config); syscall__retval = spi_release(dev, config); sys_port_trace_syscall_exit(K_SYSCALL_SPI_RELEASE, spi_release, dev, config, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/stepper.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/stepper.h new file mode 100644 index 0000000..db79485 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/stepper.h @@ -0,0 +1,147 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_STEPPER_H +#define Z_INCLUDE_SYSCALLS_STEPPER_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_stepper_enable(const struct device * dev); + +__pinned_func +static inline int stepper_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_STEPPER_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_stepper_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_enable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_ENABLE, stepper_enable, dev); syscall__retval = stepper_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_ENABLE, stepper_enable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_disable(const struct device * dev); + +__pinned_func +static inline int stepper_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_STEPPER_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_stepper_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_DISABLE, stepper_disable, dev); syscall__retval = stepper_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_DISABLE, stepper_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_set_micro_step_res(const struct device * dev, enum stepper_micro_step_resolution res); + +__pinned_func +static inline int stepper_set_micro_step_res(const struct device * dev, enum stepper_micro_step_resolution res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum stepper_micro_step_resolution val; } parm1 = { .val = res }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_SET_MICRO_STEP_RES); + } +#endif + compiler_barrier(); + return z_impl_stepper_set_micro_step_res(dev, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_set_micro_step_res(dev, res) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_SET_MICRO_STEP_RES, stepper_set_micro_step_res, dev, res); syscall__retval = stepper_set_micro_step_res(dev, res); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_SET_MICRO_STEP_RES, stepper_set_micro_step_res, dev, res, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_get_micro_step_res(const struct device * dev, enum stepper_micro_step_resolution * res); + +__pinned_func +static inline int stepper_get_micro_step_res(const struct device * dev, enum stepper_micro_step_resolution * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum stepper_micro_step_resolution * val; } parm1 = { .val = res }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_GET_MICRO_STEP_RES); + } +#endif + compiler_barrier(); + return z_impl_stepper_get_micro_step_res(dev, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_get_micro_step_res(dev, res) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_GET_MICRO_STEP_RES, stepper_get_micro_step_res, dev, res); syscall__retval = stepper_get_micro_step_res(dev, res); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_GET_MICRO_STEP_RES, stepper_get_micro_step_res, dev, res, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_set_event_cb(const struct device * dev, stepper_event_cb_t callback, void * user_data); + +__pinned_func +static inline int stepper_set_event_cb(const struct device * dev, stepper_event_cb_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; stepper_event_cb_t val; } parm1 = { .val = callback }; + union { uintptr_t x; void * val; } parm2 = { .val = user_data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_STEPPER_SET_EVENT_CB); + } +#endif + compiler_barrier(); + return z_impl_stepper_set_event_cb(dev, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_set_event_cb(dev, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_SET_EVENT_CB, stepper_set_event_cb, dev, callback, user_data); syscall__retval = stepper_set_event_cb(dev, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_SET_EVENT_CB, stepper_set_event_cb, dev, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/stepper_ctrl.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/stepper_ctrl.h new file mode 100644 index 0000000..faba21c --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/stepper_ctrl.h @@ -0,0 +1,268 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_STEPPER_CTRL_H +#define Z_INCLUDE_SYSCALLS_STEPPER_CTRL_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_stepper_ctrl_set_reference_position(const struct device * dev, const int32_t value); + +__pinned_func +static inline int stepper_ctrl_set_reference_position(const struct device * dev, const int32_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const int32_t val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_SET_REFERENCE_POSITION); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_set_reference_position(dev, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_set_reference_position(dev, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_SET_REFERENCE_POSITION, stepper_ctrl_set_reference_position, dev, value); syscall__retval = stepper_ctrl_set_reference_position(dev, value); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_SET_REFERENCE_POSITION, stepper_ctrl_set_reference_position, dev, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_get_actual_position(const struct device * dev, int32_t * value); + +__pinned_func +static inline int stepper_ctrl_get_actual_position(const struct device * dev, int32_t * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int32_t * val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_GET_ACTUAL_POSITION); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_get_actual_position(dev, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_get_actual_position(dev, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_GET_ACTUAL_POSITION, stepper_ctrl_get_actual_position, dev, value); syscall__retval = stepper_ctrl_get_actual_position(dev, value); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_GET_ACTUAL_POSITION, stepper_ctrl_get_actual_position, dev, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_set_event_cb(const struct device * dev, stepper_ctrl_event_callback_t callback, void * user_data); + +__pinned_func +static inline int stepper_ctrl_set_event_cb(const struct device * dev, stepper_ctrl_event_callback_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; stepper_ctrl_event_callback_t val; } parm1 = { .val = callback }; + union { uintptr_t x; void * val; } parm2 = { .val = user_data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_STEPPER_CTRL_SET_EVENT_CB); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_set_event_cb(dev, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_set_event_cb(dev, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_SET_EVENT_CB, stepper_ctrl_set_event_cb, dev, callback, user_data); syscall__retval = stepper_ctrl_set_event_cb(dev, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_SET_EVENT_CB, stepper_ctrl_set_event_cb, dev, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_set_microstep_interval(const struct device * dev, const uint64_t microstep_interval_ns); + +__pinned_func +static inline int stepper_ctrl_set_microstep_interval(const struct device * dev, const uint64_t microstep_interval_ns) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint64_t val; } parm1 = { .val = microstep_interval_ns }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_SET_MICROSTEP_INTERVAL); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_set_microstep_interval(dev, microstep_interval_ns); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_set_microstep_interval(dev, microstep_interval_ns) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_SET_MICROSTEP_INTERVAL, stepper_ctrl_set_microstep_interval, dev, microstep_interval_ns); syscall__retval = stepper_ctrl_set_microstep_interval(dev, microstep_interval_ns); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_SET_MICROSTEP_INTERVAL, stepper_ctrl_set_microstep_interval, dev, microstep_interval_ns, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_configure_ramp(const struct device * dev, const struct stepper_ctrl_ramp * ramp); + +__pinned_func +static inline int stepper_ctrl_configure_ramp(const struct device * dev, const struct stepper_ctrl_ramp * ramp) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct stepper_ctrl_ramp * val; } parm1 = { .val = ramp }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_CONFIGURE_RAMP); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_configure_ramp(dev, ramp); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_configure_ramp(dev, ramp) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_CONFIGURE_RAMP, stepper_ctrl_configure_ramp, dev, ramp); syscall__retval = stepper_ctrl_configure_ramp(dev, ramp); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_CONFIGURE_RAMP, stepper_ctrl_configure_ramp, dev, ramp, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_move_by(const struct device * dev, const int32_t micro_steps); + +__pinned_func +static inline int stepper_ctrl_move_by(const struct device * dev, const int32_t micro_steps) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const int32_t val; } parm1 = { .val = micro_steps }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_MOVE_BY); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_move_by(dev, micro_steps); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_move_by(dev, micro_steps) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_MOVE_BY, stepper_ctrl_move_by, dev, micro_steps); syscall__retval = stepper_ctrl_move_by(dev, micro_steps); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_MOVE_BY, stepper_ctrl_move_by, dev, micro_steps, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_move_to(const struct device * dev, const int32_t micro_steps); + +__pinned_func +static inline int stepper_ctrl_move_to(const struct device * dev, const int32_t micro_steps) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const int32_t val; } parm1 = { .val = micro_steps }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_MOVE_TO); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_move_to(dev, micro_steps); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_move_to(dev, micro_steps) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_MOVE_TO, stepper_ctrl_move_to, dev, micro_steps); syscall__retval = stepper_ctrl_move_to(dev, micro_steps); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_MOVE_TO, stepper_ctrl_move_to, dev, micro_steps, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_run(const struct device * dev, const enum stepper_ctrl_direction direction); + +__pinned_func +static inline int stepper_ctrl_run(const struct device * dev, const enum stepper_ctrl_direction direction) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const enum stepper_ctrl_direction val; } parm1 = { .val = direction }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_RUN); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_run(dev, direction); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_run(dev, direction) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_RUN, stepper_ctrl_run, dev, direction); syscall__retval = stepper_ctrl_run(dev, direction); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_RUN, stepper_ctrl_run, dev, direction, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_stop(const struct device * dev); + +__pinned_func +static inline int stepper_ctrl_stop(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_STEPPER_CTRL_STOP); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_stop(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_stop(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_STOP, stepper_ctrl_stop, dev); syscall__retval = stepper_ctrl_stop(dev); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_STOP, stepper_ctrl_stop, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_stepper_ctrl_is_moving(const struct device * dev, bool * is_moving); + +__pinned_func +static inline int stepper_ctrl_is_moving(const struct device * dev, bool * is_moving) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool * val; } parm1 = { .val = is_moving }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_STEPPER_CTRL_IS_MOVING); + } +#endif + compiler_barrier(); + return z_impl_stepper_ctrl_is_moving(dev, is_moving); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define stepper_ctrl_is_moving(dev, is_moving) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_STEPPER_CTRL_IS_MOVING, stepper_ctrl_is_moving, dev, is_moving); syscall__retval = stepper_ctrl_is_moving(dev, is_moving); sys_port_trace_syscall_exit(K_SYSCALL_STEPPER_CTRL_IS_MOVING, stepper_ctrl_is_moving, dev, is_moving, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/swdp.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/swdp.h new file mode 100644 index 0000000..4bba1b1 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/swdp.h @@ -0,0 +1,249 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SWDP_H +#define Z_INCLUDE_SYSCALLS_SWDP_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_swdp_output_sequence(const struct device * dev, const uint32_t count, const uint8_t *const data); + +__pinned_func +static inline int swdp_output_sequence(const struct device * dev, const uint32_t count, const uint8_t *const data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint32_t val; } parm1 = { .val = count }; + union { uintptr_t x; const uint8_t *const val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SWDP_OUTPUT_SEQUENCE); + } +#endif + compiler_barrier(); + return z_impl_swdp_output_sequence(dev, count, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_output_sequence(dev, count, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_OUTPUT_SEQUENCE, swdp_output_sequence, dev, count, data); syscall__retval = swdp_output_sequence(dev, count, data); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_OUTPUT_SEQUENCE, swdp_output_sequence, dev, count, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_input_sequence(const struct device * dev, const uint32_t count, uint8_t *const buf); + +__pinned_func +static inline int swdp_input_sequence(const struct device * dev, const uint32_t count, uint8_t *const buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint32_t val; } parm1 = { .val = count }; + union { uintptr_t x; uint8_t *const val; } parm2 = { .val = buf }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SWDP_INPUT_SEQUENCE); + } +#endif + compiler_barrier(); + return z_impl_swdp_input_sequence(dev, count, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_input_sequence(dev, count, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_INPUT_SEQUENCE, swdp_input_sequence, dev, count, buf); syscall__retval = swdp_input_sequence(dev, count, buf); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_INPUT_SEQUENCE, swdp_input_sequence, dev, count, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_transfer(const struct device * dev, const uint8_t request, uint32_t *const data, const uint8_t idle_cycles, uint8_t *const response); + +__pinned_func +static inline int swdp_transfer(const struct device * dev, const uint8_t request, uint32_t *const data, const uint8_t idle_cycles, uint8_t *const response) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t val; } parm1 = { .val = request }; + union { uintptr_t x; uint32_t *const val; } parm2 = { .val = data }; + union { uintptr_t x; const uint8_t val; } parm3 = { .val = idle_cycles }; + union { uintptr_t x; uint8_t *const val; } parm4 = { .val = response }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SWDP_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_swdp_transfer(dev, request, data, idle_cycles, response); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_transfer(dev, request, data, idle_cycles, response) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_TRANSFER, swdp_transfer, dev, request, data, idle_cycles, response); syscall__retval = swdp_transfer(dev, request, data, idle_cycles, response); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_TRANSFER, swdp_transfer, dev, request, data, idle_cycles, response, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_set_pins(const struct device * dev, const uint8_t pins, const uint8_t value); + +__pinned_func +static inline int swdp_set_pins(const struct device * dev, const uint8_t pins, const uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t val; } parm1 = { .val = pins }; + union { uintptr_t x; const uint8_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SWDP_SET_PINS); + } +#endif + compiler_barrier(); + return z_impl_swdp_set_pins(dev, pins, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_set_pins(dev, pins, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_SET_PINS, swdp_set_pins, dev, pins, value); syscall__retval = swdp_set_pins(dev, pins, value); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_SET_PINS, swdp_set_pins, dev, pins, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_get_pins(const struct device * dev, uint8_t *const state); + +__pinned_func +static inline int swdp_get_pins(const struct device * dev, uint8_t *const state) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t *const val; } parm1 = { .val = state }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SWDP_GET_PINS); + } +#endif + compiler_barrier(); + return z_impl_swdp_get_pins(dev, state); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_get_pins(dev, state) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_GET_PINS, swdp_get_pins, dev, state); syscall__retval = swdp_get_pins(dev, state); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_GET_PINS, swdp_get_pins, dev, state, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_set_clock(const struct device * dev, const uint32_t clock); + +__pinned_func +static inline int swdp_set_clock(const struct device * dev, const uint32_t clock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint32_t val; } parm1 = { .val = clock }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SWDP_SET_CLOCK); + } +#endif + compiler_barrier(); + return z_impl_swdp_set_clock(dev, clock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_set_clock(dev, clock) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_SET_CLOCK, swdp_set_clock, dev, clock); syscall__retval = swdp_set_clock(dev, clock); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_SET_CLOCK, swdp_set_clock, dev, clock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_port_on(const struct device * dev); + +__pinned_func +static inline int swdp_port_on(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SWDP_PORT_ON); + } +#endif + compiler_barrier(); + return z_impl_swdp_port_on(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_port_on(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_PORT_ON, swdp_port_on, dev); syscall__retval = swdp_port_on(dev); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_PORT_ON, swdp_port_on, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_port_off(const struct device * dev); + +__pinned_func +static inline int swdp_port_off(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SWDP_PORT_OFF); + } +#endif + compiler_barrier(); + return z_impl_swdp_port_off(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_port_off(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_PORT_OFF, swdp_port_off, dev); syscall__retval = swdp_port_off(dev); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_PORT_OFF, swdp_port_off, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_swdp_configure(const struct device * dev, const uint8_t turnaround, const bool data_phase); + +__pinned_func +static inline int swdp_configure(const struct device * dev, const uint8_t turnaround, const bool data_phase) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t val; } parm1 = { .val = turnaround }; + union { uintptr_t x; const bool val; } parm2 = { .val = data_phase }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SWDP_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_swdp_configure(dev, turnaround, data_phase); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define swdp_configure(dev, turnaround, data_phase) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SWDP_CONFIGURE, swdp_configure, dev, turnaround, data_phase); syscall__retval = swdp_configure(dev, turnaround, data_phase); sys_port_trace_syscall_exit(K_SYSCALL_SWDP_CONFIGURE, swdp_configure, dev, turnaround, data_phase, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/syscon.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/syscon.h new file mode 100644 index 0000000..991e632 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/syscon.h @@ -0,0 +1,152 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SYSCON_H +#define Z_INCLUDE_SYSCALLS_SYSCON_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_syscon_get_base(const struct device * dev, uintptr_t * addr); + +__pinned_func +static inline int syscon_get_base(const struct device * dev, uintptr_t * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uintptr_t * val; } parm1 = { .val = addr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYSCON_GET_BASE); + } +#endif + compiler_barrier(); + return z_impl_syscon_get_base(dev, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_get_base(dev, addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_GET_BASE, syscon_get_base, dev, addr); syscall__retval = syscon_get_base(dev, addr); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_GET_BASE, syscon_get_base, dev, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_read_reg(const struct device * dev, uint32_t reg, uint32_t * val); + +__pinned_func +static inline int syscon_read_reg(const struct device * dev, uint32_t reg, uint32_t * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = reg }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SYSCON_READ_REG); + } +#endif + compiler_barrier(); + return z_impl_syscon_read_reg(dev, reg, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_read_reg(dev, reg, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_READ_REG, syscon_read_reg, dev, reg, val); syscall__retval = syscon_read_reg(dev, reg, val); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_READ_REG, syscon_read_reg, dev, reg, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_write_reg(const struct device * dev, uint32_t reg, uint32_t val); + +__pinned_func +static inline int syscon_write_reg(const struct device * dev, uint32_t reg, uint32_t val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = reg }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SYSCON_WRITE_REG); + } +#endif + compiler_barrier(); + return z_impl_syscon_write_reg(dev, reg, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_write_reg(dev, reg, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_WRITE_REG, syscon_write_reg, dev, reg, val); syscall__retval = syscon_write_reg(dev, reg, val); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_WRITE_REG, syscon_write_reg, dev, reg, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_update_bits(const struct device * dev, uint32_t reg, uint32_t mask, uint32_t val); + +__pinned_func +static inline int syscon_update_bits(const struct device * dev, uint32_t reg, uint32_t mask, uint32_t val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = reg }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = mask }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = val }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SYSCON_UPDATE_BITS); + } +#endif + compiler_barrier(); + return z_impl_syscon_update_bits(dev, reg, mask, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_update_bits(dev, reg, mask, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_UPDATE_BITS, syscon_update_bits, dev, reg, mask, val); syscall__retval = syscon_update_bits(dev, reg, mask, val); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_UPDATE_BITS, syscon_update_bits, dev, reg, mask, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_get_size(const struct device * dev, size_t * size); + +__pinned_func +static inline int syscon_get_size(const struct device * dev, size_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t * val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYSCON_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_syscon_get_size(dev, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_get_size(dev, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_GET_SIZE, syscon_get_size, dev, size); syscall__retval = syscon_get_size(dev, size); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_GET_SIZE, syscon_get_size, dev, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/tee.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/tee.h new file mode 100644 index 0000000..e579353 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/tee.h @@ -0,0 +1,307 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_TEE_H +#define Z_INCLUDE_SYSCALLS_TEE_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_tee_get_version(const struct device * dev, struct tee_version_info * info); + +__pinned_func +static inline int tee_get_version(const struct device * dev, struct tee_version_info * info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct tee_version_info * val; } parm1 = { .val = info }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TEE_GET_VERSION); + } +#endif + compiler_barrier(); + return z_impl_tee_get_version(dev, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_get_version(dev, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_GET_VERSION, tee_get_version, dev, info); syscall__retval = tee_get_version(dev, info); sys_port_trace_syscall_exit(K_SYSCALL_TEE_GET_VERSION, tee_get_version, dev, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_open_session(const struct device * dev, struct tee_open_session_arg * arg, unsigned int num_param, struct tee_param * param, uint32_t * session_id); + +__pinned_func +static inline int tee_open_session(const struct device * dev, struct tee_open_session_arg * arg, unsigned int num_param, struct tee_param * param, uint32_t * session_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct tee_open_session_arg * val; } parm1 = { .val = arg }; + union { uintptr_t x; unsigned int val; } parm2 = { .val = num_param }; + union { uintptr_t x; struct tee_param * val; } parm3 = { .val = param }; + union { uintptr_t x; uint32_t * val; } parm4 = { .val = session_id }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_TEE_OPEN_SESSION); + } +#endif + compiler_barrier(); + return z_impl_tee_open_session(dev, arg, num_param, param, session_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_open_session(dev, arg, num_param, param, session_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_OPEN_SESSION, tee_open_session, dev, arg, num_param, param, session_id); syscall__retval = tee_open_session(dev, arg, num_param, param, session_id); sys_port_trace_syscall_exit(K_SYSCALL_TEE_OPEN_SESSION, tee_open_session, dev, arg, num_param, param, session_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_close_session(const struct device * dev, uint32_t session_id); + +__pinned_func +static inline int tee_close_session(const struct device * dev, uint32_t session_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = session_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TEE_CLOSE_SESSION); + } +#endif + compiler_barrier(); + return z_impl_tee_close_session(dev, session_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_close_session(dev, session_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_CLOSE_SESSION, tee_close_session, dev, session_id); syscall__retval = tee_close_session(dev, session_id); sys_port_trace_syscall_exit(K_SYSCALL_TEE_CLOSE_SESSION, tee_close_session, dev, session_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_cancel(const struct device * dev, uint32_t session_id, uint32_t cancel_id); + +__pinned_func +static inline int tee_cancel(const struct device * dev, uint32_t session_id, uint32_t cancel_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = session_id }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = cancel_id }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_TEE_CANCEL); + } +#endif + compiler_barrier(); + return z_impl_tee_cancel(dev, session_id, cancel_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_cancel(dev, session_id, cancel_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_CANCEL, tee_cancel, dev, session_id, cancel_id); syscall__retval = tee_cancel(dev, session_id, cancel_id); sys_port_trace_syscall_exit(K_SYSCALL_TEE_CANCEL, tee_cancel, dev, session_id, cancel_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_invoke_func(const struct device * dev, struct tee_invoke_func_arg * arg, unsigned int num_param, struct tee_param * param); + +__pinned_func +static inline int tee_invoke_func(const struct device * dev, struct tee_invoke_func_arg * arg, unsigned int num_param, struct tee_param * param) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct tee_invoke_func_arg * val; } parm1 = { .val = arg }; + union { uintptr_t x; unsigned int val; } parm2 = { .val = num_param }; + union { uintptr_t x; struct tee_param * val; } parm3 = { .val = param }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TEE_INVOKE_FUNC); + } +#endif + compiler_barrier(); + return z_impl_tee_invoke_func(dev, arg, num_param, param); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_invoke_func(dev, arg, num_param, param) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_INVOKE_FUNC, tee_invoke_func, dev, arg, num_param, param); syscall__retval = tee_invoke_func(dev, arg, num_param, param); sys_port_trace_syscall_exit(K_SYSCALL_TEE_INVOKE_FUNC, tee_invoke_func, dev, arg, num_param, param, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_shm_register(const struct device * dev, void * addr, size_t size, uint32_t flags, struct tee_shm ** shm); + +__pinned_func +static inline int tee_shm_register(const struct device * dev, void * addr, size_t size, uint32_t flags, struct tee_shm ** shm) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; void * val; } parm1 = { .val = addr }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = flags }; + union { uintptr_t x; struct tee_shm ** val; } parm4 = { .val = shm }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_TEE_SHM_REGISTER); + } +#endif + compiler_barrier(); + return z_impl_tee_shm_register(dev, addr, size, flags, shm); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_shm_register(dev, addr, size, flags, shm) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_SHM_REGISTER, tee_shm_register, dev, addr, size, flags, shm); syscall__retval = tee_shm_register(dev, addr, size, flags, shm); sys_port_trace_syscall_exit(K_SYSCALL_TEE_SHM_REGISTER, tee_shm_register, dev, addr, size, flags, shm, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_shm_unregister(const struct device * dev, struct tee_shm * shm); + +__pinned_func +static inline int tee_shm_unregister(const struct device * dev, struct tee_shm * shm) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct tee_shm * val; } parm1 = { .val = shm }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TEE_SHM_UNREGISTER); + } +#endif + compiler_barrier(); + return z_impl_tee_shm_unregister(dev, shm); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_shm_unregister(dev, shm) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_SHM_UNREGISTER, tee_shm_unregister, dev, shm); syscall__retval = tee_shm_unregister(dev, shm); sys_port_trace_syscall_exit(K_SYSCALL_TEE_SHM_UNREGISTER, tee_shm_unregister, dev, shm, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_shm_alloc(const struct device * dev, size_t size, uint32_t flags, struct tee_shm ** shm); + +__pinned_func +static inline int tee_shm_alloc(const struct device * dev, size_t size, uint32_t flags, struct tee_shm ** shm) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = flags }; + union { uintptr_t x; struct tee_shm ** val; } parm3 = { .val = shm }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TEE_SHM_ALLOC); + } +#endif + compiler_barrier(); + return z_impl_tee_shm_alloc(dev, size, flags, shm); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_shm_alloc(dev, size, flags, shm) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_SHM_ALLOC, tee_shm_alloc, dev, size, flags, shm); syscall__retval = tee_shm_alloc(dev, size, flags, shm); sys_port_trace_syscall_exit(K_SYSCALL_TEE_SHM_ALLOC, tee_shm_alloc, dev, size, flags, shm, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_shm_free(const struct device * dev, struct tee_shm * shm); + +__pinned_func +static inline int tee_shm_free(const struct device * dev, struct tee_shm * shm) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct tee_shm * val; } parm1 = { .val = shm }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TEE_SHM_FREE); + } +#endif + compiler_barrier(); + return z_impl_tee_shm_free(dev, shm); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_shm_free(dev, shm) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_SHM_FREE, tee_shm_free, dev, shm); syscall__retval = tee_shm_free(dev, shm); sys_port_trace_syscall_exit(K_SYSCALL_TEE_SHM_FREE, tee_shm_free, dev, shm, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_suppl_recv(const struct device * dev, uint32_t * func, unsigned int * num_params, struct tee_param * param); + +__pinned_func +static inline int tee_suppl_recv(const struct device * dev, uint32_t * func, unsigned int * num_params, struct tee_param * param) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = func }; + union { uintptr_t x; unsigned int * val; } parm2 = { .val = num_params }; + union { uintptr_t x; struct tee_param * val; } parm3 = { .val = param }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TEE_SUPPL_RECV); + } +#endif + compiler_barrier(); + return z_impl_tee_suppl_recv(dev, func, num_params, param); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_suppl_recv(dev, func, num_params, param) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_SUPPL_RECV, tee_suppl_recv, dev, func, num_params, param); syscall__retval = tee_suppl_recv(dev, func, num_params, param); sys_port_trace_syscall_exit(K_SYSCALL_TEE_SUPPL_RECV, tee_suppl_recv, dev, func, num_params, param, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tee_suppl_send(const struct device * dev, unsigned int ret, unsigned int num_params, struct tee_param * param); + +__pinned_func +static inline int tee_suppl_send(const struct device * dev, unsigned int ret, unsigned int num_params, struct tee_param * param) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned int val; } parm1 = { .val = ret }; + union { uintptr_t x; unsigned int val; } parm2 = { .val = num_params }; + union { uintptr_t x; struct tee_param * val; } parm3 = { .val = param }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TEE_SUPPL_SEND); + } +#endif + compiler_barrier(); + return z_impl_tee_suppl_send(dev, ret, num_params, param); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tee_suppl_send(dev, ret, num_params, param) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TEE_SUPPL_SEND, tee_suppl_send, dev, ret, num_params, param); syscall__retval = tee_suppl_send(dev, ret, num_params, param); sys_port_trace_syscall_exit(K_SYSCALL_TEE_SUPPL_SEND, tee_suppl_send, dev, ret, num_params, param, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/time_units.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/time_units.h new file mode 100644 index 0000000..4d6fb28 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/time_units.h @@ -0,0 +1,50 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_TIME_UNITS_H +#define Z_INCLUDE_SYSCALLS_TIME_UNITS_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern unsigned int z_impl_sys_clock_hw_cycles_per_sec_runtime_get(void); + +__pinned_func +static inline unsigned int sys_clock_hw_cycles_per_sec_runtime_get(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (unsigned int) arch_syscall_invoke0(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET); + } +#endif + compiler_barrier(); + return z_impl_sys_clock_hw_cycles_per_sec_runtime_get(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_clock_hw_cycles_per_sec_runtime_get() ({ unsigned int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET, sys_clock_hw_cycles_per_sec_runtime_get); syscall__retval = sys_clock_hw_cycles_per_sec_runtime_get(); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET, sys_clock_hw_cycles_per_sec_runtime_get, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/timeaware_gpio.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/timeaware_gpio.h new file mode 100644 index 0000000..2b97560 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/timeaware_gpio.h @@ -0,0 +1,182 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_TIMEAWARE_GPIO_H +#define Z_INCLUDE_SYSCALLS_TIMEAWARE_GPIO_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_tgpio_port_get_time(const struct device * dev, uint64_t * current_time); + +__pinned_func +static inline int tgpio_port_get_time(const struct device * dev, uint64_t * current_time) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint64_t * val; } parm1 = { .val = current_time }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PORT_GET_TIME); + } +#endif + compiler_barrier(); + return z_impl_tgpio_port_get_time(dev, current_time); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_port_get_time(dev, current_time) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PORT_GET_TIME, tgpio_port_get_time, dev, current_time); syscall__retval = tgpio_port_get_time(dev, current_time); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PORT_GET_TIME, tgpio_port_get_time, dev, current_time, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_port_get_cycles_per_second(const struct device * dev, uint32_t * cycles); + +__pinned_func +static inline int tgpio_port_get_cycles_per_second(const struct device * dev, uint32_t * cycles) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = cycles }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND); + } +#endif + compiler_barrier(); + return z_impl_tgpio_port_get_cycles_per_second(dev, cycles); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_port_get_cycles_per_second(dev, cycles) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND, tgpio_port_get_cycles_per_second, dev, cycles); syscall__retval = tgpio_port_get_cycles_per_second(dev, cycles); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND, tgpio_port_get_cycles_per_second, dev, cycles, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_disable(const struct device * dev, uint32_t pin); + +__pinned_func +static inline int tgpio_pin_disable(const struct device * dev, uint32_t pin) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PIN_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_disable(dev, pin); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_disable(dev, pin) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_DISABLE, tgpio_pin_disable, dev, pin); syscall__retval = tgpio_pin_disable(dev, pin); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_DISABLE, tgpio_pin_disable, dev, pin, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_config_ext_timestamp(const struct device * dev, uint32_t pin, uint32_t event_polarity); + +__pinned_func +static inline int tgpio_pin_config_ext_timestamp(const struct device * dev, uint32_t pin, uint32_t event_polarity) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = event_polarity }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_config_ext_timestamp(dev, pin, event_polarity); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_config_ext_timestamp(dev, pin, event_polarity) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP, tgpio_pin_config_ext_timestamp, dev, pin, event_polarity); syscall__retval = tgpio_pin_config_ext_timestamp(dev, pin, event_polarity); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP, tgpio_pin_config_ext_timestamp, dev, pin, event_polarity, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_periodic_output(const struct device * dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable); + +__pinned_func +static inline int tgpio_pin_periodic_output(const struct device * dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm2 = { .val = start_time }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm3 = { .val = repeat_interval }; + union { uintptr_t x; bool val; } parm4 = { .val = periodic_enable }; + uintptr_t more[] = { + parm3.split.hi, + parm4.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, parm3.split.lo, (uintptr_t) &more, K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT, tgpio_pin_periodic_output, dev, pin, start_time, repeat_interval, periodic_enable); syscall__retval = tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT, tgpio_pin_periodic_output, dev, pin, start_time, repeat_interval, periodic_enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_read_ts_ec(const struct device * dev, uint32_t pin, uint64_t * timestamp, uint64_t * event_count); + +__pinned_func +static inline int tgpio_pin_read_ts_ec(const struct device * dev, uint32_t pin, uint64_t * timestamp, uint64_t * event_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + union { uintptr_t x; uint64_t * val; } parm2 = { .val = timestamp }; + union { uintptr_t x; uint64_t * val; } parm3 = { .val = event_count }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TGPIO_PIN_READ_TS_EC); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_READ_TS_EC, tgpio_pin_read_ts_ec, dev, pin, timestamp, event_count); syscall__retval = tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_READ_TS_EC, tgpio_pin_read_ts_ec, dev, pin, timestamp, event_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/uart.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/uart.h new file mode 100644 index 0000000..d7094ca --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/uart.h @@ -0,0 +1,612 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_UART_H +#define Z_INCLUDE_SYSCALLS_UART_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_uart_err_check(const struct device * dev); + +__pinned_func +static inline int uart_err_check(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_ERR_CHECK); + } +#endif + compiler_barrier(); + return z_impl_uart_err_check(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_err_check(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_ERR_CHECK, uart_err_check, dev); syscall__retval = uart_err_check(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_ERR_CHECK, uart_err_check, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_poll_in(const struct device * dev, unsigned char * p_char); + +__pinned_func +static inline int uart_poll_in(const struct device * dev, unsigned char * p_char) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned char * val; } parm1 = { .val = p_char }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_IN); + } +#endif + compiler_barrier(); + return z_impl_uart_poll_in(dev, p_char); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_in(dev, p_char) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_IN, uart_poll_in, dev, p_char); syscall__retval = uart_poll_in(dev, p_char); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_IN, uart_poll_in, dev, p_char, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_poll_in_u16(const struct device * dev, uint16_t * p_u16); + +__pinned_func +static inline int uart_poll_in_u16(const struct device * dev, uint16_t * p_u16) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t * val; } parm1 = { .val = p_u16 }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_IN_U16); + } +#endif + compiler_barrier(); + return z_impl_uart_poll_in_u16(dev, p_u16); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_in_u16(dev, p_u16) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_IN_U16, uart_poll_in_u16, dev, p_u16); syscall__retval = uart_poll_in_u16(dev, p_u16); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_IN_U16, uart_poll_in_u16, dev, p_u16, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_uart_poll_out(const struct device * dev, unsigned char out_char); + +__pinned_func +static inline void uart_poll_out(const struct device * dev, unsigned char out_char) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned char val; } parm1 = { .val = out_char }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_OUT); + return; + } +#endif + compiler_barrier(); + z_impl_uart_poll_out(dev, out_char); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_out(dev, out_char) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_OUT, uart_poll_out, dev, out_char); uart_poll_out(dev, out_char); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_OUT, uart_poll_out, dev, out_char); } while(false) +#endif +#endif + + +extern void z_impl_uart_poll_out_u16(const struct device * dev, uint16_t out_u16); + +__pinned_func +static inline void uart_poll_out_u16(const struct device * dev, uint16_t out_u16) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = out_u16 }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_OUT_U16); + return; + } +#endif + compiler_barrier(); + z_impl_uart_poll_out_u16(dev, out_u16); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_out_u16(dev, out_u16) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_OUT_U16, uart_poll_out_u16, dev, out_u16); uart_poll_out_u16(dev, out_u16); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_OUT_U16, uart_poll_out_u16, dev, out_u16); } while(false) +#endif +#endif + + +extern int z_impl_uart_configure(const struct device * dev, const struct uart_config * cfg); + +__pinned_func +static inline int uart_configure(const struct device * dev, const struct uart_config * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct uart_config * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_uart_configure(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_configure(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_CONFIGURE, uart_configure, dev, cfg); syscall__retval = uart_configure(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_UART_CONFIGURE, uart_configure, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_config_get(const struct device * dev, struct uart_config * cfg); + +__pinned_func +static inline int uart_config_get(const struct device * dev, struct uart_config * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct uart_config * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_CONFIG_GET); + } +#endif + compiler_barrier(); + return z_impl_uart_config_get(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_config_get(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_CONFIG_GET, uart_config_get, dev, cfg); syscall__retval = uart_config_get(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_UART_CONFIG_GET, uart_config_get, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_uart_irq_tx_enable(const struct device * dev); + +__pinned_func +static inline void uart_irq_tx_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_TX_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_tx_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_tx_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_TX_ENABLE, uart_irq_tx_enable, dev); uart_irq_tx_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_TX_ENABLE, uart_irq_tx_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_tx_disable(const struct device * dev); + +__pinned_func +static inline void uart_irq_tx_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_TX_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_tx_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_tx_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_TX_DISABLE, uart_irq_tx_disable, dev); uart_irq_tx_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_TX_DISABLE, uart_irq_tx_disable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_rx_enable(const struct device * dev); + +__pinned_func +static inline void uart_irq_rx_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_RX_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_rx_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_rx_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_RX_ENABLE, uart_irq_rx_enable, dev); uart_irq_rx_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_RX_ENABLE, uart_irq_rx_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_rx_disable(const struct device * dev); + +__pinned_func +static inline void uart_irq_rx_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_RX_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_rx_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_rx_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_RX_DISABLE, uart_irq_rx_disable, dev); uart_irq_rx_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_RX_DISABLE, uart_irq_rx_disable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_err_enable(const struct device * dev); + +__pinned_func +static inline void uart_irq_err_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_ERR_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_err_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_err_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_ERR_ENABLE, uart_irq_err_enable, dev); uart_irq_err_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_ERR_ENABLE, uart_irq_err_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_err_disable(const struct device * dev); + +__pinned_func +static inline void uart_irq_err_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_ERR_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_err_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_err_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_ERR_DISABLE, uart_irq_err_disable, dev); uart_irq_err_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_ERR_DISABLE, uart_irq_err_disable, dev); } while(false) +#endif +#endif + + +extern int z_impl_uart_irq_is_pending(const struct device * dev); + +__pinned_func +static inline int uart_irq_is_pending(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_IS_PENDING); + } +#endif + compiler_barrier(); + return z_impl_uart_irq_is_pending(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_is_pending(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_IS_PENDING, uart_irq_is_pending, dev); syscall__retval = uart_irq_is_pending(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_IS_PENDING, uart_irq_is_pending, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_irq_update(const struct device * dev); + +__pinned_func +static inline int uart_irq_update(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_UPDATE); + } +#endif + compiler_barrier(); + return z_impl_uart_irq_update(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_update(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_UPDATE, uart_irq_update, dev); syscall__retval = uart_irq_update(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_UPDATE, uart_irq_update, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_tx(const struct device * dev, const uint8_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_tx(const struct device * dev, const uint8_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_TX); + } +#endif + compiler_barrier(); + return z_impl_uart_tx(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_tx(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_TX, uart_tx, dev, buf, len, timeout); syscall__retval = uart_tx(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_TX, uart_tx, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_tx_u16(const struct device * dev, const uint16_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_tx_u16(const struct device * dev, const uint16_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint16_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_TX_U16); + } +#endif + compiler_barrier(); + return z_impl_uart_tx_u16(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_tx_u16(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_TX_U16, uart_tx_u16, dev, buf, len, timeout); syscall__retval = uart_tx_u16(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_TX_U16, uart_tx_u16, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_tx_abort(const struct device * dev); + +__pinned_func +static inline int uart_tx_abort(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_TX_ABORT); + } +#endif + compiler_barrier(); + return z_impl_uart_tx_abort(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_tx_abort(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_TX_ABORT, uart_tx_abort, dev); syscall__retval = uart_tx_abort(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_TX_ABORT, uart_tx_abort, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_rx_enable(const struct device * dev, uint8_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_rx_enable(const struct device * dev, uint8_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_RX_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_uart_rx_enable(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_rx_enable(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_ENABLE, uart_rx_enable, dev, buf, len, timeout); syscall__retval = uart_rx_enable(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_ENABLE, uart_rx_enable, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_rx_enable_u16(const struct device * dev, uint16_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_rx_enable_u16(const struct device * dev, uint16_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_RX_ENABLE_U16); + } +#endif + compiler_barrier(); + return z_impl_uart_rx_enable_u16(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_rx_enable_u16(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_ENABLE_U16, uart_rx_enable_u16, dev, buf, len, timeout); syscall__retval = uart_rx_enable_u16(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_ENABLE_U16, uart_rx_enable_u16, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_rx_disable(const struct device * dev); + +__pinned_func +static inline int uart_rx_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_RX_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_uart_rx_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_rx_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_DISABLE, uart_rx_disable, dev); syscall__retval = uart_rx_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_DISABLE, uart_rx_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_line_ctrl_set(const struct device * dev, uint32_t ctrl, uint32_t val); + +__pinned_func +static inline int uart_line_ctrl_set(const struct device * dev, uint32_t ctrl, uint32_t val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ctrl }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_LINE_CTRL_SET); + } +#endif + compiler_barrier(); + return z_impl_uart_line_ctrl_set(dev, ctrl, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_line_ctrl_set(dev, ctrl, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_LINE_CTRL_SET, uart_line_ctrl_set, dev, ctrl, val); syscall__retval = uart_line_ctrl_set(dev, ctrl, val); sys_port_trace_syscall_exit(K_SYSCALL_UART_LINE_CTRL_SET, uart_line_ctrl_set, dev, ctrl, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_line_ctrl_get(const struct device * dev, uint32_t ctrl, uint32_t * val); + +__pinned_func +static inline int uart_line_ctrl_get(const struct device * dev, uint32_t ctrl, uint32_t * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ctrl }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_LINE_CTRL_GET); + } +#endif + compiler_barrier(); + return z_impl_uart_line_ctrl_get(dev, ctrl, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_line_ctrl_get(dev, ctrl, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_LINE_CTRL_GET, uart_line_ctrl_get, dev, ctrl, val); syscall__retval = uart_line_ctrl_get(dev, ctrl, val); sys_port_trace_syscall_exit(K_SYSCALL_UART_LINE_CTRL_GET, uart_line_ctrl_get, dev, ctrl, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_drv_cmd(const struct device * dev, uint32_t cmd, uint32_t p); + +__pinned_func +static inline int uart_drv_cmd(const struct device * dev, uint32_t cmd, uint32_t p) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = cmd }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = p }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_DRV_CMD); + } +#endif + compiler_barrier(); + return z_impl_uart_drv_cmd(dev, cmd, p); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_drv_cmd(dev, cmd, p) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_DRV_CMD, uart_drv_cmd, dev, cmd, p); syscall__retval = uart_drv_cmd(dev, cmd, p); sys_port_trace_syscall_exit(K_SYSCALL_UART_DRV_CMD, uart_drv_cmd, dev, cmd, p, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/updatehub.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/updatehub.h new file mode 100644 index 0000000..1307ab4 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/updatehub.h @@ -0,0 +1,161 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_UPDATEHUB_H +#define Z_INCLUDE_SYSCALLS_UPDATEHUB_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_updatehub_autohandler(void); + +__pinned_func +static inline void updatehub_autohandler(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_AUTOHANDLER); + return; + } +#endif + compiler_barrier(); + z_impl_updatehub_autohandler(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_autohandler() do { sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_AUTOHANDLER, updatehub_autohandler); updatehub_autohandler(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_AUTOHANDLER, updatehub_autohandler); } while(false) +#endif +#endif + + +extern enum updatehub_response z_impl_updatehub_probe(void); + +__pinned_func +static inline enum updatehub_response updatehub_probe(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (enum updatehub_response) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_PROBE); + } +#endif + compiler_barrier(); + return z_impl_updatehub_probe(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_probe() ({ enum updatehub_response syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_PROBE, updatehub_probe); syscall__retval = updatehub_probe(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_PROBE, updatehub_probe, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern enum updatehub_response z_impl_updatehub_update(void); + +__pinned_func +static inline enum updatehub_response updatehub_update(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (enum updatehub_response) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_UPDATE); + } +#endif + compiler_barrier(); + return z_impl_updatehub_update(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_update() ({ enum updatehub_response syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_UPDATE, updatehub_update); syscall__retval = updatehub_update(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_UPDATE, updatehub_update, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_updatehub_confirm(void); + +__pinned_func +static inline int updatehub_confirm(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_CONFIRM); + } +#endif + compiler_barrier(); + return z_impl_updatehub_confirm(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_confirm() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_CONFIRM, updatehub_confirm); syscall__retval = updatehub_confirm(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_CONFIRM, updatehub_confirm, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_updatehub_reboot(void); + +__pinned_func +static inline int updatehub_reboot(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_REBOOT); + } +#endif + compiler_barrier(); + return z_impl_updatehub_reboot(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_reboot() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_REBOOT, updatehub_reboot); syscall__retval = updatehub_reboot(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_REBOOT, updatehub_reboot, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_updatehub_report_error(void); + +__pinned_func +static inline int updatehub_report_error(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_REPORT_ERROR); + } +#endif + compiler_barrier(); + return z_impl_updatehub_report_error(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_report_error() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_REPORT_ERROR, updatehub_report_error); syscall__retval = updatehub_report_error(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_REPORT_ERROR, updatehub_report_error, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/usb_bc12.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/usb_bc12.h new file mode 100644 index 0000000..7a6ff29 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/usb_bc12.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_USB_BC12_H +#define Z_INCLUDE_SYSCALLS_USB_BC12_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_bc12_set_role(const struct device * dev, enum bc12_role role); + +__pinned_func +static inline int bc12_set_role(const struct device * dev, enum bc12_role role) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum bc12_role val; } parm1 = { .val = role }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BC12_SET_ROLE); + } +#endif + compiler_barrier(); + return z_impl_bc12_set_role(dev, role); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bc12_set_role(dev, role) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BC12_SET_ROLE, bc12_set_role, dev, role); syscall__retval = bc12_set_role(dev, role); sys_port_trace_syscall_exit(K_SYSCALL_BC12_SET_ROLE, bc12_set_role, dev, role, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bc12_set_result_cb(const struct device * dev, bc12_callback_t cb, void * user_data); + +__pinned_func +static inline int bc12_set_result_cb(const struct device * dev, bc12_callback_t cb, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bc12_callback_t val; } parm1 = { .val = cb }; + union { uintptr_t x; void * val; } parm2 = { .val = user_data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_BC12_SET_RESULT_CB); + } +#endif + compiler_barrier(); + return z_impl_bc12_set_result_cb(dev, cb, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bc12_set_result_cb(dev, cb, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BC12_SET_RESULT_CB, bc12_set_result_cb, dev, cb, user_data); syscall__retval = bc12_set_result_cb(dev, cb, user_data); sys_port_trace_syscall_exit(K_SYSCALL_BC12_SET_RESULT_CB, bc12_set_result_cb, dev, cb, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/w1.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/w1.h new file mode 100644 index 0000000..4fdd7a9 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/w1.h @@ -0,0 +1,294 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_W1_H +#define Z_INCLUDE_SYSCALLS_W1_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_w1_change_bus_lock(const struct device * dev, bool lock); + +__pinned_func +static inline int w1_change_bus_lock(const struct device * dev, bool lock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = lock }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_CHANGE_BUS_LOCK); + } +#endif + compiler_barrier(); + return z_impl_w1_change_bus_lock(dev, lock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_change_bus_lock(dev, lock) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_CHANGE_BUS_LOCK, w1_change_bus_lock, dev, lock); syscall__retval = w1_change_bus_lock(dev, lock); sys_port_trace_syscall_exit(K_SYSCALL_W1_CHANGE_BUS_LOCK, w1_change_bus_lock, dev, lock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_reset_bus(const struct device * dev); + +__pinned_func +static inline int w1_reset_bus(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_RESET_BUS); + } +#endif + compiler_barrier(); + return z_impl_w1_reset_bus(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_reset_bus(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_RESET_BUS, w1_reset_bus, dev); syscall__retval = w1_reset_bus(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_RESET_BUS, w1_reset_bus, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_read_bit(const struct device * dev); + +__pinned_func +static inline int w1_read_bit(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_READ_BIT); + } +#endif + compiler_barrier(); + return z_impl_w1_read_bit(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_read_bit(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BIT, w1_read_bit, dev); syscall__retval = w1_read_bit(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BIT, w1_read_bit, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_write_bit(const struct device * dev, const bool bit); + +__pinned_func +static inline int w1_write_bit(const struct device * dev, const bool bit) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const bool val; } parm1 = { .val = bit }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_WRITE_BIT); + } +#endif + compiler_barrier(); + return z_impl_w1_write_bit(dev, bit); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_write_bit(dev, bit) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BIT, w1_write_bit, dev, bit); syscall__retval = w1_write_bit(dev, bit); sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BIT, w1_write_bit, dev, bit, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_read_byte(const struct device * dev); + +__pinned_func +static inline int w1_read_byte(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_READ_BYTE); + } +#endif + compiler_barrier(); + return z_impl_w1_read_byte(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_read_byte(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BYTE, w1_read_byte, dev); syscall__retval = w1_read_byte(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BYTE, w1_read_byte, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_write_byte(const struct device * dev, uint8_t byte); + +__pinned_func +static inline int w1_write_byte(const struct device * dev, uint8_t byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = byte }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_WRITE_BYTE); + } +#endif + compiler_barrier(); + return z_impl_w1_write_byte(dev, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_write_byte(dev, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BYTE, w1_write_byte, dev, byte); syscall__retval = w1_write_byte(dev, byte); sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BYTE, w1_write_byte, dev, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_read_block(const struct device * dev, uint8_t * buffer, size_t len); + +__pinned_func +static inline int w1_read_block(const struct device * dev, uint8_t * buffer, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_READ_BLOCK); + } +#endif + compiler_barrier(); + return z_impl_w1_read_block(dev, buffer, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_read_block(dev, buffer, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BLOCK, w1_read_block, dev, buffer, len); syscall__retval = w1_read_block(dev, buffer, len); sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BLOCK, w1_read_block, dev, buffer, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_write_block(const struct device * dev, const uint8_t * buffer, size_t len); + +__pinned_func +static inline int w1_write_block(const struct device * dev, const uint8_t * buffer, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_WRITE_BLOCK); + } +#endif + compiler_barrier(); + return z_impl_w1_write_block(dev, buffer, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_write_block(dev, buffer, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BLOCK, w1_write_block, dev, buffer, len); syscall__retval = w1_write_block(dev, buffer, len); sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BLOCK, w1_write_block, dev, buffer, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_w1_get_slave_count(const struct device * dev); + +__pinned_func +static inline size_t w1_get_slave_count(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_GET_SLAVE_COUNT); + } +#endif + compiler_barrier(); + return z_impl_w1_get_slave_count(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_get_slave_count(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_GET_SLAVE_COUNT, w1_get_slave_count, dev); syscall__retval = w1_get_slave_count(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_GET_SLAVE_COUNT, w1_get_slave_count, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_configure(const struct device * dev, enum w1_settings_type type, uint32_t value); + +__pinned_func +static inline int w1_configure(const struct device * dev, enum w1_settings_type type, uint32_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum w1_settings_type val; } parm1 = { .val = type }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_w1_configure(dev, type, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_configure(dev, type, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_CONFIGURE, w1_configure, dev, type, value); syscall__retval = w1_configure(dev, type, value); sys_port_trace_syscall_exit(K_SYSCALL_W1_CONFIGURE, w1_configure, dev, type, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_search_bus(const struct device * dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void * user_data); + +__pinned_func +static inline int w1_search_bus(const struct device * dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = command }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = family }; + union { uintptr_t x; w1_search_callback_t val; } parm3 = { .val = callback }; + union { uintptr_t x; void * val; } parm4 = { .val = user_data }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_W1_SEARCH_BUS); + } +#endif + compiler_barrier(); + return z_impl_w1_search_bus(dev, command, family, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_search_bus(dev, command, family, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_SEARCH_BUS, w1_search_bus, dev, command, family, callback, user_data); syscall__retval = w1_search_bus(dev, command, family, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_W1_SEARCH_BUS, w1_search_bus, dev, command, family, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/watchdog.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/watchdog.h new file mode 100644 index 0000000..7bfc784 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/syscalls/watchdog.h @@ -0,0 +1,99 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_WATCHDOG_H +#define Z_INCLUDE_SYSCALLS_WATCHDOG_H + + +#include + +#ifndef _ASMLANGUAGE + +#include + +#include +#include + +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_wdt_setup(const struct device * dev, uint8_t options); + +__pinned_func +static inline int wdt_setup(const struct device * dev, uint8_t options) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = options }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_WDT_SETUP); + } +#endif + compiler_barrier(); + return z_impl_wdt_setup(dev, options); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define wdt_setup(dev, options) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_WDT_SETUP, wdt_setup, dev, options); syscall__retval = wdt_setup(dev, options); sys_port_trace_syscall_exit(K_SYSCALL_WDT_SETUP, wdt_setup, dev, options, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_wdt_disable(const struct device * dev); + +__pinned_func +static inline int wdt_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_WDT_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_wdt_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define wdt_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_WDT_DISABLE, wdt_disable, dev); syscall__retval = wdt_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_WDT_DISABLE, wdt_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_wdt_feed(const struct device * dev, int channel_id); + +__pinned_func +static inline int wdt_feed(const struct device * dev, int channel_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = channel_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_WDT_FEED); + } +#endif + compiler_barrier(); + return z_impl_wdt_feed(dev, channel_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define wdt_feed(dev, channel_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_WDT_FEED, wdt_feed, dev, channel_id); syscall__retval = wdt_feed(dev, channel_id); sys_port_trace_syscall_exit(K_SYSCALL_WDT_FEED, wdt_feed, dev, channel_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/version.h b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/version.h new file mode 100644 index 0000000..56ffb01 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/include/generated/zephyr/version.h @@ -0,0 +1,26 @@ +#ifndef _KERNEL_VERSION_H_ +#define _KERNEL_VERSION_H_ + +/* The template values come from cmake/modules/version.cmake + * BUILD_VERSION related template values will be 'git describe', + * alternatively user defined BUILD_VERSION. + */ + +#define ZEPHYR_VERSION_CODE 263267 +#define ZEPHYR_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) + +#define KERNELVERSION 0x4046300 +#define KERNEL_VERSION_NUMBER 0x40463 +#define KERNEL_VERSION_MAJOR 4 +#define KERNEL_VERSION_MINOR 4 +#define KERNEL_PATCHLEVEL 99 +#define KERNEL_TWEAK 0 +#define KERNEL_EXTRAVERSION +#define KERNEL_VERSION_STRING "4.4.99" +#define KERNEL_VERSION_EXTENDED_STRING "4.4.99+0" +#define KERNEL_VERSION_TWEAK_STRING "4.4.99+0" + +#define BUILD_VERSION v4.4.0-2773-g4424aa681e0b + + +#endif /* _KERNEL_VERSION_H_ */ diff --git a/zephyrproject/build/mcuboot/zephyr/isr_tables.c b/zephyrproject/build/mcuboot/zephyr/isr_tables.c new file mode 100644 index 0000000..1a6681e --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/isr_tables.c @@ -0,0 +1,198 @@ + +/* AUTO-GENERATED by gen_isr_tables.py, do not edit! */ + +#include +#include +#include +#include + +typedef void (* ISR)(const void *); +const uintptr_t __irq_vector_table _irq_vector_table[92] = { + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), +}; + +const struct _isr_table_entry __sw_isr_table _sw_isr_table[92] = { + {(const void *)0x0, (ISR)z_irq_spurious}, /* 0 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 1 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 2 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 3 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 4 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 5 */ + {(const void *)0x80052da, (ISR)0x8001d21}, /* 6 */ + {(const void *)0x80052d8, (ISR)0x8001d21}, /* 7 */ + {(const void *)0x80052d6, (ISR)0x8001d21}, /* 8 */ + {(const void *)0x80052d4, (ISR)0x8001d21}, /* 9 */ + {(const void *)0x80052d2, (ISR)0x8001d21}, /* 10 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 11 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 12 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 13 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 14 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 15 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 16 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 17 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 18 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 19 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 20 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 21 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 22 */ + {(const void *)0x80052d0, (ISR)0x8001d21}, /* 23 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 24 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 25 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 26 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 27 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 28 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 29 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 30 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 31 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 32 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 33 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 34 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 35 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 36 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 37 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 38 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 39 */ + {(const void *)0x80052ce, (ISR)0x8001d21}, /* 40 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 41 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 42 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 43 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 44 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 45 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 46 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 47 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 48 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 49 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 50 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 51 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 52 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 53 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 54 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 55 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 56 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 57 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 58 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 59 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 60 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 61 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 62 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 63 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 64 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 65 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 66 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 67 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 68 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 69 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 70 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 71 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 72 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 73 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 74 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 75 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 76 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 77 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 78 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 79 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 80 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 81 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 82 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 83 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 84 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 85 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 86 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 87 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 88 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 89 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 90 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 91 */ +}; diff --git a/zephyrproject/build/mcuboot/zephyr/isr_tables_swi.ld b/zephyrproject/build/mcuboot/zephyr/isr_tables_swi.ld new file mode 100644 index 0000000..710cecc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/isr_tables_swi.ld @@ -0,0 +1 @@ +/* Empty */ diff --git a/zephyrproject/build/mcuboot/zephyr/isr_tables_vt.ld b/zephyrproject/build/mcuboot/zephyr/isr_tables_vt.ld new file mode 100644 index 0000000..710cecc --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/isr_tables_vt.ld @@ -0,0 +1 @@ +/* Empty */ diff --git a/zephyrproject/build/mcuboot/zephyr/kconfig/sources.txt b/zephyrproject/build/mcuboot/zephyr/kconfig/sources.txt new file mode 100644 index 0000000..13b5489 --- /dev/null +++ b/zephyrproject/build/mcuboot/zephyr/kconfig/sources.txt @@ -0,0 +1,4667 @@ +/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig.firmware_loader +/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/Kconfig.serial_recovery +/home/jeremy/utat-dev/zephyrproject/bootloader/mcuboot/boot/zephyr/VERSION +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/Kconfig.dts +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/Kconfig.modules +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/arch/Kconfig +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.defconfig +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/boards/Kconfig.nucleo_g431rb +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.defconfig +/home/jeremy/utat-dev/zephyrproject/build/mcuboot/Kconfig/soc/Kconfig.soc +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/DFM/kernelports/Zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/DFM/kernelports/Zephyr/storageports/Filesystem/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/DFM/kernelports/Zephyr/storageports/Flash/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.BufferAllocation +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.Debug +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.EntryTable +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.ISR +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.InternalBuffer +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.StackMonitor +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.StartMode +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.StreamPort +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.TraceControl +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/config/Kconfig/Kconfig.TraceCoverage +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/kernelports/ESP-IDF_FreeRTOS/streamports/ESP_IDF_APPTRACE/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/kernelports/Zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/kernelports/Zephyr/streamports/Semihost/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/ARM_ITM/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/File/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/Jlink_RTT/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/RingBuffer/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/STM32_USB_CDC/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/TCPIP/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/TraceRecorder/streamports/UDP/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/debug/percepio/zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +/home/jeremy/utat-dev/zephyrproject/modules/hal/espressif/zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/intel/zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/intel/zephyr/bsp_sedi/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/intel/zephyr/subsys/logging/backends/Kconfig.i2c +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/ameba/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/ameba/amebad/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/ameba/amebadplus/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/ameba/amebag2/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/ameba/common/wifi/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/adc/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/bluetooth/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/can/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/codec/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/dma/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/gpio/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/i2c/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/i2s/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/ir/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/irq/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/keyscan/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/mac_802154/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/pinmux/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/pwm/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/qdec/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/rcc/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/rtc/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/sdhc/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/spi/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/timer/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/uart/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/usb/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/realtek/bee/drivers/wdt/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/telink/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/hal/telink/tlsr9/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/lib/gui/lvgl/zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/modules/lib/picolibc/zephyr/Kconfig +/home/jeremy/utat-dev/zephyrproject/zephyr/Kconfig.constants +/home/jeremy/utat-dev/zephyrproject/zephyr/Kconfig.zephyr +/home/jeremy/utat-dev/zephyrproject/zephyr/arch/Kconfig +/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arc/Kconfig +/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arc/core/dsp/Kconfig +/home/jeremy/utat-dev/zephyrproject/zephyr/arch/arc/core/mpu/Kconfig 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